1/* 2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995 3 * 4 * This software may be used, modified, copied, distributed, and sold, in 5 * both source and binary form provided that the above copyright, these 6 * terms and the following disclaimer are retained. The name of the author 7 * and/or the contributor may not be used to endorse or promote products 8 * derived from this software without specific prior written permission. 9 * 10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND 11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE 14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION. 17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 20 * SUCH DAMAGE. 21 */ 22 23/*
| 1/* 2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995 3 * 4 * This software may be used, modified, copied, distributed, and sold, in 5 * both source and binary form provided that the above copyright, these 6 * terms and the following disclaimer are retained. The name of the author 7 * and/or the contributor may not be used to endorse or promote products 8 * derived from this software without specific prior written permission. 9 * 10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND 11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE 14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION. 17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 20 * SUCH DAMAGE. 21 */ 22 23/*
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24 * $Id: if_fe.c,v 1.43 1998/10/22 05:58:39 bde Exp $
| 24 * $Id: if_fe.c,v 1.20.2.4 1997/11/29 04:45:41 steve Exp $
|
25 * 26 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
| 25 * 26 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
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27 * To be used with FreeBSD 2.x
| 27 * To be used with FreeBSD 3.x
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28 * Contributed by M. Sekiguchi. <seki@sysrap.cs.fujitsu.co.jp> 29 * 30 * This version is intended to be a generic template for various 31 * MB86960A/MB86965A based Ethernet cards. It currently supports 32 * Fujitsu FMV-180 series for ISA and Allied-Telesis AT1700/RE2000 33 * series for ISA, as well as Fujitsu MBH10302 PC card. 34 * There are some currently- 35 * unused hooks embedded, which are primarily intended to support 36 * other types of Ethernet cards, but the author is not sure whether 37 * they are useful. 38 *
| 28 * Contributed by M. Sekiguchi. <seki@sysrap.cs.fujitsu.co.jp> 29 * 30 * This version is intended to be a generic template for various 31 * MB86960A/MB86965A based Ethernet cards. It currently supports 32 * Fujitsu FMV-180 series for ISA and Allied-Telesis AT1700/RE2000 33 * series for ISA, as well as Fujitsu MBH10302 PC card. 34 * There are some currently- 35 * unused hooks embedded, which are primarily intended to support 36 * other types of Ethernet cards, but the author is not sure whether 37 * they are useful. 38 *
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39 * This version also includes some alignments for 40 * RE1000/RE1000+/ME1500 support. It is incomplete, however, since the 41 * cards are not for AT-compatibles. (They are for PC98 bus -- a 42 * proprietary bus architecture available only in Japan.) Further 43 * work for PC98 version will be available as a part of FreeBSD(98) 44 * project.
| 39 * This version also includes some alignments to support RE1000, 40 * C-NET(98)P2 and so on. These cards are not for AT-compatibles, 41 * but for NEC PC-98 bus -- a proprietary bus architecture available 42 * only in Japan. Confusingly, it is different from the Microsoft's 43 * PC98 architecture. :-{ 44 * Further work for PC-98 version will be available as a part of 45 * FreeBSD(98) project.
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45 * 46 * This software is a derivative work of if_ed.c version 1.56 by David 47 * Greenman available as a part of FreeBSD 2.0 RELEASE source distribution. 48 * 49 * The following lines are retained from the original if_ed.c: 50 * 51 * Copyright (C) 1993, David Greenman. This software may be used, modified, 52 * copied, distributed, and sold, in both source and binary form provided 53 * that the above copyright and these terms are retained. Under no 54 * circumstances is the author responsible for the proper functioning 55 * of this software, nor does the author assume any responsibility 56 * for damages incurred with its use. 57 */ 58 59/* 60 * TODO:
| 46 * 47 * This software is a derivative work of if_ed.c version 1.56 by David 48 * Greenman available as a part of FreeBSD 2.0 RELEASE source distribution. 49 * 50 * The following lines are retained from the original if_ed.c: 51 * 52 * Copyright (C) 1993, David Greenman. This software may be used, modified, 53 * copied, distributed, and sold, in both source and binary form provided 54 * that the above copyright and these terms are retained. Under no 55 * circumstances is the author responsible for the proper functioning 56 * of this software, nor does the author assume any responsibility 57 * for damages incurred with its use. 58 */ 59 60/* 61 * TODO:
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61 * o To support MBH10304 PC card. It is another MB8696x based 62 * PCMCIA Ethernet card by Fujitsu, which is not compatible with 63 * MBH10302. 64 * o To merge FreeBSD(98) efforts into a single source file.
| |
65 * o To support ISA PnP auto configuration for FMV-183/184. 66 * o To reconsider mbuf usage. 67 * o To reconsider transmission buffer usage, including 68 * transmission buffer size (currently 4KB x 2) and pros-and- 69 * cons of multiple frame transmission. 70 * o To test IPX codes.
| 62 * o To support ISA PnP auto configuration for FMV-183/184. 63 * o To reconsider mbuf usage. 64 * o To reconsider transmission buffer usage, including 65 * transmission buffer size (currently 4KB x 2) and pros-and- 66 * cons of multiple frame transmission. 67 * o To test IPX codes.
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| 68 * o To test FreeBSD3.0-current. 69 * o To test BRIDGE codes.
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71 */ 72 73#include "fe.h" 74#include "bpfilter.h" 75#include "opt_inet.h" 76#include "opt_ipx.h" 77 78#include <sys/param.h> 79#include <sys/systm.h> 80#include <sys/sockio.h> 81#include <sys/mbuf.h> 82#include <sys/socket.h>
| 70 */ 71 72#include "fe.h" 73#include "bpfilter.h" 74#include "opt_inet.h" 75#include "opt_ipx.h" 76 77#include <sys/param.h> 78#include <sys/systm.h> 79#include <sys/sockio.h> 80#include <sys/mbuf.h> 81#include <sys/socket.h>
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83#include <sys/syslog.h>
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84 85#include <net/if.h> 86#include <net/if_dl.h>
| 82 83#include <net/if.h> 84#include <net/if_dl.h>
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| 85#include <net/if_mib.h> 86#include <net/if_media.h> 87#include <net/if_types.h>
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87 88#ifdef INET 89#include <netinet/in.h> 90#include <netinet/if_ether.h> 91#endif 92 93/* IPX code is not tested. FIXME. */ 94#ifdef IPX 95#include <netipx/ipx.h> 96#include <netipx/ipx_if.h> 97#endif 98 99/* To be used with IPv6 package of INRIA. */ 100#ifdef INET6 101/* IPv6 added by shin 96.2.6 */ 102#include <netinet/if_ether6.h> 103#endif 104 105/* XNS code is not tested. FIXME. */ 106#ifdef NS 107#include <netns/ns.h> 108#include <netns/ns_if.h> 109#endif 110 111#if NBPFILTER > 0 112#include <net/bpf.h> 113#endif 114
| 88 89#ifdef INET 90#include <netinet/in.h> 91#include <netinet/if_ether.h> 92#endif 93 94/* IPX code is not tested. FIXME. */ 95#ifdef IPX 96#include <netipx/ipx.h> 97#include <netipx/ipx_if.h> 98#endif 99 100/* To be used with IPv6 package of INRIA. */ 101#ifdef INET6 102/* IPv6 added by shin 96.2.6 */ 103#include <netinet/if_ether6.h> 104#endif 105 106/* XNS code is not tested. FIXME. */ 107#ifdef NS 108#include <netns/ns.h> 109#include <netns/ns_if.h> 110#endif 111 112#if NBPFILTER > 0 113#include <net/bpf.h> 114#endif 115
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| 116#ifdef BRIDGE 117#include <net/bridge.h> 118#endif 119
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115#include <machine/clock.h> 116 117#include <i386/isa/isa_device.h> 118#include <i386/isa/icu.h> 119 120/* PCCARD suport */ 121#include "card.h" 122#if NCARD > 0 123#include <sys/kernel.h> 124#include <sys/select.h> 125#include <pccard/cardinfo.h> 126#include <pccard/slot.h> 127#endif 128 129#include <i386/isa/ic/mb86960.h> 130#include <i386/isa/if_fereg.h> 131 132/*
| 120#include <machine/clock.h> 121 122#include <i386/isa/isa_device.h> 123#include <i386/isa/icu.h> 124 125/* PCCARD suport */ 126#include "card.h" 127#if NCARD > 0 128#include <sys/kernel.h> 129#include <sys/select.h> 130#include <pccard/cardinfo.h> 131#include <pccard/slot.h> 132#endif 133 134#include <i386/isa/ic/mb86960.h> 135#include <i386/isa/if_fereg.h> 136 137/*
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133 * This version of fe is an ISA device driver. 134 * Override the following macro to adapt it to another bus. 135 * (E.g., PC98.) 136 */ 137#define DEVICE struct isa_device 138 139/*
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140 * Default settings for fe driver specific options. 141 * They can be set in config file by "options" statements. 142 */ 143 144/*
| 138 * Default settings for fe driver specific options. 139 * They can be set in config file by "options" statements. 140 */ 141 142/*
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145 * Debug control. 146 * 0: No debug at all. All debug specific codes are stripped off. 147 * 1: Silent. No debug messages are logged except emergent ones. 148 * 2: Brief. Lair events and/or important information are logged. 149 * 3: Detailed. Logs all information which *may* be useful for debugging. 150 * 4: Trace. All actions in the driver is logged. Super verbose. 151 */ 152#ifndef FE_DEBUG 153#define FE_DEBUG 1 154#endif 155 156/*
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157 * Transmit just one packet per a "send" command to 86960. 158 * This option is intended for performance test. An EXPERIMENTAL option. 159 */ 160#ifndef FE_SINGLE_TRANSMISSION 161#define FE_SINGLE_TRANSMISSION 0 162#endif 163 164/*
| 143 * Transmit just one packet per a "send" command to 86960. 144 * This option is intended for performance test. An EXPERIMENTAL option. 145 */ 146#ifndef FE_SINGLE_TRANSMISSION 147#define FE_SINGLE_TRANSMISSION 0 148#endif 149 150/*
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| 151 * Maximum loops when interrupt. 152 * This option prevents an infinite loop due to hardware failure. 153 * (Some laptops make an infinite loop after PC-Card is ejected.) 154 */ 155#ifndef FE_MAX_LOOP 156#define FE_MAX_LOOP 0x800 157#endif 158 159/* 160 * If you define this option, 8-bit cards are also supported. 161 */ 162/*#define FE_8BIT_SUPPORT*/ 163 164/*
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165 * Device configuration flags. 166 */ 167 168/* DLCR6 settings. */ 169#define FE_FLAGS_DLCR6_VALUE 0x007F 170 171/* Force DLCR6 override. */ 172#define FE_FLAGS_OVERRIDE_DLCR6 0x0080 173 174/* Shouldn't these be defined somewhere else such as isa_device.h? */ 175#define NO_IOADDR (-1) 176#define NO_IRQ 0 177 178/* 179 * Data type for a multicast address filter on 8696x. 180 */ 181struct fe_filter { u_char data [ FE_FILTER_LEN ]; }; 182 183/* 184 * Special filter values. 185 */ 186static struct fe_filter const fe_filter_nothing = { FE_FILTER_NOTHING }; 187static struct fe_filter const fe_filter_all = { FE_FILTER_ALL }; 188 189/* How many registers does an fe-supported adapter have at maximum? */ 190#define MAXREGISTERS 32 191 192/* 193 * fe_softc: per line info and status 194 */ 195static struct fe_softc { 196 197 /* Used by "common" codes. */ 198 struct arpcom arpcom; /* Ethernet common */ 199 200 /* Used by config codes. */ 201 202 /* Set by probe() and not modified in later phases. */
| 165 * Device configuration flags. 166 */ 167 168/* DLCR6 settings. */ 169#define FE_FLAGS_DLCR6_VALUE 0x007F 170 171/* Force DLCR6 override. */ 172#define FE_FLAGS_OVERRIDE_DLCR6 0x0080 173 174/* Shouldn't these be defined somewhere else such as isa_device.h? */ 175#define NO_IOADDR (-1) 176#define NO_IRQ 0 177 178/* 179 * Data type for a multicast address filter on 8696x. 180 */ 181struct fe_filter { u_char data [ FE_FILTER_LEN ]; }; 182 183/* 184 * Special filter values. 185 */ 186static struct fe_filter const fe_filter_nothing = { FE_FILTER_NOTHING }; 187static struct fe_filter const fe_filter_all = { FE_FILTER_ALL }; 188 189/* How many registers does an fe-supported adapter have at maximum? */ 190#define MAXREGISTERS 32 191 192/* 193 * fe_softc: per line info and status 194 */ 195static struct fe_softc { 196 197 /* Used by "common" codes. */ 198 struct arpcom arpcom; /* Ethernet common */ 199 200 /* Used by config codes. */ 201 202 /* Set by probe() and not modified in later phases. */
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203 char * typestr; /* printable name of the interface. */
| 203 char const * typestr; /* printable name of the interface. */
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204 u_short iobase; /* base I/O address of the adapter. */
| 204 u_short iobase; /* base I/O address of the adapter. */
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205 u_short ioaddr [ MAXREGISTERS ]; /* I/O addresses of register. */
| 205 u_short ioaddr [ MAXREGISTERS ]; /* I/O addresses of registers. */
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206 u_short txb_size; /* size of TX buffer, in bytes */ 207 u_char proto_dlcr4; /* DLCR4 prototype. */ 208 u_char proto_dlcr5; /* DLCR5 prototype. */ 209 u_char proto_dlcr6; /* DLCR6 prototype. */ 210 u_char proto_dlcr7; /* DLCR7 prototype. */ 211 u_char proto_bmpr13; /* BMPR13 prototype. */
| 206 u_short txb_size; /* size of TX buffer, in bytes */ 207 u_char proto_dlcr4; /* DLCR4 prototype. */ 208 u_char proto_dlcr5; /* DLCR5 prototype. */ 209 u_char proto_dlcr6; /* DLCR6 prototype. */ 210 u_char proto_dlcr7; /* DLCR7 prototype. */ 211 u_char proto_bmpr13; /* BMPR13 prototype. */
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| 212 u_char stability; /* How stable is this? */ 213 u_short priv_info; /* info specific to a vendor/model. */
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212
| 214
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213 /* Vendor specific hooks. */ 214 void ( * init )( struct fe_softc * ); /* Just before fe_init(). */ 215 void ( * stop )( struct fe_softc * ); /* Just after fe_stop(). */
| 215 /* Vendor/model specific hooks. */ 216 void (*init)(struct fe_softc *); /* Just before fe_init(). */ 217 void (*stop)(struct fe_softc *); /* Just after fe_stop(). */
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216 217 /* Transmission buffer management. */ 218 u_short txb_free; /* free bytes in TX buffer */ 219 u_char txb_count; /* number of packets in TX buffer */ 220 u_char txb_sched; /* number of scheduled packets */ 221
| 218 219 /* Transmission buffer management. */ 220 u_short txb_free; /* free bytes in TX buffer */ 221 u_char txb_count; /* number of packets in TX buffer */ 222 u_char txb_sched; /* number of scheduled packets */ 223
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222 /* Excessive collision counter (see fe_tint() for details. */
| 224 /* Excessive collision counter (see fe_tint() for details.) */
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223 u_char tx_excolls; /* # of excessive collisions. */ 224 225 /* Multicast address filter management. */ 226 u_char filter_change; /* MARs must be changed ASAP. */ 227 struct fe_filter filter;/* new filter value. */ 228
| 225 u_char tx_excolls; /* # of excessive collisions. */ 226 227 /* Multicast address filter management. */ 228 u_char filter_change; /* MARs must be changed ASAP. */ 229 struct fe_filter filter;/* new filter value. */ 230
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| 231 /* Network management. */ 232 struct ifmib_iso_8802_3 mibdata; 233 234 /* Media information. */ 235 struct ifmedia media; /* used by if_media. */ 236 u_short mbitmap; /* bitmap for supported media; see bit2media */ 237 int defmedia; /* default media */ 238 void (* msel)(struct fe_softc *); /* media selector. */ 239
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229} fe_softc[NFE]; 230 231#define sc_if arpcom.ac_if 232#define sc_unit arpcom.ac_if.if_unit 233#define sc_enaddr arpcom.ac_enaddr 234 235/* Standard driver entry points. These can be static. */ 236static int fe_probe ( struct isa_device * ); 237static int fe_attach ( struct isa_device * );
| 240} fe_softc[NFE]; 241 242#define sc_if arpcom.ac_if 243#define sc_unit arpcom.ac_if.if_unit 244#define sc_enaddr arpcom.ac_enaddr 245 246/* Standard driver entry points. These can be static. */ 247static int fe_probe ( struct isa_device * ); 248static int fe_attach ( struct isa_device * );
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238static void fe_init ( int );
| 249static void fe_init ( void * );
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239static ointhand2_t feintr; 240static int fe_ioctl ( struct ifnet *, u_long, caddr_t ); 241static void fe_start ( struct ifnet * );
| 250static ointhand2_t feintr; 251static int fe_ioctl ( struct ifnet *, u_long, caddr_t ); 252static void fe_start ( struct ifnet * );
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242static void fe_reset ( int );
| |
243static void fe_watchdog ( struct ifnet * );
| 253static void fe_watchdog ( struct ifnet * );
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| 254static int fe_medchange ( struct ifnet * ); 255static void fe_medstat ( struct ifnet *, struct ifmediareq * );
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244 245/* Local functions. Order of declaration is confused. FIXME. */
| 256 257/* Local functions. Order of declaration is confused. FIXME. */
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246static int fe_probe_fmv ( DEVICE *, struct fe_softc * ); 247static int fe_probe_ati ( DEVICE *, struct fe_softc * ); 248static void fe_init_ati ( struct fe_softc * ); 249static int fe_probe_gwy ( DEVICE *, struct fe_softc * );
| 258static int fe_probe_ssi ( struct isa_device *, struct fe_softc * ); 259static int fe_probe_jli ( struct isa_device *, struct fe_softc * ); 260static int fe_probe_fmv ( struct isa_device *, struct fe_softc * ); 261static int fe_probe_lnx ( struct isa_device *, struct fe_softc * ); 262static int fe_probe_gwy ( struct isa_device *, struct fe_softc * ); 263static int fe_probe_ubn ( struct isa_device *, struct fe_softc * ); 264#ifdef PC98 265static int fe_probe_re1000 ( struct isa_device *, struct fe_softc * ); 266static int fe_probe_cnet9ne( struct isa_device *, struct fe_softc * ); 267#endif
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250#if NCARD > 0
| 268#if NCARD > 0
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251static int fe_probe_mbh ( DEVICE *, struct fe_softc * ); 252static void fe_init_mbh ( struct fe_softc * ); 253static int fe_probe_tdk ( DEVICE *, struct fe_softc * );
| 269static int fe_probe_mbh ( struct isa_device *, struct fe_softc * ); 270static int fe_probe_tdk ( struct isa_device *, struct fe_softc * );
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254#endif 255static int fe_get_packet ( struct fe_softc *, u_short );
| 271#endif 272static int fe_get_packet ( struct fe_softc *, u_short );
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256static void fe_stop ( int );
| 273static void fe_stop ( struct fe_softc * );
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257static void fe_tint ( struct fe_softc *, u_char ); 258static void fe_rint ( struct fe_softc *, u_char ); 259static void fe_xmit ( struct fe_softc * );
| 274static void fe_tint ( struct fe_softc *, u_char ); 275static void fe_rint ( struct fe_softc *, u_char ); 276static void fe_xmit ( struct fe_softc * );
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260static void fe_emptybuffer ( struct fe_softc * );
| |
261static void fe_write_mbufs ( struct fe_softc *, struct mbuf * );
| 277static void fe_write_mbufs ( struct fe_softc *, struct mbuf * );
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262static struct fe_filter 263 fe_mcaf ( struct fe_softc * ); 264static int fe_hash ( u_char * );
| |
265static void fe_setmode ( struct fe_softc * ); 266static void fe_loadmar ( struct fe_softc * );
| 278static void fe_setmode ( struct fe_softc * ); 279static void fe_loadmar ( struct fe_softc * );
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267#if FE_DEBUG >= 1 268static void fe_dump ( int, struct fe_softc *, char * );
| 280 281#ifdef DIAGNOSTIC 282static void fe_emptybuffer ( struct fe_softc * );
|
269#endif 270 271/* Driver struct used in the config code. This must be public (external.) */ 272struct isa_driver fedriver = 273{ 274 fe_probe, 275 fe_attach, 276 "fe", 277 1 /* It's safe to mark as "sensitive" */ 278}; 279 280/* 281 * Fe driver specific constants which relate to 86960/86965. 282 */ 283 284/* Interrupt masks */ 285#define FE_TMASK ( FE_D2_COLL16 | FE_D2_TXDONE ) 286#define FE_RMASK ( FE_D3_OVRFLO | FE_D3_CRCERR \ 287 | FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY ) 288 289/* Maximum number of iterations for a receive interrupt. */ 290#define FE_MAX_RECV_COUNT ( ( 65536 - 2048 * 2 ) / 64 ) 291 /* 292 * Maximum size of SRAM is 65536, 293 * minimum size of transmission buffer in fe is 2x2KB, 294 * and minimum amount of received packet including headers 295 * added by the chip is 64 bytes. 296 * Hence FE_MAX_RECV_COUNT is the upper limit for number 297 * of packets in the receive buffer. 298 */ 299 300/*
| 283#endif 284 285/* Driver struct used in the config code. This must be public (external.) */ 286struct isa_driver fedriver = 287{ 288 fe_probe, 289 fe_attach, 290 "fe", 291 1 /* It's safe to mark as "sensitive" */ 292}; 293 294/* 295 * Fe driver specific constants which relate to 86960/86965. 296 */ 297 298/* Interrupt masks */ 299#define FE_TMASK ( FE_D2_COLL16 | FE_D2_TXDONE ) 300#define FE_RMASK ( FE_D3_OVRFLO | FE_D3_CRCERR \ 301 | FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY ) 302 303/* Maximum number of iterations for a receive interrupt. */ 304#define FE_MAX_RECV_COUNT ( ( 65536 - 2048 * 2 ) / 64 ) 305 /* 306 * Maximum size of SRAM is 65536, 307 * minimum size of transmission buffer in fe is 2x2KB, 308 * and minimum amount of received packet including headers 309 * added by the chip is 64 bytes. 310 * Hence FE_MAX_RECV_COUNT is the upper limit for number 311 * of packets in the receive buffer. 312 */ 313 314/*
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| 315 * Miscellaneous definitions not directly related to hardware. 316 */ 317 318/* Flags for stability. */ 319#define UNSTABLE_IRQ 0x01 /* IRQ setting may be incorrect. */ 320#define UNSTABLE_MAC 0x02 /* Probed MAC address may be incorrect. */ 321#define UNSTABLE_TYPE 0x04 /* Probed vendor/model may be incorrect. */ 322 323/* The following line must be delete when "net/if_media.h" support it. */ 324#ifndef IFM_10_FL 325#define IFM_10_FL /* 13 */ IFM_10_5 326#endif 327 328#if 0 329/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */ 330static int const bit2media [] = { 331#define MB_HA 0x0001 332 IFM_HDX | IFM_ETHER | IFM_AUTO, 333#define MB_HM 0x0002 334 IFM_HDX | IFM_ETHER | IFM_MANUAL, 335#define MB_HT 0x0004 336 IFM_HDX | IFM_ETHER | IFM_10_T, 337#define MB_H2 0x0008 338 IFM_HDX | IFM_ETHER | IFM_10_2, 339#define MB_H5 0x0010 340 IFM_HDX | IFM_ETHER | IFM_10_5, 341#define MB_HF 0x0020 342 IFM_HDX | IFM_ETHER | IFM_10_FL, 343#define MB_FT 0x0040 344 IFM_FDX | IFM_ETHER | IFM_10_T, 345 /* More can be come here... */ 346 0 347}; 348#else 349/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */ 350static int const bit2media [] = { 351#define MB_HA 0x0001 352 IFM_ETHER | IFM_AUTO, 353#define MB_HM 0x0002 354 IFM_ETHER | IFM_MANUAL, 355#define MB_HT 0x0004 356 IFM_ETHER | IFM_10_T, 357#define MB_H2 0x0008 358 IFM_ETHER | IFM_10_2, 359#define MB_H5 0x0010 360 IFM_ETHER | IFM_10_5, 361#define MB_HF 0x0020 362 IFM_ETHER | IFM_10_FL, 363#define MB_FT 0x0040 364 IFM_ETHER | IFM_10_T, 365 /* More can be come here... */ 366 0 367}; 368#endif 369 370/*
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301 * Routines to access contiguous I/O ports. 302 */ 303 304static void 305inblk ( struct fe_softc * sc, int offs, u_char * mem, int len ) 306{ 307 while ( --len >= 0 ) { 308 *mem++ = inb( sc->ioaddr[ offs++ ] ); 309 } 310} 311 312static void 313outblk ( struct fe_softc * sc, int offs, u_char const * mem, int len ) 314{ 315 while ( --len >= 0 ) { 316 outb( sc->ioaddr[ offs++ ], *mem++ ); 317 } 318} 319 320/* PCCARD Support */ 321#if NCARD > 0 322/* 323 * PC-Card (PCMCIA) specific code. 324 */
| 371 * Routines to access contiguous I/O ports. 372 */ 373 374static void 375inblk ( struct fe_softc * sc, int offs, u_char * mem, int len ) 376{ 377 while ( --len >= 0 ) { 378 *mem++ = inb( sc->ioaddr[ offs++ ] ); 379 } 380} 381 382static void 383outblk ( struct fe_softc * sc, int offs, u_char const * mem, int len ) 384{ 385 while ( --len >= 0 ) { 386 outb( sc->ioaddr[ offs++ ], *mem++ ); 387 } 388} 389 390/* PCCARD Support */ 391#if NCARD > 0 392/* 393 * PC-Card (PCMCIA) specific code. 394 */
|
325static int feinit ( struct pccard_devinfo * ); 326static void feunload ( struct pccard_devinfo * ); 327static int fe_card_intr ( struct pccard_devinfo * );
| 395static int feinit (struct pccard_devinfo *); 396static void feunload (struct pccard_devinfo *); 397static int fe_card_intr (struct pccard_devinfo *);
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328 329static struct pccard_device fe_info = { 330 "fe", 331 feinit, 332 feunload, 333 fe_card_intr, 334 0, /* Attributes - presently unused */ 335 &net_imask /* XXX - Should this also include tty_imask? */ 336}; 337 338DATA_SET(pccarddrv_set, fe_info); 339 340/*
| 398 399static struct pccard_device fe_info = { 400 "fe", 401 feinit, 402 feunload, 403 fe_card_intr, 404 0, /* Attributes - presently unused */ 405 &net_imask /* XXX - Should this also include tty_imask? */ 406}; 407 408DATA_SET(pccarddrv_set, fe_info); 409 410/*
|
341 * Initialize the device - called from Slot manager.
| 411 * Initialize the device - called from Slot manager.
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342 */ 343static int 344feinit(struct pccard_devinfo *devi) 345{ 346 struct fe_softc *sc; 347
| 412 */ 413static int 414feinit(struct pccard_devinfo *devi) 415{ 416 struct fe_softc *sc; 417
|
348 /* validate unit number. */ 349 if (devi->isahd.id_unit >= NFE) 350 return (ENODEV); 351 /* 352 * Probe the device. If a value is returned, 353 * the device was found at the location. 354 */ 355#if FE_DEBUG >= 2 356 printf("Start Probe\n"); 357#endif 358 /* Initialize "minimum" parts of our softc. */
| 418 /* validate unit number. */ 419 if (devi->isahd.id_unit >= NFE) return ENODEV; 420 421 /* Prepare for the device probe process. */
|
359 sc = &fe_softc[devi->isahd.id_unit]; 360 sc->sc_unit = devi->isahd.id_unit; 361 sc->iobase = devi->isahd.id_iobase; 362
| 422 sc = &fe_softc[devi->isahd.id_unit]; 423 sc->sc_unit = devi->isahd.id_unit; 424 sc->iobase = devi->isahd.id_iobase; 425
|
363 /* Use Ethernet address got from CIS, if one is available. */ 364 if ((devi->misc[0] & 0x03) == 0x00 365 && (devi->misc[0] | devi->misc[1] | devi->misc[2]) != 0) { 366 /* Yes, it looks like a valid Ether address. */ 367 bcopy(devi->misc, sc->sc_enaddr, ETHER_ADDR_LEN); 368 } else { 369 /* Indicate we have no Ether address in CIS. */ 370 bzero(sc->sc_enaddr, ETHER_ADDR_LEN); 371 }
| 426 /* 427 * When the feinit() is called, the devi->misc holds a 428 * six-byte value set by the pccard daemon. If the 429 * corresponding entry in /etc/pccard.conf has an "ether" 430 * keyword, the value is the Ethernet MAC address extracted 431 * from CIS area of the card. If the entry has no "ether" 432 * keyword, the daemon fills the field with binary zero, 433 * instead. We passes the value (either MAC address or zero) 434 * to model-specific sub-probe routines through sc->sc_enaddr 435 * (it actually is sc->sc_arpcom.ar_enaddr, BTW) so that the 436 * sub-probe routies can use that info. 437 */ 438 bcopy(devi->misc, sc->sc_enaddr, ETHER_ADDR_LEN);
|
372
| 439
|
373 /* Probe supported PC card models. */ 374 if (fe_probe_tdk(&devi->isahd, sc) == 0 && 375 fe_probe_mbh(&devi->isahd, sc) == 0) 376 return (ENXIO); 377#if FE_DEBUG >= 2 378 printf("Start attach\n"); 379#endif 380 if (fe_attach(&devi->isahd) == 0) 381 return (ENXIO);
| 440 /* Probe for supported cards. */ 441 if (fe_probe_mbh(&devi->isahd, sc) == 0 442 && fe_probe_tdk(&devi->isahd, sc) == 0) return ENXIO;
|
382
| 443
|
383 return (0);
| 444 /* We've got a supported card. Attach it, then. */ 445 if (fe_attach(&devi->isahd) == 0) return ENXIO; 446 447 return 0;
|
384} 385 386/* 387 * feunload - unload the driver and clear the table. 388 * XXX TODO: 389 * This is usually called when the card is ejected, but 390 * can be caused by a modunload of a controller driver. 391 * The idea is to reset the driver's view of the device 392 * and ensure that any driver entry points such as 393 * read and write do not hang. 394 */ 395static void 396feunload(struct pccard_devinfo *devi) 397{
| 448} 449 450/* 451 * feunload - unload the driver and clear the table. 452 * XXX TODO: 453 * This is usually called when the card is ejected, but 454 * can be caused by a modunload of a controller driver. 455 * The idea is to reset the driver's view of the device 456 * and ensure that any driver entry points such as 457 * read and write do not hang. 458 */ 459static void 460feunload(struct pccard_devinfo *devi) 461{
|
398 printf("fe%d: unload\n", devi->isahd.id_unit); 399 fe_stop(devi->isahd.id_unit);
| 462 struct fe_softc *sc = &fe_softc[devi->isahd.id_unit]; 463 printf("fe%d: unload\n", sc->sc_unit); 464 fe_stop(sc); 465 if_down(&sc->arpcom.ac_if);
|
400} 401 402/* 403 * fe_card_intr - Shared interrupt called from 404 * front end of PC-Card handler. 405 */ 406static int 407fe_card_intr(struct pccard_devinfo *devi) 408{ 409 feintr(devi->isahd.id_unit); 410 return (1); 411} 412#endif /* NCARD > 0 */ 413 414 415/* 416 * Hardware probe routines.
| 466} 467 468/* 469 * fe_card_intr - Shared interrupt called from 470 * front end of PC-Card handler. 471 */ 472static int 473fe_card_intr(struct pccard_devinfo *devi) 474{ 475 feintr(devi->isahd.id_unit); 476 return (1); 477} 478#endif /* NCARD > 0 */ 479 480 481/* 482 * Hardware probe routines.
|
| 483 * 484 * In older versions of this driver, we provided an automatic I/O 485 * address detection. The features is, however, removed from this 486 * version, for simplicity. Any comments?
|
417 */ 418
| 487 */ 488
|
419/* How and where to probe; to support automatic I/O address detection. */ 420struct fe_probe_list 421{ 422 int ( * probe ) ( DEVICE *, struct fe_softc * ); 423 u_short const * addresses; 424}; 425 426/* Lists of possible addresses. */ 427static u_short const fe_fmv_addr [] = 428 { 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x300, 0x340, 0 }; 429static u_short const fe_ati_addr [] = 430 { 0x240, 0x260, 0x280, 0x2A0, 0x300, 0x320, 0x340, 0x380, 0 }; 431 432static struct fe_probe_list const fe_probe_list [] = 433{ 434 { fe_probe_fmv, fe_fmv_addr }, 435 { fe_probe_ati, fe_ati_addr }, 436 { fe_probe_gwy, NULL }, /* GWYs cannot be auto detected. */ 437 { NULL, NULL } 438}; 439 440
| |
441/*
| 489/*
|
442 * Determine if the device is present 443 * 444 * on entry: 445 * a pointer to an isa_device struct 446 * on exit: 447 * zero if device not found 448 * or number of i/o addresses used (if found)
| 490 * Determine if the device is present at a specified I/O address. The 491 * main entry to the driver.
|
449 */ 450 451static int
| 492 */ 493 494static int
|
452fe_probe ( DEVICE * dev )
| 495fe_probe (struct isa_device * dev)
|
453{ 454 struct fe_softc * sc;
| 496{ 497 struct fe_softc * sc;
|
455 int u;
| |
456 int nports;
| 498 int nports;
|
457 struct fe_probe_list const * list; 458 u_short const * addr; 459 u_short single [ 2 ];
| |
460
| 499
|
461 /* Initialize "minimum" parts of our softc. */ 462 sc = &fe_softc[ dev->id_unit ];
| 500#ifdef DIAGNOSTIC 501 if (dev->id_unit >= NFE) { 502 printf("fe%d: too large unit number for the current config\n", 503 dev->id_unit); 504 return 0; 505 } 506#endif 507 508 /* Prepare for the softc struct. */ 509 sc = &fe_softc[dev->id_unit];
|
463 sc->sc_unit = dev->id_unit;
| 510 sc->sc_unit = dev->id_unit;
|
| 511 sc->iobase = dev->id_iobase;
|
464
| 512
|
465 /* Probe each possibility, one at a time. */ 466 for ( list = fe_probe_list; list->probe != NULL; list++ ) { 467 468 if ( dev->id_iobase != NO_IOADDR ) { 469 /* Probe one specific address. */ 470 single[ 0 ] = dev->id_iobase; 471 single[ 1 ] = 0; 472 addr = single; 473 } else if ( list->addresses != NULL ) { 474 /* Auto detect. */ 475 addr = list->addresses; 476 } else { 477 /* We need a list of addresses to do auto detect. */ 478 continue; 479 } 480 481 /* Probe all possible addresses for the board. */ 482 while ( *addr != 0 ) { 483 484 /* See if the address is already in use. */ 485 for ( u = 0; u < NFE; u++ ) { 486 if ( fe_softc[u].iobase == *addr ) break; 487 } 488 489#if FE_DEBUG >= 3 490 if ( u == NFE ) { 491 log( LOG_INFO, "fe%d: probing %d at 0x%x\n", 492 sc->sc_unit, list - fe_probe_list, *addr ); 493 } else if ( u == sc->sc_unit ) { 494 log( LOG_INFO, "fe%d: re-probing %d at 0x%x?\n", 495 sc->sc_unit, list - fe_probe_list, *addr ); 496 } else { 497 log( LOG_INFO, "fe%d: skipping %d at 0x%x\n", 498 sc->sc_unit, list - fe_probe_list, *addr ); 499 }
| 513 /* Probe for supported boards. */ 514 nports = 0; 515#ifdef PC98 516 if (!nports) nports = fe_probe_re1000(dev, sc); 517 if (!nports) nports = fe_probe_cnet9ne(dev, sc);
|
500#endif
| 518#endif
|
| 519 if (!nports) nports = fe_probe_ssi(dev, sc); 520 if (!nports) nports = fe_probe_jli(dev, sc); 521 if (!nports) nports = fe_probe_fmv(dev, sc); 522 if (!nports) nports = fe_probe_lnx(dev, sc); 523 if (!nports) nports = fe_probe_ubn(dev, sc); 524 if (!nports) nports = fe_probe_gwy(dev, sc);
|
501
| 525
|
502 /* Probe the address if it is free. */ 503 if ( u == NFE || u == sc->sc_unit ) { 504 505 /* Probe an address. */ 506 sc->iobase = *addr; 507 nports = list->probe( dev, sc ); 508 if ( nports > 0 ) { 509 /* Found. */ 510 dev->id_iobase = *addr; 511 return ( nports ); 512 } 513 sc->iobase = 0; 514 } 515 516 /* Try next. */ 517 addr++; 518 } 519 } 520 521 /* Probe failed. */ 522 return ( 0 );
| 526 /* We found supported board. */ 527 return nports;
|
523} 524 525/* 526 * Check for specific bits in specific registers have specific values.
| 528} 529 530/* 531 * Check for specific bits in specific registers have specific values.
|
| 532 * A common utility function called from various sub-probe routines.
|
527 */
| 533 */
|
| 534
|
528struct fe_simple_probe_struct 529{ 530 u_char port; /* Offset from the base I/O address. */ 531 u_char mask; /* Bits to be checked. */ 532 u_char bits; /* Values to be compared against. */ 533}; 534 535static int 536fe_simple_probe ( struct fe_softc const * sc, 537 struct fe_simple_probe_struct const * sp ) 538{ 539 struct fe_simple_probe_struct const * p; 540 541 for ( p = sp; p->mask != 0; p++ ) {
| 535struct fe_simple_probe_struct 536{ 537 u_char port; /* Offset from the base I/O address. */ 538 u_char mask; /* Bits to be checked. */ 539 u_char bits; /* Values to be compared against. */ 540}; 541 542static int 543fe_simple_probe ( struct fe_softc const * sc, 544 struct fe_simple_probe_struct const * sp ) 545{ 546 struct fe_simple_probe_struct const * p; 547 548 for ( p = sp; p->mask != 0; p++ ) {
|
542#if FE_DEBUG >=2 543 printf("Probe Port:%x,Value:%x,Mask:%x.Bits:%x\n", 544 p->port,inb(sc->ioaddr[ p->port]),p->mask,p->bits);
| 549#ifdef FE_DEBUG 550 unsigned a = sc->ioaddr[p->port]; 551 printf("fe%d: Probing %02x (%04x): %02x (%02x, %02x): %s\n", 552 sc->sc_unit, p->port, a, inb(a), p->mask, p->bits, 553 (inb(a) & p->mask) == p->bits ? "OK" : "NG");
|
545#endif 546 if ( ( inb( sc->ioaddr[ p->port ] ) & p->mask ) != p->bits ) 547 { 548 return ( 0 ); 549 } 550 } 551 return ( 1 ); 552} 553
| 554#endif 555 if ( ( inb( sc->ioaddr[ p->port ] ) & p->mask ) != p->bits ) 556 { 557 return ( 0 ); 558 } 559 } 560 return ( 1 ); 561} 562
|
| 563/* Test if a given 6 byte value is a valid Ethernet station (MAC) 564 address. "Vendor" is an expected vendor code (first three bytes,) 565 or a zero when nothing expected. */ 566static int 567valid_Ether_p (u_char const * addr, unsigned vendor) 568{ 569#ifdef FE_DEBUG 570 printf("fe?: validating %6D against %06x\n", addr, ":", vendor); 571#endif 572 573 /* All zero is not allowed as a vendor code. */ 574 if (addr[0] == 0 && addr[1] == 0 && addr[2] == 0) return 0; 575 576 switch (vendor) { 577 case 0x000000: 578 /* Legal Ethernet address (stored in ROM) must have 579 its Group and Local bits cleared. */ 580 if ((addr[0] & 0x03) != 0) return 0; 581 break; 582 case 0x020000: 583 /* Same as above, but a local address is allowed in 584 this context. */ 585 if ((addr[0] & 0x01) != 0) return 0; 586 break; 587 default: 588 /* Make sure the vendor part matches if one is given. */ 589 if ( addr[0] != ((vendor >> 16) & 0xFF) 590 || addr[1] != ((vendor >> 8) & 0xFF) 591 || addr[2] != ((vendor ) & 0xFF)) return 0; 592 break; 593 } 594 595 /* Host part must not be all-zeros nor all-ones. */ 596 if (addr[3] == 0xFF && addr[4] == 0xFF && addr[5] == 0xFF) return 0; 597 if (addr[3] == 0x00 && addr[4] == 0x00 && addr[5] == 0x00) return 0; 598 599 /* Given addr looks like an Ethernet address. */ 600 return 1; 601} 602 603/* Fill our softc struct with default value. */ 604static void 605fe_softc_defaults (struct fe_softc *sc) 606{ 607 int i; 608 609 /* Initialize I/O address re-mapping table for the standard 610 (contiguous) register layout. This routine doesn't use 611 ioaddr[], so the caller can safely override it after 612 calling fe_softc_defaults, if needed. */ 613 for (i = 0; i < MAXREGISTERS; i++) sc->ioaddr[i] = sc->iobase + i; 614 615 /* Prepare for typical register prototypes. We assume a 616 "typical" board has <32KB> of <fast> SRAM connected with a 617 <byte-wide> data lines. */ 618 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; 619 sc->proto_dlcr5 = 0; 620 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB 621 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns; 622 sc->proto_dlcr7 = FE_D7_BYTSWP_LH; 623 sc->proto_bmpr13 = 0; 624 625 /* Assume the probe process (to be done later) is stable. */ 626 sc->stability = 0; 627 628 /* A typical board needs no hooks. */ 629 sc->init = NULL; 630 sc->stop = NULL; 631 632 /* Assume the board has no software-controllable media selection. */ 633 sc->mbitmap = MB_HM; 634 sc->defmedia = MB_HM; 635 sc->msel = NULL; 636} 637 638/* Common error reporting routine used in probe routines for 639 "soft configured IRQ"-type boards. */ 640static void 641fe_irq_failure (char const *name, int unit, int irq, char const *list) 642{ 643 printf("fe%d: %s board is detected, but %s IRQ was given\n", 644 unit, name, (irq == NO_IRQ ? "no" : "invalid")); 645 if (list != NULL) { 646 printf("fe%d: specify an IRQ from %s in kernel config\n", 647 unit, list); 648 } 649} 650
|
554/*
| 651/*
|
555 * Routines to read all bytes from the config EEPROM through MB86965A. 556 * I'm not sure what exactly I'm doing here... I was told just to follow 557 * the steps, and it worked. Could someone tell me why the following 558 * code works? (Or, why all similar codes I tried previously doesn't 559 * work.) FIXME.
| 652 * Hardware (vendor) specific probe routines and hooks.
|
560 */ 561
| 653 */ 654
|
| 655/* 656 * Machine independent routines. 657 */ 658 659/* 660 * Generic media selection scheme for MB86965 based boards. 661 */
|
562static void
| 662static void
|
563fe_strobe_eeprom ( u_short bmpr16 )
| 663fe_msel_965 (struct fe_softc *sc)
|
564{
| 664{
|
| 665 u_char b13; 666 667 /* Find the appropriate bits for BMPR13 tranceiver control. */ 668 switch (IFM_SUBTYPE(sc->media.ifm_media)) { 669 case IFM_AUTO: b13 = FE_B13_PORT_AUTO | FE_B13_TPTYPE_UTP; break; 670 case IFM_10_T: b13 = FE_B13_PORT_TP | FE_B13_TPTYPE_UTP; break; 671 default: b13 = FE_B13_PORT_AUI; break; 672 } 673 674 /* Write it into the register. It takes effect immediately. */ 675 outb(sc->ioaddr[FE_BMPR13], sc->proto_bmpr13 | b13); 676} 677 678/* 679 * Fujitsu MB86965 JLI mode support routines. 680 */ 681 682/* Datasheet for 86965 explicitly states that it only supports serial 683 * EEPROM with 16 words (32 bytes) capacity. (I.e., 93C06.) However, 684 * ones with 64 words (128 bytes) are available in the marked, namely 685 * 93C46, and are also fully compatible with 86965. It is known that 686 * some boards (e.g., ICL) actually have 93C46 on them and use extra 687 * storage to keep various config info. */ 688#define JLI_EEPROM_SIZE 128 689 690/* 691 * Routines to read all bytes from the config EEPROM through MB86965A. 692 * It is a MicroWire (3-wire) serial EEPROM with 6-bit address. 693 * (93C06 or 93C46.) 694 */ 695static void 696fe_strobe_eeprom_jli ( u_short bmpr16 ) 697{
|
565 /*
| 698 /*
|
566 * We must guarantee 800ns (or more) interval to access slow
| 699 * We must guarantee 1us (or more) interval to access slow
|
567 * EEPROMs. The following redundant code provides enough 568 * delay with ISA timing. (Even if the bus clock is "tuned.") 569 * Some modification will be needed on faster busses. 570 */ 571 outb( bmpr16, FE_B16_SELECT );
| 700 * EEPROMs. The following redundant code provides enough 701 * delay with ISA timing. (Even if the bus clock is "tuned.") 702 * Some modification will be needed on faster busses. 703 */ 704 outb( bmpr16, FE_B16_SELECT );
|
572 outb( bmpr16, FE_B16_SELECT );
| |
573 outb( bmpr16, FE_B16_SELECT | FE_B16_CLOCK ); 574 outb( bmpr16, FE_B16_SELECT | FE_B16_CLOCK ); 575 outb( bmpr16, FE_B16_SELECT );
| 705 outb( bmpr16, FE_B16_SELECT | FE_B16_CLOCK ); 706 outb( bmpr16, FE_B16_SELECT | FE_B16_CLOCK ); 707 outb( bmpr16, FE_B16_SELECT );
|
576 outb( bmpr16, FE_B16_SELECT );
| |
577} 578 579static void
| 708} 709 710static void
|
580fe_read_eeprom ( struct fe_softc * sc, u_char * data )
| 711fe_read_eeprom_jli ( struct fe_softc * sc, u_char * data )
|
581{ 582 u_short bmpr16 = sc->ioaddr[ FE_BMPR16 ]; 583 u_short bmpr17 = sc->ioaddr[ FE_BMPR17 ]; 584 u_char n, val, bit;
| 712{ 713 u_short bmpr16 = sc->ioaddr[ FE_BMPR16 ]; 714 u_short bmpr17 = sc->ioaddr[ FE_BMPR17 ]; 715 u_char n, val, bit;
|
| 716 u_char save16, save17;
|
585
| 717
|
| 718 /* Save the current value of the EEPROM interface registers. */ 719 save16 = inb(bmpr16); 720 save17 = inb(bmpr17); 721
|
586 /* Read bytes from EEPROM; two bytes per an iteration. */
| 722 /* Read bytes from EEPROM; two bytes per an iteration. */
|
587 for ( n = 0; n < FE_EEPROM_SIZE / 2; n++ ) {
| 723 for ( n = 0; n < JLI_EEPROM_SIZE / 2; n++ ) {
|
588 589 /* Reset the EEPROM interface. */ 590 outb( bmpr16, 0x00 ); 591 outb( bmpr17, 0x00 ); 592 593 /* Start EEPROM access. */ 594 outb( bmpr16, FE_B16_SELECT ); 595 outb( bmpr17, FE_B17_DATA );
| 724 725 /* Reset the EEPROM interface. */ 726 outb( bmpr16, 0x00 ); 727 outb( bmpr17, 0x00 ); 728 729 /* Start EEPROM access. */ 730 outb( bmpr16, FE_B16_SELECT ); 731 outb( bmpr17, FE_B17_DATA );
|
596 fe_strobe_eeprom( bmpr16 );
| 732 fe_strobe_eeprom_jli( bmpr16 );
|
597
| 733
|
598 /* Pass the iteration count to the chip. */
| 734 /* Pass the iteration count as well as a READ command. */
|
599 val = 0x80 | n; 600 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) { 601 outb( bmpr17, ( val & bit ) ? FE_B17_DATA : 0 );
| 735 val = 0x80 | n; 736 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) { 737 outb( bmpr17, ( val & bit ) ? FE_B17_DATA : 0 );
|
602 fe_strobe_eeprom( bmpr16 );
| 738 fe_strobe_eeprom_jli( bmpr16 );
|
603 } 604 outb( bmpr17, 0x00 ); 605 606 /* Read a byte. */ 607 val = 0; 608 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
| 739 } 740 outb( bmpr17, 0x00 ); 741 742 /* Read a byte. */ 743 val = 0; 744 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
|
609 fe_strobe_eeprom( bmpr16 );
| 745 fe_strobe_eeprom_jli( bmpr16 );
|
610 if ( inb( bmpr17 ) & FE_B17_DATA ) { 611 val |= bit; 612 } 613 } 614 *data++ = val; 615 616 /* Read one more byte. */ 617 val = 0; 618 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
| 746 if ( inb( bmpr17 ) & FE_B17_DATA ) { 747 val |= bit; 748 } 749 } 750 *data++ = val; 751 752 /* Read one more byte. */ 753 val = 0; 754 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
|
619 fe_strobe_eeprom( bmpr16 );
| 755 fe_strobe_eeprom_jli( bmpr16 );
|
620 if ( inb( bmpr17 ) & FE_B17_DATA ) { 621 val |= bit; 622 } 623 } 624 *data++ = val; 625 } 626
| 756 if ( inb( bmpr17 ) & FE_B17_DATA ) { 757 val |= bit; 758 } 759 } 760 *data++ = val; 761 } 762
|
| 763#if 0
|
627 /* Reset the EEPROM interface, again. */ 628 outb( bmpr16, 0x00 ); 629 outb( bmpr17, 0x00 );
| 764 /* Reset the EEPROM interface, again. */ 765 outb( bmpr16, 0x00 ); 766 outb( bmpr17, 0x00 );
|
| 767#else 768 /* Make sure to restore the original value of EEPROM interface 769 registers, since we are not yet sure we have MB86965A on 770 the address. */ 771 outb(bmpr17, save17); 772 outb(bmpr16, save16); 773#endif
|
630
| 774
|
631#if FE_DEBUG >= 3
| 775#if 1
|
632 /* Report what we got. */
| 776 /* Report what we got. */
|
633 data -= FE_EEPROM_SIZE; 634 log( LOG_INFO, "fe%d: EEPROM:" 635 " %02x%02x%02x%02x %02x%02x%02x%02x -" 636 " %02x%02x%02x%02x %02x%02x%02x%02x -" 637 " %02x%02x%02x%02x %02x%02x%02x%02x -" 638 " %02x%02x%02x%02x %02x%02x%02x%02x\n", 639 sc->sc_unit, 640 data[ 0], data[ 1], data[ 2], data[ 3], 641 data[ 4], data[ 5], data[ 6], data[ 7], 642 data[ 8], data[ 9], data[10], data[11], 643 data[12], data[13], data[14], data[15], 644 data[16], data[17], data[18], data[19], 645 data[20], data[21], data[22], data[23], 646 data[24], data[25], data[26], data[27], 647 data[28], data[29], data[30], data[31] );
| 777 if (bootverbose) { 778 int i; 779 data -= JLI_EEPROM_SIZE; 780 for (i = 0; i < JLI_EEPROM_SIZE; i += 16) { 781 printf("fe%d: EEPROM(JLI):%3x: %16D\n", 782 sc->sc_unit, i, data + i, " "); 783 } 784 }
|
648#endif 649} 650
| 785#endif 786} 787
|
| 788static void 789fe_init_jli (struct fe_softc * sc) 790{ 791 /* "Reset" by writing into a magic location. */ 792 DELAY(200); 793 outb(sc->ioaddr[0x1E], inb(sc->ioaddr[0x1E])); 794 DELAY(300); 795} 796
|
651/*
| 797/*
|
652 * Hardware (vendor) specific probe routines.
| 798 * SSi 78Q8377A support routines.
|
653 */ 654
| 799 */ 800
|
| 801#define SSI_EEPROM_SIZE 512 802#define SSI_DIN 0x01 803#define SSI_DAT 0x01 804#define SSI_CSL 0x02 805#define SSI_CLK 0x04 806#define SSI_EEP 0x10 807
|
655/*
| 808/*
|
656 * Probe and initialization for Fujitsu FMV-180 series boards
| 809 * Routines to read all bytes from the config EEPROM through 78Q8377A. 810 * It is a MicroWire (3-wire) serial EEPROM with 8-bit address. (I.e., 811 * 93C56 or 93C66.) 812 * 813 * As I don't have SSi manuals, (hmm, an old song again!) I'm not exactly 814 * sure the following code is correct... It is just stolen from the 815 * C-NET(98)P2 support routine in FreeBSD(98).
|
657 */
| 816 */
|
658static int 659fe_probe_fmv ( DEVICE * dev, struct fe_softc * sc )
| 817 818static void 819fe_read_eeprom_ssi (struct fe_softc *sc, u_char *data)
|
660{
| 820{
|
661 int i, n;
| 821 u_short bmpr12 = sc->ioaddr[FE_DLCR12]; 822 u_char val, bit; 823 int n; 824 u_char save6, save7, save12;
|
662
| 825
|
663 static u_short const baseaddr [ 8 ] = 664 { 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x300, 0x340 }; 665 static u_short const irqmap [ 4 ] = 666 { IRQ3, IRQ7, IRQ10, IRQ15 };
| 826 /* Save the current value for the DLCR registers we are about 827 to destroy. */ 828 save6 = inb(sc->ioaddr[FE_DLCR6]); 829 save7 = inb(sc->ioaddr[FE_DLCR7]);
|
667
| 830
|
668 static struct fe_simple_probe_struct const probe_table [] = { 669 { FE_DLCR2, 0x70, 0x00 }, 670 { FE_DLCR4, 0x08, 0x00 }, 671 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */
| 831 /* Put the 78Q8377A into a state that we can access the EEPROM. */ 832 outb(sc->ioaddr[FE_DLCR6], 833 FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_DLC_DISABLE); 834 outb(sc->ioaddr[FE_DLCR7], 835 FE_D7_BYTSWP_LH | FE_D7_RBS_BMPR | FE_D7_RDYPNS | FE_D7_POWER_UP);
|
672
| 836
|
673 { FE_FMV0, 0x78, 0x50 }, /* ERRDY+PRRDY */ 674 { FE_FMV1, 0xB0, 0x00 }, /* FMV-183/184 has 0x48 bits. */ 675 { FE_FMV3, 0x7F, 0x00 }, 676#if 1 677 /* 678 * Test *vendor* part of the station address for Fujitsu. 679 * The test will gain reliability of probe process, but 680 * it rejects FMV-180 clone boards manufactured by other vendors. 681 * We have to turn the test off when such cards are made available. 682 */ 683 { FE_FMV4, 0xFF, 0x00 }, 684 { FE_FMV5, 0xFF, 0x00 }, 685 { FE_FMV6, 0xFF, 0x0E }, 686#else 687 /* 688 * We can always verify the *first* 2 bits (in Ethernet 689 * bit order) are "no multicast" and "no local" even for 690 * unknown vendors. 691 */ 692 { FE_FMV4, 0x03, 0x00 }, 693#endif 694 { 0 } 695 };
| 837 /* Save the current value for the BMPR12 register, too. */ 838 save12 = inb(bmpr12);
|
696
| 839
|
697 /* "Hardware revision ID" */ 698 int revision;
| 840 /* Read bytes from EEPROM; two bytes per an iteration. */ 841 for ( n = 0; n < SSI_EEPROM_SIZE / 2; n++ ) {
|
699
| 842
|
700 /* 701 * See if the specified address is possible for FMV-180 series. 702 */ 703 for ( i = 0; i < 8; i++ ) { 704 if ( baseaddr[ i ] == sc->iobase ) break; 705 } 706 if ( i == 8 ) return 0;
| 843 /* Start EEPROM access */ 844 outb(bmpr12, SSI_EEP); 845 outb(bmpr12, SSI_EEP | SSI_CSL);
|
707
| 846
|
708 /* Setup an I/O address mapping table. */ 709 for ( i = 0; i < MAXREGISTERS; i++ ) { 710 sc->ioaddr[ i ] = sc->iobase + i;
| 847 /* Send the following four bits to the EEPROM in the 848 specified order: a dummy bit, a start bit, and 849 command bits (10) for READ. */ 850 outb(bmpr12, SSI_EEP | SSI_CSL ); 851 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */ 852 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_DAT); 853 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */ 854 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_DAT); 855 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */ 856 outb(bmpr12, SSI_EEP | SSI_CSL ); 857 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */ 858 859 /* Pass the iteration count to the chip. */ 860 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) { 861 val = ( n & bit ) ? SSI_DAT : 0; 862 outb(bmpr12, SSI_EEP | SSI_CSL | val); 863 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK | val); 864 } 865 866 /* Read a byte. */ 867 val = 0; 868 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) { 869 outb(bmpr12, SSI_EEP | SSI_CSL); 870 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK); 871 if (inb(bmpr12) & SSI_DIN) val |= bit; 872 } 873 *data++ = val; 874 875 /* Read one more byte. */ 876 val = 0; 877 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) { 878 outb(bmpr12, SSI_EEP | SSI_CSL); 879 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK); 880 if (inb(bmpr12) & SSI_DIN) val |= bit; 881 } 882 *data++ = val; 883 884 outb(bmpr12, SSI_EEP);
|
711 } 712
| 885 } 886
|
713 /* Simple probe. */ 714 if ( !fe_simple_probe( sc, probe_table ) ) return 0;
| 887 /* Reset the EEPROM interface. (For now.) */ 888 outb( bmpr12, 0x00 );
|
715
| 889
|
716 /* Check if our I/O address matches config info. on EEPROM. */ 717 n = ( inb( sc->ioaddr[ FE_FMV2 ] ) & FE_FMV2_IOS ) 718 >> FE_FMV2_IOS_SHIFT; 719 if ( baseaddr[ n ] != sc->iobase ) { 720#if 0 721 /* May not work on some revisions of the cards... FIXME. */ 722 return 0; 723#else 724 /* Just log the fact and see what happens... FIXME. */ 725 log( LOG_WARNING, "fe%d: strange I/O config?\n", sc->sc_unit );
| 890 /* Restore the saved register values, for the case that we 891 didn't have 78Q8377A at the given address. */ 892 outb(sc->ioaddr[FE_BMPR12], save12); 893 outb(sc->ioaddr[FE_DLCR7], save7); 894 outb(sc->ioaddr[FE_DLCR6], save6); 895 896#if 1 897 /* Report what we got. */ 898 if (bootverbose) { 899 int i; 900 data -= SSI_EEPROM_SIZE; 901 for (i = 0; i < SSI_EEPROM_SIZE; i += 16) { 902 printf("fe%d: EEPROM(SSI):%3x: %16D\n", 903 sc->sc_unit, i, data + i, " "); 904 } 905 }
|
726#endif
| 906#endif
|
| 907} 908 909#define FE_SSI_EEP_IRQ 9 /* Irq ??? */ 910#define FE_SSI_EEP_ADDR 16 /* Station(MAC) address */ 911#define FE_SSI_EEP_DUPLEX 25 /* Duplex mode ??? */ 912 913/* 914 * TDK/LANX boards support routines. 915 */ 916 917/* AX012/AX013 equips an X24C01 chip, which has 128 bytes of memory cells. */ 918#define LNX_EEPROM_SIZE 128 919 920/* Bit assignments and command definitions for the serial EEPROM 921 interface register in LANX ASIC. */ 922#define LNX_SDA_HI 0x08 /* Drive SDA line high (logical 1.) */ 923#define LNX_SDA_LO 0x00 /* Drive SDA line low (logical 0.) */ 924#define LNX_SDA_FL 0x08 /* Float (don't drive) SDA line. */ 925#define LNX_SDA_IN 0x01 /* Mask for reading SDA line. */ 926#define LNX_CLK_HI 0x04 /* Drive clock line high (active.) */ 927#define LNX_CLK_LO 0x00 /* Drive clock line low (inactive.) */ 928 929/* It is assumed that the CLK line is low and SDA is high (float) upon entry. */ 930#define LNX_PH(D,K,N) \ 931 ((LNX_SDA_##D | LNX_CLK_##K) << N) 932#define LNX_CYCLE(D1,D2,D3,D4,K1,K2,K3,K4) \ 933 (LNX_PH(D1,K1,0)|LNX_PH(D2,K2,8)|LNX_PH(D3,K3,16)|LNX_PH(D4,K4,24)) 934 935#define LNX_CYCLE_START LNX_CYCLE(HI,LO,LO,HI, HI,HI,LO,LO) 936#define LNX_CYCLE_STOP LNX_CYCLE(LO,LO,HI,HI, LO,HI,HI,LO) 937#define LNX_CYCLE_HI LNX_CYCLE(HI,HI,HI,HI, LO,HI,LO,LO) 938#define LNX_CYCLE_LO LNX_CYCLE(LO,LO,LO,HI, LO,HI,LO,LO) 939#define LNX_CYCLE_INIT LNX_CYCLE(LO,HI,HI,HI, LO,LO,LO,LO) 940 941static void 942fe_eeprom_cycle_lnx (u_short reg20, u_long cycle) 943{ 944 outb(reg20, (cycle ) & 0xFF); 945 DELAY(15); 946 outb(reg20, (cycle >> 8) & 0xFF); 947 DELAY(15); 948 outb(reg20, (cycle >> 16) & 0xFF); 949 DELAY(15); 950 outb(reg20, (cycle >> 24) & 0xFF); 951 DELAY(15); 952} 953 954static u_char 955fe_eeprom_receive_lnx (u_short reg20) 956{ 957 u_char dat; 958 959 outb(reg20, LNX_CLK_HI | LNX_SDA_FL); 960 DELAY(15); 961 dat = inb(reg20); 962 outb(reg20, LNX_CLK_LO | LNX_SDA_FL); 963 DELAY(15); 964 return (dat & LNX_SDA_IN); 965} 966 967static void 968fe_read_eeprom_lnx (struct fe_softc *sc, u_char *data) 969{ 970 int i; 971 u_char n, bit, val; 972 u_char save20; 973 u_short reg20 = sc->ioaddr[0x14]; 974 975 save20 = inb(sc->ioaddr[0x14]); 976 977 /* NOTE: DELAY() timing constants are approximately three 978 times longer (slower) than the required minimum. This is 979 to guarantee a reliable operation under some tough 980 conditions... Fortunately, this routine is only called 981 during the boot phase, so the speed is less important than 982 stability. */ 983 984#if 1 985 /* Reset the X24C01's internal state machine and put it into 986 the IDLE state. We usually don't need this, but *if* 987 someone (e.g., probe routine of other driver) write some 988 garbage into the register at 0x14, synchronization will be 989 lost, and the normal EEPROM access protocol won't work. 990 Moreover, as there are no easy way to reset, we need a 991 _manoeuvre_ here. (It even lacks a reset pin, so pushing 992 the RESET button on the PC doesn't help!) */ 993 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_INIT); 994 for (i = 0; i < 10; i++) { 995 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_START);
|
727 }
| 996 }
|
| 997 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_STOP); 998 DELAY(10000); 999#endif
|
728
| 1000
|
729 /* Find the "hardware revision." */ 730 revision = inb( sc->ioaddr[ FE_FMV1 ] ) & FE_FMV1_REV;
| 1001 /* Issue a start condition. */ 1002 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_START);
|
731
| 1003
|
732 /* Determine the card type. */ 733 sc->typestr = NULL; 734 switch ( inb( sc->ioaddr[ FE_FMV0 ] ) & FE_FMV0_MEDIA ) { 735 case 0: 736 /* No interface? This doesn't seem to be an FMV-180... */ 737 return 0; 738 case FE_FMV0_MEDIUM_T: 739 switch ( revision ) { 740 case 8: 741 sc->typestr = "FMV-183"; 742 break; 743 case 12: 744 sc->typestr = "FMV-183 (on-board)"; 745 break;
| 1004 /* Send seven bits of the starting address (zero, in this 1005 case) and a command bit for READ. */ 1006 val = 0x01; 1007 for (bit = 0x80; bit != 0x00; bit >>= 1) { 1008 if (val & bit) { 1009 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_HI); 1010 } else { 1011 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_LO);
|
746 }
| 1012 }
|
747 break; 748 case FE_FMV0_MEDIUM_T | FE_FMV0_MEDIUM_5: 749 switch ( revision ) { 750 case 0: 751 sc->typestr = "FMV-181"; 752 break; 753 case 1: 754 sc->typestr = "FMV-181A"; 755 break;
| 1013 } 1014 1015 /* Receive an ACK bit. */ 1016 if (fe_eeprom_receive_lnx(reg20)) { 1017 /* ACK was not received. EEPROM is not present (i.e., 1018 this board was not a TDK/LANX) or not working 1019 properly. */ 1020 if (bootverbose) { 1021 printf("fe%d: no ACK received from EEPROM(LNX)\n", 1022 sc->sc_unit);
|
756 }
| 1023 }
|
757 break; 758 case FE_FMV0_MEDIUM_2: 759 switch ( revision ) { 760 case 8: 761 sc->typestr = "FMV-184 (CSR = 2)"; 762 break;
| 1024 /* Clear the given buffer to indicate we could not get 1025 any info. and return. */ 1026 bzero(data, LNX_EEPROM_SIZE); 1027 goto RET; 1028 } 1029 1030 /* Read bytes from EEPROM. */ 1031 for (n = 0; n < LNX_EEPROM_SIZE; n++) { 1032 1033 /* Read a byte and store it into the buffer. */ 1034 val = 0x00; 1035 for (bit = 0x80; bit != 0x00; bit >>= 1) { 1036 if (fe_eeprom_receive_lnx(reg20)) val |= bit;
|
763 }
| 1037 }
|
764 break; 765 case FE_FMV0_MEDIUM_5: 766 switch ( revision ) { 767 case 8: 768 sc->typestr = "FMV-184 (CSR = 1)"; 769 break;
| 1038 *data++ = val; 1039 1040 /* Acknowledge if we have to read more. */ 1041 if (n < LNX_EEPROM_SIZE - 1) { 1042 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_LO);
|
770 }
| 1043 }
|
771 break; 772 case FE_FMV0_MEDIUM_2 | FE_FMV0_MEDIUM_5: 773 switch ( revision ) { 774 case 0: 775 sc->typestr = "FMV-182"; 776 break; 777 case 1: 778 sc->typestr = "FMV-182A"; 779 break; 780 case 8: 781 sc->typestr = "FMV-184 (CSR = 3)"; 782 break; 783 } 784 break;
| |
785 }
| 1044 }
|
786 if ( sc->typestr == NULL ) { 787 /* Unknown card type... Hope the driver works. */ 788 sc->typestr = "unknown FMV-180 version"; 789 log( LOG_WARNING, "fe%d: %s: %x-%x-%x-%x\n", 790 sc->sc_unit, sc->typestr, 791 inb( sc->ioaddr[ FE_FMV0 ] ), 792 inb( sc->ioaddr[ FE_FMV1 ] ), 793 inb( sc->ioaddr[ FE_FMV2 ] ), 794 inb( sc->ioaddr[ FE_FMV3 ] ) ); 795 }
| |
796
| 1045
|
797 /* 798 * An FMV-180 has been proved. 799 * Determine which IRQ to be used. 800 * 801 * In this version, we give a priority to the kernel config file. 802 * If the EEPROM and config don't match, say it to the user for 803 * an attention. 804 */ 805 n = ( inb( sc->ioaddr[ FE_FMV2 ] ) & FE_FMV2_IRS ) 806 >> FE_FMV2_IRS_SHIFT; 807 if ( dev->id_irq == NO_IRQ ) { 808 /* Just use the probed value. */ 809 dev->id_irq = irqmap[ n ]; 810 } else if ( dev->id_irq != irqmap[ n ] ) { 811 /* Don't match. */ 812 log( LOG_WARNING, 813 "fe%d: check IRQ in config; it may be incorrect\n", 814 sc->sc_unit );
| 1046 /* Issue a STOP condition, de-activating the clock line. 1047 It will be safer to keep the clock line low than to leave 1048 it high. */ 1049 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_STOP); 1050 1051 RET: 1052 outb(sc->ioaddr[0x14], save20); 1053 1054#if 1 1055 /* Report what we got. */ 1056 data -= LNX_EEPROM_SIZE; 1057 if (bootverbose) { 1058 for (i = 0; i < JLI_EEPROM_SIZE; i += 16) { 1059 printf("fe%d: EEPROM(LNX):%3x: %16D\n", 1060 sc->sc_unit, i, data + i, " "); 1061 }
|
815 }
| 1062 }
|
| 1063#endif 1064}
|
816
| 1065
|
817 /* 818 * Initialize constants in the per-line structure. 819 */
| 1066static void 1067fe_init_lnx ( struct fe_softc * sc ) 1068{ 1069 /* Reset the 86960. Do we need this? FIXME. */ 1070 outb(sc->ioaddr[0x12], 0x06); 1071 DELAY(100); 1072 outb(sc->ioaddr[0x12], 0x07); 1073 DELAY(100);
|
820
| 1074
|
| 1075 /* Setup IRQ control register on the ASIC. */ 1076 outb(sc->ioaddr[0x14], sc->priv_info); 1077} 1078 1079/* 1080 * Ungermann-Bass boards support routine. 1081 */ 1082static void 1083fe_init_ubn ( struct fe_softc * sc ) 1084{ 1085#if 0 1086 /* Do we need this? FIXME. */ 1087 outb(sc->ioaddr[0x18], 0x00); 1088 DELAY( 200 ); 1089#endif 1090 /* Setup IRQ control register on the ASIC. */ 1091 outb(sc->ioaddr[0x14], sc->priv_info); 1092} 1093 1094/* 1095 * Machine dependent probe routines. 1096 */ 1097 1098#ifdef PC98 1099static int 1100fe_probe_fmv ( struct isa_device * dev, struct fe_softc * sc ) 1101{ 1102 /* PC-98 has no board of this architechture. */ 1103 return 0; 1104} 1105 1106/* ioaddr for RE1000/1000Plus - Very dirty! */ 1107static u_short ioaddr_re1000[MAXREGISTERS] = { 1108 0x0000, 0x0001, 0x0200, 0x0201, 0x0400, 0x0401, 0x0600, 0x0601, 1109 0x0800, 0x0801, 0x0a00, 0x0a01, 0x0c00, 0x0c01, 0x0e00, 0x0e01, 1110 0x1000, 0x1200, 0x1400, 0x1600, 0x1800, 0x1a00, 0x1c00, 0x1e00, 1111 0x1001, 0x1201, 0x1401, 0x1601, 0x1801, 0x1a01, 0x1c01, 0x1e01, 1112}; 1113 1114/* 1115 * Probe and initialization for Allied-Telesis RE1000 series. 1116 */ 1117static void 1118fe_init_re1000 ( struct fe_softc * sc ) 1119{ 1120 /* Setup IRQ control register on the ASIC. */ 1121 outb(sc->ioaddr[FE_RE1000_IRQCONF], sc->priv_info); 1122} 1123 1124static int 1125fe_probe_re1000 ( struct isa_device * dev, struct fe_softc * sc ) 1126{ 1127 int i, n; 1128 u_char sum; 1129 1130 static struct fe_simple_probe_struct probe_table [] = { 1131 { FE_DLCR2, 0x58, 0x00 }, 1132 { FE_DLCR4, 0x08, 0x00 }, 1133 { 0 } 1134 }; 1135 1136 /* See if the specified I/O address is possible for RE1000. */ 1137 /* [01]D[02468ACE] are allowed. */ 1138 if ((sc->iobase & ~0x10E) != 0xD0) return 0; 1139 1140 /* Setup an I/O address mapping table and some others. */ 1141 fe_softc_defaults(sc); 1142 1143 /* Re-map ioaddr for RE1000. */ 1144 for (i = 0; i < MAXREGISTERS; i++) 1145 sc->ioaddr[i] = sc->iobase + ioaddr_re1000[i]; 1146 1147 /* See if the card is on its address. */ 1148 if (!fe_simple_probe(sc, probe_table)) return 0; 1149
|
821 /* Get our station address from EEPROM. */
| 1150 /* Get our station address from EEPROM. */
|
822 inblk( sc, FE_FMV4, sc->sc_enaddr, ETHER_ADDR_LEN );
| 1151 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN);
|
823
| 1152
|
824 /* Make sure we got a valid station address. */ 825 if ( ( sc->sc_enaddr[ 0 ] & 0x03 ) != 0x00 826 || ( sc->sc_enaddr[ 0 ] == 0x00 827 && sc->sc_enaddr[ 1 ] == 0x00 828 && sc->sc_enaddr[ 2 ] == 0x00 ) ) return 0;
| 1153 /* Make sure it is Allied-Telesis's. */ 1154 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) return 0; 1155#if 1 1156 /* Calculate checksum. */ 1157 sum = inb(sc->ioaddr[0x1e]); 1158 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1159 sum ^= sc->sc_enaddr[i]; 1160 } 1161 if (sum != 0) return 0; 1162#endif 1163 /* Setup the board type. */ 1164 sc->typestr = "RE1000";
|
829
| 1165
|
830 /* 831 * Register values which (may) depend on board design. 832 * 833 * Program the 86960 as follows: 834 * SRAM: 32KB, 100ns, byte-wide access. 835 * Transmission buffer: 4KB x 2. 836 * System bus interface: 16 bits. 837 */ 838 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; 839 sc->proto_dlcr5 = 0; 840 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB 841 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns; 842 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC; 843 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
| 1166 /* This looks like an RE1000 board. It requires an 1167 explicit IRQ setting in config. Make sure we have one, 1168 determining an appropriate value for the IRQ control 1169 register. */ 1170 switch (dev->id_irq) { 1171 case IRQ3: n = 0x10; break; 1172 case IRQ5: n = 0x20; break; 1173 case IRQ6: n = 0x40; break; 1174 case IRQ12: n = 0x80; break; 1175 default: 1176 fe_irq_failure(sc->typestr, 1177 sc->sc_unit, dev->id_irq, "3/5/6/12"); 1178 return 0; 1179 } 1180 sc->priv_info = inb(sc->ioaddr[FE_RE1000_IRQCONF]) & 0x0f | n;
|
844
| 1181
|
845 /* 846 * Minimum initialization of the hardware. 847 * We write into registers; hope I/O ports have no 848 * overlap with other boards. 849 */
| 1182 /* Setup hooks. We need a special initialization procedure. */ 1183 sc->init = fe_init_re1000;
|
850
| 1184
|
851 /* Initialize ASIC. */ 852 outb( sc->ioaddr[ FE_FMV3 ], 0 ); 853 outb( sc->ioaddr[ FE_FMV10 ], 0 );
| 1185 /* The I/O address range is fragmented in the RE1000. 1186 It occupies 2*16 I/O addresses, by the way. */ 1187 return 2; 1188}
|
854
| 1189
|
855 /* Initialize 86960. */ 856 DELAY( 200 ); 857 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE ); 858 DELAY( 200 );
| 1190/* JLI sub-probe for Allied-Telesis RE1000Plus/ME1500 series. */ 1191static u_short const * 1192fe_probe_jli_re1000p (struct fe_softc * sc, u_char const * eeprom) 1193{ 1194 int i; 1195 static u_short const irqmaps_re1000p [4] = { IRQ3, IRQ5, IRQ6, IRQ12 };
|
859
| 1196
|
860 /* Disable all interrupts. */ 861 outb( sc->ioaddr[ FE_DLCR2 ], 0 ); 862 outb( sc->ioaddr[ FE_DLCR3 ], 0 );
| 1197 /* Make sure the EEPROM contains Allied-Telesis bit pattern. */ 1198 if (eeprom[1] != 0xFF) return NULL; 1199 for (i = 2; i < 8; i++) if (eeprom[i] != 0xFF) return NULL; 1200 for (i = 14; i < 24; i++) if (eeprom[i] != 0xFF) return NULL;
|
863
| 1201
|
864 /* "Refresh" hardware configuration. FIXME. */ 865 outb( sc->ioaddr[ FE_FMV2 ], inb( sc->ioaddr[ FE_FMV2 ] ) );
| 1202 /* Get our station address from EEPROM, and make sure the 1203 EEPROM contains Allied-Telesis's address. */ 1204 bcopy(eeprom+8, sc->sc_enaddr, ETHER_ADDR_LEN); 1205 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) return NULL;
|
866
| 1206
|
867 /* Turn the "master interrupt control" flag of ASIC on. */ 868 outb( sc->ioaddr[ FE_FMV3 ], FE_FMV3_IRQENB );
| 1207 /* I don't know any sub-model identification. */ 1208 sc->typestr = "RE1000Plus/ME1500";
|
869
| 1209
|
870 /* 871 * That's all. FMV-180 occupies 32 I/O addresses, by the way. 872 */ 873 return 32;
| 1210 /* Returns the IRQ table for the RE1000Plus. */ 1211 return irqmaps_re1000p;
|
874} 875 876/*
| 1212} 1213 1214/*
|
877 * Probe and initialization for Allied-Telesis AT1700/RE2000 series.
| 1215 * Probe for Allied-Telesis RE1000Plus/ME1500 series.
|
878 */ 879static int
| 1216 */ 1217static int
|
880fe_probe_ati ( DEVICE * dev, struct fe_softc * sc )
| 1218fe_probe_jli (struct isa_device * dev, struct fe_softc * sc)
|
881{ 882 int i, n;
| 1219{ 1220 int i, n;
|
883 u_char eeprom [ FE_EEPROM_SIZE ]; 884 u_char save16, save17;
| 1221 int irq; 1222 u_char eeprom [JLI_EEPROM_SIZE]; 1223 u_short const * irqmap;
|
885
| 1224
|
886 static u_short const baseaddr [ 8 ] = 887 { 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300 }; 888 static u_short const irqmaps [ 4 ][ 4 ] = 889 { 890 { IRQ3, IRQ4, IRQ5, IRQ9 }, 891 { IRQ10, IRQ11, IRQ12, IRQ15 }, 892 { IRQ3, IRQ11, IRQ5, IRQ15 }, 893 { IRQ10, IRQ11, IRQ14, IRQ15 }, 894 };
| 1225 static u_short const baseaddr [8] = 1226 { 0x1D6, 0x1D8, 0x1DA, 0x1D4, 0x0D4, 0x0D2, 0x0D8, 0x0D0 };
|
895 static struct fe_simple_probe_struct const probe_table [] = {
| 1227 static struct fe_simple_probe_struct const probe_table [] = {
|
896 { FE_DLCR2, 0x70, 0x00 },
| 1228 /* { FE_DLCR1, 0x20, 0x00 }, Doesn't work. */ 1229 { FE_DLCR2, 0x50, 0x00 },
|
897 { FE_DLCR4, 0x08, 0x00 },
| 1230 { FE_DLCR4, 0x08, 0x00 },
|
898 { FE_DLCR5, 0x80, 0x00 },
| 1231 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */
|
899#if 0 900 { FE_BMPR16, 0x1B, 0x00 }, 901 { FE_BMPR17, 0x7F, 0x00 }, 902#endif 903 { 0 } 904 }; 905
| 1232#if 0 1233 { FE_BMPR16, 0x1B, 0x00 }, 1234 { FE_BMPR17, 0x7F, 0x00 }, 1235#endif 1236 { 0 } 1237 }; 1238
|
906 /* Assume we have 86965 and no need to restore these. */ 907 save16 = 0; 908 save17 = 0; 909 910#if FE_DEBUG >= 3 911 log( LOG_INFO, "fe%d: probe (0x%x) for ATI\n", 912 sc->sc_unit, sc->iobase ); 913 fe_dump( LOG_INFO, sc, NULL ); 914#endif 915
| |
916 /* 917 * See if the specified address is possible for MB86965A JLI mode. 918 */
| 1239 /* 1240 * See if the specified address is possible for MB86965A JLI mode. 1241 */
|
919 for ( i = 0; i < 8; i++ ) { 920 if ( baseaddr[ i ] == sc->iobase ) break;
| 1242 for (i = 0; i < 8; i++) { 1243 if (baseaddr[i] == sc->iobase) break;
|
921 }
| 1244 }
|
922 if ( i == 8 ) goto NOTFOUND;
| 1245 if (i == 8) return 0;
|
923
| 1246
|
924 /* Setup an I/O address mapping table. */ 925 for ( i = 0; i < MAXREGISTERS; i++ ) { 926 sc->ioaddr[ i ] = sc->iobase + i; 927 }
| 1247 /* Fill the softc struct with reasonable default. */ 1248 fe_softc_defaults(sc);
|
928
| 1249
|
| 1250 /* Re-map ioaddr for RE1000Plus. */ 1251 for (i = 0; i < MAXREGISTERS; i++) 1252 sc->ioaddr[i] = sc->iobase + ioaddr_re1000[i]; 1253
|
929 /* 930 * We should test if MB86965A is on the base address now. 931 * Unfortunately, it is very hard to probe it reliably, since 932 * we have no way to reset the chip under software control. 933 * On cold boot, we could check the "signature" bit patterns 934 * described in the Fujitsu document. On warm boot, however, 935 * we can predict almost nothing about register values. 936 */
| 1254 /* 1255 * We should test if MB86965A is on the base address now. 1256 * Unfortunately, it is very hard to probe it reliably, since 1257 * we have no way to reset the chip under software control. 1258 * On cold boot, we could check the "signature" bit patterns 1259 * described in the Fujitsu document. On warm boot, however, 1260 * we can predict almost nothing about register values. 1261 */
|
937 if ( !fe_simple_probe( sc, probe_table ) ) goto NOTFOUND;
| 1262 if (!fe_simple_probe(sc, probe_table)) return 0;
|
938 939 /* Check if our I/O address matches config info on 86965. */
| 1263 1264 /* Check if our I/O address matches config info on 86965. */
|
940 n = ( inb( sc->ioaddr[ FE_BMPR19 ] ) & FE_B19_ADDR ) 941 >> FE_B19_ADDR_SHIFT; 942 if ( baseaddr[ n ] != sc->iobase ) goto NOTFOUND;
| 1265 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT; 1266 if (baseaddr[n] != sc->iobase) return 0;
|
943 944 /*
| 1267 1268 /*
|
945 * We are now almost sure we have an AT1700 at the given 946 * address. So, read EEPROM through 86965. We have to write
| 1269 * We are now almost sure we have an MB86965 at the given 1270 * address. So, read EEPROM through it. We have to write
|
947 * into LSI registers to read from EEPROM. I want to avoid it 948 * at this stage, but I cannot test the presence of the chip 949 * any further without reading EEPROM. FIXME. 950 */
| 1271 * into LSI registers to read from EEPROM. I want to avoid it 1272 * at this stage, but I cannot test the presence of the chip 1273 * any further without reading EEPROM. FIXME. 1274 */
|
951 save16 = inb( sc->ioaddr[ FE_BMPR16 ] ); 952 save17 = inb( sc->ioaddr[ FE_BMPR17 ] ); 953 fe_read_eeprom( sc, eeprom );
| 1275 fe_read_eeprom_jli(sc, eeprom);
|
954
| 1276
|
955 /* Make sure the EEPROM is turned off. */ 956 outb( sc->ioaddr[ FE_BMPR16 ], 0 ); 957 outb( sc->ioaddr[ FE_BMPR17 ], 0 ); 958
| |
959 /* Make sure that config info in EEPROM and 86965 agree. */
| 1277 /* Make sure that config info in EEPROM and 86965 agree. */
|
960 if ( eeprom[ FE_EEPROM_CONF ] != inb( sc->ioaddr[ FE_BMPR19 ] ) ) { 961 goto NOTFOUND;
| 1278 if (eeprom[FE_EEPROM_CONF] != inb(sc->ioaddr[FE_BMPR19])) { 1279 return 0;
|
962 } 963
| 1280 } 1281
|
| 1282 /* Use 86965 media selection scheme, unless othewise 1283 specified. It is "AUTO always" and "select with BMPR13". 1284 This behaviour covers most of the 86965 based board (as 1285 minimum requirements.) It is backward compatible with 1286 previous versions, also. */ 1287 sc->mbitmap = MB_HA; 1288 sc->defmedia = MB_HA; 1289 sc->msel = fe_msel_965; 1290 1291 /* Perform board-specific probe. */ 1292 if ((irqmap = fe_probe_jli_re1000p(sc, eeprom)) == NULL) return 0; 1293 1294 /* Find the IRQ read from EEPROM. */ 1295 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT; 1296 irq = irqmap[n]; 1297 1298 /* Try to determine IRQ setting. */ 1299 if (dev->id_irq == NO_IRQ && irq == NO_IRQ) { 1300 /* The device must be configured with an explicit IRQ. */ 1301 printf("fe%d: IRQ auto-detection does not work\n", 1302 sc->sc_unit); 1303 return 0; 1304 } else if (dev->id_irq == NO_IRQ && irq != NO_IRQ) { 1305 /* Just use the probed IRQ value. */ 1306 dev->id_irq = irq; 1307 } else if (dev->id_irq != NO_IRQ && irq == NO_IRQ) { 1308 /* No problem. Go ahead. */ 1309 } else if (dev->id_irq == irq) { 1310 /* Good. Go ahead. */ 1311 } else { 1312 /* User must be warned in this case. */ 1313 sc->stability |= UNSTABLE_IRQ; 1314 } 1315 1316 /* Setup a hook, which resets te 86965 when the driver is being 1317 initialized. This may solve a nasty bug. FIXME. */ 1318 sc->init = fe_init_jli; 1319 1320 /* The I/O address range is fragmented in the RE1000Plus. 1321 It occupies 2*16 I/O addresses, by the way. */ 1322 return 2; 1323} 1324 1325/* 1326 * Probe and initialization for Contec C-NET(9N)E series. 1327 */ 1328 1329/* TODO: Should be in "if_fereg.h" */ 1330#define FE_CNET9NE_INTR 0x10 /* Interrupt Mask? */ 1331 1332static void 1333fe_init_cnet9ne ( struct fe_softc * sc ) 1334{ 1335 /* Enable interrupt? FIXME. */ 1336 outb(sc->ioaddr[FE_CNET9NE_INTR], 0x10); 1337} 1338 1339static int 1340fe_probe_cnet9ne ( struct isa_device * dev, struct fe_softc * sc ) 1341{ 1342 int i; 1343 1344 static struct fe_simple_probe_struct probe_table [] = { 1345 { FE_DLCR2, 0x58, 0x00 }, 1346 { FE_DLCR4, 0x08, 0x00 }, 1347 { 0 } 1348 }; 1349 static u_short ioaddr[MAXREGISTERS - 16] = { 1350 /* 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, */ 1351 /* 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, */ 1352 0x400, 0x402, 0x404, 0x406, 0x408, 0x40a, 0x40c, 0x40e, 1353 0x401, 0x403, 0x405, 0x407, 0x409, 0x40b, 0x40d, 0x40f, 1354 }; 1355 1356 /* See if the specified I/O address is possible for C-NET(9N)E. */ 1357 if (sc->iobase != 0x73D0) return 0; 1358 1359 /* Setup an I/O address mapping table and some others. */ 1360 fe_softc_defaults(sc); 1361 1362 /* Re-map ioaddr for C-NET(9N)E. */ 1363 for (i = 16; i < MAXREGISTERS; i++) 1364 sc->ioaddr[i] = sc->iobase + ioaddr[i - 16]; 1365 1366 /* See if the card is on its address. */ 1367 if (!fe_simple_probe(sc, probe_table)) return 0; 1368 1369 /* Get our station address from EEPROM. */ 1370 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN); 1371 1372 /* Make sure it is Contec's. */ 1373 if (!valid_Ether_p(sc->sc_enaddr, 0x00804C)) return 0; 1374 1375 /* Setup the board type. */ 1376 sc->typestr = "C-NET(9N)E"; 1377 1378 /* C-NET(9N)E seems to work only IRQ5. FIXME. */ 1379 if (dev->id_irq != IRQ5) { 1380 fe_irq_failure(sc->typestr, sc->sc_unit, dev->id_irq, "5"); 1381 return 0; 1382 } 1383 1384 /* We need an init hook to initialize ASIC before we start. */ 1385 sc->init = fe_init_cnet9ne; 1386 1387 /* C-NET(9N)E has 64KB SRAM. */ 1388 sc->proto_dlcr6 = FE_D6_BUFSIZ_64KB | FE_D6_TXBSIZ_2x4KB 1389 | FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_SRAM; 1390 1391 /* The I/O address range is fragmented in the C-NET(9N)E. 1392 This is the number of regs at iobase. */ 1393 return 16; 1394} 1395 1396/* 1397 * Probe for Contec C-NET(98)P2 series. 1398 * (Logitec LAN-98TP/LAN-98T25P - parhaps) 1399 */ 1400static int 1401fe_probe_ssi (struct isa_device *dev, struct fe_softc *sc) 1402{ 1403 u_char eeprom [SSI_EEPROM_SIZE]; 1404 1405 static struct fe_simple_probe_struct probe_table [] = { 1406 { FE_DLCR2, 0x08, 0x00 }, 1407 { FE_DLCR4, 0x08, 0x00 }, 1408 { 0 } 1409 }; 1410 static u_short const irqmap[] = { 1411 /* INT0 INT1 INT2 */ 1412 NO_IRQ, NO_IRQ, NO_IRQ, IRQ3 , NO_IRQ, IRQ5 , IRQ6 , NO_IRQ, 1413 NO_IRQ, IRQ9 , IRQ10 , NO_IRQ, IRQ12 , IRQ13 , NO_IRQ, NO_IRQ, 1414 /* INT3 INT41 INT5 INT6 */ 1415 }; 1416 1417 /* See if the specified I/O address is possible for 78Q8377A. */ 1418 /* [0-D]3D0 are allowed. */ 1419 if ((sc->iobase & 0xFFF) != 0x3D0) return 0; /* XXX */ 1420 1421 /* Fill the softc struct with default values. */ 1422 fe_softc_defaults(sc); 1423 1424 /* See if the card is on its address. */ 1425 if (!fe_simple_probe(sc, probe_table)) return 0; 1426 1427 /* We now have to read the config EEPROM. We should be very 1428 careful, since doing so destroys a register. (Remember, we 1429 are not yet sure we have a C-NET(98)P2 board here.) Don't 1430 remember to select BMPRs bofore reading EEPROM, since other 1431 register bank may be selected before the probe() is called. */ 1432 fe_read_eeprom_ssi(sc, eeprom); 1433 1434 /* Make sure the Ethernet (MAC) station address is of Contec's. */ 1435 if (!valid_Ether_p(eeprom+FE_SSI_EEP_ADDR, 0x00804C)) return 0; 1436 bcopy(eeprom+FE_SSI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN); 1437 1438 /* Setup the board type. */ 1439 sc->typestr = "C-NET(98)P2"; 1440 1441 /* Get IRQ configuration from EEPROM. */ 1442 dev->id_irq = irqmap[eeprom[FE_SSI_EEP_IRQ]]; 1443 if (dev->id_irq == NO_IRQ) { 1444 fe_irq_failure(sc->typestr, 1445 sc->sc_unit, dev->id_irq, "3/5/6/9/10/12/13"); 1446 return 0; 1447 } 1448 1449 /* Get Duplex-mode configuration from EEPROM. */ 1450 sc->proto_dlcr4 |= (eeprom[FE_SSI_EEP_DUPLEX] & FE_D4_DSC); 1451 1452 /* Fill softc struct accordingly. */ 1453 sc->mbitmap = MB_HT; 1454 sc->defmedia = MB_HT; 1455 1456 /* We have 16 registers. */ 1457 return 16; 1458} 1459 1460/* 1461 * Probe for TDK LAC-98012/013/025/9N011 - parhaps. 1462 */ 1463static int 1464fe_probe_lnx (struct isa_device *dev, struct fe_softc *sc) 1465{ 1466#ifndef FE_8BIT_SUPPORT 1467 printf("fe%d: skip LAC-98012/013(only 16-bit cards are supported)\n", 1468 sc->sc_unit); 1469 return 0; 1470#else 1471 int i; 1472 u_char eeprom [LNX_EEPROM_SIZE]; 1473 1474 static struct fe_simple_probe_struct probe_table [] = { 1475 { FE_DLCR2, 0x58, 0x00 }, 1476 { FE_DLCR4, 0x08, 0x00 }, 1477 { 0 } 1478 }; 1479 1480 /* See if the specified I/O address is possible for TDK/LANX boards. */ 1481 /* 0D0, 4D0, 8D0, and CD0 are allowed. */ 1482 if ((sc->iobase & ~0xC00) != 0xD0) return 0; 1483 1484 /* Fill the softc struct with default values. */ 1485 fe_softc_defaults(sc); 1486 1487 /* Re-map ioaddr for LAC-98. 1488 * 0x000, 0x002, 0x004, 0x006, 0x008, 0x00a, 0x00c, 0x00e, 1489 * 0x100, 0x102, 0x104, 0x106, 0x108, 0x10a, 0x10c, 0x10e, 1490 * 0x200, 0x202, 0x204, 0x206, 0x208, 0x20a, 0x20c, 0x20e, 1491 * 0x300, 0x302, 0x304, 0x306, 0x308, 0x30a, 0x30c, 0x30e, 1492 */ 1493 for (i = 0; i < MAXREGISTERS; i++) 1494 sc->ioaddr[i] = sc->iobase + ((i & 7) << 1) + ((i & 0x18) << 5); 1495 1496 /* See if the card is on its address. */ 1497 if (!fe_simple_probe(sc, probe_table)) return 0; 1498 1499 /* We now have to read the config EEPROM. We should be very 1500 careful, since doing so destroys a register. (Remember, we 1501 are not yet sure we have a LAC-98012/98013 board here.) */ 1502 fe_read_eeprom_lnx(sc, eeprom); 1503 1504 /* Make sure the Ethernet (MAC) station address is of TDK/LANX's. */ 1505 if (!valid_Ether_p(eeprom, 0x008098)) return 0; 1506 bcopy(eeprom, sc->sc_enaddr, ETHER_ADDR_LEN); 1507 1508 /* Setup the board type. */ 1509 sc->typestr = "LAC-98012/98013"; 1510 1511 /* This looks like a TDK/LANX board. It requires an 1512 explicit IRQ setting in config. Make sure we have one, 1513 determining an appropriate value for the IRQ control 1514 register. */ 1515 switch (dev->id_irq) { 1516 case IRQ3 : sc->priv_info = 0x10 | LNX_CLK_LO | LNX_SDA_HI; break; 1517 case IRQ5 : sc->priv_info = 0x20 | LNX_CLK_LO | LNX_SDA_HI; break; 1518 case IRQ6 : sc->priv_info = 0x40 | LNX_CLK_LO | LNX_SDA_HI; break; 1519 case IRQ12: sc->priv_info = 0x80 | LNX_CLK_LO | LNX_SDA_HI; break; 1520 default: 1521 fe_irq_failure(sc->typestr, 1522 sc->sc_unit, dev->id_irq, "3/5/6/12"); 1523 return 0; 1524 } 1525 1526 /* LAC-98's system bus width is 8-bit. */ 1527 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x2KB 1528 | FE_D6_BBW_BYTE | FE_D6_SBW_BYTE | FE_D6_SRAM_150ns; 1529 1530 /* Setup hooks. We need a special initialization procedure. */ 1531 sc->init = fe_init_lnx; 1532 1533 /* The I/O address range is fragmented in the LAC-98. 1534 It occupies 16*4 I/O addresses, by the way. */ 1535 return 16; 1536#endif /* FE_8BIT_SUPPORT */ 1537} 1538 1539/* 1540 * Probe for Gateway Communications' old cards. 1541 * (both as Generic MB86960 probe routine) 1542 */ 1543static int 1544fe_probe_gwy ( struct isa_device * dev, struct fe_softc * sc ) 1545{ 1546 static struct fe_simple_probe_struct probe_table [] = { 1547 /* { FE_DLCR2, 0x70, 0x00 }, */ 1548 { FE_DLCR2, 0x58, 0x00 }, 1549 { FE_DLCR4, 0x08, 0x00 }, 1550 { 0 } 1551 }; 1552 1553 /* I'm not sure which address is possible, so accepts any. FIXME. */ 1554 1555 /* Setup an I/O address mapping table and some others. */ 1556 fe_softc_defaults(sc); 1557 1558 /* Does we need to re-map ioaddr? FIXME. */ 1559 1560 /* See if the card is on its address. */ 1561 if ( !fe_simple_probe( sc, probe_table ) ) return 0; 1562 1563 /* Get our station address from EEPROM. */ 1564 inblk( sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN ); 1565 if (!valid_Ether_p(sc->sc_enaddr, 0x000000)) return 0; 1566 1567 /* Determine the card type. */ 1568 sc->typestr = "Generic MB86960 Ethernet"; 1569 if (valid_Ether_p(sc->sc_enaddr, 0x000061)) 1570 sc->typestr = "Gateway Ethernet (Fujitsu chipset)"; 1571 1572 /* Gateway's board requires an explicit IRQ to work, since it 1573 is not possible to probe the setting of jumpers. */ 1574 if (dev->id_irq == NO_IRQ) { 1575 fe_irq_failure(sc->typestr, sc->sc_unit, NO_IRQ, NULL); 1576 return 0; 1577 } 1578 1579 /* We should change return value when re-mapping ioaddr. FIXME. */ 1580 return 32; 1581} 1582 1583/* 1584 * Probe for Ungermann-Bass Access/PC N98C+(Model 85152). 1585 */ 1586static int 1587fe_probe_ubn (struct isa_device * dev, struct fe_softc * sc) 1588{ 1589 u_char sum; 1590 int i; 1591 static struct fe_simple_probe_struct const probe_table [] = { 1592 { FE_DLCR2, 0x58, 0x00 }, 1593 { FE_DLCR4, 0x08, 0x00 }, 1594 { 0 } 1595 }; 1596 1597 /* See if the specified I/O address is possible for Access/PC. */ 1598 /* [01][048C]D0 are allowed. */ 1599 if ((sc->iobase & ~0x1C00) != 0xD0) return 0; 1600 1601 /* Setup an I/O address mapping table and some others. */ 1602 fe_softc_defaults(sc); 1603 1604 /* Re-map ioaddr for Access/PC N98C+. 1605 * 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, 1606 * 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, 1607 * 0x200, 0x201, 0x202, 0x203, 0x204, 0x205, 0x206, 0x207, 1608 * 0x208, 0x209, 0x20a, 0x20b, 0x20c, 0x20d, 0x20e, 0x20f, 1609 */ 1610 for (i = 16; i < MAXREGISTERS; i++) 1611 sc->ioaddr[i] = sc->iobase + 0x200 - 16 + i; 1612 1613 /* Simple probe. */ 1614 if (!fe_simple_probe(sc, probe_table)) return 0; 1615 1616 /* Get our station address form ID ROM and make sure it is UBN's. */ 1617 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN); 1618 if (!valid_Ether_p(sc->sc_enaddr, 0x00DD01)) return 0; 1619#if 1 1620 /* Calculate checksum. */ 1621 sum = inb(sc->ioaddr[0x1e]); 1622 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1623 sum ^= sc->sc_enaddr[i]; 1624 } 1625 if (sum != 0) return 0; 1626#endif 1627 /* Setup the board type. */ 1628 sc->typestr = "Access/PC"; 1629 1630 /* This looks like an AccessPC/N98C+ board. It requires an 1631 explicit IRQ setting in config. Make sure we have one, 1632 determining an appropriate value for the IRQ control 1633 register. */ 1634 switch (dev->id_irq) { 1635 case IRQ3: sc->priv_info = 0x01; break; 1636 case IRQ5: sc->priv_info = 0x02; break; 1637 case IRQ6: sc->priv_info = 0x04; break; 1638 case IRQ12: sc->priv_info = 0x08; break; 1639 default: 1640 fe_irq_failure(sc->typestr, 1641 sc->sc_unit, dev->id_irq, "3/5/6/12"); 1642 return 0; 1643 } 1644 1645 /* Setup hooks. We need a special initialization procedure. */ 1646 sc->init = fe_init_ubn; 1647 1648 /* The I/O address range is fragmented in the Access/PC N98C+. 1649 This is the number of regs at iobase. */ 1650 return 16; 1651} 1652 1653#else /* !PC98 */ 1654/* 1655 * Probe and initialization for Fujitsu FMV-180 series boards 1656 */ 1657 1658static void 1659fe_init_fmv (struct fe_softc *sc) 1660{ 1661 /* Initialize ASIC. */ 1662 outb( sc->ioaddr[ FE_FMV3 ], 0 ); 1663 outb( sc->ioaddr[ FE_FMV10 ], 0 ); 1664 1665#if 0 1666 /* "Refresh" hardware configuration. FIXME. */ 1667 outb( sc->ioaddr[ FE_FMV2 ], inb( sc->ioaddr[ FE_FMV2 ] ) ); 1668#endif 1669 1670 /* Turn the "master interrupt control" flag of ASIC on. */ 1671 outb( sc->ioaddr[ FE_FMV3 ], FE_FMV3_IRQENB ); 1672} 1673 1674static void 1675fe_msel_fmv184 (struct fe_softc *sc) 1676{ 1677 u_char port; 1678 1679 /* FMV-184 has a special "register" to switch between AUI/BNC. 1680 Determine the value to write into the register, based on the 1681 user-specified media selection. */ 1682 port = (IFM_SUBTYPE(sc->media.ifm_media) == IFM_10_2) ? 0x00 : 0x01; 1683 1684 /* The register is #5 on exntesion register bank... 1685 (Details of the register layout is not yet discovered.) */ 1686 outb(sc->ioaddr[0x1B], 0x46); /* ??? */ 1687 outb(sc->ioaddr[0x1E], 0x04); /* select ex-reg #4. */ 1688 outb(sc->ioaddr[0x1F], 0xC8); /* ??? */ 1689 outb(sc->ioaddr[0x1E], 0x05); /* select ex-reg #5. */ 1690 outb(sc->ioaddr[0x1F], port); /* Switch the media. */ 1691 outb(sc->ioaddr[0x1E], 0x04); /* select ex-reg #4. */ 1692 outb(sc->ioaddr[0x1F], 0x00); /* ??? */ 1693 outb(sc->ioaddr[0x1B], 0x00); /* ??? */ 1694 1695 /* Make sure to select "external tranceiver" on MB86964. */ 1696 outb(sc->ioaddr[FE_BMPR13], sc->proto_bmpr13 | FE_B13_PORT_AUI); 1697} 1698 1699static int 1700fe_probe_fmv ( struct isa_device * dev, struct fe_softc * sc ) 1701{ 1702 int n; 1703 1704 static u_short const irqmap [ 4 ] = 1705 { IRQ3, IRQ7, IRQ10, IRQ15 }; 1706 1707 static struct fe_simple_probe_struct const probe_table [] = { 1708 { FE_DLCR2, 0x71, 0x00 }, 1709 { FE_DLCR4, 0x08, 0x00 }, 1710 1711 { FE_FMV0, 0x78, 0x50 }, /* ERRDY+PRRDY */ 1712 { FE_FMV1, 0xB0, 0x00 }, /* FMV-183/4 has 0x48 bits. */ 1713 { FE_FMV3, 0x7F, 0x00 }, 1714 1715 { 0 } 1716 }; 1717 1718 /* Board subtypes; it lists known FMV-180 variants. */ 1719 struct subtype { 1720 u_short mcode; 1721 u_short mbitmap; 1722 u_short defmedia; 1723 char const * str; 1724 }; 1725 static struct subtype const typelist [] = { 1726 { 0x0005, MB_HA|MB_HT|MB_H5, MB_HA, "FMV-181" }, 1727 { 0x0105, MB_HA|MB_HT|MB_H5, MB_HA, "FMV-181A" }, 1728 { 0x0003, MB_HM, MB_HM, "FMV-182" }, 1729 { 0x0103, MB_HM, MB_HM, "FMV-182A" }, 1730 { 0x0804, MB_HT, MB_HT, "FMV-183" }, 1731 { 0x0C04, MB_HT, MB_HT, "FMV-183 (on-board)" }, 1732 { 0x0803, MB_H2|MB_H5, MB_H2, "FMV-184" }, 1733 { 0, MB_HA, MB_HA, "unknown FMV-180 (?)" }, 1734 }; 1735 struct subtype const * type; 1736 1737 /* Media indicator and "Hardware revision ID" */ 1738 u_short mcode; 1739 1740 /* See if the specified address is possible for FMV-180 1741 series. 220, 240, 260, 280, 2A0, 2C0, 300, and 340 are 1742 allowed for all boards, and 200, 2E0, 320, 360, 380, 3A0, 1743 3C0, and 3E0 for PnP boards. */ 1744 if ((sc->iobase & ~0x1E0) != 0x200) return 0; 1745 1746 /* Setup an I/O address mapping table and some others. */ 1747 fe_softc_defaults(sc); 1748 1749 /* Simple probe. */ 1750 if (!fe_simple_probe(sc, probe_table)) return 0; 1751 1752 /* Get our station address from EEPROM, and make sure it is 1753 Fujitsu's. */ 1754 inblk(sc, FE_FMV4, sc->sc_enaddr, ETHER_ADDR_LEN); 1755 if (!valid_Ether_p(sc->sc_enaddr, 0x00000E)) return 0; 1756 1757 /* Find the supported media and "hardware revision" to know 1758 the model identification. */ 1759 mcode = (inb(sc->ioaddr[FE_FMV0]) & FE_FMV0_MEDIA) 1760 | ((inb(sc->ioaddr[FE_FMV1]) & FE_FMV1_REV) << 8); 1761 1762 /* Determine the card type. */ 1763 for (type = typelist; type->mcode != 0; type++) { 1764 if (type->mcode == mcode) break; 1765 } 1766 if (type->mcode == 0) { 1767 /* Unknown card type... Hope the driver works. */ 1768 sc->stability |= UNSTABLE_TYPE; 1769 if (bootverbose) { 1770 printf("fe%d: unknown config: %x-%x-%x-%x\n", 1771 sc->sc_unit, 1772 inb(sc->ioaddr[FE_FMV0]), 1773 inb(sc->ioaddr[FE_FMV1]), 1774 inb(sc->ioaddr[FE_FMV2]), 1775 inb(sc->ioaddr[FE_FMV3])); 1776 } 1777 } 1778 1779 /* Setup the board type and media information. */ 1780 sc->typestr = type->str; 1781 sc->mbitmap = type->mbitmap; 1782 sc->defmedia = type->defmedia; 1783 sc->msel = fe_msel_965; 1784 1785 if (type->mbitmap == (MB_H2 | MB_H5)) { 1786 /* FMV184 requires a special media selection procedure. */ 1787 sc->msel = fe_msel_fmv184; 1788 } 1789
|
964 /*
| 1790 /*
|
965 * The following model identification codes are stolen from
| 1791 * An FMV-180 has been probed. 1792 * Determine which IRQ to be used. 1793 * 1794 * In this version, we give a priority to the kernel config file. 1795 * If the EEPROM and config don't match, say it to the user for 1796 * an attention. 1797 */ 1798 n = ( inb( sc->ioaddr[ FE_FMV2 ] ) & FE_FMV2_IRS ) 1799 >> FE_FMV2_IRS_SHIFT; 1800 if ( dev->id_irq == NO_IRQ ) { 1801 /* Just use the probed value. */ 1802 dev->id_irq = irqmap[ n ]; 1803 } else if ( dev->id_irq != irqmap[ n ] ) { 1804 /* Don't match. */ 1805 sc->stability |= UNSTABLE_IRQ; 1806 } 1807 1808 /* We need an init hook to initialize ASIC before we start. */ 1809 sc->init = fe_init_fmv; 1810 1811 /* 1812 * That's all. FMV-180 occupies 32 I/O addresses, by the way. 1813 */ 1814 return 32; 1815} 1816 1817/* 1818 * Fujitsu MB86965 JLI mode probe routines. 1819 * 1820 * 86965 has a special operating mode called JLI (mode 0), under which 1821 * the chip interfaces with ISA bus with a software-programmable 1822 * configuration. (The Fujitsu document calls the feature "Plug and 1823 * play," but it is not compatible with the ISA-PnP spec. designed by 1824 * Intel and Microsoft.) Ethernet cards designed to use JLI are 1825 * almost same, but there are two things which require board-specific 1826 * probe routines: EEPROM layout and IRQ pin connection. 1827 * 1828 * JLI provides a handy way to access EEPROM which should contains the 1829 * chip configuration information (such as I/O port address) as well 1830 * as Ethernet station (MAC) address. The chip configuration info. is 1831 * stored on a fixed location. However, the station address can be 1832 * located anywhere in the EEPROM; it is up to the board designer to 1833 * determine the location. (The manual just says "somewhere in the 1834 * EEPROM.") The fe driver must somehow find out the correct 1835 * location. 1836 * 1837 * Another problem resides in the IRQ pin connection. JLI provides a 1838 * user to choose an IRQ from up to four predefined IRQs. The 86965 1839 * chip has a register to select one out of the four possibilities. 1840 * However, the selection is against the four IRQ pins on the chip. 1841 * (So-called IRQ-A, -B, -C and -D.) It is (again) up to the board 1842 * designer to determine which pin to connect which IRQ line on the 1843 * ISA bus. We need a vendor (or model, for some vendor) specific IRQ 1844 * mapping table. 1845 * 1846 * The routine fe_probe_jli() provides all probe and initialization 1847 * processes which are common to all JLI implementation, and sub-probe 1848 * routines supply board-specific actions. 1849 * 1850 * JLI sub-probe routine has the following template: 1851 * 1852 * u_short const * func (struct fe_softc * sc, u_char const * eeprom); 1853 * 1854 * where eeprom is a pointer to an array of 32 byte data read from the 1855 * config EEPROM on the board. It retuns an IRQ mapping table for the 1856 * board, when the corresponding implementation is detected. It 1857 * returns a NULL otherwise. 1858 * 1859 * Primary purpose of the functin is to analize the config EEPROM, 1860 * determine if it matches with the pattern of that of supported card, 1861 * and extract necessary information from it. One of the information 1862 * expected to be extracted from EEPROM is the Ethernet station (MAC) 1863 * address, which must be set to the softc table of the interface by 1864 * the board-specific routine. 1865 */ 1866 1867/* JLI sub-probe for Allied-Telesyn/Allied-Telesis AT1700/RE2000 series. */ 1868static u_short const * 1869fe_probe_jli_ati (struct fe_softc * sc, u_char const * eeprom) 1870{ 1871 int i; 1872 static u_short const irqmaps_ati [4][4] = 1873 { 1874 { IRQ3, IRQ4, IRQ5, IRQ9 }, 1875 { IRQ10, IRQ11, IRQ12, IRQ15 }, 1876 { IRQ3, IRQ11, IRQ5, IRQ15 }, 1877 { IRQ10, IRQ11, IRQ14, IRQ15 }, 1878 }; 1879 1880 /* Make sure the EEPROM contains Allied-Telesis/Allied-Telesyn 1881 bit pattern. */ 1882 if (eeprom[1] != 0x00) return NULL; 1883 for (i = 2; i < 8; i++) if (eeprom[i] != 0xFF) return NULL; 1884 for (i = 14; i < 24; i++) if (eeprom[i] != 0xFF) return NULL; 1885 1886 /* Get our station address from EEPROM, and make sure the 1887 EEPROM contains ATI's address. */ 1888 bcopy(eeprom+8, sc->sc_enaddr, ETHER_ADDR_LEN); 1889 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) return NULL; 1890 1891 /* 1892 * The following model identification codes are stolen
|
966 * from the NetBSD port of the fe driver. My reviewers 967 * suggested minor revision. 968 */ 969 970 /* Determine the card type. */ 971 switch (eeprom[FE_ATI_EEP_MODEL]) { 972 case FE_ATI_MODEL_AT1700T: 973 sc->typestr = "AT-1700T/RE2001";
| 1893 * from the NetBSD port of the fe driver. My reviewers 1894 * suggested minor revision. 1895 */ 1896 1897 /* Determine the card type. */ 1898 switch (eeprom[FE_ATI_EEP_MODEL]) { 1899 case FE_ATI_MODEL_AT1700T: 1900 sc->typestr = "AT-1700T/RE2001";
|
| 1901 sc->mbitmap = MB_HT; 1902 sc->defmedia = MB_HT;
|
974 break; 975 case FE_ATI_MODEL_AT1700BT: 976 sc->typestr = "AT-1700BT/RE2003";
| 1903 break; 1904 case FE_ATI_MODEL_AT1700BT: 1905 sc->typestr = "AT-1700BT/RE2003";
|
| 1906 sc->mbitmap = MB_HA | MB_HT | MB_H2;
|
977 break; 978 case FE_ATI_MODEL_AT1700FT: 979 sc->typestr = "AT-1700FT/RE2009";
| 1907 break; 1908 case FE_ATI_MODEL_AT1700FT: 1909 sc->typestr = "AT-1700FT/RE2009";
|
| 1910 sc->mbitmap = MB_HA | MB_HT | MB_HF;
|
980 break; 981 case FE_ATI_MODEL_AT1700AT: 982 sc->typestr = "AT-1700AT/RE2005";
| 1911 break; 1912 case FE_ATI_MODEL_AT1700AT: 1913 sc->typestr = "AT-1700AT/RE2005";
|
| 1914 sc->mbitmap = MB_HA | MB_HT | MB_H5;
|
983 break; 984 default:
| 1915 break; 1916 default:
|
985 sc->typestr = "unknown AT-1700/RE2000 ?";
| 1917 sc->typestr = "unknown AT-1700/RE2000"; 1918 sc->stability |= UNSTABLE_TYPE | UNSTABLE_IRQ;
|
986 break; 987 } 988
| 1919 break; 1920 } 1921
|
| 1922#if 0 1923 /* Should we extract default media from eeprom? Linux driver 1924 for AT1700 does it, although previous releases of FreeBSD 1925 don't. FIXME. */ 1926 /* Determine the default media selection from the config 1927 EEPROM. The byte at offset EEP_MEDIA is believed to 1928 contain BMPR13 value to be set. We just ignore STP bit or 1929 squelch bit, since we don't support those. (It is 1930 intentional.) */ 1931 switch (eeprom[FE_ATI_EEP_MEDIA] & FE_B13_PORT) { 1932 case FE_B13_AUTO: 1933 sc->defmedia = MB_HA; 1934 break; 1935 case FE_B13_TP: 1936 sc->defmedia = MB_HT; 1937 break; 1938 case FE_B13_AUI: 1939 sc->defmedia = sc->mbitmap & (MB_H2|MB_H5|MB_H5); /*XXX*/ 1940 break; 1941 default: 1942 sc->defmedia = MB_HA; 1943 break; 1944 } 1945 1946 /* Make sure the default media is compatible with the supported 1947 ones. */ 1948 if ((sc->defmedia & sc->mbitmap) == 0) { 1949 if (sc->defmedia == MB_HA) { 1950 sc->defmedia = MB_HT; 1951 } else { 1952 sc->defmedia = MB_HA; 1953 } 1954 } 1955#endif 1956
|
989 /* 990 * Try to determine IRQ settings. 991 * Different models use different ranges of IRQs. 992 */
| 1957 /* 1958 * Try to determine IRQ settings. 1959 * Different models use different ranges of IRQs. 1960 */
|
993 if ( dev->id_irq == NO_IRQ ) { 994 n = ( inb( sc->ioaddr[ FE_BMPR19 ] ) & FE_B19_IRQ ) 995 >> FE_B19_IRQ_SHIFT; 996 switch ( eeprom[ FE_ATI_EEP_REVISION ] & 0xf0 ) { 997 case 0x30: 998 dev->id_irq = irqmaps[ 3 ][ n ]; 999 break; 1000 case 0x10: 1001 case 0x50: 1002 dev->id_irq = irqmaps[ 2 ][ n ]; 1003 break; 1004 case 0x40: 1005 case 0x60: 1006 if ( eeprom[ FE_ATI_EEP_MAGIC ] & 0x04 ) { 1007 dev->id_irq = irqmaps[ 1 ][ n ]; 1008 } else { 1009 dev->id_irq = irqmaps[ 0 ][ n ]; 1010 } 1011 break; 1012 default: 1013 dev->id_irq = irqmaps[ 0 ][ n ]; 1014 break;
| 1961 switch ((eeprom[FE_ATI_EEP_REVISION] & 0xf0) 1962 |(eeprom[FE_ATI_EEP_MAGIC] & 0x04)) { 1963 case 0x30: case 0x34: return irqmaps_ati[3]; 1964 case 0x10: case 0x14: 1965 case 0x50: case 0x54: return irqmaps_ati[2]; 1966 case 0x44: case 0x64: return irqmaps_ati[1]; 1967 default: return irqmaps_ati[0]; 1968 } 1969} 1970 1971/* JLI sub-probe and msel hook for ICL Ethernet. */ 1972 1973static void 1974fe_msel_icl (struct fe_softc *sc) 1975{ 1976 u_char d4; 1977 1978 /* Switch between UTP and "external tranceiver" as always. */ 1979 fe_msel_965(sc); 1980 1981 /* The board needs one more bit (on DLCR4) be set appropriately. */ 1982 if (IFM_SUBTYPE(sc->media.ifm_media) == IFM_10_5) { 1983 d4 = sc->proto_dlcr4 | FE_D4_CNTRL; 1984 } else { 1985 d4 = sc->proto_dlcr4 & ~FE_D4_CNTRL; 1986 } 1987 outb(sc->ioaddr[FE_DLCR4], d4); 1988} 1989 1990static u_short const * 1991fe_probe_jli_icl (struct fe_softc * sc, u_char const * eeprom) 1992{ 1993 int i; 1994 u_short defmedia; 1995 u_char d6; 1996 static u_short const irqmap_icl [4] = { IRQ9, IRQ10, IRQ5, IRQ15 }; 1997 1998 /* Make sure the EEPROM contains ICL bit pattern. */ 1999 for (i = 24; i < 39; i++) { 2000 if (eeprom[i] != 0x20 && (eeprom[i] & 0xF0) != 0x30) return NULL; 2001 } 2002 for (i = 112; i < 122; i++) { 2003 if (eeprom[i] != 0x20 && (eeprom[i] & 0xF0) != 0x30) return NULL; 2004 } 2005 2006 /* Make sure the EEPROM contains ICL's permanent station 2007 address. If it isn't, probably this board is not an 2008 ICL's. */ 2009 if (!valid_Ether_p(eeprom+122, 0x00004B)) return NULL; 2010 2011 /* Check if the "configured" Ethernet address in the EEPROM is 2012 valid. Use it if it is, or use the "permanent" address instead. */ 2013 if (valid_Ether_p(eeprom+4, 0x020000)) { 2014 /* The configured address is valid. Use it. */ 2015 bcopy(eeprom+4, sc->sc_enaddr, ETHER_ADDR_LEN); 2016 } else { 2017 /* The configured address is invalid. Use permanent. */ 2018 bcopy(eeprom+122, sc->sc_enaddr, ETHER_ADDR_LEN); 2019 } 2020 2021 /* Determine model and supported media. */ 2022 switch (eeprom[0x5E]) { 2023 case 0: 2024 sc->typestr = "EtherTeam16i/COMBO"; 2025 sc->mbitmap = MB_HA | MB_HT | MB_H5 | MB_H2; 2026 break; 2027 case 1: 2028 sc->typestr = "EtherTeam16i/TP"; 2029 sc->mbitmap = MB_HT; 2030 break; 2031 case 2: 2032 sc->typestr = "EtherTeam16i/ErgoPro"; 2033 sc->mbitmap = MB_HA | MB_HT | MB_H5; 2034 break; 2035 case 4: 2036 sc->typestr = "EtherTeam16i/DUO"; 2037 sc->mbitmap = MB_HA | MB_HT | MB_H2; 2038 break; 2039 default: 2040 sc->typestr = "EtherTeam16i"; 2041 sc->stability |= UNSTABLE_TYPE; 2042 if (bootverbose) { 2043 printf("fe%d: unknown model code %02x for EtherTeam16i\n", 2044 sc->sc_unit, eeprom[0x5E]);
|
1015 }
| 2045 }
|
| 2046 break;
|
1016 } 1017
| 2047 } 2048
|
| 2049 /* I'm not sure the following msel hook is required by all 2050 models or COMBO only... FIXME. */ 2051 sc->msel = fe_msel_icl;
|
1018
| 2052
|
| 2053 /* Make the configured media selection the default media. */ 2054 switch (eeprom[0x28]) { 2055 case 0: defmedia = MB_HA; break; 2056 case 1: defmedia = MB_H5; break; 2057 case 2: defmedia = MB_HT; break; 2058 case 3: defmedia = MB_H2; break; 2059 default: 2060 if (bootverbose) { 2061 printf("fe%d: unknown default media: %02x\n", 2062 sc->sc_unit, eeprom[0x28]); 2063 } 2064 defmedia = MB_HA; 2065 break; 2066 } 2067 2068 /* Make sure the default media is compatible with the 2069 supported media. */ 2070 if ((defmedia & sc->mbitmap) == 0) { 2071 if (bootverbose) { 2072 printf("fe%d: default media adjusted\n", sc->sc_unit); 2073 } 2074 defmedia = sc->mbitmap; 2075 } 2076 2077 /* Keep the determined default media. */ 2078 sc->defmedia = defmedia; 2079 2080 /* ICL has "fat" models. We have to program 86965 to properly 2081 reflect the hardware. */ 2082 d6 = sc->proto_dlcr6 & ~(FE_D6_BUFSIZ | FE_D6_BBW); 2083 switch ((eeprom[0x61] << 8) | eeprom[0x60]) { 2084 case 0x2008: d6 |= FE_D6_BUFSIZ_32KB | FE_D6_BBW_BYTE; break; 2085 case 0x4010: d6 |= FE_D6_BUFSIZ_64KB | FE_D6_BBW_WORD; break; 2086 default: 2087 /* We can't support it, since we don't know which bits 2088 to set in DLCR6. */ 2089 printf("fe%d: unknown SRAM config for ICL\n", sc->sc_unit); 2090 return NULL; 2091 } 2092 sc->proto_dlcr6 = d6; 2093 2094 /* Returns the IRQ table for the ICL board. */ 2095 return irqmap_icl; 2096} 2097 2098/* JLI sub-probe for RATOC REX-5586/5587. */ 2099static u_short const * 2100fe_probe_jli_rex (struct fe_softc * sc, u_char const * eeprom) 2101{ 2102 int i; 2103 static u_short const irqmap_rex [4] = { IRQ3, IRQ4, IRQ5, NO_IRQ }; 2104 2105 /* Make sure the EEPROM contains RATOC's config pattern. */ 2106 if (eeprom[1] != eeprom[0]) return NULL; 2107 for (i = 8; i < 32; i++) if (eeprom[i] != 0xFF) return NULL; 2108 2109 /* Get our station address from EEPROM. Note that RATOC 2110 stores it "byte-swapped" in each word. (I don't know why.) 2111 So, we just can't use bcopy().*/ 2112 sc->sc_enaddr[0] = eeprom[3]; 2113 sc->sc_enaddr[1] = eeprom[2]; 2114 sc->sc_enaddr[2] = eeprom[5]; 2115 sc->sc_enaddr[3] = eeprom[4]; 2116 sc->sc_enaddr[4] = eeprom[7]; 2117 sc->sc_enaddr[5] = eeprom[6]; 2118 2119 /* Make sure the EEPROM contains RATOC's station address. */ 2120 if (!valid_Ether_p(sc->sc_enaddr, 0x00C0D0)) return NULL; 2121 2122 /* I don't know any sub-model identification. */ 2123 sc->typestr = "REX-5586/5587"; 2124 2125 /* Returns the IRQ for the RATOC board. */ 2126 return irqmap_rex; 2127} 2128 2129/* JLI sub-probe for Unknown board. */ 2130static u_short const * 2131fe_probe_jli_unk (struct fe_softc * sc, u_char const * eeprom) 2132{ 2133 int i, n, romsize; 2134 static u_short const irqmap [4] = { NO_IRQ, NO_IRQ, NO_IRQ, NO_IRQ }; 2135 2136 /* The generic JLI probe considered this board has an 86965 2137 in JLI mode, but any other board-specific routines could 2138 not find the matching implementation. So, we "guess" the 2139 location by looking for a bit pattern which looks like a 2140 MAC address. */ 2141 2142 /* Determine how large the EEPROM is. */ 2143 for (romsize = JLI_EEPROM_SIZE/2; romsize > 16; romsize >>= 1) { 2144 for (i = 0; i < romsize; i++) { 2145 if (eeprom[i] != eeprom[i+romsize]) break; 2146 } 2147 if (i < romsize) break; 2148 } 2149 romsize <<= 1; 2150 2151 /* Look for a bit pattern which looks like a MAC address. */ 2152 for (n = 2; n <= romsize - ETHER_ADDR_LEN; n += 2) { 2153 if (!valid_Ether_p(eeprom + n, 0x000000)) continue; 2154 } 2155 2156 /* If no reasonable address was found, we can't go further. */ 2157 if (n > romsize - ETHER_ADDR_LEN) return NULL; 2158 2159 /* Extract our (guessed) station address. */ 2160 bcopy(eeprom+n, sc->sc_enaddr, ETHER_ADDR_LEN); 2161 2162 /* We are not sure what type of board it is... */ 2163 sc->typestr = "(unknown JLI)"; 2164 sc->stability |= UNSTABLE_TYPE | UNSTABLE_MAC; 2165 2166 /* Returns the totally unknown IRQ mapping table. */ 2167 return irqmap; 2168} 2169 2170/* 2171 * Probe and initialization for all JLI implementations. 2172 */ 2173 2174static int 2175fe_probe_jli (struct isa_device * dev, struct fe_softc * sc) 2176{ 2177 int i, n; 2178 int irq; 2179 u_char eeprom [JLI_EEPROM_SIZE]; 2180 u_short const * irqmap; 2181 2182 static u_short const baseaddr [8] = 2183 { 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300 }; 2184 static struct fe_simple_probe_struct const probe_table [] = { 2185 { FE_DLCR1, 0x20, 0x00 }, 2186 { FE_DLCR2, 0x50, 0x00 }, 2187 { FE_DLCR4, 0x08, 0x00 }, 2188 { FE_DLCR5, 0x80, 0x00 }, 2189#if 0 2190 { FE_BMPR16, 0x1B, 0x00 }, 2191 { FE_BMPR17, 0x7F, 0x00 }, 2192#endif 2193 { 0 } 2194 }; 2195
|
1019 /*
| 2196 /*
|
1020 * Initialize constants in the per-line structure.
| 2197 * See if the specified address is possible for MB86965A JLI mode.
|
1021 */
| 2198 */
|
| 2199 for (i = 0; i < 8; i++) { 2200 if (baseaddr[i] == sc->iobase) break; 2201 } 2202 if (i == 8) return 0;
|
1022
| 2203
|
1023 /* Get our station address from EEPROM. */ 1024 bcopy( eeprom + FE_ATI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN );
| 2204 /* Fill the softc struct with reasonable default. */ 2205 fe_softc_defaults(sc);
|
1025
| 2206
|
1026#if 1
| |
1027 /*
| 2207 /*
|
1028 * This test doesn't work well for AT1700 look-alike by 1029 * other vendors.
| 2208 * We should test if MB86965A is on the base address now. 2209 * Unfortunately, it is very hard to probe it reliably, since 2210 * we have no way to reset the chip under software control. 2211 * On cold boot, we could check the "signature" bit patterns 2212 * described in the Fujitsu document. On warm boot, however, 2213 * we can predict almost nothing about register values.
|
1030 */
| 2214 */
|
1031 /* Make sure the vendor part is for Allied-Telesis. */ 1032 if ( sc->sc_enaddr[ 0 ] != 0x00 1033 || sc->sc_enaddr[ 1 ] != 0x00 1034 || sc->sc_enaddr[ 2 ] != 0xF4 ) return 0;
| 2215 if (!fe_simple_probe(sc, probe_table)) return 0;
|
1035
| 2216
|
1036#else 1037 /* Make sure we got a valid station address. */ 1038 if ( ( sc->sc_enaddr[ 0 ] & 0x03 ) != 0x00 1039 || ( sc->sc_enaddr[ 0 ] == 0x00 1040 && sc->sc_enaddr[ 1 ] == 0x00 1041 && sc->sc_enaddr[ 2 ] == 0x00 ) ) return 0; 1042#endif
| 2217 /* Check if our I/O address matches config info on 86965. */ 2218 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT; 2219 if (baseaddr[n] != sc->iobase) return 0;
|
1043 1044 /*
| 2220 2221 /*
|
1045 * Program the 86960 as follows: 1046 * SRAM: 32KB, 100ns, byte-wide access. 1047 * Transmission buffer: 4KB x 2. 1048 * System bus interface: 16 bits.
| 2222 * We are now almost sure we have an MB86965 at the given 2223 * address. So, read EEPROM through it. We have to write 2224 * into LSI registers to read from EEPROM. I want to avoid it 2225 * at this stage, but I cannot test the presence of the chip 2226 * any further without reading EEPROM. FIXME.
|
1049 */
| 2227 */
|
1050 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; /* FIXME */ 1051 sc->proto_dlcr5 = 0; 1052 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB 1053 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns; 1054 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC; 1055#if 0 /* XXXX Should we use this? FIXME. */ 1056 sc->proto_bmpr13 = eeprom[ FE_ATI_EEP_MEDIA ]; 1057#else 1058 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO; 1059#endif
| 2228 fe_read_eeprom_jli(sc, eeprom);
|
1060
| 2229
|
1061#if FE_DEBUG >= 3 1062 fe_dump( LOG_INFO, sc, "ATI found" ); 1063#endif
| 2230 /* Make sure that config info in EEPROM and 86965 agree. */ 2231 if (eeprom[FE_EEPROM_CONF] != inb(sc->ioaddr[FE_BMPR19])) { 2232 return 0; 2233 }
|
1064
| 2234
|
1065 /* Setup hooks. This may solves a nasty bug. FIXME. */ 1066 sc->init = fe_init_ati;
| 2235 /* Use 86965 media selection scheme, unless othewise 2236 specified. It is "AUTO always" and "select with BMPR13." 2237 This behaviour covers most of the 86965 based board (as 2238 minimum requirements.) It is backward compatible with 2239 previous versions, also. */ 2240 sc->mbitmap = MB_HA; 2241 sc->defmedia = MB_HA; 2242 sc->msel = fe_msel_965;
|
1067
| 2243
|
1068 /* Initialize 86965. */ 1069 DELAY( 200 ); 1070 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE ); 1071 DELAY( 200 );
| 2244 /* Perform board-specific probe, one by one. Note that the 2245 order of probe is important and should not be changed 2246 arbitrarily. */ 2247 if ((irqmap = fe_probe_jli_ati(sc, eeprom)) == NULL 2248 && (irqmap = fe_probe_jli_rex(sc, eeprom)) == NULL 2249 && (irqmap = fe_probe_jli_icl(sc, eeprom)) == NULL 2250 && (irqmap = fe_probe_jli_unk(sc, eeprom)) == NULL) return 0;
|
1072
| 2251
|
1073 /* Disable all interrupts. */ 1074 outb( sc->ioaddr[ FE_DLCR2 ], 0 ); 1075 outb( sc->ioaddr[ FE_DLCR3 ], 0 );
| 2252 /* Find the IRQ read from EEPROM. */ 2253 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT; 2254 irq = irqmap[n];
|
1076
| 2255
|
1077#if FE_DEBUG >= 3 1078 fe_dump( LOG_INFO, sc, "end of fe_probe_ati()" ); 1079#endif
| 2256 /* Try to determine IRQ setting. */ 2257 if (dev->id_irq == NO_IRQ && irq == NO_IRQ) { 2258 /* The device must be configured with an explicit IRQ. */ 2259 printf("fe%d: IRQ auto-detection does not work\n", 2260 sc->sc_unit); 2261 return 0; 2262 } else if (dev->id_irq == NO_IRQ && irq != NO_IRQ) { 2263 /* Just use the probed IRQ value. */ 2264 dev->id_irq = irq; 2265 } else if (dev->id_irq != NO_IRQ && irq == NO_IRQ) { 2266 /* No problem. Go ahead. */ 2267 } else if (dev->id_irq == irq) { 2268 /* Good. Go ahead. */ 2269 } else { 2270 /* User must be warned in this case. */ 2271 sc->stability |= UNSTABLE_IRQ; 2272 }
|
1080
| 2273
|
| 2274 /* Setup a hook, which resets te 86965 when the driver is being 2275 initialized. This may solve a nasty bug. FIXME. */ 2276 sc->init = fe_init_jli; 2277
|
1081 /*
| 2278 /*
|
1082 * That's all. AT1700 occupies 32 I/O addresses, by the way.
| 2279 * That's all. 86965 JLI occupies 32 I/O addresses, by the way.
|
1083 */ 1084 return 32;
| 2280 */ 2281 return 32;
|
| 2282}
|
1085
| 2283
|
1086 NOTFOUND: 1087 /* 1088 * We have no AT1700 at a given address. 1089 * Restore BMPR16 and BMPR17 if we have destroyed them, 1090 * hoping that the hardware on the address didn't get 1091 * bad side effect. 1092 */ 1093 if ( save16 != 0 | save17 != 0 ) { 1094 outb( sc->ioaddr[ FE_BMPR16 ], save16 ); 1095 outb( sc->ioaddr[ FE_BMPR17 ], save17 );
| 2284/* Probe for TDK LAK-AX031, which is an SSi 78Q8377A based board. */ 2285 2286static int 2287fe_probe_ssi (struct isa_device *dev, struct fe_softc *sc) 2288{ 2289 u_char eeprom [SSI_EEPROM_SIZE]; 2290 2291 static struct fe_simple_probe_struct probe_table [] = { 2292 { FE_DLCR2, 0x08, 0x00 }, 2293 { FE_DLCR4, 0x08, 0x00 }, 2294 { 0 } 2295 }; 2296 2297 /* See if the specified I/O address is possible for 78Q8377A. */ 2298 if ((sc->iobase & ~0x3F0) != 0x000) return 0; 2299 2300 /* Fill the softc struct with default values. */ 2301 fe_softc_defaults(sc); 2302 2303 /* See if the card is on its address. */ 2304 if (!fe_simple_probe(sc, probe_table)) return 0; 2305 2306 /* We now have to read the config EEPROM. We should be very 2307 careful, since doing so destroys a register. (Remember, we 2308 are not yet sure we have a LAK-AX031 board here.) Don't 2309 remember to select BMPRs bofore reading EEPROM, since other 2310 register bank may be selected before the probe() is called. */ 2311 fe_read_eeprom_ssi(sc, eeprom); 2312 2313 /* Make sure the Ethernet (MAC) station address is of TDK's. */ 2314 if (!valid_Ether_p(eeprom+FE_SSI_EEP_ADDR, 0x008098)) return 0; 2315 bcopy(eeprom+FE_SSI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN); 2316 2317 /* This looks like a TDK-AX031 board. It requires an explicit 2318 IRQ setting in config, since we currently don't know how we 2319 can find the IRQ value assigned by ISA PnP manager. */ 2320 if (dev->id_irq == NO_IRQ) { 2321 fe_irq_failure("LAK-AX031", sc->sc_unit, dev->id_irq, NULL); 2322 return 0;
|
1096 }
| 2323 }
|
1097 return ( 0 );
| 2324 2325 /* Fill softc struct accordingly. */ 2326 sc->typestr = "LAK-AX031"; 2327 sc->mbitmap = MB_HT; 2328 sc->defmedia = MB_HT; 2329 2330 /* We have 16 registers. */ 2331 return 16;
|
1098} 1099
| 2332} 2333
|
1100/* ATI specific initialization routine. */ 1101static void 1102fe_init_ati ( struct fe_softc * sc ) 1103{
| |
1104/*
| 2334/*
|
1105 * I've told that the following operation "Resets" the chip. 1106 * Hope this solve a bug which hangs up the driver under 1107 * heavy load... FIXME. 1108 */
| 2335 * Probe and initialization for TDK/LANX LAC-AX012/013 boards. 2336 */ 2337static int 2338fe_probe_lnx (struct isa_device *dev, struct fe_softc *sc) 2339{ 2340 u_char eeprom [LNX_EEPROM_SIZE];
|
1109
| 2341
|
1110 /* Minimal initialization of 86965. */ 1111 DELAY( 200 ); 1112 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE ); 1113 DELAY( 200 );
| 2342 static struct fe_simple_probe_struct probe_table [] = { 2343 { FE_DLCR2, 0x58, 0x00 }, 2344 { FE_DLCR4, 0x08, 0x00 }, 2345 { 0 } 2346 };
|
1114
| 2347
|
1115 /* "Reset" by wrting into an undocument register location. */ 1116 outb( sc->ioaddr[ 0x1F ], 0 );
| 2348 /* See if the specified I/O address is possible for TDK/LANX boards. */ 2349 /* 300, 320, 340, and 360 are allowed. */ 2350 if ((sc->iobase & ~0x060) != 0x300) return 0;
|
1117
| 2351
|
1118 /* How long do we have to wait after the reset? FIXME. */ 1119 DELAY( 300 );
| 2352 /* Fill the softc struct with default values. */ 2353 fe_softc_defaults(sc); 2354 2355 /* See if the card is on its address. */ 2356 if (!fe_simple_probe(sc, probe_table)) return 0; 2357 2358 /* We now have to read the config EEPROM. We should be very 2359 careful, since doing so destroys a register. (Remember, we 2360 are not yet sure we have a LAC-AX012/AX013 board here.) */ 2361 fe_read_eeprom_lnx(sc, eeprom); 2362 2363 /* Make sure the Ethernet (MAC) station address is of TDK/LANX's. */ 2364 if (!valid_Ether_p(eeprom, 0x008098)) return 0; 2365 bcopy(eeprom, sc->sc_enaddr, ETHER_ADDR_LEN); 2366 2367 /* This looks like a TDK/LANX board. It requires an 2368 explicit IRQ setting in config. Make sure we have one, 2369 determining an appropriate value for the IRQ control 2370 register. */ 2371 switch (dev->id_irq) { 2372 case IRQ3: sc->priv_info = 0x40 | LNX_CLK_LO | LNX_SDA_HI; break; 2373 case IRQ4: sc->priv_info = 0x20 | LNX_CLK_LO | LNX_SDA_HI; break; 2374 case IRQ5: sc->priv_info = 0x10 | LNX_CLK_LO | LNX_SDA_HI; break; 2375 case IRQ9: sc->priv_info = 0x80 | LNX_CLK_LO | LNX_SDA_HI; break; 2376 default: 2377 fe_irq_failure("LAC-AX012/AX013", 2378 sc->sc_unit, dev->id_irq, "3/4/5/9"); 2379 return 0; 2380 } 2381 2382 /* Fill softc struct accordingly. */ 2383 sc->typestr = "LAC-AX012/AX013"; 2384 sc->init = fe_init_lnx; 2385 2386 /* We have 32 registers. */ 2387 return 32;
|
1120} 1121 1122/* 1123 * Probe and initialization for Gateway Communications' old cards. 1124 */ 1125static int
| 2388} 2389 2390/* 2391 * Probe and initialization for Gateway Communications' old cards. 2392 */ 2393static int
|
1126fe_probe_gwy ( DEVICE * dev, struct fe_softc * sc )
| 2394fe_probe_gwy ( struct isa_device * dev, struct fe_softc * sc )
|
1127{
| 2395{
|
1128 int i; 1129
| |
1130 static struct fe_simple_probe_struct probe_table [] = {
| 2396 static struct fe_simple_probe_struct probe_table [] = {
|
1131 { FE_DLCR2, 0x70, 0x00 },
| 2397 /* { FE_DLCR2, 0x70, 0x00 }, */ 2398 { FE_DLCR2, 0x58, 0x00 },
|
1132 { FE_DLCR4, 0x08, 0x00 },
| 2399 { FE_DLCR4, 0x08, 0x00 },
|
1133 { FE_DLCR7, 0xC0, 0x00 }, 1134 /* 1135 * Test *vendor* part of the address for Gateway. 1136 * This test is essential to identify Gateway's cards. 1137 * We shuld define some symbolic names for the 1138 * following offsets. FIXME. 1139 */ 1140 { 0x18, 0xFF, 0x00 }, 1141 { 0x19, 0xFF, 0x00 }, 1142 { 0x1A, 0xFF, 0x61 },
| |
1143 { 0 } 1144 }; 1145
| 2400 { 0 } 2401 }; 2402
|
1146 /* 1147 * We need explicit IRQ and supported address. 1148 * I'm not sure which address and IRQ is possible for Gateway 1149 * Ethernet family. The following accepts everything. FIXME. 1150 */ 1151 if ( dev->id_irq == NO_IRQ || ( sc->iobase & ~0x3E0 ) != 0 ) { 1152 return ( 0 );
| 2403 /* See if the specified I/O address is possible for Gateway boards. */ 2404 if ((sc->iobase & ~0x1E0) != 0x200) return 0; 2405 2406 /* Setup an I/O address mapping table and some others. */ 2407 fe_softc_defaults(sc); 2408 2409 /* See if the card is on its address. */ 2410 if ( !fe_simple_probe( sc, probe_table ) ) return 0; 2411 2412 /* Get our station address from EEPROM. */ 2413 inblk( sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN ); 2414 2415 /* Make sure it is Gateway Communication's. */ 2416 if (!valid_Ether_p(sc->sc_enaddr, 0x000061)) return 0; 2417 2418 /* Gateway's board requires an explicit IRQ to work, since it 2419 is not possible to probe the setting of jumpers. */ 2420 if (dev->id_irq == NO_IRQ) { 2421 fe_irq_failure("Gateway Ethernet", sc->sc_unit, NO_IRQ, NULL); 2422 return 0;
|
1153 } 1154
| 2423 } 2424
|
1155#if FE_DEBUG >= 3 1156 fe_dump( LOG_INFO, sc, "top of probe" );
| 2425 /* Fill softc struct accordingly. */ 2426 sc->typestr = "Gateway Ethernet (Fujitsu chipset)"; 2427 2428 /* That's all. The card occupies 32 I/O addresses, as always. */ 2429 return 32; 2430} 2431 2432/* Probe and initialization for Ungermann-Bass Network 2433 K.K. "Access/PC" boards. */ 2434static int 2435fe_probe_ubn (struct isa_device * dev, struct fe_softc * sc) 2436{ 2437#if 0 2438 u_char sum;
|
1157#endif
| 2439#endif
|
| 2440 static struct fe_simple_probe_struct const probe_table [] = { 2441 { FE_DLCR2, 0x58, 0x00 }, 2442 { FE_DLCR4, 0x08, 0x00 }, 2443 { 0 } 2444 };
|
1158
| 2445
|
1159 /* Setup an I/O address mapping table. */ 1160 for ( i = 0; i < MAXREGISTERS; i++ ) { 1161 sc->ioaddr[ i ] = sc->iobase + i; 1162 }
| 2446 /* See if the specified I/O address is possible for AccessPC/ISA. */ 2447 if ((sc->iobase & ~0x0E0) != 0x300) return 0;
|
1163
| 2448
|
1164 /* See if the card is on its address. */ 1165 if ( !fe_simple_probe( sc, probe_table ) ) {
| 2449 /* Setup an I/O address mapping table and some others. */ 2450 fe_softc_defaults(sc); 2451 2452 /* Simple probe. */ 2453 if (!fe_simple_probe(sc, probe_table)) return 0; 2454 2455 /* Get our station address form ID ROM and make sure it is UBN's. */ 2456 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN); 2457 if (!valid_Ether_p(sc->sc_enaddr, 0x00DD01)) return 0; 2458#if 0 2459 /* Calculate checksum. */ 2460 sum = inb(sc->ioaddr[0x1e]); 2461 for (i = 0; i < ETHER_ADDR_LEN; i++) { 2462 sum ^= sc->sc_enaddr[i]; 2463 } 2464 if (sum != 0) return 0; 2465#endif 2466 /* This looks like an AccessPC/ISA board. It requires an 2467 explicit IRQ setting in config. Make sure we have one, 2468 determining an appropriate value for the IRQ control 2469 register. */ 2470 switch (dev->id_irq) { 2471 case IRQ3: sc->priv_info = 0x02; break; 2472 case IRQ4: sc->priv_info = 0x04; break; 2473 case IRQ5: sc->priv_info = 0x08; break; 2474 case IRQ10: sc->priv_info = 0x10; break; 2475 default: 2476 fe_irq_failure("Access/PC", 2477 sc->sc_unit, dev->id_irq, "3/4/5/10");
|
1166 return 0; 1167 } 1168
| 2478 return 0; 2479 } 2480
|
1169 /* Determine the card type. */ 1170 sc->typestr = "Gateway Ethernet w/ Fujitsu chipset";
| 2481 /* Fill softc struct accordingly. */ 2482 sc->typestr = "Access/PC"; 2483 sc->init = fe_init_ubn;
|
1171
| 2484
|
1172 /* Get our station address from EEPROM. */ 1173 inblk( sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN );
| 2485 /* We have 32 registers. */ 2486 return 32; 2487} 2488#endif /* PC98 */
|
1174
| 2489
|
1175 /* 1176 * Program the 86960 as follows: 1177 * SRAM: 16KB, 100ns, byte-wide access. 1178 * Transmission buffer: 2KB x 2. 1179 * System bus interface: 16 bits. 1180 * Make sure to clear out ID bits in DLCR7 1181 * (They actually are Encoder/Decoder control in NICE.) 1182 */ 1183 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; 1184 sc->proto_dlcr5 = 0; 1185 sc->proto_dlcr6 = FE_D6_BUFSIZ_16KB | FE_D6_TXBSIZ_2x2KB 1186 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns; 1187 sc->proto_dlcr7 = FE_D7_BYTSWP_LH; 1188 sc->proto_bmpr13 = 0;
| 2490#if NCARD > 0 2491/* 2492 * Probe and initialization for Fujitsu MBH10302 PCMCIA Ethernet interface. 2493 * Note that this is for 10302 only; MBH10304 is handled by fe_probe_tdk(). 2494 */
|
1189
| 2495
|
| 2496static void 2497fe_init_mbh ( struct fe_softc * sc ) 2498{
|
1190 /* Minimal initialization of 86960. */ 1191 DELAY( 200 ); 1192 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE ); 1193 DELAY( 200 ); 1194 1195 /* Disable all interrupts. */ 1196 outb( sc->ioaddr[ FE_DLCR2 ], 0 ); 1197 outb( sc->ioaddr[ FE_DLCR3 ], 0 ); 1198
| 2499 /* Minimal initialization of 86960. */ 2500 DELAY( 200 ); 2501 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE ); 2502 DELAY( 200 ); 2503 2504 /* Disable all interrupts. */ 2505 outb( sc->ioaddr[ FE_DLCR2 ], 0 ); 2506 outb( sc->ioaddr[ FE_DLCR3 ], 0 ); 2507
|
1199 /* That's all. The card occupies 32 I/O addresses, as always. */ 1200 return 32;
| 2508 /* Enable master interrupt flag. */ 2509 outb( sc->ioaddr[ FE_MBH0 ], FE_MBH0_MAGIC | FE_MBH0_INTR_ENABLE );
|
1201} 1202
| 2510} 2511
|
1203#if NCARD > 0 1204/* 1205 * Probe and initialization for Fujitsu MBH10302 PCMCIA Ethernet interface. 1206 * Note that this is for 10302 only; MBH10304 is handled by fe_probe_tdk(). 1207 */
| |
1208static int
| 2512static int
|
1209fe_probe_mbh ( DEVICE * dev, struct fe_softc * sc )
| 2513fe_probe_mbh ( struct isa_device * dev, struct fe_softc * sc )
|
1210{
| 2514{
|
1211 int i; 1212
| |
1213 static struct fe_simple_probe_struct probe_table [] = {
| 2515 static struct fe_simple_probe_struct probe_table [] = {
|
1214 { FE_DLCR0, 0x09, 0x00 }, 1215 { FE_DLCR2, 0x79, 0x00 },
| 2516 { FE_DLCR2, 0x58, 0x00 },
|
1216 { FE_DLCR4, 0x08, 0x00 }, 1217 { FE_DLCR6, 0xFF, 0xB6 },
| 2517 { FE_DLCR4, 0x08, 0x00 }, 2518 { FE_DLCR6, 0xFF, 0xB6 },
|
1218 /* 1219 * The following location has the first byte of the card's 1220 * Ethernet (MAC) address. 1221 * We can always verify the *first* 2 bits (in Ethernet 1222 * bit order) are "global" and "unicast" for any vendors'. 1223 */ 1224 { FE_MBH10, 0x03, 0x00 }, 1225 1226 /* Just a gap? Seems reliable, anyway. */ 1227 { 0x12, 0xFF, 0x00 }, 1228 { 0x13, 0xFF, 0x00 }, 1229 { 0x14, 0xFF, 0x00 }, 1230 { 0x15, 0xFF, 0x00 }, 1231 { 0x16, 0xFF, 0x00 }, 1232 { 0x17, 0xFF, 0x00 }, 1233#if 0 1234 { 0x18, 0xFF, 0xFF }, 1235 { 0x19, 0xFF, 0xFF }, 1236#endif 1237
| |
1238 { 0 } 1239 }; 1240
| 2519 { 0 } 2520 }; 2521
|
1241 /* 1242 * We need explicit IRQ and supported address. 1243 */ 1244 if ( dev->id_irq == NO_IRQ || ( sc->iobase & ~0x3E0 ) != 0 ) { 1245 return ( 0 ); 1246 } 1247 1248#if FE_DEBUG >= 3 1249 fe_dump( LOG_INFO, sc, "top of probe" );
| 2522#ifdef DIAGNOSTIC 2523 /* We need an explicit IRQ. */ 2524 if (dev->id_irq == NO_IRQ) return 0;
|
1250#endif 1251
| 2525#endif 2526
|
1252 /* Setup an I/O address mapping table. */ 1253 for ( i = 0; i < MAXREGISTERS; i++ ) { 1254 sc->ioaddr[ i ] = sc->iobase + i;
| 2527 /* Ethernet MAC address should *NOT* have been given by pccardd, 2528 if this is a true MBH10302; i.e., Ethernet address must be 2529 "all-zero" upon entry. */ 2530 if (sc->sc_enaddr[0] || sc->sc_enaddr[1] || sc->sc_enaddr[2] || 2531 sc->sc_enaddr[3] || sc->sc_enaddr[4] || sc->sc_enaddr[5]) { 2532 return 0;
|
1255 } 1256
| 2533 } 2534
|
| 2535 /* Fill the softc struct with default values. */ 2536 fe_softc_defaults(sc); 2537
|
1257 /* 1258 * See if MBH10302 is on its address. 1259 * I'm not sure the following probe code works. FIXME. 1260 */ 1261 if ( !fe_simple_probe( sc, probe_table ) ) return 0; 1262
| 2538 /* 2539 * See if MBH10302 is on its address. 2540 * I'm not sure the following probe code works. FIXME. 2541 */ 2542 if ( !fe_simple_probe( sc, probe_table ) ) return 0; 2543
|
1263 /* Determine the card type. */ 1264 sc->typestr = "MBH10302 (PCMCIA)"; 1265 1266 /* 1267 * Initialize constants in the per-line structure. 1268 */ 1269
| |
1270 /* Get our station address from EEPROM. */ 1271 inblk( sc, FE_MBH10, sc->sc_enaddr, ETHER_ADDR_LEN ); 1272 1273 /* Make sure we got a valid station address. */
| 2544 /* Get our station address from EEPROM. */ 2545 inblk( sc, FE_MBH10, sc->sc_enaddr, ETHER_ADDR_LEN ); 2546 2547 /* Make sure we got a valid station address. */
|
1274 if ( sc->sc_enaddr[ 0 ] == 0x00 1275 && sc->sc_enaddr[ 1 ] == 0x00 1276 && sc->sc_enaddr[ 2 ] == 0x00 ) return 0;
| 2548 if (!valid_Ether_p(sc->sc_enaddr, 0)) return 0;
|
1277
| 2549
|
1278 /* 1279 * Program the 86960 as follows: 1280 * SRAM: 32KB, 100ns, byte-wide access. 1281 * Transmission buffer: 4KB x 2. 1282 * System bus interface: 16 bits. 1283 */ 1284 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; 1285 sc->proto_dlcr5 = 0; 1286 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB 1287 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
| 2550 /* Determine the card type. */ 2551 sc->typestr = "MBH10302 (PCMCIA)"; 2552 2553 /* We seems to need our own IDENT bits... FIXME. */
|
1288 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE;
| 2554 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE;
|
1289 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
| |
1290 1291 /* Setup hooks. We need a special initialization procedure. */ 1292 sc->init = fe_init_mbh; 1293 1294 /*
| 2555 2556 /* Setup hooks. We need a special initialization procedure. */ 2557 sc->init = fe_init_mbh; 2558 2559 /*
|
1295 * Minimum initialization. 1296 */ 1297 1298 /* Minimal initialization of 86960. */ 1299 DELAY( 200 ); 1300 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE ); 1301 DELAY( 200 ); 1302 1303 /* Disable all interrupts. */ 1304 outb( sc->ioaddr[ FE_DLCR2 ], 0 ); 1305 outb( sc->ioaddr[ FE_DLCR3 ], 0 ); 1306 1307#if 1 /* FIXME. */ 1308 /* Initialize system bus interface and encoder/decoder operation. */ 1309 outb( sc->ioaddr[ FE_MBH0 ], FE_MBH0_MAGIC | FE_MBH0_INTR_DISABLE ); 1310#endif 1311 1312 /*
| |
1313 * That's all. MBH10302 occupies 32 I/O addresses, by the way. 1314 */ 1315 return 32; 1316} 1317
| 2560 * That's all. MBH10302 occupies 32 I/O addresses, by the way. 2561 */ 2562 return 32; 2563} 2564
|
1318/* MBH specific initialization routine. */ 1319static void 1320fe_init_mbh ( struct fe_softc * sc ) 1321{ 1322 /* Minimal initialization of 86960. */ 1323 DELAY( 200 ); 1324 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE ); 1325 DELAY( 200 ); 1326 1327 /* Disable all interrupts. */ 1328 outb( sc->ioaddr[ FE_DLCR2 ], 0 ); 1329 outb( sc->ioaddr[ FE_DLCR3 ], 0 ); 1330 1331 /* Enable master interrupt flag. */ 1332 outb( sc->ioaddr[ FE_MBH0 ], FE_MBH0_MAGIC | FE_MBH0_INTR_ENABLE ); 1333} 1334
| |
1335/* 1336 * Probe and initialization for TDK/CONTEC PCMCIA Ethernet interface. 1337 * by MASUI Kenji <masui@cs.titech.ac.jp> 1338 * 1339 * (Contec uses TDK Ethenet chip -- hosokawa) 1340 * 1341 * This version of fe_probe_tdk has been rewrote to handle
| 2565/* 2566 * Probe and initialization for TDK/CONTEC PCMCIA Ethernet interface. 2567 * by MASUI Kenji <masui@cs.titech.ac.jp> 2568 * 2569 * (Contec uses TDK Ethenet chip -- hosokawa) 2570 * 2571 * This version of fe_probe_tdk has been rewrote to handle
|
1342 * *generic* PC card implementation of Fujitsu MB8696x and compatibles. 1343 * The name _tdk is just for a historical reason. <seki> :-)
| 2572 * *generic* PC card implementation of Fujitsu MB8696x family. The 2573 * name _tdk is just for a historical reason. :-)
|
1344 */ 1345static int
| 2574 */ 2575static int
|
1346fe_probe_tdk ( DEVICE * dev, struct fe_softc * sc )
| 2576fe_probe_tdk ( struct isa_device * dev, struct fe_softc * sc )
|
1347{
| 2577{
|
1348 int i; 1349
| |
1350 static struct fe_simple_probe_struct probe_table [] = {
| 2578 static struct fe_simple_probe_struct probe_table [] = {
|
1351 { FE_DLCR2, 0x70, 0x00 },
| 2579 { FE_DLCR2, 0x50, 0x00 },
|
1352 { FE_DLCR4, 0x08, 0x00 }, 1353 /* { FE_DLCR5, 0x80, 0x00 }, Does not work well. */ 1354 { 0 } 1355 }; 1356
| 2580 { FE_DLCR4, 0x08, 0x00 }, 2581 /* { FE_DLCR5, 0x80, 0x00 }, Does not work well. */ 2582 { 0 } 2583 }; 2584
|
1357 /* We need an IRQ. */
| |
1358 if ( dev->id_irq == NO_IRQ ) { 1359 return ( 0 ); 1360 } 1361
| 2585 if ( dev->id_irq == NO_IRQ ) { 2586 return ( 0 ); 2587 } 2588
|
1362 /* Generic driver needs Ethernet address taken from CIS. */ 1363 if (sc->arpcom.ac_enaddr[0] == 0 1364 && sc->arpcom.ac_enaddr[1] == 0 1365 && sc->arpcom.ac_enaddr[2] == 0) { 1366 return 0; 1367 }
| 2589 fe_softc_defaults(sc);
|
1368
| 2590
|
1369 /* Setup an I/O address mapping table; we need only 16 ports. */ 1370 for (i = 0; i < 16; i++) { 1371 sc->ioaddr[i] = sc->iobase + i; 1372 } 1373 /* Fill unused slots with a safe address. */ 1374 for (i = 16; i < MAXREGISTERS; i++) { 1375 sc->ioaddr[i] = sc->iobase; 1376 } 1377
| |
1378 /* 1379 * See if C-NET(PC)C is on its address. 1380 */ 1381 1382 if ( !fe_simple_probe( sc, probe_table ) ) return 0; 1383 1384 /* Determine the card type. */
| 2591 /* 2592 * See if C-NET(PC)C is on its address. 2593 */ 2594 2595 if ( !fe_simple_probe( sc, probe_table ) ) return 0; 2596 2597 /* Determine the card type. */
|
1385 sc->typestr = "Generic MB8696x Ethernet (PCMCIA)";
| 2598 sc->typestr = "Generic MB8696x/78Q837x Ethernet (PCMCIA)";
|
1386 1387 /* 1388 * Initialize constants in the per-line structure. 1389 */ 1390
| 2599 2600 /* 2601 * Initialize constants in the per-line structure. 2602 */ 2603
|
1391 /* The station address *must*be* already in sc_enaddr; 1392 Make sure we got a valid station address. */ 1393 if ( ( sc->sc_enaddr[ 0 ] & 0x03 ) != 0x00 1394 || ( sc->sc_enaddr[ 0 ] == 0x00 1395 && sc->sc_enaddr[ 1 ] == 0x00 1396 && sc->sc_enaddr[ 2 ] == 0x00 ) ) return 0;
| 2604 /* Make sure we got a valid station address. */ 2605 if (!valid_Ether_p(sc->sc_enaddr, 0)) return 0;
|
1397 1398 /*
| 2606 2607 /*
|
1399 * Program the 86965 as follows: 1400 * SRAM: 32KB, 100ns, byte-wide access. 1401 * Transmission buffer: 4KB x 2. 1402 * System bus interface: 16 bits. 1403 * XXX: Should we remove IDENT_NICE from DLCR7? Or, 1404 * even add IDENT_EC instead? FIXME. 1405 */ 1406 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; 1407 sc->proto_dlcr5 = 0; 1408 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB 1409 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns; 1410 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE; 1411 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO; 1412 1413 /* Minimul initialization of 86960. */ 1414 DELAY( 200 ); 1415 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE ); 1416 DELAY( 200 ); 1417 1418 /* Disable all interrupts. */ 1419 outb( sc->ioaddr[ FE_DLCR2 ], 0 ); 1420 outb( sc->ioaddr[ FE_DLCR3 ], 0 ); 1421 1422 /*
| |
1423 * That's all. C-NET(PC)C occupies 16 I/O addresses.
| 2608 * That's all. C-NET(PC)C occupies 16 I/O addresses.
|
1424 * 1425 * Some PC cards (e.g., TDK and Contec) have 16 I/O addresses, 1426 * while some others (e.g., Fujitsu) have 32. Fortunately, 1427 * this generic driver never accesses latter 16 ports in 32 1428 * ports cards. So, we can assume the *generic* PC cards 1429 * always have 16 ports. 1430 * 1431 * Moreover, PC card probe is isolated from ISA probe, and PC 1432 * card probe routine doesn't use "# of ports" returned by this 1433 * function. 16 v.s. 32 is not important now. 1434 */
| 2609 * XXX: Are there any card with 32 I/O addresses? FIXME. 2610 */
|
1435 return 16; 1436} 1437#endif /* NCARD > 0 */ 1438 1439/* 1440 * Install interface into kernel networking data structures 1441 */ 1442static int
| 2611 return 16; 2612} 2613#endif /* NCARD > 0 */ 2614 2615/* 2616 * Install interface into kernel networking data structures 2617 */ 2618static int
|
1443fe_attach ( DEVICE * dev )
| 2619fe_attach ( struct isa_device * dev )
|
1444{ 1445#if NCARD > 0 1446 static int already_ifattach[NFE]; 1447#endif 1448 struct fe_softc *sc = &fe_softc[dev->id_unit];
| 2620{ 2621#if NCARD > 0 2622 static int already_ifattach[NFE]; 2623#endif 2624 struct fe_softc *sc = &fe_softc[dev->id_unit];
|
| 2625 int b;
|
1449 1450 dev->id_ointr = feintr; 1451 1452 /* 1453 * Initialize ifnet structure 1454 */ 1455 sc->sc_if.if_softc = sc; 1456 sc->sc_if.if_unit = sc->sc_unit; 1457 sc->sc_if.if_name = "fe"; 1458 sc->sc_if.if_output = ether_output; 1459 sc->sc_if.if_start = fe_start; 1460 sc->sc_if.if_ioctl = fe_ioctl; 1461 sc->sc_if.if_watchdog = fe_watchdog;
| 2626 2627 dev->id_ointr = feintr; 2628 2629 /* 2630 * Initialize ifnet structure 2631 */ 2632 sc->sc_if.if_softc = sc; 2633 sc->sc_if.if_unit = sc->sc_unit; 2634 sc->sc_if.if_name = "fe"; 2635 sc->sc_if.if_output = ether_output; 2636 sc->sc_if.if_start = fe_start; 2637 sc->sc_if.if_ioctl = fe_ioctl; 2638 sc->sc_if.if_watchdog = fe_watchdog;
|
| 2639 sc->sc_if.if_init = fe_init; 2640 sc->sc_if.if_linkmib = &sc->mibdata; 2641 sc->sc_if.if_linkmiblen = sizeof (sc->mibdata);
|
1462
| 2642
|
| 2643#if 0 /* I'm not sure... */ 2644 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS; 2645#endif 2646
|
1463 /*
| 2647 /*
|
1464 * Set default interface flags.
| 2648 * Set fixed interface flags.
|
1465 */ 1466 sc->sc_if.if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1467
| 2649 */ 2650 sc->sc_if.if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 2651
|
| 2652#if 1
|
1468 /* 1469 * Set maximum size of output queue, if it has not been set. 1470 * It is done here as this driver may be started after the 1471 * system initialization (i.e., the interface is PCMCIA.) 1472 * 1473 * I'm not sure this is really necessary, but, even if it is, 1474 * it should be done somewhere else, e.g., in if_attach(), 1475 * since it must be a common workaround for all network drivers. 1476 * FIXME. 1477 */ 1478 if ( sc->sc_if.if_snd.ifq_maxlen == 0 ) { 1479 sc->sc_if.if_snd.ifq_maxlen = ifqmaxlen; 1480 }
| 2653 /* 2654 * Set maximum size of output queue, if it has not been set. 2655 * It is done here as this driver may be started after the 2656 * system initialization (i.e., the interface is PCMCIA.) 2657 * 2658 * I'm not sure this is really necessary, but, even if it is, 2659 * it should be done somewhere else, e.g., in if_attach(), 2660 * since it must be a common workaround for all network drivers. 2661 * FIXME. 2662 */ 2663 if ( sc->sc_if.if_snd.ifq_maxlen == 0 ) { 2664 sc->sc_if.if_snd.ifq_maxlen = ifqmaxlen; 2665 }
|
1481 1482#if FE_DEBUG >= 3 1483 fe_dump( LOG_INFO, sc, "attach()" );
| |
1484#endif 1485 1486#if FE_SINGLE_TRANSMISSION 1487 /* Override txb config to allocate minimum. */ 1488 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ 1489 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 1490#endif 1491 1492 /* Modify hardware config if it is requested. */ 1493 if ( dev->id_flags & FE_FLAGS_OVERRIDE_DLCR6 ) { 1494 sc->proto_dlcr6 = dev->id_flags & FE_FLAGS_DLCR6_VALUE; 1495 } 1496 1497 /* Find TX buffer size, based on the hardware dependent proto. */ 1498 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) { 1499 case FE_D6_TXBSIZ_2x2KB: sc->txb_size = 2048; break; 1500 case FE_D6_TXBSIZ_2x4KB: sc->txb_size = 4096; break; 1501 case FE_D6_TXBSIZ_2x8KB: sc->txb_size = 8192; break; 1502 default: 1503 /* Oops, we can't work with single buffer configuration. */
| 2666#endif 2667 2668#if FE_SINGLE_TRANSMISSION 2669 /* Override txb config to allocate minimum. */ 2670 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ 2671 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 2672#endif 2673 2674 /* Modify hardware config if it is requested. */ 2675 if ( dev->id_flags & FE_FLAGS_OVERRIDE_DLCR6 ) { 2676 sc->proto_dlcr6 = dev->id_flags & FE_FLAGS_DLCR6_VALUE; 2677 } 2678 2679 /* Find TX buffer size, based on the hardware dependent proto. */ 2680 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) { 2681 case FE_D6_TXBSIZ_2x2KB: sc->txb_size = 2048; break; 2682 case FE_D6_TXBSIZ_2x4KB: sc->txb_size = 4096; break; 2683 case FE_D6_TXBSIZ_2x8KB: sc->txb_size = 8192; break; 2684 default: 2685 /* Oops, we can't work with single buffer configuration. */
|
1504#if FE_DEBUG >= 2 1505 log( LOG_WARNING, "fe%d: strange TXBSIZ config; fixing\n", 1506 sc->sc_unit ); 1507#endif
| 2686 if (bootverbose) { 2687 printf("fe%d: strange TXBSIZ config; fixing\n", 2688 sc->sc_unit); 2689 }
|
1508 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ; 1509 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 1510 sc->txb_size = 2048; 1511 break; 1512 } 1513
| 2690 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ; 2691 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 2692 sc->txb_size = 2048; 2693 break; 2694 } 2695
|
| 2696 /* Initialize the if_media interface. */ 2697 ifmedia_init(&sc->media, 0, fe_medchange, fe_medstat ); 2698 for (b = 0; bit2media[b] != 0; b++) { 2699 if (sc->mbitmap & (1 << b)) { 2700 ifmedia_add(&sc->media, bit2media[b], 0, NULL); 2701 } 2702 } 2703 for (b = 0; bit2media[b] != 0; b++) { 2704 if (sc->defmedia & (1 << b)) { 2705 ifmedia_set(&sc->media, bit2media[b]); 2706 break; 2707 } 2708 } 2709#if 0 /* Turned off; this is called later, when the interface UPs. */ 2710 fe_medchange(sc); 2711#endif 2712
|
1514 /* Attach and stop the interface. */ 1515#if NCARD > 0 1516 if (already_ifattach[dev->id_unit] != 1) { 1517 if_attach(&sc->sc_if); 1518 already_ifattach[dev->id_unit] = 1; 1519 } 1520#else 1521 if_attach(&sc->sc_if); 1522#endif
| 2713 /* Attach and stop the interface. */ 2714#if NCARD > 0 2715 if (already_ifattach[dev->id_unit] != 1) { 2716 if_attach(&sc->sc_if); 2717 already_ifattach[dev->id_unit] = 1; 2718 } 2719#else 2720 if_attach(&sc->sc_if); 2721#endif
|
1523 fe_stop(sc->sc_unit); /* This changes the state to IDLE. */
| 2722 fe_stop(sc);
|
1524 ether_ifattach(&sc->sc_if); 1525 1526 /* Print additional info when attached. */
| 2723 ether_ifattach(&sc->sc_if); 2724 2725 /* Print additional info when attached. */
|
1527 printf( "fe%d: address %6D, type %s\n", sc->sc_unit, 1528 sc->sc_enaddr, ":" , sc->typestr ); 1529#if FE_DEBUG >= 3 1530 {
| 2726 printf("fe%d: address %6D, type %s%s\n", sc->sc_unit, 2727 sc->sc_enaddr, ":" , sc->typestr, 2728 (sc->proto_dlcr4 & FE_D4_DSC) ? ", full duplex" : ""); 2729 if (bootverbose) {
|
1531 int buf, txb, bbw, sbw, ram; 1532 1533 buf = txb = bbw = sbw = ram = -1; 1534 switch ( sc->proto_dlcr6 & FE_D6_BUFSIZ ) { 1535 case FE_D6_BUFSIZ_8KB: buf = 8; break; 1536 case FE_D6_BUFSIZ_16KB: buf = 16; break; 1537 case FE_D6_BUFSIZ_32KB: buf = 32; break; 1538 case FE_D6_BUFSIZ_64KB: buf = 64; break; 1539 } 1540 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) { 1541 case FE_D6_TXBSIZ_2x2KB: txb = 2; break; 1542 case FE_D6_TXBSIZ_2x4KB: txb = 4; break; 1543 case FE_D6_TXBSIZ_2x8KB: txb = 8; break; 1544 } 1545 switch ( sc->proto_dlcr6 & FE_D6_BBW ) { 1546 case FE_D6_BBW_BYTE: bbw = 8; break; 1547 case FE_D6_BBW_WORD: bbw = 16; break; 1548 } 1549 switch ( sc->proto_dlcr6 & FE_D6_SBW ) { 1550 case FE_D6_SBW_BYTE: sbw = 8; break; 1551 case FE_D6_SBW_WORD: sbw = 16; break; 1552 } 1553 switch ( sc->proto_dlcr6 & FE_D6_SRAM ) { 1554 case FE_D6_SRAM_100ns: ram = 100; break; 1555 case FE_D6_SRAM_150ns: ram = 150; break; 1556 }
| 2730 int buf, txb, bbw, sbw, ram; 2731 2732 buf = txb = bbw = sbw = ram = -1; 2733 switch ( sc->proto_dlcr6 & FE_D6_BUFSIZ ) { 2734 case FE_D6_BUFSIZ_8KB: buf = 8; break; 2735 case FE_D6_BUFSIZ_16KB: buf = 16; break; 2736 case FE_D6_BUFSIZ_32KB: buf = 32; break; 2737 case FE_D6_BUFSIZ_64KB: buf = 64; break; 2738 } 2739 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) { 2740 case FE_D6_TXBSIZ_2x2KB: txb = 2; break; 2741 case FE_D6_TXBSIZ_2x4KB: txb = 4; break; 2742 case FE_D6_TXBSIZ_2x8KB: txb = 8; break; 2743 } 2744 switch ( sc->proto_dlcr6 & FE_D6_BBW ) { 2745 case FE_D6_BBW_BYTE: bbw = 8; break; 2746 case FE_D6_BBW_WORD: bbw = 16; break; 2747 } 2748 switch ( sc->proto_dlcr6 & FE_D6_SBW ) { 2749 case FE_D6_SBW_BYTE: sbw = 8; break; 2750 case FE_D6_SBW_WORD: sbw = 16; break; 2751 } 2752 switch ( sc->proto_dlcr6 & FE_D6_SRAM ) { 2753 case FE_D6_SRAM_100ns: ram = 100; break; 2754 case FE_D6_SRAM_150ns: ram = 150; break; 2755 }
|
1557 printf( "fe%d: SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n", 1558 sc->sc_unit, buf, bbw, ram, txb, sbw );
| 2756 printf("fe%d: SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n", 2757 sc->sc_unit, buf, bbw, ram, txb, sbw);
|
1559 }
| 2758 }
|
1560#endif
| 2759 if (sc->stability & UNSTABLE_IRQ) { 2760 printf("fe%d: warning: IRQ number may be incorrect\n", 2761 sc->sc_unit); 2762 } 2763 if (sc->stability & UNSTABLE_MAC) { 2764 printf("fe%d: warning: above MAC address may be incorrect\n", 2765 sc->sc_unit); 2766 } 2767 if (sc->stability & UNSTABLE_TYPE) { 2768 printf("fe%d: warning: hardware type was not validated\n", 2769 sc->sc_unit); 2770 }
|
1561 1562#if NBPFILTER > 0 1563 /* If BPF is in the kernel, call the attach for it. */
| 2771 2772#if NBPFILTER > 0 2773 /* If BPF is in the kernel, call the attach for it. */
|
1564 bpfattach( &sc->sc_if, DLT_EN10MB, sizeof(struct ether_header));
| 2774 bpfattach(&sc->sc_if, DLT_EN10MB, sizeof(struct ether_header));
|
1565#endif 1566 return 1; 1567} 1568 1569/*
| 2775#endif 2776 return 1; 2777} 2778 2779/*
|
1570 * Reset interface.
| 2780 * Reset interface, after some (hardware) trouble is deteced.
|
1571 */ 1572static void
| 2781 */ 2782static void
|
1573fe_reset ( int unit )
| 2783fe_reset (struct fe_softc *sc)
|
1574{
| 2784{
|
1575 /* 1576 * Stop interface and re-initialize. 1577 */ 1578 fe_stop(unit); 1579 fe_init(unit);
| 2785 /* Record how many packets are lost by this accident. */ 2786 sc->sc_if.if_oerrors += sc->txb_sched + sc->txb_count; 2787 sc->mibdata.dot3StatsInternalMacTransmitErrors++; 2788 2789 /* Put the interface into known initial state. */ 2790 fe_stop(sc); 2791 if (sc->sc_if.if_flags & IFF_UP) fe_init(sc);
|
1580} 1581 1582/* 1583 * Stop everything on the interface. 1584 * 1585 * All buffered packets, both transmitting and receiving, 1586 * if any, will be lost by stopping the interface. 1587 */ 1588static void
| 2792} 2793 2794/* 2795 * Stop everything on the interface. 2796 * 2797 * All buffered packets, both transmitting and receiving, 2798 * if any, will be lost by stopping the interface. 2799 */ 2800static void
|
1589fe_stop ( int unit )
| 2801fe_stop (struct fe_softc *sc)
|
1590{
| 2802{
|
1591 struct fe_softc *sc = &fe_softc[unit];
| |
1592 int s; 1593 1594 s = splimp(); 1595
| 2803 int s; 2804 2805 s = splimp(); 2806
|
1596#if FE_DEBUG >= 3 1597 fe_dump( LOG_INFO, sc, "stop()" ); 1598#endif 1599
| |
1600 /* Disable interrupts. */ 1601 outb( sc->ioaddr[ FE_DLCR2 ], 0x00 ); 1602 outb( sc->ioaddr[ FE_DLCR3 ], 0x00 ); 1603 1604 /* Stop interface hardware. */ 1605 DELAY( 200 ); 1606 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE ); 1607 DELAY( 200 ); 1608 1609 /* Clear all interrupt status. */ 1610 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF ); 1611 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF ); 1612 1613 /* Put the chip in stand-by mode. */ 1614 DELAY( 200 ); 1615 outb( sc->ioaddr[ FE_DLCR7 ], sc->proto_dlcr7 | FE_D7_POWER_DOWN ); 1616 DELAY( 200 ); 1617 1618 /* Reset transmitter variables and interface flags. */ 1619 sc->sc_if.if_flags &= ~( IFF_OACTIVE | IFF_RUNNING ); 1620 sc->sc_if.if_timer = 0; 1621 sc->txb_free = sc->txb_size; 1622 sc->txb_count = 0; 1623 sc->txb_sched = 0; 1624 1625 /* MAR loading can be delayed. */ 1626 sc->filter_change = 0; 1627
| 2807 /* Disable interrupts. */ 2808 outb( sc->ioaddr[ FE_DLCR2 ], 0x00 ); 2809 outb( sc->ioaddr[ FE_DLCR3 ], 0x00 ); 2810 2811 /* Stop interface hardware. */ 2812 DELAY( 200 ); 2813 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE ); 2814 DELAY( 200 ); 2815 2816 /* Clear all interrupt status. */ 2817 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF ); 2818 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF ); 2819 2820 /* Put the chip in stand-by mode. */ 2821 DELAY( 200 ); 2822 outb( sc->ioaddr[ FE_DLCR7 ], sc->proto_dlcr7 | FE_D7_POWER_DOWN ); 2823 DELAY( 200 ); 2824 2825 /* Reset transmitter variables and interface flags. */ 2826 sc->sc_if.if_flags &= ~( IFF_OACTIVE | IFF_RUNNING ); 2827 sc->sc_if.if_timer = 0; 2828 sc->txb_free = sc->txb_size; 2829 sc->txb_count = 0; 2830 sc->txb_sched = 0; 2831 2832 /* MAR loading can be delayed. */ 2833 sc->filter_change = 0; 2834
|
1628 /* Update config status also. */ 1629 1630 /* Call a hook. */
| 2835 /* Call a device-specific hook. */
|
1631 if ( sc->stop ) sc->stop( sc ); 1632
| 2836 if ( sc->stop ) sc->stop( sc ); 2837
|
1633#if FE_DEBUG >= 3 1634 fe_dump( LOG_INFO, sc, "end of stop()" ); 1635#endif 1636
| |
1637 (void) splx(s); 1638} 1639 1640/* 1641 * Device timeout/watchdog routine. Entered if the device neglects to 1642 * generate an interrupt after a transmit has been started on it. 1643 */ 1644static void 1645fe_watchdog ( struct ifnet *ifp ) 1646{ 1647 struct fe_softc *sc = (struct fe_softc *)ifp; 1648
| 2838 (void) splx(s); 2839} 2840 2841/* 2842 * Device timeout/watchdog routine. Entered if the device neglects to 2843 * generate an interrupt after a transmit has been started on it. 2844 */ 2845static void 2846fe_watchdog ( struct ifnet *ifp ) 2847{ 2848 struct fe_softc *sc = (struct fe_softc *)ifp; 2849
|
1649#if FE_DEBUG >= 1
| |
1650 /* A "debug" message. */
| 2850 /* A "debug" message. */
|
1651 log( LOG_ERR, "fe%d: transmission timeout (%d+%d)%s\n", 1652 ifp->if_unit, sc->txb_sched, sc->txb_count, 1653 ( ifp->if_flags & IFF_UP ) ? "" : " when down" );
| 2851 printf("fe%d: transmission timeout (%d+%d)%s\n", 2852 ifp->if_unit, sc->txb_sched, sc->txb_count, 2853 (ifp->if_flags & IFF_UP) ? "" : " when down");
|
1654 if ( sc->sc_if.if_opackets == 0 && sc->sc_if.if_ipackets == 0 ) {
| 2854 if ( sc->sc_if.if_opackets == 0 && sc->sc_if.if_ipackets == 0 ) {
|
1655 log( LOG_WARNING, "fe%d: wrong IRQ setting in config?\n", 1656 ifp->if_unit );
| 2855 printf("fe%d: wrong IRQ setting in config?\n", ifp->if_unit);
|
1657 }
| 2856 }
|
1658#endif 1659 1660#if FE_DEBUG >= 3 1661 fe_dump( LOG_INFO, sc, NULL ); 1662#endif 1663 1664 /* Record how many packets are lost by this accident. */ 1665 ifp->if_oerrors += sc->txb_sched + sc->txb_count; 1666 1667 /* Put the interface into known initial state. */ 1668 if ( ifp->if_flags & IFF_UP ) { 1669 fe_reset( ifp->if_unit ); 1670 } else { 1671 fe_stop( ifp->if_unit ); 1672 }
| 2857 fe_reset( sc );
|
1673} 1674 1675/* 1676 * Initialize device. 1677 */ 1678static void
| 2858} 2859 2860/* 2861 * Initialize device. 2862 */ 2863static void
|
1679fe_init ( int unit )
| 2864fe_init (void * xsc)
|
1680{
| 2865{
|
1681 struct fe_softc *sc = &fe_softc[unit];
| 2866 struct fe_softc *sc = xsc;
|
1682 int s; 1683
| 2867 int s; 2868
|
1684#if FE_DEBUG >= 3 1685 fe_dump( LOG_INFO, sc, "init()" ); 1686#endif 1687
| |
1688 /* We need an address. */ 1689 if (TAILQ_EMPTY(&sc->sc_if.if_addrhead)) { /* XXX unlikely */
| 2869 /* We need an address. */ 2870 if (TAILQ_EMPTY(&sc->sc_if.if_addrhead)) { /* XXX unlikely */
|
1690#if FE_DEBUG >= 1 1691 log( LOG_ERR, "fe%d: init() without any address\n", 1692 sc->sc_unit );
| 2871#ifdef DIAGNOSTIC 2872 printf("fe%d: init() without any address\n", sc->sc_unit);
|
1693#endif 1694 return; 1695 } 1696
| 2873#endif 2874 return; 2875 } 2876
|
1697#if FE_DEBUG >= 1 1698 /* 1699 * Make sure we have a valid station address. 1700 * The following test is applicable for any Ethernet interfaces. 1701 * It can be done in somewhere common to all of them. FIXME. 1702 */ 1703 if ( ( sc->sc_enaddr[ 0 ] & 0x01 ) != 0 1704 || ( sc->sc_enaddr[ 0 ] == 0x00 1705 && sc->sc_enaddr[ 1 ] == 0x00 1706 && sc->sc_enaddr[ 2 ] == 0x00 ) ) { 1707 log( LOG_ERR, "fe%d: invalid station address (%6D)\n", 1708 sc->sc_unit, sc->sc_enaddr, ":" ); 1709 return; 1710 } 1711#endif 1712
| |
1713 /* Start initializing 86960. */ 1714 s = splimp(); 1715
| 2877 /* Start initializing 86960. */ 2878 s = splimp(); 2879
|
1716 /* Call a hook. */
| 2880 /* Call a hook before we start initializing the chip. */
|
1717 if ( sc->init ) sc->init( sc ); 1718
| 2881 if ( sc->init ) sc->init( sc ); 2882
|
1719#if FE_DEBUG >= 3 1720 fe_dump( LOG_INFO, sc, "after init hook" ); 1721#endif 1722
| |
1723 /* 1724 * Make sure to disable the chip, also. 1725 * This may also help re-programming the chip after 1726 * hot insertion of PCMCIAs. 1727 */ 1728 DELAY( 200 ); 1729 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE ); 1730 DELAY( 200 ); 1731 1732 /* Power up the chip and select register bank for DLCRs. */ 1733 DELAY( 200 ); 1734 outb( sc->ioaddr[ FE_DLCR7 ], 1735 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP ); 1736 DELAY( 200 ); 1737 1738 /* Feed the station address. */ 1739 outblk( sc, FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN ); 1740 1741 /* Clear multicast address filter to receive nothing. */ 1742 outb( sc->ioaddr[ FE_DLCR7 ], 1743 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP ); 1744 outblk( sc, FE_MAR8, fe_filter_nothing.data, FE_FILTER_LEN ); 1745 1746 /* Select the BMPR bank for runtime register access. */ 1747 outb( sc->ioaddr[ FE_DLCR7 ], 1748 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP ); 1749 1750 /* Initialize registers. */ 1751 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF ); /* Clear all bits. */ 1752 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF ); /* ditto. */ 1753 outb( sc->ioaddr[ FE_DLCR2 ], 0x00 ); 1754 outb( sc->ioaddr[ FE_DLCR3 ], 0x00 ); 1755 outb( sc->ioaddr[ FE_DLCR4 ], sc->proto_dlcr4 ); 1756 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 ); 1757 outb( sc->ioaddr[ FE_BMPR10 ], 0x00 ); 1758 outb( sc->ioaddr[ FE_BMPR11 ], FE_B11_CTRL_SKIP | FE_B11_MODE1 ); 1759 outb( sc->ioaddr[ FE_BMPR12 ], 0x00 ); 1760 outb( sc->ioaddr[ FE_BMPR13 ], sc->proto_bmpr13 ); 1761 outb( sc->ioaddr[ FE_BMPR14 ], 0x00 ); 1762 outb( sc->ioaddr[ FE_BMPR15 ], 0x00 ); 1763
| 2883 /* 2884 * Make sure to disable the chip, also. 2885 * This may also help re-programming the chip after 2886 * hot insertion of PCMCIAs. 2887 */ 2888 DELAY( 200 ); 2889 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE ); 2890 DELAY( 200 ); 2891 2892 /* Power up the chip and select register bank for DLCRs. */ 2893 DELAY( 200 ); 2894 outb( sc->ioaddr[ FE_DLCR7 ], 2895 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP ); 2896 DELAY( 200 ); 2897 2898 /* Feed the station address. */ 2899 outblk( sc, FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN ); 2900 2901 /* Clear multicast address filter to receive nothing. */ 2902 outb( sc->ioaddr[ FE_DLCR7 ], 2903 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP ); 2904 outblk( sc, FE_MAR8, fe_filter_nothing.data, FE_FILTER_LEN ); 2905 2906 /* Select the BMPR bank for runtime register access. */ 2907 outb( sc->ioaddr[ FE_DLCR7 ], 2908 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP ); 2909 2910 /* Initialize registers. */ 2911 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF ); /* Clear all bits. */ 2912 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF ); /* ditto. */ 2913 outb( sc->ioaddr[ FE_DLCR2 ], 0x00 ); 2914 outb( sc->ioaddr[ FE_DLCR3 ], 0x00 ); 2915 outb( sc->ioaddr[ FE_DLCR4 ], sc->proto_dlcr4 ); 2916 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 ); 2917 outb( sc->ioaddr[ FE_BMPR10 ], 0x00 ); 2918 outb( sc->ioaddr[ FE_BMPR11 ], FE_B11_CTRL_SKIP | FE_B11_MODE1 ); 2919 outb( sc->ioaddr[ FE_BMPR12 ], 0x00 ); 2920 outb( sc->ioaddr[ FE_BMPR13 ], sc->proto_bmpr13 ); 2921 outb( sc->ioaddr[ FE_BMPR14 ], 0x00 ); 2922 outb( sc->ioaddr[ FE_BMPR15 ], 0x00 ); 2923
|
1764#if FE_DEBUG >= 3 1765 fe_dump( LOG_INFO, sc, "just before enabling DLC" ); 1766#endif 1767
| |
1768 /* Enable interrupts. */ 1769 outb( sc->ioaddr[ FE_DLCR2 ], FE_TMASK ); 1770 outb( sc->ioaddr[ FE_DLCR3 ], FE_RMASK ); 1771
| 2924 /* Enable interrupts. */ 2925 outb( sc->ioaddr[ FE_DLCR2 ], FE_TMASK ); 2926 outb( sc->ioaddr[ FE_DLCR3 ], FE_RMASK ); 2927
|
| 2928 /* Select requested media, just before enabling DLC. */ 2929 if (sc->msel) sc->msel(sc); 2930
|
1772 /* Enable transmitter and receiver. */ 1773 DELAY( 200 ); 1774 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_ENABLE ); 1775 DELAY( 200 ); 1776
| 2931 /* Enable transmitter and receiver. */ 2932 DELAY( 200 ); 2933 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_ENABLE ); 2934 DELAY( 200 ); 2935
|
1777#if FE_DEBUG >= 3 1778 fe_dump( LOG_INFO, sc, "just after enabling DLC" ); 1779#endif 1780
| 2936#ifdef DIAGNOSTIC
|
1781 /* 1782 * Make sure to empty the receive buffer. 1783 * 1784 * This may be redundant, but *if* the receive buffer were full 1785 * at this point, then the driver would hang. I have experienced 1786 * some strange hang-up just after UP. I hope the following 1787 * code solve the problem. 1788 * 1789 * I have changed the order of hardware initialization. 1790 * I think the receive buffer cannot have any packets at this 1791 * point in this version. The following code *must* be 1792 * redundant now. FIXME. 1793 * 1794 * I've heard a rumore that on some PC card implementation of 1795 * 8696x, the receive buffer can have some data at this point. 1796 * The following message helps discovering the fact. FIXME. 1797 */ 1798 if ( !( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) ) {
| 2937 /* 2938 * Make sure to empty the receive buffer. 2939 * 2940 * This may be redundant, but *if* the receive buffer were full 2941 * at this point, then the driver would hang. I have experienced 2942 * some strange hang-up just after UP. I hope the following 2943 * code solve the problem. 2944 * 2945 * I have changed the order of hardware initialization. 2946 * I think the receive buffer cannot have any packets at this 2947 * point in this version. The following code *must* be 2948 * redundant now. FIXME. 2949 * 2950 * I've heard a rumore that on some PC card implementation of 2951 * 8696x, the receive buffer can have some data at this point. 2952 * The following message helps discovering the fact. FIXME. 2953 */ 2954 if ( !( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) ) {
|
1799 log( LOG_WARNING, 1800 "fe%d: receive buffer has some data after reset\n", 1801 sc->sc_unit ); 1802
| 2955 printf("fe%d: receive buffer has some data after reset\n", 2956 sc->sc_unit);
|
1803 fe_emptybuffer( sc ); 1804 } 1805
| 2957 fe_emptybuffer( sc ); 2958 } 2959
|
1806#if FE_DEBUG >= 3 1807 fe_dump( LOG_INFO, sc, "after ERB loop" ); 1808#endif 1809
| |
1810 /* Do we need this here? Actually, no. I must be paranoia. */ 1811 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF ); /* Clear all bits. */ 1812 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF ); /* ditto. */
| 2960 /* Do we need this here? Actually, no. I must be paranoia. */ 2961 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF ); /* Clear all bits. */ 2962 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF ); /* ditto. */
|
1813 1814#if FE_DEBUG >= 3 1815 fe_dump( LOG_INFO, sc, "after FIXME" );
| |
1816#endif
| 2963#endif
|
| 2964
|
1817 /* Set 'running' flag, because we are now running. */ 1818 sc->sc_if.if_flags |= IFF_RUNNING; 1819 1820 /* 1821 * At this point, the interface is running properly, 1822 * except that it receives *no* packets. we then call 1823 * fe_setmode() to tell the chip what packets to be 1824 * received, based on the if_flags and multicast group 1825 * list. It completes the initialization process. 1826 */ 1827 fe_setmode( sc ); 1828
| 2965 /* Set 'running' flag, because we are now running. */ 2966 sc->sc_if.if_flags |= IFF_RUNNING; 2967 2968 /* 2969 * At this point, the interface is running properly, 2970 * except that it receives *no* packets. we then call 2971 * fe_setmode() to tell the chip what packets to be 2972 * received, based on the if_flags and multicast group 2973 * list. It completes the initialization process. 2974 */ 2975 fe_setmode( sc ); 2976
|
1829#if FE_DEBUG >= 3 1830 fe_dump( LOG_INFO, sc, "after setmode" ); 1831#endif 1832
| 2977#if 0
|
1833 /* ...and attempt to start output queued packets. */
| 2978 /* ...and attempt to start output queued packets. */
|
| 2979 /* TURNED OFF, because the semi-auto media prober wants to UP 2980 the interface keeping it idle. The upper layer will soon 2981 start the interface anyway, and there are no significant 2982 delay. */
|
1834 fe_start( &sc->sc_if );
| 2983 fe_start( &sc->sc_if );
|
1835 1836#if FE_DEBUG >= 3 1837 fe_dump( LOG_INFO, sc, "init() done" );
| |
1838#endif 1839 1840 (void) splx(s); 1841} 1842 1843/* 1844 * This routine actually starts the transmission on the interface 1845 */ 1846static void 1847fe_xmit ( struct fe_softc * sc ) 1848{ 1849 /* 1850 * Set a timer just in case we never hear from the board again. 1851 * We use longer timeout for multiple packet transmission. 1852 * I'm not sure this timer value is appropriate. FIXME. 1853 */ 1854 sc->sc_if.if_timer = 1 + sc->txb_count; 1855 1856 /* Update txb variables. */ 1857 sc->txb_sched = sc->txb_count; 1858 sc->txb_count = 0; 1859 sc->txb_free = sc->txb_size; 1860 sc->tx_excolls = 0; 1861 1862 /* Start transmitter, passing packets in TX buffer. */ 1863 outb( sc->ioaddr[ FE_BMPR10 ], sc->txb_sched | FE_B10_START ); 1864} 1865 1866/* 1867 * Start output on interface. 1868 * We make two assumptions here: 1869 * 1) that the current priority is set to splimp _before_ this code 1870 * is called *and* is returned to the appropriate priority after 1871 * return 1872 * 2) that the IFF_OACTIVE flag is checked before this code is called 1873 * (i.e. that the output part of the interface is idle) 1874 */ 1875void 1876fe_start ( struct ifnet *ifp ) 1877{ 1878 struct fe_softc *sc = ifp->if_softc; 1879 struct mbuf *m; 1880
| 2984#endif 2985 2986 (void) splx(s); 2987} 2988 2989/* 2990 * This routine actually starts the transmission on the interface 2991 */ 2992static void 2993fe_xmit ( struct fe_softc * sc ) 2994{ 2995 /* 2996 * Set a timer just in case we never hear from the board again. 2997 * We use longer timeout for multiple packet transmission. 2998 * I'm not sure this timer value is appropriate. FIXME. 2999 */ 3000 sc->sc_if.if_timer = 1 + sc->txb_count; 3001 3002 /* Update txb variables. */ 3003 sc->txb_sched = sc->txb_count; 3004 sc->txb_count = 0; 3005 sc->txb_free = sc->txb_size; 3006 sc->tx_excolls = 0; 3007 3008 /* Start transmitter, passing packets in TX buffer. */ 3009 outb( sc->ioaddr[ FE_BMPR10 ], sc->txb_sched | FE_B10_START ); 3010} 3011 3012/* 3013 * Start output on interface. 3014 * We make two assumptions here: 3015 * 1) that the current priority is set to splimp _before_ this code 3016 * is called *and* is returned to the appropriate priority after 3017 * return 3018 * 2) that the IFF_OACTIVE flag is checked before this code is called 3019 * (i.e. that the output part of the interface is idle) 3020 */ 3021void 3022fe_start ( struct ifnet *ifp ) 3023{ 3024 struct fe_softc *sc = ifp->if_softc; 3025 struct mbuf *m; 3026
|
1881#if FE_DEBUG >= 1
| 3027#ifdef DIAGNOSTIC
|
1882 /* Just a sanity check. */ 1883 if ( ( sc->txb_count == 0 ) != ( sc->txb_free == sc->txb_size ) ) { 1884 /* 1885 * Txb_count and txb_free co-works to manage the 1886 * transmission buffer. Txb_count keeps track of the 1887 * used potion of the buffer, while txb_free does unused 1888 * potion. So, as long as the driver runs properly, 1889 * txb_count is zero if and only if txb_free is same 1890 * as txb_size (which represents whole buffer.) 1891 */
| 3028 /* Just a sanity check. */ 3029 if ( ( sc->txb_count == 0 ) != ( sc->txb_free == sc->txb_size ) ) { 3030 /* 3031 * Txb_count and txb_free co-works to manage the 3032 * transmission buffer. Txb_count keeps track of the 3033 * used potion of the buffer, while txb_free does unused 3034 * potion. So, as long as the driver runs properly, 3035 * txb_count is zero if and only if txb_free is same 3036 * as txb_size (which represents whole buffer.) 3037 */
|
1892 log( LOG_ERR, "fe%d: inconsistent txb variables (%d, %d)\n", 1893 sc->sc_unit, sc->txb_count, sc->txb_free );
| 3038 printf("fe%d: inconsistent txb variables (%d, %d)\n", 3039 sc->sc_unit, sc->txb_count, sc->txb_free);
|
1894 /* 1895 * So, what should I do, then? 1896 * 1897 * We now know txb_count and txb_free contradicts. We 1898 * cannot, however, tell which is wrong. More 1899 * over, we cannot peek 86960 transmission buffer or 1900 * reset the transmission buffer. (In fact, we can 1901 * reset the entire interface. I don't want to do it.) 1902 * 1903 * If txb_count is incorrect, leaving it as-is will cause 1904 * sending of garbage after next interrupt. We have to 1905 * avoid it. Hence, we reset the txb_count here. If 1906 * txb_free was incorrect, resetting txb_count just loose 1907 * some packets. We can live with it. 1908 */ 1909 sc->txb_count = 0; 1910 } 1911#endif 1912
| 3040 /* 3041 * So, what should I do, then? 3042 * 3043 * We now know txb_count and txb_free contradicts. We 3044 * cannot, however, tell which is wrong. More 3045 * over, we cannot peek 86960 transmission buffer or 3046 * reset the transmission buffer. (In fact, we can 3047 * reset the entire interface. I don't want to do it.) 3048 * 3049 * If txb_count is incorrect, leaving it as-is will cause 3050 * sending of garbage after next interrupt. We have to 3051 * avoid it. Hence, we reset the txb_count here. If 3052 * txb_free was incorrect, resetting txb_count just loose 3053 * some packets. We can live with it. 3054 */ 3055 sc->txb_count = 0; 3056 } 3057#endif 3058
|
1913#if FE_DEBUG >= 1
| |
1914 /* 1915 * First, see if there are buffered packets and an idle 1916 * transmitter - should never happen at this point. 1917 */ 1918 if ( ( sc->txb_count > 0 ) && ( sc->txb_sched == 0 ) ) {
| 3059 /* 3060 * First, see if there are buffered packets and an idle 3061 * transmitter - should never happen at this point. 3062 */ 3063 if ( ( sc->txb_count > 0 ) && ( sc->txb_sched == 0 ) ) {
|
1919 log( LOG_ERR, 1920 "fe%d: transmitter idle with %d buffered packets\n", 1921 sc->sc_unit, sc->txb_count );
| 3064 printf("fe%d: transmitter idle with %d buffered packets\n", 3065 sc->sc_unit, sc->txb_count);
|
1922 fe_xmit( sc ); 1923 }
| 3066 fe_xmit( sc ); 3067 }
|
1924#endif
| |
1925 1926 /* 1927 * Stop accepting more transmission packets temporarily, when 1928 * a filter change request is delayed. Updating the MARs on 1929 * 86960 flushes the transmission buffer, so it is delayed 1930 * until all buffered transmission packets have been sent 1931 * out. 1932 */ 1933 if ( sc->filter_change ) { 1934 /* 1935 * Filter change request is delayed only when the DLC is 1936 * working. DLC soon raise an interrupt after finishing 1937 * the work. 1938 */ 1939 goto indicate_active; 1940 } 1941 1942 for (;;) { 1943 1944 /* 1945 * See if there is room to put another packet in the buffer. 1946 * We *could* do better job by peeking the send queue to 1947 * know the length of the next packet. Current version just 1948 * tests against the worst case (i.e., longest packet). FIXME. 1949 * 1950 * When adding the packet-peek feature, don't forget adding a 1951 * test on txb_count against QUEUEING_MAX. 1952 * There is a little chance the packet count exceeds 1953 * the limit. Assume transmission buffer is 8KB (2x8KB 1954 * configuration) and an application sends a bunch of small 1955 * (i.e., minimum packet sized) packets rapidly. An 8KB 1956 * buffer can hold 130 blocks of 62 bytes long... 1957 */ 1958 if ( sc->txb_free 1959 < ETHER_MAX_LEN - ETHER_CRC_LEN + FE_DATA_LEN_LEN ) { 1960 /* No room. */ 1961 goto indicate_active; 1962 } 1963 1964#if FE_SINGLE_TRANSMISSION 1965 if ( sc->txb_count > 0 ) { 1966 /* Just one packet per a transmission buffer. */ 1967 goto indicate_active; 1968 } 1969#endif 1970 1971 /* 1972 * Get the next mbuf chain for a packet to send. 1973 */ 1974 IF_DEQUEUE( &sc->sc_if.if_snd, m ); 1975 if ( m == NULL ) { 1976 /* No more packets to send. */ 1977 goto indicate_inactive; 1978 } 1979 1980 /* 1981 * Copy the mbuf chain into the transmission buffer. 1982 * txb_* variables are updated as necessary. 1983 */ 1984 fe_write_mbufs( sc, m ); 1985 1986 /* Start transmitter if it's idle. */ 1987 if ( ( sc->txb_count > 0 ) && ( sc->txb_sched == 0 ) ) { 1988 fe_xmit( sc ); 1989 } 1990 1991 /* 1992 * Tap off here if there is a bpf listener, 1993 * and the device is *not* in promiscuous mode. 1994 * (86960 receives self-generated packets if 1995 * and only if it is in "receive everything" 1996 * mode.) 1997 */ 1998#if NBPFILTER > 0 1999 if ( sc->sc_if.if_bpf 2000 && !( sc->sc_if.if_flags & IFF_PROMISC ) ) { 2001 bpf_mtap( &sc->sc_if, m ); 2002 } 2003#endif 2004 2005 m_freem( m ); 2006 } 2007 2008 indicate_inactive: 2009 /* 2010 * We are using the !OACTIVE flag to indicate to 2011 * the outside world that we can accept an 2012 * additional packet rather than that the 2013 * transmitter is _actually_ active. Indeed, the 2014 * transmitter may be active, but if we haven't 2015 * filled all the buffers with data then we still 2016 * want to accept more. 2017 */ 2018 sc->sc_if.if_flags &= ~IFF_OACTIVE; 2019 return; 2020 2021 indicate_active: 2022 /* 2023 * The transmitter is active, and there are no room for 2024 * more outgoing packets in the transmission buffer. 2025 */ 2026 sc->sc_if.if_flags |= IFF_OACTIVE; 2027 return; 2028} 2029 2030/* 2031 * Drop (skip) a packet from receive buffer in 86960 memory. 2032 */ 2033static void 2034fe_droppacket ( struct fe_softc * sc, int len ) 2035{ 2036 int i; 2037 2038 /* 2039 * 86960 manual says that we have to read 8 bytes from the buffer 2040 * before skip the packets and that there must be more than 8 bytes 2041 * remaining in the buffer when issue a skip command. 2042 * Remember, we have already read 4 bytes before come here. 2043 */ 2044 if ( len > 12 ) { 2045 /* Read 4 more bytes, and skip the rest of the packet. */
| 3068 3069 /* 3070 * Stop accepting more transmission packets temporarily, when 3071 * a filter change request is delayed. Updating the MARs on 3072 * 86960 flushes the transmission buffer, so it is delayed 3073 * until all buffered transmission packets have been sent 3074 * out. 3075 */ 3076 if ( sc->filter_change ) { 3077 /* 3078 * Filter change request is delayed only when the DLC is 3079 * working. DLC soon raise an interrupt after finishing 3080 * the work. 3081 */ 3082 goto indicate_active; 3083 } 3084 3085 for (;;) { 3086 3087 /* 3088 * See if there is room to put another packet in the buffer. 3089 * We *could* do better job by peeking the send queue to 3090 * know the length of the next packet. Current version just 3091 * tests against the worst case (i.e., longest packet). FIXME. 3092 * 3093 * When adding the packet-peek feature, don't forget adding a 3094 * test on txb_count against QUEUEING_MAX. 3095 * There is a little chance the packet count exceeds 3096 * the limit. Assume transmission buffer is 8KB (2x8KB 3097 * configuration) and an application sends a bunch of small 3098 * (i.e., minimum packet sized) packets rapidly. An 8KB 3099 * buffer can hold 130 blocks of 62 bytes long... 3100 */ 3101 if ( sc->txb_free 3102 < ETHER_MAX_LEN - ETHER_CRC_LEN + FE_DATA_LEN_LEN ) { 3103 /* No room. */ 3104 goto indicate_active; 3105 } 3106 3107#if FE_SINGLE_TRANSMISSION 3108 if ( sc->txb_count > 0 ) { 3109 /* Just one packet per a transmission buffer. */ 3110 goto indicate_active; 3111 } 3112#endif 3113 3114 /* 3115 * Get the next mbuf chain for a packet to send. 3116 */ 3117 IF_DEQUEUE( &sc->sc_if.if_snd, m ); 3118 if ( m == NULL ) { 3119 /* No more packets to send. */ 3120 goto indicate_inactive; 3121 } 3122 3123 /* 3124 * Copy the mbuf chain into the transmission buffer. 3125 * txb_* variables are updated as necessary. 3126 */ 3127 fe_write_mbufs( sc, m ); 3128 3129 /* Start transmitter if it's idle. */ 3130 if ( ( sc->txb_count > 0 ) && ( sc->txb_sched == 0 ) ) { 3131 fe_xmit( sc ); 3132 } 3133 3134 /* 3135 * Tap off here if there is a bpf listener, 3136 * and the device is *not* in promiscuous mode. 3137 * (86960 receives self-generated packets if 3138 * and only if it is in "receive everything" 3139 * mode.) 3140 */ 3141#if NBPFILTER > 0 3142 if ( sc->sc_if.if_bpf 3143 && !( sc->sc_if.if_flags & IFF_PROMISC ) ) { 3144 bpf_mtap( &sc->sc_if, m ); 3145 } 3146#endif 3147 3148 m_freem( m ); 3149 } 3150 3151 indicate_inactive: 3152 /* 3153 * We are using the !OACTIVE flag to indicate to 3154 * the outside world that we can accept an 3155 * additional packet rather than that the 3156 * transmitter is _actually_ active. Indeed, the 3157 * transmitter may be active, but if we haven't 3158 * filled all the buffers with data then we still 3159 * want to accept more. 3160 */ 3161 sc->sc_if.if_flags &= ~IFF_OACTIVE; 3162 return; 3163 3164 indicate_active: 3165 /* 3166 * The transmitter is active, and there are no room for 3167 * more outgoing packets in the transmission buffer. 3168 */ 3169 sc->sc_if.if_flags |= IFF_OACTIVE; 3170 return; 3171} 3172 3173/* 3174 * Drop (skip) a packet from receive buffer in 86960 memory. 3175 */ 3176static void 3177fe_droppacket ( struct fe_softc * sc, int len ) 3178{ 3179 int i; 3180 3181 /* 3182 * 86960 manual says that we have to read 8 bytes from the buffer 3183 * before skip the packets and that there must be more than 8 bytes 3184 * remaining in the buffer when issue a skip command. 3185 * Remember, we have already read 4 bytes before come here. 3186 */ 3187 if ( len > 12 ) { 3188 /* Read 4 more bytes, and skip the rest of the packet. */
|
2046 ( void )inw( sc->ioaddr[ FE_BMPR8 ] ); 2047 ( void )inw( sc->ioaddr[ FE_BMPR8 ] ); 2048 outb( sc->ioaddr[ FE_BMPR14 ], FE_B14_SKIP );
| 3189#ifdef FE_8BIT_SUPPORT 3190 if ((sc->proto_dlcr6 & FE_D6_BBW) == FE_D6_BBW_BYTE) 3191 { 3192 ( void )inb( sc->ioaddr[ FE_BMPR8 ] ); 3193 ( void )inb( sc->ioaddr[ FE_BMPR8 ] ); 3194 ( void )inb( sc->ioaddr[ FE_BMPR8 ] ); 3195 ( void )inb( sc->ioaddr[ FE_BMPR8 ] ); 3196 } 3197 else 3198#endif 3199 { 3200 ( void )inw( sc->ioaddr[ FE_BMPR8 ] ); 3201 ( void )inw( sc->ioaddr[ FE_BMPR8 ] ); 3202 } 3203 outb( sc->ioaddr[ FE_BMPR14 ], FE_B14_SKIP );
|
2049 } else { 2050 /* We should not come here unless receiving RUNTs. */
| 3204 } else { 3205 /* We should not come here unless receiving RUNTs. */
|
2051 for ( i = 0; i < len; i += 2 ) { 2052 ( void )inw( sc->ioaddr[ FE_BMPR8 ] );
| 3206#ifdef FE_8BIT_SUPPORT 3207 if ((sc->proto_dlcr6 & FE_D6_BBW) == FE_D6_BBW_BYTE) 3208 { 3209 for ( i = 0; i < len; i++ ) { 3210 ( void )inb( sc->ioaddr[ FE_BMPR8 ] ); 3211 }
|
2053 }
| 3212 }
|
| 3213 else 3214#endif 3215 { 3216 for ( i = 0; i < len; i += 2 ) { 3217 ( void )inw( sc->ioaddr[ FE_BMPR8 ] ); 3218 } 3219 }
|
2054 } 2055} 2056
| 3220 } 3221} 3222
|
| 3223#ifdef DIAGNOSTIC
|
2057/* 2058 * Empty receiving buffer. 2059 */ 2060static void 2061fe_emptybuffer ( struct fe_softc * sc ) 2062{ 2063 int i; 2064 u_char saved_dlcr5; 2065
| 3224/* 3225 * Empty receiving buffer. 3226 */ 3227static void 3228fe_emptybuffer ( struct fe_softc * sc ) 3229{ 3230 int i; 3231 u_char saved_dlcr5; 3232
|
2066#if FE_DEBUG >= 2 2067 log( LOG_WARNING, "fe%d: emptying receive buffer\n", sc->sc_unit );
| 3233#ifdef FE_DEBUG 3234 printf("fe%d: emptying receive buffer\n", sc->sc_unit);
|
2068#endif
| 3235#endif
|
| 3236
|
2069 /* 2070 * Stop receiving packets, temporarily. 2071 */ 2072 saved_dlcr5 = inb( sc->ioaddr[ FE_DLCR5 ] ); 2073 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 ); 2074 DELAY(1300); 2075 2076 /*
| 3237 /* 3238 * Stop receiving packets, temporarily. 3239 */ 3240 saved_dlcr5 = inb( sc->ioaddr[ FE_DLCR5 ] ); 3241 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 ); 3242 DELAY(1300); 3243 3244 /*
|
2077 * When we come here, the receive buffer management should
| 3245 * When we come here, the receive buffer management may
|
2078 * have been broken. So, we cannot use skip operation. 2079 * Just discard everything in the buffer. 2080 */
| 3246 * have been broken. So, we cannot use skip operation. 3247 * Just discard everything in the buffer. 3248 */
|
2081 for (i = 0; i < 32768; i++) { 2082 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) break; 2083 ( void )inw( sc->ioaddr[ FE_BMPR8 ] );
| 3249#ifdef FE_8BIT_SUPPORT 3250 if ((sc->proto_dlcr6 & FE_D6_BBW) == FE_D6_BBW_BYTE) 3251 { 3252 for ( i = 0; i < 65536; i++ ) { 3253 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) break; 3254 ( void )inb( sc->ioaddr[ FE_BMPR8 ] ); 3255 }
|
2084 }
| 3256 }
|
| 3257 else 3258#endif 3259 { 3260 for ( i = 0; i < 65536; i += 2 ) { 3261 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) break; 3262 ( void )inw( sc->ioaddr[ FE_BMPR8 ] ); 3263 } 3264 }
|
2085 2086 /* 2087 * Double check. 2088 */ 2089 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) {
| 3265 3266 /* 3267 * Double check. 3268 */ 3269 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) {
|
2090 log( LOG_ERR, "fe%d: could not empty receive buffer\n", 2091 sc->sc_unit );
| 3270 printf("fe%d: could not empty receive buffer\n", sc->sc_unit);
|
2092 /* Hmm. What should I do if this happens? FIXME. */ 2093 } 2094 2095 /* 2096 * Restart receiving packets. 2097 */ 2098 outb( sc->ioaddr[ FE_DLCR5 ], saved_dlcr5 ); 2099}
| 3271 /* Hmm. What should I do if this happens? FIXME. */ 3272 } 3273 3274 /* 3275 * Restart receiving packets. 3276 */ 3277 outb( sc->ioaddr[ FE_DLCR5 ], saved_dlcr5 ); 3278}
|
| 3279#endif
|
2100 2101/* 2102 * Transmission interrupt handler 2103 * The control flow of this function looks silly. FIXME. 2104 */ 2105static void 2106fe_tint ( struct fe_softc * sc, u_char tstat ) 2107{ 2108 int left; 2109 int col; 2110 2111 /* 2112 * Handle "excessive collision" interrupt. 2113 */ 2114 if ( tstat & FE_D0_COLL16 ) { 2115 2116 /* 2117 * Find how many packets (including this collided one) 2118 * are left unsent in transmission buffer. 2119 */ 2120 left = inb( sc->ioaddr[ FE_BMPR10 ] );
| 3280 3281/* 3282 * Transmission interrupt handler 3283 * The control flow of this function looks silly. FIXME. 3284 */ 3285static void 3286fe_tint ( struct fe_softc * sc, u_char tstat ) 3287{ 3288 int left; 3289 int col; 3290 3291 /* 3292 * Handle "excessive collision" interrupt. 3293 */ 3294 if ( tstat & FE_D0_COLL16 ) { 3295 3296 /* 3297 * Find how many packets (including this collided one) 3298 * are left unsent in transmission buffer. 3299 */ 3300 left = inb( sc->ioaddr[ FE_BMPR10 ] );
|
| 3301 printf("fe%d: excessive collision (%d/%d)\n", 3302 sc->sc_unit, left, sc->txb_sched);
|
2121
| 3303
|
2122#if FE_DEBUG >= 2 2123 log( LOG_WARNING, "fe%d: excessive collision (%d/%d)\n", 2124 sc->sc_unit, left, sc->txb_sched ); 2125#endif 2126#if FE_DEBUG >= 3 2127 fe_dump( LOG_INFO, sc, NULL ); 2128#endif 2129
| |
2130 /* 2131 * Clear the collision flag (in 86960) here 2132 * to avoid confusing statistics. 2133 */ 2134 outb( sc->ioaddr[ FE_DLCR0 ], FE_D0_COLLID ); 2135 2136 /* 2137 * Restart transmitter, skipping the 2138 * collided packet. 2139 * 2140 * We *must* skip the packet to keep network running 2141 * properly. Excessive collision error is an 2142 * indication of the network overload. If we 2143 * tried sending the same packet after excessive 2144 * collision, the network would be filled with 2145 * out-of-time packets. Packets belonging 2146 * to reliable transport (such as TCP) are resent 2147 * by some upper layer. 2148 */ 2149 outb( sc->ioaddr[ FE_BMPR11 ], 2150 FE_B11_CTRL_SKIP | FE_B11_MODE1 ); 2151 2152 /* Update statistics. */ 2153 sc->tx_excolls++; 2154 } 2155 2156 /* 2157 * Handle "transmission complete" interrupt. 2158 */ 2159 if ( tstat & FE_D0_TXDONE ) { 2160 2161 /* 2162 * Add in total number of collisions on last 2163 * transmission. We also clear "collision occurred" flag 2164 * here. 2165 * 2166 * 86960 has a design flaw on collision count on multiple 2167 * packet transmission. When we send two or more packets 2168 * with one start command (that's what we do when the 2169 * transmission queue is crowded), 86960 informs us number 2170 * of collisions occurred on the last packet on the 2171 * transmission only. Number of collisions on previous 2172 * packets are lost. I have told that the fact is clearly 2173 * stated in the Fujitsu document. 2174 * 2175 * I considered not to mind it seriously. Collision 2176 * count is not so important, anyway. Any comments? FIXME. 2177 */ 2178 2179 if ( inb( sc->ioaddr[ FE_DLCR0 ] ) & FE_D0_COLLID ) { 2180 2181 /* Clear collision flag. */ 2182 outb( sc->ioaddr[ FE_DLCR0 ], FE_D0_COLLID ); 2183 2184 /* Extract collision count from 86960. */ 2185 col = inb( sc->ioaddr[ FE_DLCR4 ] ); 2186 col = ( col & FE_D4_COL ) >> FE_D4_COL_SHIFT; 2187 if ( col == 0 ) { 2188 /* 2189 * Status register indicates collisions, 2190 * while the collision count is zero. 2191 * This can happen after multiple packet 2192 * transmission, indicating that one or more 2193 * previous packet(s) had been collided. 2194 * 2195 * Since the accurate number of collisions 2196 * has been lost, we just guess it as 1; 2197 * Am I too optimistic? FIXME. 2198 */ 2199 col = 1; 2200 } 2201 sc->sc_if.if_collisions += col;
| 3304 /* 3305 * Clear the collision flag (in 86960) here 3306 * to avoid confusing statistics. 3307 */ 3308 outb( sc->ioaddr[ FE_DLCR0 ], FE_D0_COLLID ); 3309 3310 /* 3311 * Restart transmitter, skipping the 3312 * collided packet. 3313 * 3314 * We *must* skip the packet to keep network running 3315 * properly. Excessive collision error is an 3316 * indication of the network overload. If we 3317 * tried sending the same packet after excessive 3318 * collision, the network would be filled with 3319 * out-of-time packets. Packets belonging 3320 * to reliable transport (such as TCP) are resent 3321 * by some upper layer. 3322 */ 3323 outb( sc->ioaddr[ FE_BMPR11 ], 3324 FE_B11_CTRL_SKIP | FE_B11_MODE1 ); 3325 3326 /* Update statistics. */ 3327 sc->tx_excolls++; 3328 } 3329 3330 /* 3331 * Handle "transmission complete" interrupt. 3332 */ 3333 if ( tstat & FE_D0_TXDONE ) { 3334 3335 /* 3336 * Add in total number of collisions on last 3337 * transmission. We also clear "collision occurred" flag 3338 * here. 3339 * 3340 * 86960 has a design flaw on collision count on multiple 3341 * packet transmission. When we send two or more packets 3342 * with one start command (that's what we do when the 3343 * transmission queue is crowded), 86960 informs us number 3344 * of collisions occurred on the last packet on the 3345 * transmission only. Number of collisions on previous 3346 * packets are lost. I have told that the fact is clearly 3347 * stated in the Fujitsu document. 3348 * 3349 * I considered not to mind it seriously. Collision 3350 * count is not so important, anyway. Any comments? FIXME. 3351 */ 3352 3353 if ( inb( sc->ioaddr[ FE_DLCR0 ] ) & FE_D0_COLLID ) { 3354 3355 /* Clear collision flag. */ 3356 outb( sc->ioaddr[ FE_DLCR0 ], FE_D0_COLLID ); 3357 3358 /* Extract collision count from 86960. */ 3359 col = inb( sc->ioaddr[ FE_DLCR4 ] ); 3360 col = ( col & FE_D4_COL ) >> FE_D4_COL_SHIFT; 3361 if ( col == 0 ) { 3362 /* 3363 * Status register indicates collisions, 3364 * while the collision count is zero. 3365 * This can happen after multiple packet 3366 * transmission, indicating that one or more 3367 * previous packet(s) had been collided. 3368 * 3369 * Since the accurate number of collisions 3370 * has been lost, we just guess it as 1; 3371 * Am I too optimistic? FIXME. 3372 */ 3373 col = 1; 3374 } 3375 sc->sc_if.if_collisions += col;
|
2202#if FE_DEBUG >= 3 2203 log( LOG_WARNING, "fe%d: %d collision(s) (%d)\n", 2204 sc->sc_unit, col, sc->txb_sched ); 2205#endif
| 3376 if ( col == 1 ) { 3377 sc->mibdata.dot3StatsSingleCollisionFrames++; 3378 } else { 3379 sc->mibdata.dot3StatsMultipleCollisionFrames++; 3380 } 3381 sc->mibdata.dot3StatsCollFrequencies[col-1]++;
|
2206 } 2207 2208 /* 2209 * Update transmission statistics. 2210 * Be sure to reflect number of excessive collisions. 2211 */
| 3382 } 3383 3384 /* 3385 * Update transmission statistics. 3386 * Be sure to reflect number of excessive collisions. 3387 */
|
2212 sc->sc_if.if_opackets += sc->txb_sched - sc->tx_excolls; 2213 sc->sc_if.if_oerrors += sc->tx_excolls; 2214 sc->sc_if.if_collisions += sc->tx_excolls * 16;
| 3388 col = sc->tx_excolls; 3389 sc->sc_if.if_opackets += sc->txb_sched - col; 3390 sc->sc_if.if_oerrors += col; 3391 sc->sc_if.if_collisions += col * 16; 3392 sc->mibdata.dot3StatsExcessiveCollisions += col; 3393 sc->mibdata.dot3StatsCollFrequencies[15] += col;
|
2215 sc->txb_sched = 0; 2216 2217 /* 2218 * The transmitter is no more active. 2219 * Reset output active flag and watchdog timer. 2220 */ 2221 sc->sc_if.if_flags &= ~IFF_OACTIVE; 2222 sc->sc_if.if_timer = 0; 2223 2224 /* 2225 * If more data is ready to transmit in the buffer, start 2226 * transmitting them. Otherwise keep transmitter idle, 2227 * even if more data is queued. This gives receive 2228 * process a slight priority. 2229 */ 2230 if ( sc->txb_count > 0 ) fe_xmit( sc ); 2231 } 2232} 2233 2234/* 2235 * Ethernet interface receiver interrupt. 2236 */ 2237static void 2238fe_rint ( struct fe_softc * sc, u_char rstat ) 2239{ 2240 u_short len; 2241 u_char status; 2242 int i; 2243 2244 /* 2245 * Update statistics if this interrupt is caused by an error.
| 3394 sc->txb_sched = 0; 3395 3396 /* 3397 * The transmitter is no more active. 3398 * Reset output active flag and watchdog timer. 3399 */ 3400 sc->sc_if.if_flags &= ~IFF_OACTIVE; 3401 sc->sc_if.if_timer = 0; 3402 3403 /* 3404 * If more data is ready to transmit in the buffer, start 3405 * transmitting them. Otherwise keep transmitter idle, 3406 * even if more data is queued. This gives receive 3407 * process a slight priority. 3408 */ 3409 if ( sc->txb_count > 0 ) fe_xmit( sc ); 3410 } 3411} 3412 3413/* 3414 * Ethernet interface receiver interrupt. 3415 */ 3416static void 3417fe_rint ( struct fe_softc * sc, u_char rstat ) 3418{ 3419 u_short len; 3420 u_char status; 3421 int i; 3422 3423 /* 3424 * Update statistics if this interrupt is caused by an error.
|
| 3425 * Note that, when the system was not sufficiently fast, the 3426 * receive interrupt might not be acknowledged immediately. If 3427 * one or more errornous frames were received before this routine 3428 * was scheduled, they are ignored, and the following error stats 3429 * give less than real values.
|
2246 */ 2247 if ( rstat & ( FE_D1_OVRFLO | FE_D1_CRCERR 2248 | FE_D1_ALGERR | FE_D1_SRTPKT ) ) {
| 3430 */ 3431 if ( rstat & ( FE_D1_OVRFLO | FE_D1_CRCERR 3432 | FE_D1_ALGERR | FE_D1_SRTPKT ) ) {
|
2249#if FE_DEBUG >= 2 2250 log( LOG_WARNING, 2251 "fe%d: receive error: %s%s%s%s(%02x)\n", 2252 sc->sc_unit, 2253 rstat & FE_D1_OVRFLO ? "OVR " : "", 2254 rstat & FE_D1_CRCERR ? "CRC " : "", 2255 rstat & FE_D1_ALGERR ? "ALG " : "", 2256 rstat & FE_D1_SRTPKT ? "LEN " : "", 2257 rstat );
| 3433 if ( rstat & FE_D1_OVRFLO ) 3434 sc->mibdata.dot3StatsInternalMacReceiveErrors++; 3435 if ( rstat & FE_D1_CRCERR ) 3436 sc->mibdata.dot3StatsFCSErrors++; 3437 if ( rstat & FE_D1_ALGERR ) 3438 sc->mibdata.dot3StatsAlignmentErrors++; 3439#if 0 3440 /* The reference MAC receiver defined in 802.3 3441 silently ignores short frames (RUNTs) without 3442 notifying upper layer. RFC 1650 (dot3 MIB) is 3443 based on the 802.3, and it has no stats entry for 3444 RUNTs... */ 3445 if ( rstat & FE_D1_SRTPKT ) 3446 sc->mibdata.dot3StatsFrameTooShorts++; /* :-) */
|
2258#endif 2259 sc->sc_if.if_ierrors++; 2260 } 2261 2262 /* 2263 * MB86960 has a flag indicating "receive queue empty." 2264 * We just loop, checking the flag, to pull out all received 2265 * packets. 2266 * 2267 * We limit the number of iterations to avoid infinite-loop. 2268 * The upper bound is set to unrealistic high value. 2269 */
| 3447#endif 3448 sc->sc_if.if_ierrors++; 3449 } 3450 3451 /* 3452 * MB86960 has a flag indicating "receive queue empty." 3453 * We just loop, checking the flag, to pull out all received 3454 * packets. 3455 * 3456 * We limit the number of iterations to avoid infinite-loop. 3457 * The upper bound is set to unrealistic high value. 3458 */
|
2270 for (i = 0; i < FE_MAX_RECV_COUNT * 2; i++) {
| 3459 for ( i = 0; i < FE_MAX_RECV_COUNT * 2; i++ ) {
|
2271 2272 /* Stop the iteration if 86960 indicates no packets. */
| 3460 3461 /* Stop the iteration if 86960 indicates no packets. */
|
2273 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) break;
| 3462 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) return;
|
2274 2275 /*
| 3463 3464 /*
|
2276 * Extract A receive status byte.
| 3465 * Extract a receive status byte.
|
2277 * As our 86960 is in 16 bit bus access mode, we have to 2278 * use inw() to get the status byte. The significant 2279 * value is returned in lower 8 bits. 2280 */
| 3466 * As our 86960 is in 16 bit bus access mode, we have to 3467 * use inw() to get the status byte. The significant 3468 * value is returned in lower 8 bits. 3469 */
|
2281 status = ( u_char )inw( sc->ioaddr[ FE_BMPR8 ] ); 2282#if FE_DEBUG >= 4 2283 log( LOG_INFO, "fe%d: receive status = %04x\n", 2284 sc->sc_unit, status );
| 3470#ifdef FE_8BIT_SUPPORT 3471 if ((sc->proto_dlcr6 & FE_D6_BBW) == FE_D6_BBW_BYTE) 3472 { 3473 status = inb( sc->ioaddr[ FE_BMPR8 ] ); 3474 ( void ) inb( sc->ioaddr[ FE_BMPR8 ] ); 3475 } 3476 else
|
2285#endif
| 3477#endif
|
| 3478 { 3479 status = ( u_char )inw( sc->ioaddr[ FE_BMPR8 ] ); 3480 }
|
2286 2287 /* 2288 * Extract the packet length. 2289 * It is a sum of a header (14 bytes) and a payload. 2290 * CRC has been stripped off by the 86960. 2291 */
| 3481 3482 /* 3483 * Extract the packet length. 3484 * It is a sum of a header (14 bytes) and a payload. 3485 * CRC has been stripped off by the 86960. 3486 */
|
2292 len = inw( sc->ioaddr[ FE_BMPR8 ] ); 2293 2294#if FE_DEBUG >= 1 2295 /* 2296 * If there was an error with the received packet, it 2297 * must be an indication of out-of-sync on receive 2298 * buffer, because we have programmed the 8696x to 2299 * to discard errored packets, even when the interface 2300 * is in promiscuous mode. We have to re-synchronize. 2301 */ 2302 if (!(status & FE_RPH_GOOD)) { 2303 log(LOG_ERR, 2304 "fe%d: corrupted receive status byte (%02x)\n", 2305 sc->arpcom.ac_if.if_unit, status); 2306 sc->arpcom.ac_if.if_ierrors++; 2307 fe_emptybuffer( sc ); 2308 break;
| 3487#ifdef FE_8BIT_SUPPORT 3488 if ((sc->proto_dlcr6 & FE_D6_BBW) == FE_D6_BBW_BYTE) 3489 { 3490 len = inb( sc->ioaddr[ FE_BMPR8 ] ); 3491 len |= ( inb( sc->ioaddr[ FE_BMPR8 ] ) << 8 );
|
2309 }
| 3492 }
|
| 3493 else
|
2310#endif
| 3494#endif
|
| 3495 { 3496 len = inw( sc->ioaddr[ FE_BMPR8 ] ); 3497 }
|
2311
| 3498
|
2312#if FE_DEBUG >= 1
| |
2313 /*
| 3499 /*
|
2314 * MB86960 checks the packet length and drop big packet 2315 * before passing it to us. There are no chance we can 2316 * get big packets through it, even if they are actually 2317 * sent over a line. Hence, if the length exceeds 2318 * the specified limit, it means some serious failure, 2319 * such as out-of-sync on receive buffer management. 2320 * 2321 * Same for short packets, since we have programmed 2322 * 86960 to drop short packets.
| 3500 * AS our 86960 is programed to ignore errored frame, 3501 * we must not see any error indication in the 3502 * receive buffer. So, any error condition is a 3503 * serious error, e.g., out-of-sync of the receive 3504 * buffer pointers.
|
2323 */
| 3505 */
|
2324 if ( len > ETHER_MAX_LEN - ETHER_CRC_LEN 2325 || len < ETHER_MIN_LEN - ETHER_CRC_LEN ) { 2326 log( LOG_WARNING, 2327 "fe%d: received a %s packet? (%u bytes)\n", 2328 sc->sc_unit, 2329 len < ETHER_MIN_LEN - ETHER_CRC_LEN 2330 ? "partial" : "big", 2331 len );
| 3506 if ( ( status & 0xF0 ) != 0x20 3507 || len > ETHER_MAX_LEN - ETHER_CRC_LEN 3508 || len < ETHER_MIN_LEN - ETHER_CRC_LEN ) { 3509 printf("fe%d: RX buffer out-of-sync\n", sc->sc_unit);
|
2332 sc->sc_if.if_ierrors++;
| 3510 sc->sc_if.if_ierrors++;
|
2333 fe_emptybuffer( sc ); 2334 break;
| 3511 sc->mibdata.dot3StatsInternalMacReceiveErrors++; 3512 fe_reset(sc); 3513 return;
|
2335 }
| 3514 }
|
2336#endif
| |
2337 2338 /* 2339 * Go get a packet. 2340 */ 2341 if ( fe_get_packet( sc, len ) < 0 ) {
| 3515 3516 /* 3517 * Go get a packet. 3518 */ 3519 if ( fe_get_packet( sc, len ) < 0 ) {
|
2342 2343#if FE_DEBUG >= 2 2344 log( LOG_WARNING, "%s%d: out of mbuf;" 2345 " dropping a packet (%u bytes)\n", 2346 sc->sc_unit, len ); 2347#endif 2348 2349 /* Skip a packet, updating statistics. */ 2350 sc->sc_if.if_ierrors++; 2351 fe_droppacket( sc, len ); 2352
| |
2353 /*
| 3520 /*
|
2354 * Try extracting other packets, although they will 2355 * cause out-of-mbuf error again. This is required 2356 * to keep receiver interrupt comming. 2357 * (Earlier versions had a bug on this point.)
| 3521 * Negative return from fe_get_packet() 3522 * indicates no available mbuf. We stop 3523 * receiving packets, even if there are more 3524 * in the buffer. We hope we can get more 3525 * mbuf next time.
|
2358 */
| 3526 */
|
2359 continue;
| 3527 sc->sc_if.if_ierrors++; 3528 sc->mibdata.dot3StatsMissedFrames++; 3529 fe_droppacket( sc, len ); 3530 return;
|
2360 } 2361 2362 /* Successfully received a packet. Update stat. */ 2363 sc->sc_if.if_ipackets++; 2364 }
| 3531 } 3532 3533 /* Successfully received a packet. Update stat. */ 3534 sc->sc_if.if_ipackets++; 3535 }
|
| 3536 3537 /* Maximum number of frames has been received. Something 3538 strange is happening here... */ 3539 printf("fe%d: unusual receive flood\n", sc->sc_unit); 3540 sc->mibdata.dot3StatsInternalMacReceiveErrors++; 3541 fe_reset(sc);
|
2365} 2366 2367/* 2368 * Ethernet interface interrupt processor 2369 */ 2370static void 2371feintr ( int unit ) 2372{ 2373 struct fe_softc *sc = &fe_softc[unit]; 2374 u_char tstat, rstat;
| 3542} 3543 3544/* 3545 * Ethernet interface interrupt processor 3546 */ 3547static void 3548feintr ( int unit ) 3549{ 3550 struct fe_softc *sc = &fe_softc[unit]; 3551 u_char tstat, rstat;
|
| 3552 int loop_count = FE_MAX_LOOP;
|
2375
| 3553
|
2376 /* 2377 * Loop until there are no more new interrupt conditions. 2378 */ 2379 for (;;) { 2380 2381#if FE_DEBUG >= 4 2382 fe_dump( LOG_INFO, sc, "intr()" ); 2383#endif 2384
| 3554 /* Loop until there are no more new interrupt conditions. */ 3555 while (loop_count-- > 0) {
|
2385 /* 2386 * Get interrupt conditions, masking unneeded flags. 2387 */ 2388 tstat = inb( sc->ioaddr[ FE_DLCR0 ] ) & FE_TMASK; 2389 rstat = inb( sc->ioaddr[ FE_DLCR1 ] ) & FE_RMASK;
| 3556 /* 3557 * Get interrupt conditions, masking unneeded flags. 3558 */ 3559 tstat = inb( sc->ioaddr[ FE_DLCR0 ] ) & FE_TMASK; 3560 rstat = inb( sc->ioaddr[ FE_DLCR1 ] ) & FE_RMASK;
|
| 3561 if ( tstat == 0 && rstat == 0 ) return;
|
2390
| 3562
|
2391#if FE_DEBUG >= 1 2392 /* Test for a "dead-lock" condition. */ 2393 if ((rstat & FE_D1_PKTRDY) == 0 2394 && (inb(sc->ioaddr[FE_DLCR5]) & FE_D5_BUFEMP) == 0 2395 && (inb(sc->ioaddr[FE_DLCR1]) & FE_D1_PKTRDY) == 0) { 2396 /* 2397 * PKTRDY is off, while receive buffer is not empty. 2398 * We did a double check to avoid a race condition... 2399 * So, we should have missed an interrupt. 2400 */ 2401 log(LOG_WARNING, 2402 "fe%d: missed a receiver interrupt?\n", 2403 sc->arpcom.ac_if.if_unit); 2404 /* Simulate the missed interrupt condition. */ 2405 rstat |= FE_D1_PKTRDY; 2406 } 2407#endif 2408 2409 /* Stop processing if there are no interrupts to handle. */ 2410 if ( tstat == 0 && rstat == 0 ) break; 2411
| |
2412 /* 2413 * Reset the conditions we are acknowledging. 2414 */ 2415 outb( sc->ioaddr[ FE_DLCR0 ], tstat ); 2416 outb( sc->ioaddr[ FE_DLCR1 ], rstat ); 2417 2418 /*
| 3563 /* 3564 * Reset the conditions we are acknowledging. 3565 */ 3566 outb( sc->ioaddr[ FE_DLCR0 ], tstat ); 3567 outb( sc->ioaddr[ FE_DLCR1 ], rstat ); 3568 3569 /*
|
2419 * Handle transmitter interrupts. Handle these first because 2420 * the receiver will reset the board under some conditions.
| 3570 * Handle transmitter interrupts.
|
2421 */ 2422 if ( tstat ) { 2423 fe_tint( sc, tstat ); 2424 } 2425 2426 /* 2427 * Handle receiver interrupts 2428 */ 2429 if ( rstat ) { 2430 fe_rint( sc, rstat ); 2431 } 2432 2433 /* 2434 * Update the multicast address filter if it is 2435 * needed and possible. We do it now, because 2436 * we can make sure the transmission buffer is empty, 2437 * and there is a good chance that the receive queue 2438 * is empty. It will minimize the possibility of 2439 * packet loss. 2440 */ 2441 if ( sc->filter_change 2442 && sc->txb_count == 0 && sc->txb_sched == 0 ) { 2443 fe_loadmar(sc); 2444 sc->sc_if.if_flags &= ~IFF_OACTIVE; 2445 } 2446 2447 /* 2448 * If it looks like the transmitter can take more data, 2449 * attempt to start output on the interface. This is done 2450 * after handling the receiver interrupt to give the 2451 * receive operation priority. 2452 * 2453 * BTW, I'm not sure in what case the OACTIVE is on at 2454 * this point. Is the following test redundant? 2455 * 2456 * No. This routine polls for both transmitter and 2457 * receiver interrupts. 86960 can raise a receiver 2458 * interrupt when the transmission buffer is full. 2459 */ 2460 if ( ( sc->sc_if.if_flags & IFF_OACTIVE ) == 0 ) { 2461 fe_start( &sc->sc_if ); 2462 } 2463 2464 }
| 3571 */ 3572 if ( tstat ) { 3573 fe_tint( sc, tstat ); 3574 } 3575 3576 /* 3577 * Handle receiver interrupts 3578 */ 3579 if ( rstat ) { 3580 fe_rint( sc, rstat ); 3581 } 3582 3583 /* 3584 * Update the multicast address filter if it is 3585 * needed and possible. We do it now, because 3586 * we can make sure the transmission buffer is empty, 3587 * and there is a good chance that the receive queue 3588 * is empty. It will minimize the possibility of 3589 * packet loss. 3590 */ 3591 if ( sc->filter_change 3592 && sc->txb_count == 0 && sc->txb_sched == 0 ) { 3593 fe_loadmar(sc); 3594 sc->sc_if.if_flags &= ~IFF_OACTIVE; 3595 } 3596 3597 /* 3598 * If it looks like the transmitter can take more data, 3599 * attempt to start output on the interface. This is done 3600 * after handling the receiver interrupt to give the 3601 * receive operation priority. 3602 * 3603 * BTW, I'm not sure in what case the OACTIVE is on at 3604 * this point. Is the following test redundant? 3605 * 3606 * No. This routine polls for both transmitter and 3607 * receiver interrupts. 86960 can raise a receiver 3608 * interrupt when the transmission buffer is full. 3609 */ 3610 if ( ( sc->sc_if.if_flags & IFF_OACTIVE ) == 0 ) { 3611 fe_start( &sc->sc_if ); 3612 } 3613 3614 }
|
| 3615 3616 printf("fe%d: too many loops\n", sc->sc_unit); 3617 return;
|
2465} 2466 2467/* 2468 * Process an ioctl request. This code needs some work - it looks 2469 * pretty ugly. 2470 */ 2471static int 2472fe_ioctl ( struct ifnet * ifp, u_long command, caddr_t data ) 2473{ 2474 struct fe_softc *sc = ifp->if_softc;
| 3618} 3619 3620/* 3621 * Process an ioctl request. This code needs some work - it looks 3622 * pretty ugly. 3623 */ 3624static int 3625fe_ioctl ( struct ifnet * ifp, u_long command, caddr_t data ) 3626{ 3627 struct fe_softc *sc = ifp->if_softc;
|
| 3628 struct ifreq *ifr = (struct ifreq *)data;
|
2475 int s, error = 0; 2476
| 3629 int s, error = 0; 3630
|
2477#if FE_DEBUG >= 3 2478 log( LOG_INFO, "fe%d: ioctl(%x)\n", sc->sc_unit, command ); 2479#endif 2480
| |
2481 s = splimp(); 2482 2483 switch (command) { 2484 2485 case SIOCSIFADDR:
| 3631 s = splimp(); 3632 3633 switch (command) { 3634 3635 case SIOCSIFADDR:
|
2486 { 2487 struct ifaddr * ifa = ( struct ifaddr * )data; 2488 2489 sc->sc_if.if_flags |= IFF_UP; 2490 2491 switch (ifa->ifa_addr->sa_family) { 2492#ifdef INET 2493 case AF_INET: 2494 fe_init( sc->sc_unit ); /* before arp_ifinit */ 2495 arp_ifinit( &sc->arpcom, ifa ); 2496 break; 2497#endif 2498#ifdef IPX 2499 /* 2500 * XXX - This code is probably wrong 2501 */ 2502 case AF_IPX: 2503 { 2504 register struct ipx_addr *ina 2505 = &(IA_SIPX(ifa)->sipx_addr); 2506 2507 if (ipx_nullhost(*ina)) 2508 ina->x_host = 2509 *(union ipx_host *) (sc->sc_enaddr); else { 2510 bcopy((caddr_t) ina->x_host.c_host, 2511 (caddr_t) sc->sc_enaddr, 2512 sizeof(sc->sc_enaddr)); 2513 } 2514 2515 /* 2516 * Set new address 2517 */ 2518 fe_init(sc->sc_unit); 2519 break; 2520 } 2521#endif 2522#ifdef INET6 2523 case AF_INET6: 2524 /* IPV6 added by shin 96.2.6 */ 2525 fe_init(sc->sc_unit); 2526 ndp6_ifinit(&sc->arpcom, ifa); 2527 break; 2528#endif 2529#ifdef NS 2530 2531 /* 2532 * XXX - This code is probably wrong 2533 */ 2534 case AF_NS: 2535 { 2536 register struct ns_addr *ina 2537 = &(IA_SNS(ifa)->sns_addr); 2538 2539 if (ns_nullhost(*ina)) 2540 ina->x_host = 2541 *(union ns_host *) (sc->sc_enaddr); 2542 else { 2543 bcopy((caddr_t) ina->x_host.c_host, 2544 (caddr_t) sc->sc_enaddr, 2545 sizeof(sc->sc_enaddr)); 2546 } 2547 2548 /* 2549 * Set new address 2550 */ 2551 fe_init(sc->sc_unit); 2552 break; 2553 } 2554#endif 2555 default: 2556 fe_init( sc->sc_unit ); 2557 break; 2558 } 2559 break; 2560 } 2561 2562#ifdef SIOCGIFADDR
| |
2563 case SIOCGIFADDR:
| 3636 case SIOCGIFADDR:
|
2564 { 2565 struct ifreq * ifr = ( struct ifreq * )data; 2566 struct sockaddr * sa = ( struct sockaddr * )&ifr->ifr_data; 2567 2568 bcopy((caddr_t)sc->sc_enaddr, 2569 (caddr_t)sa->sa_data, ETHER_ADDR_LEN);
| 3637 case SIOCSIFMTU: 3638 /* Just an ordinary action. */ 3639 error = ether_ioctl(ifp, command, data);
|
2570 break;
| 3640 break;
|
2571 } 2572#endif
| |
2573
| 3641
|
2574#ifdef SIOCGIFPHYSADDR 2575 case SIOCGIFPHYSADDR: 2576 { 2577 struct ifreq * ifr = ( struct ifreq * )data; 2578 2579 bcopy((caddr_t)sc->sc_enaddr, 2580 (caddr_t)&ifr->ifr_data, ETHER_ADDR_LEN); 2581 break; 2582 } 2583#endif 2584 2585#ifdef notdef 2586#ifdef SIOCSIFPHYSADDR 2587 case SIOCSIFPHYSADDR: 2588 { 2589 /* 2590 * Set the physical (Ethernet) address of the interface. 2591 * When and by whom is this command used? FIXME. 2592 */ 2593 struct ifreq * ifr = ( struct ifreq * )data; 2594 2595 bcopy((caddr_t)&ifr->ifr_data, 2596 (caddr_t)sc->sc_enaddr, ETHER_ADDR_LEN); 2597 fe_setlinkaddr( sc ); 2598 break; 2599 } 2600#endif 2601#endif /* notdef */ 2602 2603#ifdef SIOCSIFFLAGS
| |
2604 case SIOCSIFFLAGS:
| 3642 case SIOCSIFFLAGS:
|
2605 {
| |
2606 /* 2607 * Switch interface state between "running" and 2608 * "stopped", reflecting the UP flag. 2609 */ 2610 if ( sc->sc_if.if_flags & IFF_UP ) { 2611 if ( ( sc->sc_if.if_flags & IFF_RUNNING ) == 0 ) {
| 3643 /* 3644 * Switch interface state between "running" and 3645 * "stopped", reflecting the UP flag. 3646 */ 3647 if ( sc->sc_if.if_flags & IFF_UP ) { 3648 if ( ( sc->sc_if.if_flags & IFF_RUNNING ) == 0 ) {
|
2612 fe_init( sc->sc_unit );
| 3649 fe_init(sc);
|
2613 } 2614 } else { 2615 if ( ( sc->sc_if.if_flags & IFF_RUNNING ) != 0 ) {
| 3650 } 3651 } else { 3652 if ( ( sc->sc_if.if_flags & IFF_RUNNING ) != 0 ) {
|
2616 fe_stop( sc->sc_unit );
| 3653 fe_stop(sc);
|
2617 } 2618 } 2619 2620 /* 2621 * Promiscuous and/or multicast flags may have changed, 2622 * so reprogram the multicast filter and/or receive mode. 2623 */ 2624 fe_setmode( sc ); 2625
| 3654 } 3655 } 3656 3657 /* 3658 * Promiscuous and/or multicast flags may have changed, 3659 * so reprogram the multicast filter and/or receive mode. 3660 */ 3661 fe_setmode( sc ); 3662
|
2626#if FE_DEBUG >= 1 2627 /* "ifconfig fe0 debug" to print register dump. */ 2628 if ( sc->sc_if.if_flags & IFF_DEBUG ) { 2629 fe_dump( LOG_DEBUG, sc, "SIOCSIFFLAGS(DEBUG)" ); 2630 } 2631#endif
| 3663 /* Done. */
|
2632 break;
| 3664 break;
|
2633 } 2634#endif
| |
2635
| 3665
|
2636#ifdef SIOCADDMULTI
| |
2637 case SIOCADDMULTI: 2638 case SIOCDELMULTI:
| 3666 case SIOCADDMULTI: 3667 case SIOCDELMULTI:
|
2639 /* 2640 * Multicast list has changed; set the hardware filter 2641 * accordingly. 2642 */ 2643 fe_setmode( sc ); 2644 error = 0; 2645 break; 2646#endif 2647 2648#ifdef SIOCSIFMTU 2649 case SIOCSIFMTU: 2650 {
| |
2651 /*
| 3668 /*
|
2652 * Set the interface MTU.
| 3669 * Multicast list has changed; set the hardware filter 3670 * accordingly.
|
2653 */
| 3671 */
|
2654 struct ifreq * ifr = ( struct ifreq * )data;
| 3672 fe_setmode( sc ); 3673 break;
|
2655
| 3674
|
2656 if ( ifr->ifr_mtu > ETHERMTU ) { 2657 error = EINVAL; 2658 } else { 2659 sc->sc_if.if_mtu = ifr->ifr_mtu; 2660 }
| 3675 case SIOCSIFMEDIA: 3676 case SIOCGIFMEDIA: 3677 /* Let if_media to handle these commands and to call 3678 us back. */ 3679 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
|
2661 break;
| 3680 break;
|
2662 } 2663#endif
| |
2664 2665 default: 2666 error = EINVAL;
| 3681 3682 default: 3683 error = EINVAL;
|
| 3684 break;
|
2667 } 2668 2669 (void) splx(s); 2670 return (error); 2671} 2672 2673/* 2674 * Retrieve packet from receive buffer and send to the next level up via 2675 * ether_input(). If there is a BPF listener, give a copy to BPF, too. 2676 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure). 2677 */ 2678static int 2679fe_get_packet ( struct fe_softc * sc, u_short len ) 2680{ 2681 struct ether_header *eh; 2682 struct mbuf *m; 2683 2684 /* 2685 * NFS wants the data be aligned to the word (4 byte) 2686 * boundary. Ethernet header has 14 bytes. There is a 2687 * 2-byte gap. 2688 */ 2689#define NFS_MAGIC_OFFSET 2 2690 2691 /* 2692 * This function assumes that an Ethernet packet fits in an 2693 * mbuf (with a cluster attached when necessary.) On FreeBSD 2694 * 2.0 for x86, which is the primary target of this driver, an 2695 * mbuf cluster has 4096 bytes, and we are happy. On ancient 2696 * BSDs, such as vanilla 4.3 for 386, a cluster size was 1024, 2697 * however. If the following #error message were printed upon 2698 * compile, you need to rewrite this function. 2699 */ 2700#if ( MCLBYTES < ETHER_MAX_LEN - ETHER_CRC_LEN + NFS_MAGIC_OFFSET ) 2701#error "Too small MCLBYTES to use fe driver." 2702#endif 2703 2704 /* 2705 * Our strategy has one more problem. There is a policy on 2706 * mbuf cluster allocation. It says that we must have at 2707 * least MINCLSIZE (208 bytes on FreeBSD 2.0 for x86) to 2708 * allocate a cluster. For a packet of a size between 2709 * (MHLEN - 2) to (MINCLSIZE - 2), our code violates the rule... 2710 * On the other hand, the current code is short, simple, 2711 * and fast, however. It does no harmful thing, just waists 2712 * some memory. Any comments? FIXME. 2713 */ 2714 2715 /* Allocate an mbuf with packet header info. */ 2716 MGETHDR(m, M_DONTWAIT, MT_DATA); 2717 if ( m == NULL ) return -1; 2718 2719 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */ 2720 if ( len > MHLEN - NFS_MAGIC_OFFSET ) { 2721 MCLGET( m, M_DONTWAIT ); 2722 if ( !( m->m_flags & M_EXT ) ) { 2723 m_freem( m ); 2724 return -1; 2725 } 2726 } 2727 2728 /* Initialize packet header info. */ 2729 m->m_pkthdr.rcvif = &sc->sc_if; 2730 m->m_pkthdr.len = len; 2731 2732 /* Set the length of this packet. */ 2733 m->m_len = len; 2734 2735 /* The following silliness is to make NFS happy */ 2736 m->m_data += NFS_MAGIC_OFFSET; 2737
| 3685 } 3686 3687 (void) splx(s); 3688 return (error); 3689} 3690 3691/* 3692 * Retrieve packet from receive buffer and send to the next level up via 3693 * ether_input(). If there is a BPF listener, give a copy to BPF, too. 3694 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure). 3695 */ 3696static int 3697fe_get_packet ( struct fe_softc * sc, u_short len ) 3698{ 3699 struct ether_header *eh; 3700 struct mbuf *m; 3701 3702 /* 3703 * NFS wants the data be aligned to the word (4 byte) 3704 * boundary. Ethernet header has 14 bytes. There is a 3705 * 2-byte gap. 3706 */ 3707#define NFS_MAGIC_OFFSET 2 3708 3709 /* 3710 * This function assumes that an Ethernet packet fits in an 3711 * mbuf (with a cluster attached when necessary.) On FreeBSD 3712 * 2.0 for x86, which is the primary target of this driver, an 3713 * mbuf cluster has 4096 bytes, and we are happy. On ancient 3714 * BSDs, such as vanilla 4.3 for 386, a cluster size was 1024, 3715 * however. If the following #error message were printed upon 3716 * compile, you need to rewrite this function. 3717 */ 3718#if ( MCLBYTES < ETHER_MAX_LEN - ETHER_CRC_LEN + NFS_MAGIC_OFFSET ) 3719#error "Too small MCLBYTES to use fe driver." 3720#endif 3721 3722 /* 3723 * Our strategy has one more problem. There is a policy on 3724 * mbuf cluster allocation. It says that we must have at 3725 * least MINCLSIZE (208 bytes on FreeBSD 2.0 for x86) to 3726 * allocate a cluster. For a packet of a size between 3727 * (MHLEN - 2) to (MINCLSIZE - 2), our code violates the rule... 3728 * On the other hand, the current code is short, simple, 3729 * and fast, however. It does no harmful thing, just waists 3730 * some memory. Any comments? FIXME. 3731 */ 3732 3733 /* Allocate an mbuf with packet header info. */ 3734 MGETHDR(m, M_DONTWAIT, MT_DATA); 3735 if ( m == NULL ) return -1; 3736 3737 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */ 3738 if ( len > MHLEN - NFS_MAGIC_OFFSET ) { 3739 MCLGET( m, M_DONTWAIT ); 3740 if ( !( m->m_flags & M_EXT ) ) { 3741 m_freem( m ); 3742 return -1; 3743 } 3744 } 3745 3746 /* Initialize packet header info. */ 3747 m->m_pkthdr.rcvif = &sc->sc_if; 3748 m->m_pkthdr.len = len; 3749 3750 /* Set the length of this packet. */ 3751 m->m_len = len; 3752 3753 /* The following silliness is to make NFS happy */ 3754 m->m_data += NFS_MAGIC_OFFSET; 3755
|
2738 /* Get a packet. */ 2739 insw( sc->ioaddr[ FE_BMPR8 ], m->m_data, ( len + 1 ) >> 1 ); 2740
| |
2741 /* Get (actually just point to) the header part. */
| 3756 /* Get (actually just point to) the header part. */
|
2742 eh = mtod( m, struct ether_header *);
| 3757 eh = mtod(m, struct ether_header *);
|
2743
| 3758
|
| 3759 /* Get a packet. */ 3760#ifdef FE_8BIT_SUPPORT 3761 if ((sc->proto_dlcr6 & FE_D6_BBW) == FE_D6_BBW_BYTE) 3762 { 3763 insb( sc->ioaddr[ FE_BMPR8 ], eh, len ); 3764 } 3765 else 3766#endif 3767 { 3768 insw( sc->ioaddr[ FE_BMPR8 ], eh, ( len + 1 ) >> 1 ); 3769 } 3770
|
2744#define ETHER_ADDR_IS_MULTICAST(A) (*(char *)(A) & 1) 2745 2746#if NBPFILTER > 0 2747 /* 2748 * Check if there's a BPF listener on this interface. 2749 * If it is, hand off the raw packet to bpf. 2750 */ 2751 if ( sc->sc_if.if_bpf ) { 2752 bpf_mtap( &sc->sc_if, m ); 2753 } 2754#endif 2755
| 3771#define ETHER_ADDR_IS_MULTICAST(A) (*(char *)(A) & 1) 3772 3773#if NBPFILTER > 0 3774 /* 3775 * Check if there's a BPF listener on this interface. 3776 * If it is, hand off the raw packet to bpf. 3777 */ 3778 if ( sc->sc_if.if_bpf ) { 3779 bpf_mtap( &sc->sc_if, m ); 3780 } 3781#endif 3782
|
| 3783#ifdef BRIDGE 3784 if (do_bridge) { 3785 struct ifnet *ifp; 3786 3787 ifp = bridge_in(m); 3788 if (ifp == BDG_DROP) { 3789 m_freem(m); 3790 return 0; 3791 } 3792 if (ifp != BDG_LOCAL) 3793 bdg_forward(&m, ifp); /* not local, need forwarding */ 3794 if (ifp == BDG_LOCAL || ifp == BDG_BCAST || ifp == BDG_MCAST) 3795 goto getit; 3796 /* not local and not multicast, just drop it */ 3797 if (m) 3798 m_freem(m); 3799 return 0; 3800 } 3801#endif 3802
|
2756 /* 2757 * Make sure this packet is (or may be) directed to us. 2758 * That is, the packet is either unicasted to our address, 2759 * or broad/multi-casted. If any other packets are 2760 * received, it is an indication of an error -- probably 2761 * 86960 is in a wrong operation mode. 2762 * Promiscuous mode is an exception. Under the mode, all 2763 * packets on the media must be received. (We must have 2764 * programmed the 86960 so.) 2765 */ 2766 2767 if ( ( sc->sc_if.if_flags & IFF_PROMISC ) 2768 && !ETHER_ADDR_IS_MULTICAST( eh->ether_dhost ) 2769 && bcmp( eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN ) != 0 ) { 2770 /* 2771 * The packet was not for us. This is normal since 2772 * we are now in promiscuous mode. Just drop the packet. 2773 */ 2774 m_freem( m ); 2775 return 0; 2776 } 2777
| 3803 /* 3804 * Make sure this packet is (or may be) directed to us. 3805 * That is, the packet is either unicasted to our address, 3806 * or broad/multi-casted. If any other packets are 3807 * received, it is an indication of an error -- probably 3808 * 86960 is in a wrong operation mode. 3809 * Promiscuous mode is an exception. Under the mode, all 3810 * packets on the media must be received. (We must have 3811 * programmed the 86960 so.) 3812 */ 3813 3814 if ( ( sc->sc_if.if_flags & IFF_PROMISC ) 3815 && !ETHER_ADDR_IS_MULTICAST( eh->ether_dhost ) 3816 && bcmp( eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN ) != 0 ) { 3817 /* 3818 * The packet was not for us. This is normal since 3819 * we are now in promiscuous mode. Just drop the packet. 3820 */ 3821 m_freem( m ); 3822 return 0; 3823 } 3824
|
2778#if FE_DEBUG >= 3 2779 if ( !ETHER_ADDR_IS_MULTICAST( eh->ether_dhost ) 2780 && bcmp( eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN ) != 0 ) { 2781 /* 2782 * This packet was not for us. We can't be in promiscuous 2783 * mode since the case was handled by above test. 2784 * We found an error (of this driver.) 2785 */ 2786 log( LOG_WARNING, 2787 "fe%d: got an unwanted packet, dst = %6D\n", 2788 sc->sc_unit, eh->ether_dhost , ":" ); 2789 m_freem( m ); 2790 return 0; 2791 } 2792#endif 2793
| 3825getit:
|
2794 /* Strip off the Ethernet header. */ 2795 m->m_pkthdr.len -= sizeof ( struct ether_header ); 2796 m->m_len -= sizeof ( struct ether_header ); 2797 m->m_data += sizeof ( struct ether_header ); 2798 2799 /* Feed the packet to upper layer. */ 2800 ether_input( &sc->sc_if, eh, m ); 2801 return 0; 2802} 2803 2804/* 2805 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO. 2806 * Returns number of bytes actually written, including length word. 2807 * 2808 * If an mbuf chain is too long for an Ethernet frame, it is not sent. 2809 * Packets shorter than Ethernet minimum are legal, and we pad them 2810 * before sending out. An exception is "partial" packets which are 2811 * shorter than mandatory Ethernet header. 2812 */ 2813static void 2814fe_write_mbufs ( struct fe_softc *sc, struct mbuf *m ) 2815{ 2816 u_short addr_bmpr8 = sc->ioaddr[ FE_BMPR8 ]; 2817 u_short length, len; 2818 struct mbuf *mp; 2819 u_char *data; 2820 u_short savebyte; /* WARNING: Architecture dependent! */ 2821#define NO_PENDING_BYTE 0xFFFF 2822 2823 static u_char padding [ ETHER_MIN_LEN - ETHER_CRC_LEN - ETHER_HDR_LEN ]; 2824
| 3826 /* Strip off the Ethernet header. */ 3827 m->m_pkthdr.len -= sizeof ( struct ether_header ); 3828 m->m_len -= sizeof ( struct ether_header ); 3829 m->m_data += sizeof ( struct ether_header ); 3830 3831 /* Feed the packet to upper layer. */ 3832 ether_input( &sc->sc_if, eh, m ); 3833 return 0; 3834} 3835 3836/* 3837 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO. 3838 * Returns number of bytes actually written, including length word. 3839 * 3840 * If an mbuf chain is too long for an Ethernet frame, it is not sent. 3841 * Packets shorter than Ethernet minimum are legal, and we pad them 3842 * before sending out. An exception is "partial" packets which are 3843 * shorter than mandatory Ethernet header. 3844 */ 3845static void 3846fe_write_mbufs ( struct fe_softc *sc, struct mbuf *m ) 3847{ 3848 u_short addr_bmpr8 = sc->ioaddr[ FE_BMPR8 ]; 3849 u_short length, len; 3850 struct mbuf *mp; 3851 u_char *data; 3852 u_short savebyte; /* WARNING: Architecture dependent! */ 3853#define NO_PENDING_BYTE 0xFFFF 3854 3855 static u_char padding [ ETHER_MIN_LEN - ETHER_CRC_LEN - ETHER_HDR_LEN ]; 3856
|
2825#if FE_DEBUG >= 1
| 3857#ifdef DIAGNOSTIC
|
2826 /* First, count up the total number of bytes to copy */ 2827 length = 0; 2828 for ( mp = m; mp != NULL; mp = mp->m_next ) { 2829 length += mp->m_len; 2830 }
| 3858 /* First, count up the total number of bytes to copy */ 3859 length = 0; 3860 for ( mp = m; mp != NULL; mp = mp->m_next ) { 3861 length += mp->m_len; 3862 }
|
| 3863 /* Check if this matches the one in the packet header. */ 3864 if ( length != m->m_pkthdr.len ) { 3865 printf("fe%d: packet length mismatch? (%d/%d)\n", sc->sc_unit, 3866 length, m->m_pkthdr.len); 3867 }
|
2831#else 2832 /* Just use the length value in the packet header. */ 2833 length = m->m_pkthdr.len; 2834#endif 2835
| 3868#else 3869 /* Just use the length value in the packet header. */ 3870 length = m->m_pkthdr.len; 3871#endif 3872
|
2836#if FE_DEBUG >= 2 2837 /* Check if this matches the one in the packet header. */ 2838 if ( length != m->m_pkthdr.len ) { 2839 log( LOG_WARNING, "fe%d: packet length mismatch? (%d/%d)\n", 2840 sc->sc_unit, length, m->m_pkthdr.len ); 2841 } 2842#endif 2843 2844#if FE_DEBUG >= 1
| 3873#ifdef DIAGNOSTIC
|
2845 /* 2846 * Should never send big packets. If such a packet is passed, 2847 * it should be a bug of upper layer. We just ignore it. 2848 * ... Partial (too short) packets, neither. 2849 */ 2850 if ( length < ETHER_HDR_LEN 2851 || length > ETHER_MAX_LEN - ETHER_CRC_LEN ) {
| 3874 /* 3875 * Should never send big packets. If such a packet is passed, 3876 * it should be a bug of upper layer. We just ignore it. 3877 * ... Partial (too short) packets, neither. 3878 */ 3879 if ( length < ETHER_HDR_LEN 3880 || length > ETHER_MAX_LEN - ETHER_CRC_LEN ) {
|
2852 log( LOG_ERR, 2853 "fe%d: got an out-of-spec packet (%u bytes) to send\n", 2854 sc->sc_unit, length );
| 3881 printf("fe%d: got an out-of-spec packet (%u bytes) to send\n", 3882 sc->sc_unit, length);
|
2855 sc->sc_if.if_oerrors++;
| 3883 sc->sc_if.if_oerrors++;
|
| 3884 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
|
2856 return; 2857 } 2858#endif 2859 2860 /* 2861 * Put the length word for this frame. 2862 * Does 86960 accept odd length? -- Yes. 2863 * Do we need to pad the length to minimum size by ourselves? 2864 * -- Generally yes. But for (or will be) the last 2865 * packet in the transmission buffer, we can skip the 2866 * padding process. It may gain performance slightly. FIXME. 2867 */
| 3885 return; 3886 } 3887#endif 3888 3889 /* 3890 * Put the length word for this frame. 3891 * Does 86960 accept odd length? -- Yes. 3892 * Do we need to pad the length to minimum size by ourselves? 3893 * -- Generally yes. But for (or will be) the last 3894 * packet in the transmission buffer, we can skip the 3895 * padding process. It may gain performance slightly. FIXME. 3896 */
|
2868 outw( addr_bmpr8, max( length, ETHER_MIN_LEN - ETHER_CRC_LEN ) );
| 3897#ifdef FE_8BIT_SUPPORT 3898 if ((sc->proto_dlcr6 & FE_D6_BBW) == FE_D6_BBW_BYTE) 3899 { 3900 len = max( length, ETHER_MIN_LEN - ETHER_CRC_LEN ); 3901 outb( addr_bmpr8, len & 0x00ff ); 3902 outb( addr_bmpr8, ( len & 0xff00 ) >> 8 ); 3903 } 3904 else 3905#endif 3906 { 3907 outw( addr_bmpr8, max( length, ETHER_MIN_LEN - ETHER_CRC_LEN ) ); 3908 }
|
2869 2870 /* 2871 * Update buffer status now. 2872 * Truncate the length up to an even number, since we use outw(). 2873 */
| 3909 3910 /* 3911 * Update buffer status now. 3912 * Truncate the length up to an even number, since we use outw(). 3913 */
|
2874 length = ( length + 1 ) & ~1;
| 3914#ifdef FE_8BIT_SUPPORT 3915 if ((sc->proto_dlcr6 & FE_D6_BBW) == FE_D6_BBW_WORD) 3916#endif 3917 { 3918 length = ( length + 1 ) & ~1; 3919 }
|
2875 sc->txb_free -= FE_DATA_LEN_LEN + max( length, ETHER_MIN_LEN - ETHER_CRC_LEN); 2876 sc->txb_count++; 2877 2878 /* 2879 * Transfer the data from mbuf chain to the transmission buffer. 2880 * MB86960 seems to require that data be transferred as words, and 2881 * only words. So that we require some extra code to patch 2882 * over odd-length mbufs. 2883 */
| 3920 sc->txb_free -= FE_DATA_LEN_LEN + max( length, ETHER_MIN_LEN - ETHER_CRC_LEN); 3921 sc->txb_count++; 3922 3923 /* 3924 * Transfer the data from mbuf chain to the transmission buffer. 3925 * MB86960 seems to require that data be transferred as words, and 3926 * only words. So that we require some extra code to patch 3927 * over odd-length mbufs. 3928 */
|
2884 savebyte = NO_PENDING_BYTE; 2885 for ( mp = m; mp != 0; mp = mp->m_next ) {
| 3929#ifdef FE_8BIT_SUPPORT 3930 if ((sc->proto_dlcr6 & FE_D6_BBW) == FE_D6_BBW_BYTE) 3931 { 3932 /* 8-bit cards are easy. */ 3933 for ( mp = m; mp != 0; mp = mp->m_next ) { 3934 if ( mp->m_len ) { 3935 outsb( addr_bmpr8, mtod(mp, caddr_t), mp->m_len ); 3936 } 3937 } 3938 } 3939 else 3940#endif 3941 { 3942 /* 16-bit cards are a pain. */ 3943 savebyte = NO_PENDING_BYTE; 3944 for ( mp = m; mp != 0; mp = mp->m_next ) {
|
2886
| 3945
|
2887 /* Ignore empty mbuf. */ 2888 len = mp->m_len; 2889 if ( len == 0 ) continue;
| 3946 /* Ignore empty mbuf. */ 3947 len = mp->m_len; 3948 if ( len == 0 ) continue;
|
2890
| 3949
|
2891 /* Find the actual data to send. */ 2892 data = mtod(mp, caddr_t);
| 3950 /* Find the actual data to send. */ 3951 data = mtod(mp, caddr_t);
|
2893
| 3952
|
2894 /* Finish the last byte. */ 2895 if ( savebyte != NO_PENDING_BYTE ) { 2896 outw( addr_bmpr8, savebyte | ( *data << 8 ) ); 2897 data++; 2898 len--; 2899 savebyte = NO_PENDING_BYTE; 2900 }
| 3953 /* Finish the last byte. */ 3954 if ( savebyte != NO_PENDING_BYTE ) { 3955 outw( addr_bmpr8, savebyte | ( *data << 8 ) ); 3956 data++; 3957 len--; 3958 savebyte = NO_PENDING_BYTE; 3959 }
|
2901
| 3960
|
2902 /* output contiguous words */ 2903 if (len > 1) { 2904 outsw( addr_bmpr8, data, len >> 1); 2905 data += len & ~1; 2906 len &= 1;
| 3961 /* output contiguous words */ 3962 if (len > 1) { 3963 outsw( addr_bmpr8, data, len >> 1); 3964 data += len & ~1; 3965 len &= 1; 3966 } 3967 3968 /* Save a remaining byte, if there is one. */ 3969 if ( len > 0 ) { 3970 savebyte = *data; 3971 }
|
2907 } 2908
| 3972 } 3973
|
2909 /* Save a remaining byte, if there is one. */ 2910 if ( len > 0 ) { 2911 savebyte = *data;
| 3974 /* Spit the last byte, if the length is odd. */ 3975 if ( savebyte != NO_PENDING_BYTE ) { 3976 outw( addr_bmpr8, savebyte );
|
2912 } 2913 } 2914
| 3977 } 3978 } 3979
|
2915 /* Spit the last byte, if the length is odd. */ 2916 if ( savebyte != NO_PENDING_BYTE ) { 2917 outw( addr_bmpr8, savebyte ); 2918 } 2919
| |
2920 /* Pad to the Ethernet minimum length, if the packet is too short. */ 2921 if ( length < ETHER_MIN_LEN - ETHER_CRC_LEN ) {
| 3980 /* Pad to the Ethernet minimum length, if the packet is too short. */ 3981 if ( length < ETHER_MIN_LEN - ETHER_CRC_LEN ) {
|
2922 outsw( addr_bmpr8, padding, ( ETHER_MIN_LEN - ETHER_CRC_LEN - length ) >> 1);
| 3982#ifdef FE_8BIT_SUPPORT 3983 if ((sc->proto_dlcr6 & FE_D6_BBW) == FE_D6_BBW_BYTE) 3984 { 3985 outsb( addr_bmpr8, padding, ETHER_MIN_LEN - ETHER_CRC_LEN - length ); 3986 } 3987 else 3988#endif 3989 { 3990 outsw( addr_bmpr8, padding, ( ETHER_MIN_LEN - ETHER_CRC_LEN - length ) >> 1); 3991 }
|
2923 } 2924} 2925 2926/* 2927 * Compute hash value for an Ethernet address 2928 */ 2929static int 2930fe_hash ( u_char * ep ) 2931{ 2932#define FE_HASH_MAGIC_NUMBER 0xEDB88320L 2933 2934 u_long hash = 0xFFFFFFFFL; 2935 int i, j; 2936 u_char b; 2937 u_long m; 2938 2939 for ( i = ETHER_ADDR_LEN; --i >= 0; ) { 2940 b = *ep++; 2941 for ( j = 8; --j >= 0; ) { 2942 m = hash; 2943 hash >>= 1; 2944 if ( ( m ^ b ) & 1 ) hash ^= FE_HASH_MAGIC_NUMBER; 2945 b >>= 1; 2946 } 2947 } 2948 return ( ( int )( hash >> 26 ) ); 2949} 2950 2951/* 2952 * Compute the multicast address filter from the 2953 * list of multicast addresses we need to listen to. 2954 */ 2955static struct fe_filter 2956fe_mcaf ( struct fe_softc *sc ) 2957{ 2958 int index; 2959 struct fe_filter filter; 2960 struct ifmultiaddr *ifma; 2961 2962 filter = fe_filter_nothing; 2963 for (ifma = sc->arpcom.ac_if.if_multiaddrs.lh_first; ifma; 2964 ifma = ifma->ifma_link.le_next) { 2965 if (ifma->ifma_addr->sa_family != AF_LINK) 2966 continue; 2967 index = fe_hash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
| 3992 } 3993} 3994 3995/* 3996 * Compute hash value for an Ethernet address 3997 */ 3998static int 3999fe_hash ( u_char * ep ) 4000{ 4001#define FE_HASH_MAGIC_NUMBER 0xEDB88320L 4002 4003 u_long hash = 0xFFFFFFFFL; 4004 int i, j; 4005 u_char b; 4006 u_long m; 4007 4008 for ( i = ETHER_ADDR_LEN; --i >= 0; ) { 4009 b = *ep++; 4010 for ( j = 8; --j >= 0; ) { 4011 m = hash; 4012 hash >>= 1; 4013 if ( ( m ^ b ) & 1 ) hash ^= FE_HASH_MAGIC_NUMBER; 4014 b >>= 1; 4015 } 4016 } 4017 return ( ( int )( hash >> 26 ) ); 4018} 4019 4020/* 4021 * Compute the multicast address filter from the 4022 * list of multicast addresses we need to listen to. 4023 */ 4024static struct fe_filter 4025fe_mcaf ( struct fe_softc *sc ) 4026{ 4027 int index; 4028 struct fe_filter filter; 4029 struct ifmultiaddr *ifma; 4030 4031 filter = fe_filter_nothing; 4032 for (ifma = sc->arpcom.ac_if.if_multiaddrs.lh_first; ifma; 4033 ifma = ifma->ifma_link.le_next) { 4034 if (ifma->ifma_addr->sa_family != AF_LINK) 4035 continue; 4036 index = fe_hash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
|
2968#if FE_DEBUG >= 4 2969 log( LOG_INFO, "fe%d: hash(%6D) == %d\n", 2970 sc->sc_unit, enm->enm_addrlo , ":", index );
| 4037#ifdef FE_DEBUG 4038 printf("fe%d: hash(%6D) == %d\n", 4039 sc->sc_unit, enm->enm_addrlo , ":", index);
|
2971#endif 2972 2973 filter.data[index >> 3] |= 1 << (index & 7); 2974 } 2975 return ( filter ); 2976} 2977 2978/* 2979 * Calculate a new "multicast packet filter" and put the 86960 2980 * receiver in appropriate mode. 2981 */ 2982static void 2983fe_setmode ( struct fe_softc *sc ) 2984{ 2985 int flags = sc->sc_if.if_flags; 2986 2987 /* 2988 * If the interface is not running, we postpone the update 2989 * process for receive modes and multicast address filter 2990 * until the interface is restarted. It reduces some 2991 * complicated job on maintaining chip states. (Earlier versions 2992 * of this driver had a bug on that point...) 2993 * 2994 * To complete the trick, fe_init() calls fe_setmode() after 2995 * restarting the interface. 2996 */ 2997 if ( !( flags & IFF_RUNNING ) ) return; 2998 2999 /* 3000 * Promiscuous mode is handled separately. 3001 */ 3002 if ( flags & IFF_PROMISC ) { 3003 /* 3004 * Program 86960 to receive all packets on the segment 3005 * including those directed to other stations. 3006 * Multicast filter stored in MARs are ignored 3007 * under this setting, so we don't need to update it. 3008 * 3009 * Promiscuous mode in FreeBSD 2 is used solely by 3010 * BPF, and BPF only listens to valid (no error) packets. 3011 * So, we ignore erroneous ones even in this mode. 3012 * (Older versions of fe driver mistook the point.) 3013 */ 3014 outb( sc->ioaddr[ FE_DLCR5 ], 3015 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1 ); 3016 sc->filter_change = 0;
| 4040#endif 4041 4042 filter.data[index >> 3] |= 1 << (index & 7); 4043 } 4044 return ( filter ); 4045} 4046 4047/* 4048 * Calculate a new "multicast packet filter" and put the 86960 4049 * receiver in appropriate mode. 4050 */ 4051static void 4052fe_setmode ( struct fe_softc *sc ) 4053{ 4054 int flags = sc->sc_if.if_flags; 4055 4056 /* 4057 * If the interface is not running, we postpone the update 4058 * process for receive modes and multicast address filter 4059 * until the interface is restarted. It reduces some 4060 * complicated job on maintaining chip states. (Earlier versions 4061 * of this driver had a bug on that point...) 4062 * 4063 * To complete the trick, fe_init() calls fe_setmode() after 4064 * restarting the interface. 4065 */ 4066 if ( !( flags & IFF_RUNNING ) ) return; 4067 4068 /* 4069 * Promiscuous mode is handled separately. 4070 */ 4071 if ( flags & IFF_PROMISC ) { 4072 /* 4073 * Program 86960 to receive all packets on the segment 4074 * including those directed to other stations. 4075 * Multicast filter stored in MARs are ignored 4076 * under this setting, so we don't need to update it. 4077 * 4078 * Promiscuous mode in FreeBSD 2 is used solely by 4079 * BPF, and BPF only listens to valid (no error) packets. 4080 * So, we ignore erroneous ones even in this mode. 4081 * (Older versions of fe driver mistook the point.) 4082 */ 4083 outb( sc->ioaddr[ FE_DLCR5 ], 4084 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1 ); 4085 sc->filter_change = 0;
|
3017 3018#if FE_DEBUG >= 3 3019 log( LOG_INFO, "fe%d: promiscuous mode\n", sc->sc_unit ); 3020#endif
| |
3021 return; 3022 } 3023 3024 /* 3025 * Turn the chip to the normal (non-promiscuous) mode. 3026 */ 3027 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 | FE_D5_AFM1 ); 3028 3029 /* 3030 * Find the new multicast filter value.
| 4086 return; 4087 } 4088 4089 /* 4090 * Turn the chip to the normal (non-promiscuous) mode. 4091 */ 4092 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 | FE_D5_AFM1 ); 4093 4094 /* 4095 * Find the new multicast filter value.
|
3031 * I'm not sure we have to handle modes other than MULTICAST. 3032 * Who sets ALLMULTI? Who turns MULTICAST off? FIXME.
| |
3033 */ 3034 if ( flags & IFF_ALLMULTI ) { 3035 sc->filter = fe_filter_all;
| 4096 */ 4097 if ( flags & IFF_ALLMULTI ) { 4098 sc->filter = fe_filter_all;
|
3036 } else if ( flags & IFF_MULTICAST ) { 3037 sc->filter = fe_mcaf( sc );
| |
3038 } else {
| 4099 } else {
|
3039 sc->filter = fe_filter_nothing;
| 4100 sc->filter = fe_mcaf( sc );
|
3040 } 3041 sc->filter_change = 1; 3042
| 4101 } 4102 sc->filter_change = 1; 4103
|
3043#if FE_DEBUG >= 3 3044 log( LOG_INFO, "fe%d: address filter: [%8D]\n", 3045 sc->sc_unit, sc->filter.data, " " ); 3046#endif 3047
| |
3048 /* 3049 * We have to update the multicast filter in the 86960, A.S.A.P. 3050 * 3051 * Note that the DLC (Data Link Control unit, i.e. transmitter 3052 * and receiver) must be stopped when feeding the filter, and 3053 * DLC trashes all packets in both transmission and receive 3054 * buffers when stopped. 3055 *
| 4104 /* 4105 * We have to update the multicast filter in the 86960, A.S.A.P. 4106 * 4107 * Note that the DLC (Data Link Control unit, i.e. transmitter 4108 * and receiver) must be stopped when feeding the filter, and 4109 * DLC trashes all packets in both transmission and receive 4110 * buffers when stopped. 4111 *
|
3056 * ... Are the above sentences correct? I have to check the 3057 * manual of the MB86960A. FIXME. 3058 *
| |
3059 * To reduce the packet loss, we delay the filter update 3060 * process until buffers are empty. 3061 */ 3062 if ( sc->txb_sched == 0 && sc->txb_count == 0 3063 && !( inb( sc->ioaddr[ FE_DLCR1 ] ) & FE_D1_PKTRDY ) ) { 3064 /* 3065 * Buffers are (apparently) empty. Load 3066 * the new filter value into MARs now. 3067 */ 3068 fe_loadmar(sc); 3069 } else { 3070 /* 3071 * Buffers are not empty. Mark that we have to update 3072 * the MARs. The new filter will be loaded by feintr() 3073 * later. 3074 */
| 4112 * To reduce the packet loss, we delay the filter update 4113 * process until buffers are empty. 4114 */ 4115 if ( sc->txb_sched == 0 && sc->txb_count == 0 4116 && !( inb( sc->ioaddr[ FE_DLCR1 ] ) & FE_D1_PKTRDY ) ) { 4117 /* 4118 * Buffers are (apparently) empty. Load 4119 * the new filter value into MARs now. 4120 */ 4121 fe_loadmar(sc); 4122 } else { 4123 /* 4124 * Buffers are not empty. Mark that we have to update 4125 * the MARs. The new filter will be loaded by feintr() 4126 * later. 4127 */
|
3075#if FE_DEBUG >= 4 3076 log( LOG_INFO, "fe%d: filter change delayed\n", sc->sc_unit ); 3077#endif
| |
3078 } 3079} 3080 3081/* 3082 * Load a new multicast address filter into MARs. 3083 * 3084 * The caller must have splimp'ed before fe_loadmar. 3085 * This function starts the DLC upon return. So it can be called only 3086 * when the chip is working, i.e., from the driver's point of view, when 3087 * a device is RUNNING. (I mistook the point in previous versions.) 3088 */ 3089static void 3090fe_loadmar ( struct fe_softc * sc ) 3091{ 3092 /* Stop the DLC (transmitter and receiver). */ 3093 DELAY( 200 ); 3094 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE ); 3095 DELAY( 200 ); 3096 3097 /* Select register bank 1 for MARs. */ 3098 outb( sc->ioaddr[ FE_DLCR7 ], 3099 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP ); 3100 3101 /* Copy filter value into the registers. */ 3102 outblk( sc, FE_MAR8, sc->filter.data, FE_FILTER_LEN ); 3103 3104 /* Restore the bank selection for BMPRs (i.e., runtime registers). */ 3105 outb( sc->ioaddr[ FE_DLCR7 ], 3106 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP ); 3107 3108 /* Restart the DLC. */ 3109 DELAY( 200 ); 3110 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_ENABLE ); 3111 DELAY( 200 ); 3112 3113 /* We have just updated the filter. */ 3114 sc->filter_change = 0;
| 4128 } 4129} 4130 4131/* 4132 * Load a new multicast address filter into MARs. 4133 * 4134 * The caller must have splimp'ed before fe_loadmar. 4135 * This function starts the DLC upon return. So it can be called only 4136 * when the chip is working, i.e., from the driver's point of view, when 4137 * a device is RUNNING. (I mistook the point in previous versions.) 4138 */ 4139static void 4140fe_loadmar ( struct fe_softc * sc ) 4141{ 4142 /* Stop the DLC (transmitter and receiver). */ 4143 DELAY( 200 ); 4144 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE ); 4145 DELAY( 200 ); 4146 4147 /* Select register bank 1 for MARs. */ 4148 outb( sc->ioaddr[ FE_DLCR7 ], 4149 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP ); 4150 4151 /* Copy filter value into the registers. */ 4152 outblk( sc, FE_MAR8, sc->filter.data, FE_FILTER_LEN ); 4153 4154 /* Restore the bank selection for BMPRs (i.e., runtime registers). */ 4155 outb( sc->ioaddr[ FE_DLCR7 ], 4156 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP ); 4157 4158 /* Restart the DLC. */ 4159 DELAY( 200 ); 4160 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_ENABLE ); 4161 DELAY( 200 ); 4162 4163 /* We have just updated the filter. */ 4164 sc->filter_change = 0;
|
| 4165}
|
3115
| 4166
|
3116#if FE_DEBUG >= 3 3117 log( LOG_INFO, "fe%d: address filter changed\n", sc->sc_unit );
| 4167/* Change the media selection. */ 4168static int 4169fe_medchange (struct ifnet *ifp) 4170{ 4171 struct fe_softc *sc = (struct fe_softc *)ifp->if_softc; 4172 4173#ifdef DIAGNOSTIC 4174 /* If_media should not pass any request for a media which this 4175 interface doesn't support. */ 4176 int b; 4177 4178 for (b = 0; bit2media[b] != 0; b++) { 4179 if (bit2media[b] == sc->media.ifm_media) break; 4180 } 4181 if (((1 << b) & sc->mbitmap) == 0) { 4182 printf("fe%d: got an unsupported media request (0x%x)\n", 4183 sc->sc_unit, sc->media.ifm_media); 4184 return EINVAL; 4185 }
|
3118#endif
| 4186#endif
|
| 4187 4188 /* We don't actually change media when the interface is down. 4189 fe_init() will do the job, instead. Should we also wait 4190 until the transmission buffer being empty? Changing the 4191 media when we are sending a frame will cause two garbages 4192 on wires, one on old media and another on new. FIXME */ 4193 if (sc->sc_if.if_flags & IFF_UP) { 4194 if (sc->msel) sc->msel(sc); 4195 } 4196 4197 return 0;
|
3119} 3120
| 4198} 4199
|
3121#if FE_DEBUG >= 1
| 4200/* I don't know how I can support media status callback... FIXME. */
|
3122static void
| 4201static void
|
3123fe_dump ( int level, struct fe_softc * sc, char * message )
| 4202fe_medstat (struct ifnet *ifp, struct ifmediareq *ifmr)
|
3124{
| 4203{
|
3125 log( level, "fe%d: %s," 3126 " DLCR = %02x %02x %02x %02x %02x %02x %02x %02x," 3127 " BMPR = xx xx %02x %02x %02x %02x %02x %02x," 3128 " asic = %02x %02x %02x %02x %02x %02x %02x %02x" 3129 " + %02x %02x %02x %02x %02x %02x %02x %02x\n", 3130 sc->sc_unit, message ? message : "registers", 3131 inb( sc->ioaddr[ FE_DLCR0 ] ), inb( sc->ioaddr[ FE_DLCR1 ] ), 3132 inb( sc->ioaddr[ FE_DLCR2 ] ), inb( sc->ioaddr[ FE_DLCR3 ] ), 3133 inb( sc->ioaddr[ FE_DLCR4 ] ), inb( sc->ioaddr[ FE_DLCR5 ] ), 3134 inb( sc->ioaddr[ FE_DLCR6 ] ), inb( sc->ioaddr[ FE_DLCR7 ] ), 3135 inb( sc->ioaddr[ FE_BMPR10 ] ), inb( sc->ioaddr[ FE_BMPR11 ] ), 3136 inb( sc->ioaddr[ FE_BMPR12 ] ), inb( sc->ioaddr[ FE_BMPR13 ] ), 3137 inb( sc->ioaddr[ FE_BMPR14 ] ), inb( sc->ioaddr[ FE_BMPR15 ] ), 3138 inb( sc->ioaddr[ 0x10 ] ), inb( sc->ioaddr[ 0x11 ] ), 3139 inb( sc->ioaddr[ 0x12 ] ), inb( sc->ioaddr[ 0x13 ] ), 3140 inb( sc->ioaddr[ 0x14 ] ), inb( sc->ioaddr[ 0x15 ] ), 3141 inb( sc->ioaddr[ 0x16 ] ), inb( sc->ioaddr[ 0x17 ] ), 3142 inb( sc->ioaddr[ 0x18 ] ), inb( sc->ioaddr[ 0x19 ] ), 3143 inb( sc->ioaddr[ 0x1A ] ), inb( sc->ioaddr[ 0x1B ] ), 3144 inb( sc->ioaddr[ 0x1C ] ), inb( sc->ioaddr[ 0x1D ] ), 3145 inb( sc->ioaddr[ 0x1E ] ), inb( sc->ioaddr[ 0x1F ] ) );
| 4204 (void)ifp; 4205 (void)ifmr;
|
3146}
| 4206}
|
3147#endif
| |
| |