1/* $Id: brooktree848.c,v 1.85 1999/06/12 14:54:54 roger Exp $ */
2/* BT848 Driver for Brooktree's Bt848, Bt848A, Bt849A, Bt878, Bt879 based cards.
3 The Brooktree BT848 Driver driver is based upon Mark Tinguely and
4 Jim Lowe's driver for the Matrox Meteor PCI card . The
5 Philips SAA 7116 and SAA 7196 are very different chipsets than
6 the BT848. For starters, the BT848 is a one chipset solution and
7 it incorporates a RISC engine to control the DMA transfers --
8 that is it the actual dma process is control by a program which
9 resides in the hosts memory also the register definitions between
10 the Philips chipsets and the Bt848 are very different.
11
12 The original copyright notice by Mark and Jim is included mostly
13 to honor their fantastic work in the Matrox Meteor driver!
14
15 Enjoy,
16 Amancio
17
18 */
19
20/*
21 * 1. Redistributions of source code must retain the
22 * Copyright (c) 1997 Amancio Hasty
23 * All rights reserved.
24 *
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions
27 * are met:
28 * 1. Redistributions of source code must retain the above copyright
29 * notice, this list of conditions and the following disclaimer.
30 * 2. Redistributions in binary form must reproduce the above copyright
31 * notice, this list of conditions and the following disclaimer in the
32 * documentation and/or other materials provided with the distribution.
33 * 3. All advertising materials mentioning features or use of this software
34 * must display the following acknowledgement:
35 * This product includes software developed by Amancio Hasty
36 * 4. The name of the author may not be used to endorse or promote products
37 * derived from this software without specific prior written permission.
38 *
39 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
40 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
41 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
42 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
43 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
44 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
45 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
47 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
48 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
49 * POSSIBILITY OF SUCH DAMAGE.
50 */
51
52
53
54
55/*
56 * 1. Redistributions of source code must retain the
57 * Copyright (c) 1995 Mark Tinguely and Jim Lowe
58 * All rights reserved.
59 *
60 * Redistribution and use in source and binary forms, with or without
61 * modification, are permitted provided that the following conditions
62 * are met:
63 * 1. Redistributions of source code must retain the above copyright
64 * notice, this list of conditions and the following disclaimer.
65 * 2. Redistributions in binary form must reproduce the above copyright
66 * notice, this list of conditions and the following disclaimer in the
67 * documentation and/or other materials provided with the distribution.
68 * 3. All advertising materials mentioning features or use of this software
69 * must display the following acknowledgement:
70 * This product includes software developed by Mark Tinguely and Jim Lowe
71 * 4. The name of the author may not be used to endorse or promote products
72 * derived from this software without specific prior written permission.
73 *
74 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
75 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
76 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
77 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
78 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
79 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
80 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
81 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
82 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
83 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
84 * POSSIBILITY OF SUCH DAMAGE.
85 */
86
87/* Change History:
88Note: These version numbers represent the authors own numbering.
89They are unrelated to Revision Control numbering of FreeBSD or any other system.
901.0 1/24/97 First Alpha release
91
921.1 2/20/97 Added video ioctl so we can do PCI To PCI
93 data transfers. This is for capturing data
94 directly to a vga frame buffer which has
95 a linear frame buffer. Minor code clean-up.
96
971.3 2/23/97 Fixed system lock-up reported by
98 Randall Hopper <rhh@ct.picker.com>. This
99 problem seems somehow to be exhibited only
100 in his system. I changed the setting of
101 INT_MASK for CAP_CONTINUOUS to be exactly
102 the same as CAP_SINGLE apparently setting
103 bit 23 cleared the system lock up.
104 version 1.1 of the driver has been reported
105 to work with STB's WinTv, Hauppage's Wincast/Tv
106 and last but not least with the Intel Smart
107 Video Recorder.
108
1091.4 3/9/97 fsmp@freefall.org
110 Merged code to support tuners on STB and WinCast
111 cards.
112 Modifications to the contrast and chroma ioctls.
113 Textual cleanup.
114
1151.5 3/15/97 fsmp@freefall.org
116 new bt848 specific versions of hue/bright/
117 contrast/satu/satv.
118 Amancio's patch to fix "screen freeze" problem.
119
1201.6 3/19/97 fsmp@freefall.org
121 new table-driven frequency lookup.
122 removed disable_intr()/enable_intr() calls from i2c.
123 misc. cleanup.
124
1251.7 3/19/97 fsmp@freefall.org
126 added audio support submitted by:
127 Michael Petry <petry@netwolf.NetMasters.com>
128
1291.8 3/20/97 fsmp@freefall.org
130 extended audio support.
131 card auto-detection.
132 major cleanup, order of routines, declarations, etc.
133
1341.9 3/22/97 fsmp@freefall.org
135 merged in Amancio's minor unit for tuner control
136 mods.
137 misc. cleanup, especially in the _intr routine.
138 made AUDIO_SUPPORT mainline code.
139
1401.10 3/23/97 fsmp@freefall.org
141 added polled hardware i2c routines,
142 removed all existing software i2c routines.
143 created software i2cProbe() routine.
144 Randall Hopper's fixes of BT848_GHUE & BT848_GBRIG.
145 eeprom support.
146
1471.11 3/24/97 fsmp@freefall.org
148 Louis Mamakos's new bt848 struct.
149
1501.12 3/25/97 fsmp@freefall.org
151 japanese freq table from Naohiro Shichijo.
152 new table structs for tuner lookups.
153 major scrub for "magic numbers".
154
1551.13 3/28/97 fsmp@freefall.org
156 1st PAL support.
157 MAGIC_[1-4] demarcates magic #s needing PAL work.
158 AFC code submitted by Richard Tobin
159 <richard@cogsci.ed.ac.uk>.
160
1611.14 3/29/97 richard@cogsci.ed.ac.uk
162 PAL support: magic numbers moved into
163 format_params structure.
164 Revised AFC interface.
165 fixed DMA_PROG_ALLOC size misdefinition.
166
1671.15 4/18/97 John-Mark Gurney <gurney_j@resnet.uoregon.edu>
168 Added [SR]RGBMASKs ioctl for byte swapping.
169
1701.16 4/20/97 Randall Hopper <rhh@ct.picker.com>
171 Generalized RGBMASK ioctls for general pixel
172 format setting [SG]ACTPIXFMT, and added query API
173 to return driver-supported pix fmts GSUPPIXFMT.
174
1751.17 4/21/97 hasty@rah.star-gate.com
176 Clipping support added.
177
1781.18 4/23/97 Clean up after failed CAP_SINGLEs where bt
179 interrupt isn't delivered, and fixed fixing
180 CAP_SINGLEs that for ODD_ONLY fields.
1811.19 9/8/97 improved yuv support , cleaned up weurope
182 channel table, incorporated cleanup work from
183 Luigi, fixed pci interface bug due to a
184 change in the pci interface which disables
185 interrupts from a PCI device by default,
186 Added Luigi's, ioctl's BT848_SLNOTCH,
187 BT848_GLNOTCH (set luma notch and get luma not)
1881.20 10/5/97 Keith Sklower <sklower@CS.Berkeley.EDU> submitted
189 a patch to fix compilation of the BSDI's PCI
190 interface.
191 Hideyuki Suzuki <hideyuki@sat.t.u-tokyo.ac.jp>
192 Submitted a patch for Japanese cable channels
193 Joao Carlos Mendes Luis jonny@gta.ufrj.br
194 Submitted general ioctl to set video broadcast
195 formats (PAL, NTSC, etc..) previously we depended
196 on the Bt848 auto video detect feature.
1971.21 10/24/97 Randall Hopper <rhh@ct.picker.com>
198 Fix temporal decimation, disable it when
199 doing CAP_SINGLEs, and in dual-field capture, don't
200 capture fields for different frames
2011.22 11/08/97 Randall Hopper <rhh@ct.picker.com>
202 Fixes for packed 24bpp - FIFO alignment
2031.23 11/17/97 Amancio <hasty@star-gate.com>
204 Added yuv support mpeg encoding
2051.24 12/27/97 Jonathan Hanna <pangolin@rogers.wave.ca>
206 Patch to support Philips FR1236MK2 tuner
2071.25 02/02/98 Takeshi Ohashi
208 <ohashi@atohasi.mickey.ai.kyutech.ac.jp> submitted
209 code to support bktr_read .
210 Flemming Jacobsen <fj@schizo.dk.tfs.com>
211 submitted code to support radio available with in
212 some bt848 based cards;additionally, wrote code to
213 correctly recognized his bt848 card.
214 Roger Hardiman <roger@cs.strath.ac.uk> submitted
215 various fixes to smooth out the microcode and made
216 all modes consistent.
2171.26 Moved Luigi's I2CWR ioctl from the video_ioctl
218 section to the tuner_ioctl section
219 Changed Major device from 79 to 92 and reserved
220 our Major device number -- hasty@star-gate.com
2211.27 Last batch of patches for radio support from
222 Flemming Jacobsen <fj@trw.nl>.
223 Added B849 PCI ID submitted by:
224 Tomi Vainio <tomppa@fidata.fi>
2251.28 Frank Nobis <fn@Radio-do.de> added tuner support
226 for the German Phillips PAL tuner and
227 additional channels for german cable tv.
2281.29 Roger Hardiman <roger@cs.strath.ac.uk>
229 Revised autodetection code to correctly handle both
230 old and new VideoLogic Captivator PCI cards.
231 Added tsleep of 2 seconds to initialistion code
232 for PAL users.Corrected clock selection code on
233 format change.
2341.30 Bring back Frank Nobis <fn@Radio-do.de>'s opt_bktr.h
235
2361.31 Randall Hopper <rhh@ct.picker.com>
237 submitted ioctl to clear the video buffer
238 prior to starting video capture
239 Amancio : clean up yuv12 so that it does not
240 affect rgb capture. Basically, fxtv after
241 capturing in yuv12 mode , switching to rgb
242 would cause the video capture to be too bright.
2431.32 disable inverse gamma function for rgb and yuv
244 capture. fixed meteor brightness ioctl it now
245 converts the brightness value from unsigned to
246 signed.
2471.33 added sysctl: hw.bt848.tuner, hw.bt848.reverse_mute,
248 hw.bt848.card
249 card takes a value from 0 to bt848_max_card
250 tuner takes a value from 0 to bt848_max_tuner
251 reverse_mute : 0 no effect, 1 reverse tuner
252 mute function some tuners are wired reversed :(
2531.34 reverse mute function for ims turbo card
254
2551.35 Roger Hardiman <roger@cs.strath.ac.uk>
256 options BROOKTREE_SYSTEM_DEFAULT=BROOKTREE_PAL
257 in the kernel config file makes the driver's
258 video_open() function select PAL rather than NTSC.
259 This fixed all the hangs on my Dual Crystal card
260 when using a PAL video signal. As a result, you
261 can loose the tsleep (of 2 seconds - now 0.25!!)
262 which I previously added. (Unless someone else
263 wanted the 0.25 second tsleep).
264
2651.36 added bt848.format sysctl variable.
266 1 denotes NTSC , 0 denotes PAL
267
2681.37 added support for Bt878 and improved Hauppauge's
269 bt848 tuner recognition
2701.38 Further improvements on Hauppauge's rely on
271 eeprom[9] to determine the tuner type 8)
272
273 AVerMedia card type added <sos@freebsd.org>
274
2751.39 08/05/98 Roger Hardiman <roger@cs.strath.ac.uk>
276 Updated Hauppauge detection code for Tuner ID 0x0a
277 for newer NTSC WinCastTV 404 with Bt878 chipset.
278 Tidied up PAL default in video_open()
279
2801.49 10 August 1998 Roger Hardiman <roger@cs.strath.ac.uk>
281 Added Capture Area ioctl - BT848[SG]CAPAREA.
282 Normally the full 640x480 (768x576 PAL) image
283 is grabbed. This ioctl allows a smaller area
284 from anywhere within the video image to be
285 grabbed, eg a 400x300 image from (50,10).
286 See restrictions in BT848SCAPAREA.
287
2881.50 31 August 1998 Roger Hardiman <roger@cs.strath.ac.uk>
289 Renamed BT848[SG]CAPAREA to BT848_[SG]CAPAREA.
290 Added PR kern/7177 for SECAM Video Highway Xtreme
291 with single crystal PLL configuration
292 submitted by Vsevolod Lobko <seva@alex-ua.com>.
293 In kernel configuration file add
294 options OVERRIDE_CARD=2
295 options OVERRIDE_TUNER=11
296 options BKTR_USE_PLL
297
2981.51 31 August 1998 Roger Hardiman <roger@cs.strath.ac.uk>
299 Fixed bug in Miro Tuner detection. Missing Goto.
300 Removed Hauppauge EEPROM 0x10 detection as I think
301 0x10 should be a PAL tuner, not NTSC.
302 Reinstated some Tuner Guesswork code from 1.27
303
3041.52 3 Sep 1998 Roger Hardiman <roger@cs.strath.ac.uk>
305 Submitted patch by Vsevolod Lobko <seva@alex-ua.com>
306 to correct SECAM B-Delay and add XUSSR channel set.
307
3081.53 9 Sep 1998 Roger Hardiman <roger@cs.strath.ac.uk>
309 Changed METEORSINPUT for Hauppauge cards with bt878.
310 Submitted by Fred Templin <templin@erg.sri.com>
311 Also fixed video_open defines and 878 support.
312
3131.54 18 Sep 1998 Roger Hardiman <roger@cs.strath.ac.uk>
314 Changed tuner code to autodetect tuner i2c address.
315 Addresses were incorrectly hardcoded.
316
3171.55 21 Sep 1998 Roger Hardiman <roger@cs.strath.ac.uk>
318 Hauppauge Tech Support confirmed all Hauppauge 878
319 PAL/SECAM boards will use PLL mode.
320 Added to card probe. Thanks to Ken and Fred.
321
3221.56 21 Jan 1999 Roger Hardiman <roger@cs.strath.ac.uk>
323 Added detection of Hauppauge IR remote control.
324 and MSP34xx Audio chip. Fixed i2c read error.
325 Hauppauge supplied details of new Tuner Types.
326 Danny Braniss <danny@cs.huji.ac.il> submitted Bt878
327 AverMedia detection with PCI subsystem vendor id.
328
3291.57 26 Jan 1999 Roger Hardiman <roger@cs.strath.ac.uk>
330 Support for MSP3410D / MSP3415D Stereo/Mono audio
331 using the audio format Auto Detection Mode.
332 Nicolas Souchu <nsouch@freebsd.org> ported the
333 msp_read/write/reset functions to smbus/iicbus.
334 METEOR_INPUT_DEV2 now selects a composite camera on
335 the SVIDEO port for Johan Larsson<gozer@ludd.luth.se>
336 For true SVIDEO, use METEOR_INPUT_DEV_SVIDEO
337
3381.58 8 Feb 1999 Roger Hardiman <roger@cs.strath.ac.uk>
339 Added check to bktr_mmap from OpenBSD driver.
340 Improved MSP34xx reset for bt848 Hauppauge boards.
341 Added detection for Bt848a.
342 Vsevolod Lobko<seva@sevasoft.alex-ua.com> added
343 more XUSSR channels.
344
3451.59 9 Feb 1999 Added ioctl REMOTE_GETKEY for Hauppauge Infra-Red
346 Remote Control. Submitted by Roger Hardiman.
347 Added ioctl TVTUNER_GETCHANSET and
348 BT848_GPIO_SET_EN,BT848_GPIO_SET_DATA (and GETs)
349 Submitted by Vsevolod Lobko <seva@alex-ua.com>
350
3511.60 23 Feb 1999 Roger Hardiman <roger@freebsd.org>
352 Corrected Mute on Hauppauge Radio cards.
353 Autodetect MMAC Osprey by looking for "MMAC" in the EEPROM.
354 Added for Jan Schmidt <mmedia@rz.uni-greifswald.de>
355 Added ALPS Tuner Type from Hiroki Mori <mori@infocity.co.jp>
356
3571.61 29 Apr 1999 Roger Hardiman <roger@freebsd.org>
358 Fix row=0/columns=0 bug. From Randal Hopper<aa8vb@ipass.net>
359 Add option to block the reset of the MSP34xx audio chip by
360 adding options BKTR_NO_MSP_RESET to the kernel config file.
361 This is usefull if you run another operating system
362 first to initialise the audio chip, then do a soft reboot.
363 Added for Yuri Gindin <yuri@xpert.com>
364
3651.62 29 Apr 1999 Added new cards: NEC PK-UG-X017 and I/O DATA GV-BCTV2/PCI
366 Added new tuner: ALPS_TSBH1 (plus FM Radio for ALPS_TSCH5)
367 Added support for BCTV audio mux.
368 All submitted by Hiroki Mori <mori@infocity.co.jp>
369
3701.63 29 Apr 1999 Roger Hardiman <roger@freebsd.org>
371 Added initial code for VBI capture based on work by
372 Hiroki Mori <mori@infocity.co.jp> and reworked by myself.
373 This allows software decoding of teletext, intercast and
374 subtitles via /dev/vbi.
375
3761.64 7 May 1999 Roger Hardiman <roger@freebsd.org>
377 Support LifeView FlyVideo 98 cards. Use EEPROM for card
378 autodetection. Use bttv's audio mux values.
379 Thanks to Paul Reece <paul@fastlane.net.au>,
380 Ivan Brawley <brawley@internode.com.au> and
381 Gilad Rom <rom_glsa@ein-hashofet.co.il>
382 Automatically locate the EEPROM i2c address and read the
383 subsystem_vendor_id from EEPROM and not the PCI registers.
384 Add NSMBUS checks around smbus/iicbus i2c bus code
385 making it easier to compile the driver under 2.2.x.
386 Add GPIO mask for the audio mux to each card type.
387 Add CARD_ZOLTRIX and CARD_KISS from mailing list searches.
388
3891.65 18 May 1999 Roger Hardiman <roger@freebsd.org>
390 Change Intel GPIO mask to stop turning the Intel Camera off
391 Fixed tuner selection on Hauppauge card with tuner 0x0a
392 Replaced none tuner with no tuner for Theo de Raadt.
393 Ivan Brawley <brawley@internode.com.au> added
394 the Australian channel frequencies.
395
3961.66 19 May 1999 Ivan Brawley <brawley@internode.com.au> added better
397 Australian channel frequencies.
398
3991.67 23 May 1999 Roger Hardiman <roger@freebsd.org>
400 Added rgb_vbi_prog() to capture VBI data and video at the
401 same time. To capture VBI data, /dev/vbi must be opened
402 before starting video capture.
403
4041.68 25 May 1999 Roger Hardiman <roger@freebsd.org>
405 Due to differences in PCI bus implementations from various
406 motherboard chipset manufactuers, the Bt878/Bt879 has 3
407 PCI bus compatibility modes. These are
408 NORMAL PCI 2.1 for proper PCI 2.1 compatible chipsets.
409 INTEL 430 FX for the Intel 430 FX chipset.
410 SIS VIA CHIPSET for certain SiS and VIA chipsets.
411 Older Intel and non-Intel chipsets may also benefit from
412 either 430_FX or SIS/VIA mode.
413
414 NORMAL PCI mode is enabled by default.
415 For INTEL 430 FX mode, add this to your kenel config:
416 options "BKTR_430_FX_MODE"
417 For SiS / VIA mode, add this to your kernel config:
418 options "BKTR_SIS_VIA_MODE"
419
420 Using quotes in these options is not needed in FreeBSD 4.x.
421
422 Note. Newer VIA chipsets should be fully PCI 2.1 compatible
423 and should work fine in the Default mode.
424
425 Also rename 849 to 849A, the correct name for the chip.
426
4271.69 12 June 1999 Roger Hardiman <roger@freebsd.org>
428 Updates for FreeBSD 4.x device driver interface.
429 BSDI code removed. Will be restored later.
430
4311.70 12 July 1999 Roger Hardiman <roger@freebsd.org>
432 Reorganise OS device dependant parts (based on a port to
433 linux by Brad Parker).
434 Make the driver compile on FreeBSD 2.2.x systems again.
435 Change number of VBI lines from 16 to 12 for NTSC formats.
436 Changes to probeCard() for better eeprom identification.
437 Added STB Bt878 card identification.
438 Add Hauppauge model identification to probeCard().
439 Added TDA9850 initialisation code taken from Linux bttv.
440 Juha.Nurmela@quicknet.inet.fi found/fixed bug in VBI_SLEEP.
441 Matt Brown <matt@dqc.org> added MSP3430G DBX initialisation.
442
4431.71 30 Aug 1999 Roger Hardiman <roger@freebsd.org>
444 Small cleanup of OS dependant code. Remove NPCI usage.
445 Fix bug in AVerMedia detection.
446 Update VBI support for the AleVT Teletext package. Parts
447 from Juha Nurmela's driver <Juha.Nurmela@quicknet.inet.fi>
448 Add support for Hauppauge 627 and Temic 4006 submitted
449 by Maurice Castro <maurice@atum.castro.aus.net>
450 Tom Jansen <tom@unhooked.net> added BSDi support again.
451
452*/
453
454#ifdef __FreeBSD__
455#include "bktr.h"
456#include "opt_bktr.h"
457#include "opt_devfs.h"
458#endif /* __FreeBSD__ */
459
460#if defined(__NetBSD__) || defined(__OpenBSD__)
461#include "bktr.h"
462#include "pci.h"
463#endif /* __NetBSD__ || __OpenBSD__ */
464
465#if ( \
466 (defined(__FreeBSD__) && (NBKTR > 0)) \
467 || (defined(__bsdi__)) \
468 || (defined(__OpenBSD__)) \
469 || (defined(__NetBSD__)) \
470 )
471
472#include <sys/param.h>
473#include <sys/systm.h>
474#include <sys/conf.h>
475#include <sys/uio.h>
476#include <sys/kernel.h>
477#include <sys/signalvar.h>
478#include <sys/mman.h>
479#include <sys/poll.h>
480#include <sys/select.h>
481#include <sys/vnode.h>
482
483#include <vm/vm.h>
484#include <vm/vm_kern.h>
485#include <vm/pmap.h>
486#include <vm/vm_extern.h>
487
488/*******************/
489/* *** FreeBSD *** */
490/*******************/
491#ifdef __FreeBSD__
492
493/* Read NSMBUS on FreeBSD 3.1 or later */
494#if (__FreeBSD_version >= 310000)
495#include "smbus.h"
496#else
497#define NSMBUS 0
498#endif
499
500#if (__FreeBSD_version < 400000)
501#ifdef DEVFS
502#include <sys/devfsext.h>
503#endif /* DEVFS */
504#endif
505
506#if (__FreeBSD_version >=400000) || (NSMBUS > 0)
507#include /* used by smbus and newbus */
508#endif
509
510#if (__FreeBSD_version >=400000)
511#include /* used by newbus */
512#include /* used by newbus */
513#include /* used by newbus */
514#endif
515
516#include <machine/clock.h> /* for DELAY */
517#include <pci/pcivar.h>
518#include <pci/pcireg.h>
519
520#include <machine/ioctl_meteor.h>
521#include <machine/ioctl_bt848.h> /* extensions to ioctl_meteor.h */
522#include <pci/brktree_reg.h>
523
524#if (NSMBUS > 0)
525#include
526#include
527#include
528#include "smbus_if.h"
529#include "iicbus_if.h"
530#endif
531
532#include <sys/sysctl.h>
533static int bt848_card = -1;
534static int bt848_tuner = -1;
535static int bt848_reverse_mute = -1;
536static int bt848_format = -1;
537
538SYSCTL_NODE(_hw, OID_AUTO, bt848, CTLFLAG_RW, 0, "Bt848 Driver mgmt");
539SYSCTL_INT(_hw_bt848, OID_AUTO, card, CTLFLAG_RW, &bt848_card, -1, "");
540SYSCTL_INT(_hw_bt848, OID_AUTO, tuner, CTLFLAG_RW, &bt848_tuner, -1, "");
541SYSCTL_INT(_hw_bt848, OID_AUTO, reverse_mute, CTLFLAG_RW, &bt848_reverse_mute, -1, "");
542SYSCTL_INT(_hw_bt848, OID_AUTO, format, CTLFLAG_RW, &bt848_format, -1, "");
543
544#if (__FreeBSD_version >= 300000)
545 typedef u_long ioctl_cmd_t;
546#endif
547
548#if (__FreeBSD__ == 2)
549typedef int ioctl_cmd_t;
550typedef unsigned int uintptr_t;
551#define PCIR_REVID PCI_CLASS_REG
552#endif
553#endif /* __FreeBSD__ */
554
555
556/****************/
557/* *** BSDI *** */
558/****************/
559#ifdef __bsdi__
560#endif /* __bsdi__ */
561
562
563/**************************/
564/* *** OpenBSD/NetBSD *** */
565/**************************/
566#if defined(__NetBSD__) || defined(__OpenBSD__)
567#endif /* __NetBSD__ || __OpenBSD__ */
568
569
570
571typedef u_char bool_t;
572
573#define BKTRPRI (PZERO+8)|PCATCH
574#define VBIPRI (PZERO-4)|PCATCH
575
576
577/*
578 * memory allocated for DMA programs
579 */
580#define DMA_PROG_ALLOC (8 * PAGE_SIZE)
581
582/* When to split a dma transfer , the bt848 has timing as well as
583 dma transfer size limitations so that we have to split dma
584 transfers into two dma requests
585 */
586#define DMA_BT848_SPLIT 319*2
587
588/*
589 * Allocate enough memory for:
590 * 768x576 RGB 16 or YUV (16 storage bits/pixel) = 884736 = 216 pages
591 *
592 * You may override this using the options "BROOKTREE_ALLOC_PAGES=value"
593 * in your kernel configuration file.
594 */
595
596#ifndef BROOKTREE_ALLOC_PAGES
597#define BROOKTREE_ALLOC_PAGES 217*4
598#endif
599#define BROOKTREE_ALLOC (BROOKTREE_ALLOC_PAGES * PAGE_SIZE)
600
601/* Definitions for VBI capture.
602 * There are 16 VBI lines in a PAL video field (32 in a frame),
603 * and we take 2044 samples from each line (placed in a 2048 byte buffer
604 * for alignment).
605 * VBI lines are held in a circular buffer before being read by a
606 * user program from /dev/vbi.
607 */
608
609#define MAX_VBI_LINES 16 /* Maximum for all vidoe formats */
610#define VBI_LINE_SIZE 2048 /* Store upto 2048 bytes per line */
611#define VBI_BUFFER_ITEMS 20 /* Number of frames we buffer */
612#define VBI_DATA_SIZE (VBI_LINE_SIZE * MAX_VBI_LINES * 2)
613#define VBI_BUFFER_SIZE (VBI_DATA_SIZE * VBI_BUFFER_ITEMS)
614
615
616/* Defines for fields */
617#define ODD_F 0x01
618#define EVEN_F 0x02
619
620/*
621 * Defines for userland processes blocked in this driver
622 * For /dev/bktr[n] use memory address of bktr structure
623 * For /dev/vbi[n] use memory address of bktr structure + 1
624 * this is ok as the bktr structure is > 1 byte
625 */
626#define BKTR_SLEEP ((caddr_t)bktr )
627#define VBI_SLEEP ((caddr_t)bktr + 1)
628
629/*
630 * This is for start-up convenience only, NOT mandatory.
631 */
632#if !defined( DEFAULT_CHNLSET )
633#define DEFAULT_CHNLSET CHNLSET_WEUROPE
634#endif
635
636/*
637 * Parameters describing size of transmitted image.
638 */
639
640static struct format_params format_params[] = {
641/* # define BT848_IFORM_F_AUTO (0x0) - don't matter. */
642 { 525, 26, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_AUTO,
643 12, 1600 },
644/* # define BT848_IFORM_F_NTSCM (0x1) */
645 { 525, 26, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0,
646 12, 1600 },
647/* # define BT848_IFORM_F_NTSCJ (0x2) */
648 { 525, 22, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0,
649 12, 1600 },
650/* # define BT848_IFORM_F_PALBDGHI (0x3) */
651 { 625, 32, 576, 1135, 186, 924, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT1,
652 16, 2044 },
653/* # define BT848_IFORM_F_PALM (0x4) */
654 { 525, 22, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0,
655 12, 1600 },
656/* # define BT848_IFORM_F_PALN (0x5) */
657 { 625, 32, 576, 1135, 186, 924, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT1,
658 16, 2044 },
659/* # define BT848_IFORM_F_SECAM (0x6) */
660 { 625, 32, 576, 1135, 186, 924, 768, 944, 25, 0x7f, 0xa0, BT848_IFORM_X_XT1,
661 16, 2044 },
662/* # define BT848_IFORM_F_RSVD (0x7) - ???? */
663 { 625, 32, 576, 1135, 186, 924, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT0,
664 16, 2044 },
665};
666
667/*
668 * Table of supported Pixel Formats
669 */
670
671static struct meteor_pixfmt_internal {
672 struct meteor_pixfmt public;
673 u_int color_fmt;
674} pixfmt_table[] = {
675
676{ { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 0,0 }, 0x33 },
677{ { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 1,0 }, 0x33 },
678
679{ { 0, METEOR_PIXTYPE_RGB, 2, { 0xf800, 0x07e0, 0x001f }, 0,0 }, 0x22 },
680{ { 0, METEOR_PIXTYPE_RGB, 2, { 0xf800, 0x07e0, 0x001f }, 1,0 }, 0x22 },
681
682{ { 0, METEOR_PIXTYPE_RGB, 3, { 0xff0000,0x00ff00,0x0000ff }, 1,0 }, 0x11 },
683
684{ { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 0,0 }, 0x00 },
685{ { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 0,1 }, 0x00 },
686{ { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 1,0 }, 0x00 },
687{ { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x00 },
688{ { 0, METEOR_PIXTYPE_YUV, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x88 },
689{ { 0, METEOR_PIXTYPE_YUV_PACKED, 2, { 0xff0000,0x00ff00,0x0000ff }, 0,1 }, 0x44 },
690{ { 0, METEOR_PIXTYPE_YUV_12, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x88 },
691
692};
693#define PIXFMT_TABLE_SIZE ( sizeof(pixfmt_table) / sizeof(pixfmt_table[0]) )
694
695/*
696 * Table of Meteor-supported Pixel Formats (for SETGEO compatibility)
697 */
698
699/* FIXME: Also add YUV_422 and YUV_PACKED as well */
700static struct {
701 u_long meteor_format;
702 struct meteor_pixfmt public;
703} meteor_pixfmt_table[] = {
704 { METEOR_GEO_YUV_12,
705 { 0, METEOR_PIXTYPE_YUV_12, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }
706 },
707
708 /* FIXME: Should byte swap flag be on for this one; negative in drvr? */
709 { METEOR_GEO_YUV_422,
710 { 0, METEOR_PIXTYPE_YUV, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }
711 },
712 { METEOR_GEO_YUV_PACKED,
713 { 0, METEOR_PIXTYPE_YUV_PACKED, 2, { 0xff0000,0x00ff00,0x0000ff }, 0,1 }
714 },
715 { METEOR_GEO_RGB16,
716 { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 0, 0 }
717 },
718 { METEOR_GEO_RGB24,
719 { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000, 0x00ff00, 0x0000ff }, 0, 0 }
720 },
721
722};
723#define METEOR_PIXFMT_TABLE_SIZE ( sizeof(meteor_pixfmt_table) / \
724 sizeof(meteor_pixfmt_table[0]) )
725
726
727#define BSWAP (BT848_COLOR_CTL_BSWAP_ODD | BT848_COLOR_CTL_BSWAP_EVEN)
728#define WSWAP (BT848_COLOR_CTL_WSWAP_ODD | BT848_COLOR_CTL_WSWAP_EVEN)
729
730
731/* experimental code for Automatic Frequency Control */
732#define TUNER_AFC
733#define TEST_TUNER_AFC_NOT
734
735#if defined( TUNER_AFC )
736#define AFC_DELAY 10000 /* 10 millisend delay */
737#define AFC_BITS 0x07
738#define AFC_FREQ_MINUS_125 0x00
739#define AFC_FREQ_MINUS_62 0x01
740#define AFC_FREQ_CENTERED 0x02
741#define AFC_FREQ_PLUS_62 0x03
742#define AFC_FREQ_PLUS_125 0x04
743#define AFC_MAX_STEP (5 * FREQFACTOR) /* no more than 5 MHz */
744#endif /* TUNER_AFC */
745
746/*
747 * i2c things:
748 */
749
750#define TSA552x_CB_MSB (0x80)
751#define TSA552x_CB_CP (1<<6)
752#define TSA552x_CB_T2 (1<<5)
753#define TSA552x_CB_T1 (1<<4)
754#define TSA552x_CB_T0 (1<<3)
755#define TSA552x_CB_RSA (1<<2)
756#define TSA552x_CB_RSB (1<<1)
757#define TSA552x_CB_OS (1<<0)
758#define TSA552x_RADIO (TSA552x_CB_MSB | \
759 TSA552x_CB_T0)
760
761/* Add RADIO_OFFSET to the "frequency" to indicate that we want to tune */
762/* the radio (if present) not the TV tuner. */
763/* 20000 is equivalent to 20000MHz/16 = 1.25GHz - this area is unused. */
764#define RADIO_OFFSET 20000
765
766/* address(s) of the Hauppauge Infra-Red Remote Control adapter */
767#define HAUP_REMOTE_INT_WADDR 0x30
768#define HAUP_REMOTE_INT_RADDR 0x31
769
770#define HAUP_REMOTE_EXT_WADDR 0x34
771#define HAUP_REMOTE_EXT_RADDR 0x35
772
773/* address of BTSC/SAP decoder chip */
774#define TDA9850_WADDR 0xb6
775#define TDA9850_RADDR 0xb7
776
777/* address of MSP3400C chip */
778#define MSP3400C_WADDR 0x80
779#define MSP3400C_RADDR 0x81
780
781
782/* EEProm (128 * 8) on an STB card */
783#define X24C01_WADDR 0xae
784#define X24C01_RADDR 0xaf
785
786
787/* EEProm (256 * 8) on a Hauppauge card */
788/* and on most BT878s cards to store the sub-system vendor id */
789#define PFC8582_WADDR 0xa0
790#define PFC8582_RADDR 0xa1
791
792
793/* registers in the TDA9850 BTSC/dbx chip */
794#define CON1ADDR 0x04
795#define CON2ADDR 0x05
796#define CON3ADDR 0x06
797#define CON4ADDR 0x07
798#define ALI1ADDR 0x08
799#define ALI2ADDR 0x09
800#define ALI3ADDR 0x0a
801
802
803/* raise the charge pump voltage for fast tuning */
804#define TSA552x_FCONTROL (TSA552x_CB_MSB | \
805 TSA552x_CB_CP | \
806 TSA552x_CB_T0 | \
807 TSA552x_CB_RSA | \
808 TSA552x_CB_RSB)
809
810/* lower the charge pump voltage for better residual oscillator FM */
811#define TSA552x_SCONTROL (TSA552x_CB_MSB | \
812 TSA552x_CB_T0 | \
813 TSA552x_CB_RSA | \
814 TSA552x_CB_RSB)
815
816/* The control value for the ALPS TSCH5 Tuner */
817#define TSCH5_FCONTROL 0x82
818#define TSCH5_RADIO 0x86
819
820/* The control value for the ALPS TSBH1 Tuner */
821#define TSBH1_FCONTROL 0xce
822
823
824/* sync detect threshold */
825#if 0
826#define SYNC_LEVEL (BT848_ADC_RESERVED | \
827 BT848_ADC_CRUSH) /* threshold ~125 mV */
828#else
829#define SYNC_LEVEL (BT848_ADC_RESERVED | \
830 BT848_ADC_SYNC_T) /* threshold ~75 mV */
831#endif
832
833
834/*
835 * the data for each type of tuner
836 *
837 * if probeCard() fails to detect the proper tuner on boot you can
838 * override it by setting the following define to the tuner present:
839 *
840#define OVERRIDE_TUNER <tuner type>
841 *
842 * where <tuner type> is one of the following tuner defines.
843 */
844
845/* indexes into tuners[] */
846#define NO_TUNER 0
847#define TEMIC_NTSC 1
848#define TEMIC_PAL 2
849#define TEMIC_SECAM 3
850#define PHILIPS_NTSC 4
851#define PHILIPS_PAL 5
852#define PHILIPS_SECAM 6
853#define TEMIC_PALI 7
854#define PHILIPS_PALI 8
855#define PHILIPS_FR1236_NTSC 9
856#define PHILIPS_FR1216_PAL 10
857#define PHILIPS_FR1236_SECAM 11
858#define ALPS_TSCH5 12
859#define ALPS_TSBH1 13
860#define Bt848_MAX_TUNER 14
861
862/* If we do not know the tuner type, make a guess based on the
863 video format
864*/
865#if BROOKTREE_SYSTEM_DEFAULT == BROOKTREE_PAL
866#define DEFAULT_TUNER PHILIPS_PALI
867#else
868#define DEFAULT_TUNER PHILIPS_NTSC
869#endif
870
871/* XXX FIXME: this list is incomplete */
872
873/* input types */
874#define TTYPE_XXX 0
875#define TTYPE_NTSC 1
876#define TTYPE_NTSC_J 2
877#define TTYPE_PAL 3
878#define TTYPE_PAL_M 4
879#define TTYPE_PAL_N 5
880#define TTYPE_SECAM 6
881
882/**
883struct TUNER {
884 char* name;
885 u_char type;
886 u_char pllControl;
887 u_char bandLimits[ 2 ];
888 u_char bandAddrs[ 3 ];
889};
890 */
891static const struct TUNER tuners[] = {
892/* XXX FIXME: fill in the band-switch crosspoints */
893 /* NO_TUNER */
894 { "<no>", /* the 'name' */
895 TTYPE_XXX, /* input type */
896 { 0x00, /* control byte for Tuner PLL */
897 0x00,
898 0x00,
899 0x00 },
900 { 0x00, 0x00 }, /* band-switch crosspoints */
901 { 0x00, 0x00, 0x00,0x00} }, /* the band-switch values */
902
903 /* TEMIC_NTSC */
904 { "Temic NTSC", /* the 'name' */
905 TTYPE_NTSC, /* input type */
906 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
907 TSA552x_SCONTROL,
908 TSA552x_SCONTROL,
909 0x00 },
910 { 0x00, 0x00 }, /* band-switch crosspoints */
911 { 0x02, 0x04, 0x01, 0x00 } }, /* the band-switch values */
912
913 /* TEMIC_PAL */
914 { "Temic PAL", /* the 'name' */
915 TTYPE_PAL, /* input type */
916 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
917 TSA552x_SCONTROL,
918 TSA552x_SCONTROL,
919 0x00 },
920 { 0x00, 0x00 }, /* band-switch crosspoints */
921 { 0x02, 0x04, 0x01, 0x00 } }, /* the band-switch values */
922
923 /* TEMIC_SECAM */
924 { "Temic SECAM", /* the 'name' */
925 TTYPE_SECAM, /* input type */
926 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
927 TSA552x_SCONTROL,
928 TSA552x_SCONTROL,
929 0x00 },
930 { 0x00, 0x00 }, /* band-switch crosspoints */
931 { 0x02, 0x04, 0x01,0x00 } }, /* the band-switch values */
932
933 /* PHILIPS_NTSC */
934 { "Philips NTSC", /* the 'name' */
935 TTYPE_NTSC, /* input type */
936 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
937 TSA552x_SCONTROL,
938 TSA552x_SCONTROL,
939 0x00 },
940 { 0x00, 0x00 }, /* band-switch crosspoints */
941 { 0xa0, 0x90, 0x30, 0x00 } }, /* the band-switch values */
942
943 /* PHILIPS_PAL */
944 { "Philips PAL", /* the 'name' */
945 TTYPE_PAL, /* input type */
946 { TSA552x_FCONTROL, /* control byte for Tuner PLL */
947 TSA552x_FCONTROL,
948 TSA552x_FCONTROL,
949 TSA552x_RADIO },
950 { 0x00, 0x00 }, /* band-switch crosspoints */
951 { 0xa0, 0x90, 0x30, 0xa4 } }, /* the band-switch values */
952
953 /* PHILIPS_SECAM */
954 { "Philips SECAM", /* the 'name' */
955 TTYPE_SECAM, /* input type */
956 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
957 TSA552x_SCONTROL,
958 TSA552x_SCONTROL,
959 TSA552x_RADIO },
960 { 0x00, 0x00 }, /* band-switch crosspoints */
961 { 0xa0, 0x90, 0x30,0xa4 } }, /* the band-switch values */
962
963 /* TEMIC_PAL I */
964 { "Temic PAL I", /* the 'name' */
965 TTYPE_PAL, /* input type */
966 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
967 TSA552x_SCONTROL,
968 TSA552x_SCONTROL,
969 0x00 },
970 { 0x00, 0x00 }, /* band-switch crosspoints */
971 { 0x02, 0x04, 0x01,0x00 } }, /* the band-switch values */
972
973 /* PHILIPS_PALI */
974 { "Philips PAL I", /* the 'name' */
975 TTYPE_PAL, /* input type */
976 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
977 TSA552x_SCONTROL,
978 TSA552x_SCONTROL,
979 0x00 },
980 { 0x00, 0x00 }, /* band-switch crosspoints */
981 { 0xa0, 0x90, 0x30,0x00 } }, /* the band-switch values */
982
983 /* PHILIPS_FR1236_NTSC */
984 { "Philips FR1236 NTSC FM", /* the 'name' */
985 TTYPE_NTSC, /* input type */
986 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
987 TSA552x_SCONTROL,
988 TSA552x_SCONTROL,
989 TSA552x_RADIO },
990 { 0x00, 0x00 }, /* band-switch crosspoints */
991 { 0xa0, 0x90, 0x30,0xa4 } }, /* the band-switch values */
992
993 /* PHILIPS_FR1216_PAL */
994 { "Philips FR1216 PAL" , /* the 'name' */
995 TTYPE_PAL, /* input type */
996 { TSA552x_FCONTROL, /* control byte for Tuner PLL */
997 TSA552x_FCONTROL,
998 TSA552x_FCONTROL,
999 TSA552x_RADIO },
1000 { 0x00, 0x00 }, /* band-switch crosspoints */
1001 { 0xa0, 0x90, 0x30, 0xa4 } }, /* the band-switch values */
1002
1003 /* PHILIPS_FR1236_SECAM */
1004 { "Philips FR1236 SECAM FM", /* the 'name' */
1005 TTYPE_SECAM, /* input type */
1006 { TSA552x_FCONTROL, /* control byte for Tuner PLL */
1007 TSA552x_FCONTROL,
1008 TSA552x_FCONTROL,
1009 TSA552x_RADIO },
1010 { 0x00, 0x00 }, /* band-switch crosspoints */
1011 { 0xa0, 0x90, 0x30, 0xa4 } }, /* the band-switch values */
1012
1013 /* ALPS TSCH5 NTSC */
1014 { "ALPS TSCH5", /* the 'name' */
1015 TTYPE_NTSC, /* input type */
1016 { TSCH5_FCONTROL, /* control byte for Tuner PLL */
1017 TSCH5_FCONTROL,
1018 TSCH5_FCONTROL,
1019 TSCH5_RADIO },
1020 { 0x00, 0x00 }, /* band-switch crosspoints */
1021 { 0x14, 0x12, 0x11, 0x04 } }, /* the band-switch values */
1022
1023 /* ALPS TSBH1 NTSC */
1024 { "ALPS TSBH1", /* the 'name' */
1025 TTYPE_NTSC, /* input type */
1026 { TSBH1_FCONTROL, /* control byte for Tuner PLL */
1027 TSBH1_FCONTROL,
1028 TSBH1_FCONTROL,
1029 0x00 },
1030 { 0x00, 0x00 }, /* band-switch crosspoints */
1031 { 0x01, 0x02, 0x08, 0x00 } } /* the band-switch values */
1032};
1033
1034/******************************************************************************
1035 * card probe
1036 */
1037
1038
1039/*
1040 * the recognized cards, used as indexes of several tables.
1041 *
1042 * if probeCard() fails to detect the proper card on boot you can
1043 * override it by setting the following define to the card you are using:
1044 *
1045#define OVERRIDE_CARD <card type>
1046 *
1047 * where <card type> is one of the following card defines.
1048 */
1049#define CARD_UNKNOWN 0
1050#define CARD_MIRO 1
1051#define CARD_HAUPPAUGE 2
1052#define CARD_STB 3
1053#define CARD_INTEL 4
1054#define CARD_IMS_TURBO 5
1055#define CARD_AVER_MEDIA 6
1056#define CARD_OSPREY 7
1057#define CARD_NEC_PK 8
1058#define CARD_IO_GV 9
1059#define CARD_FLYVIDEO 10
1060#define CARD_ZOLTRIX 11
1061#define CARD_KISS 12
1062#define Bt848_MAX_CARD 13
1063
1064/*
1065 * the data for each type of card
1066 *
1067 * Note:
1068 * these entried MUST be kept in the order defined by the CARD_XXX defines!
1069 */
1070static const struct CARDTYPE cards[] = {
1071
1072 { CARD_UNKNOWN, /* the card id */
1073 "Unknown", /* the 'name' */
1074 NULL, /* the tuner */
1075 0, /* the tuner i2c address */
1076 0, /* dbx unknown */
1077 0,
1078 0, /* EEProm unknown */
1079 0, /* EEProm unknown */
1080 { 0, 0, 0, 0, 0 },
1081 0 }, /* GPIO mask */
1082
1083 { CARD_MIRO, /* the card id */
1084 "Miro TV", /* the 'name' */
1085 NULL, /* the tuner */
1086 0, /* the tuner i2c address */
1087 0, /* dbx unknown */
1088 0,
1089 0, /* EEProm unknown */
1090 0, /* size unknown */
1091 { 0x02, 0x01, 0x00, 0x0a, 1 }, /* audio MUX values */
1092 0x0f }, /* GPIO mask */
1093
1094 { CARD_HAUPPAUGE, /* the card id */
1095 "Hauppauge WinCast/TV", /* the 'name' */
1096 NULL, /* the tuner */
1097 0, /* the tuner i2c address */
1098 0, /* dbx is optional */
1099 0,
1100 PFC8582_WADDR, /* EEProm type */
1101 (u_char)(256 / EEPROMBLOCKSIZE), /* 256 bytes */
1102 { 0x00, 0x02, 0x01, 0x04, 1 }, /* audio MUX values */
1103 0x0f }, /* GPIO mask */
1104
1105 { CARD_STB, /* the card id */
1106 "STB TV/PCI", /* the 'name' */
1107 NULL, /* the tuner */
1108 0, /* the tuner i2c address */
1109 0, /* dbx is optional */
1110 0,
1111 X24C01_WADDR, /* EEProm type */
1112 (u_char)(128 / EEPROMBLOCKSIZE), /* 128 bytes */
1113 { 0x00, 0x01, 0x02, 0x02, 1 }, /* audio MUX values */
1114 0x0f }, /* GPIO mask */
1115
1116 { CARD_INTEL, /* the card id */
1117 "Intel Smart Video III/VideoLogic Captivator PCI", /* the 'name' */
1118 NULL, /* the tuner */
1119 0, /* the tuner i2c address */
1120 0,
1121 0,
1122 0,
1123 0,
1124 { 0, 0, 0, 0, 0 }, /* audio MUX values */
1125 0x00 }, /* GPIO mask */
1126
1127 { CARD_IMS_TURBO, /* the card id */
1128 "IMS TV Turbo", /* the 'name' */
1129 NULL, /* the tuner */
1130 0, /* the tuner i2c address */
1131 0, /* dbx is optional */
1132 0,
1133 PFC8582_WADDR, /* EEProm type */
1134 (u_char)(256 / EEPROMBLOCKSIZE), /* 256 bytes */
1135 { 0x01, 0x02, 0x01, 0x00, 1 }, /* audio MUX values */
1136 0x0f }, /* GPIO mask */
1137
1138 { CARD_AVER_MEDIA, /* the card id */
1139 "AVer Media TV/FM", /* the 'name' */
1140 NULL, /* the tuner */
1141 0, /* the tuner i2c address */
1142 0, /* dbx is optional */
1143 0,
1144 0, /* EEProm type */
1145 0, /* EEProm size */
1146 { 0x0c, 0x00, 0x0b, 0x0b, 1 }, /* audio MUX values */
1147 0x0f }, /* GPIO mask */
1148
1149 { CARD_OSPREY, /* the card id */
1150 "MMAC Osprey", /* the 'name' */
1151 NULL, /* the tuner */
1152 0, /* the tuner i2c address */
1153 0, /* dbx is optional */
1154 0,
1155 PFC8582_WADDR, /* EEProm type */
1156 (u_char)(256 / EEPROMBLOCKSIZE), /* 256 bytes */
1157 { 0x00, 0x00, 0x00, 0x00, 0 }, /* audio MUX values */
1158 0 }, /* GPIO mask */
1159
1160 { CARD_NEC_PK, /* the card id */
1161 "NEC PK-UG-X017", /* the 'name' */
1162 NULL, /* the tuner */
1163 0, /* the tuner i2c address */
1164 0, /* dbx is optional */
1165 0,
1166 0, /* EEProm type */
1167 0, /* EEProm size */
1168 { 0x01, 0x02, 0x01, 0x00, 1 }, /* audio MUX values */
1169 0x0f }, /* GPIO mask */
1170
1171 { CARD_IO_GV, /* the card id */
1172 "I/O DATA GV-BCTV2/PCI", /* the 'name' */
1173 NULL, /* the tuner */
1174 0, /* the tuner i2c address */
1175 0, /* dbx is optional */
1176 0,
1177 0, /* EEProm type */
1178 0, /* EEProm size */
1179 { 0x00, 0x00, 0x00, 0x00, 1 }, /* Has special MUX handler */
1180 0x0f }, /* GPIO mask */
1181
1182 { CARD_FLYVIDEO, /* the card id */
1183 "FlyVideo", /* the 'name' */
1184 NULL, /* the tuner */
1185 0, /* the tuner i2c address */
1186 0, /* dbx is optional */
1187 0, /* msp34xx is optional */
1188 0xac, /* EEProm type */
1189 (u_char)(256 / EEPROMBLOCKSIZE), /* 256 bytes */
1190 { 0x000, 0x800, 0x400, 0x8dff00, 1 },/* audio MUX values */
1191 0x8dff00 }, /* GPIO mask */
1192
1193 { CARD_ZOLTRIX, /* the card id */
1194 "Zoltrix", /* the 'name' */
1195 NULL, /* the tuner */
1196 0, /* the tuner i2c address */
1197 0, /* dbx is optional */
1198 0, /* msp34xx is optional */
1199 0, /* EEProm type */
1200 0, /* EEProm size */
1201 { 0x04, 0x01, 0x00, 0x0a, 1 }, /* audio MUX values */
1202 0x0f }, /* GPIO mask */
1203
1204 { CARD_KISS, /* the card id */
1205 "KISS TV/FM PCI", /* the 'name' */
1206 NULL, /* the tuner */
1207 0, /* the tuner i2c address */
1208 0, /* dbx is optional */
1209 0, /* msp34xx is optional */
1210 0, /* EEProm type */
1211 0, /* EEProm size */
1212 { 0x0c, 0x00, 0x0b, 0x0b, 1 }, /* audio MUX values */
1213 0x0f }, /* GPIO mask */
1214};
1215
1216struct bt848_card_sig bt848_card_signature[1]= {
1217 /* IMS TURBO TV : card 5 */
1218 { 5,9, {00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 02, 00, 00, 00}}
1219
1220
1221};
1222
1223
1224/* debug utility for holding previous INT_STAT contents */
1225#define STATUS_SUM
1226static u_long status_sum = 0;
1227
1228/*
1229 * defines to make certain bit-fiddles understandable
1230 */
1231#define FIFO_ENABLED BT848_DMA_CTL_FIFO_EN
1232#define RISC_ENABLED BT848_DMA_CTL_RISC_EN
1233#define FIFO_RISC_ENABLED (BT848_DMA_CTL_FIFO_EN | BT848_DMA_CTL_RISC_EN)
1234#define FIFO_RISC_DISABLED 0
1235
1236#define ALL_INTS_DISABLED 0
1237#define ALL_INTS_CLEARED 0xffffffff
1238#define CAPTURE_OFF 0
1239
1240#define BIT_SEVEN_HIGH (1<<7)
1241#define BIT_EIGHT_HIGH (1<<8)
1242
1243#define I2C_BITS (BT848_INT_RACK | BT848_INT_I2CDONE)
1244#define TDEC_BITS (BT848_INT_FDSR | BT848_INT_FBUS)
1245
1246
1247/*
1248 * misc. support routines.
1249 */
1250static int signCard( bktr_ptr_t bktr, int offset,
1251 int count, u_char* sig );
1252static void probeCard( bktr_ptr_t bktr, int verbose, int unit);
1253
1254static void common_bktr_attach( bktr_ptr_t bktr, int unit,
1255 u_long pci_id, u_int rev );
1256
1257/**************************************************/
1258/* *** Memory Allocation is still OS specific *** */
1259/**************************************************/
1260#if (defined(__FreeBSD__) || defined(__bsdi__))
1261static vm_offset_t get_bktr_mem( int unit, unsigned size );
1262#endif
1263
1264#if (defined(__NetBSD__) || defined(__OpenBSD__))
1265static vm_offset_t get_bktr_mem(bktr_ptr_t, bus_dmamap_t *, unsigned size);
1266static void free_bktr_mem(bktr_ptr_t, bus_dmamap_t, vm_offset_t);
1267#endif
1268
1269
1270static int oformat_meteor_to_bt( u_long format );
1271
1272static u_int pixfmt_swap_flags( int pixfmt );
1273
1274/*
1275 * bt848 RISC programming routines.
1276 */
1277#ifdef BT848_DUMP
1278static int dump_bt848( bt848_ptr_t bt848 );
1279#endif
1280
1281static void yuvpack_prog( bktr_ptr_t bktr, char i_flag, int cols,
1282 int rows, int interlace );
1283static void yuv422_prog( bktr_ptr_t bktr, char i_flag, int cols,
1284 int rows, int interlace );
1285static void yuv12_prog( bktr_ptr_t bktr, char i_flag, int cols,
1286 int rows, int interlace );
1287static void rgb_prog( bktr_ptr_t bktr, char i_flag, int cols,
1288 int rows, int interlace );
1289static void rgb_vbi_prog( bktr_ptr_t bktr, char i_flag, int cols,
1290 int rows, int interlace );
1291static void build_dma_prog( bktr_ptr_t bktr, char i_flag );
1292
1293static bool_t getline(bktr_reg_t *, int);
1294static bool_t notclipped(bktr_reg_t * , int , int);
1295static bool_t split(bktr_reg_t *, volatile u_long **, int, u_long, int,
1296 volatile u_char ** , int );
1297
1298/*
1299 * video & video capture specific routines.
1300 */
1301static int video_open( bktr_ptr_t bktr );
1302static int video_close( bktr_ptr_t bktr );
1303static int video_read( bktr_ptr_t bktr, int unit, dev_t dev, struct uio *uio );
1304static int video_ioctl( bktr_ptr_t bktr, int unit,
1305 int cmd, caddr_t arg, struct proc* pr );
1306
1307static void start_capture( bktr_ptr_t bktr, unsigned type );
1308static void set_fps( bktr_ptr_t bktr, u_short fps );
1309
1310
1311/*
1312 * tuner specific functions.
1313 */
1314static int tuner_open( bktr_ptr_t bktr );
1315static int tuner_close( bktr_ptr_t bktr );
1316static int tuner_ioctl( bktr_ptr_t bktr, int unit,
1317 int cmd, caddr_t arg, struct proc* pr );
1318static int tuner_getchnlset( struct bktr_chnlset *chnlset );
1319
1320static int tv_channel( bktr_ptr_t bktr, int channel );
1321static int tv_freq( bktr_ptr_t bktr, int frequency );
1322#if defined( TUNER_AFC )
1323static int do_afc( bktr_ptr_t bktr, int addr, int frequency );
1324#endif /* TUNER_AFC */
1325
1326/*
1327 * vbi specific functions.
1328 */
1329static int vbi_open( bktr_ptr_t bktr );
1330static int vbi_close( bktr_ptr_t bktr );
1331static int vbi_read( bktr_ptr_t bktr, struct uio *uio, int ioflag );
1332
1333/*
1334 * audio specific functions.
1335 */
1336static int set_audio( bktr_ptr_t bktr, int mode );
1337static void temp_mute( bktr_ptr_t bktr, int flag );
1338
1339static void init_BTSC( bktr_ptr_t bktr );
1340static int set_BTSC( bktr_ptr_t bktr, int control );
1341
1342static void msp_autodetect( bktr_ptr_t bktr );
1343static void msp_read_id( bktr_ptr_t bktr, int unit );
1344static void msp_reset( bktr_ptr_t bktr );
1345static unsigned int msp_read(bktr_ptr_t bktr, unsigned char dev,
1346 unsigned int addr);
1347static void msp_write( bktr_ptr_t bktr, unsigned char dev,
1348 unsigned int addr, unsigned int data);
1349
1350/*
1351 * Remote Control Functions
1352 */
1353static void remote_read(bktr_ptr_t bktr, struct bktr_remote *remote);
1354
1355
1356/*
1357 * ioctls common to both video & tuner.
1358 */
1359static int common_ioctl( bktr_ptr_t bktr, bt848_ptr_t bt848,
1360 int cmd, caddr_t arg );
1361
1362
1363/*
1364 * i2c primitives
1365 */
1366static int i2cWrite( bktr_ptr_t bktr, int addr, int byte1, int byte2 );
1367static int i2cRead( bktr_ptr_t bktr, int addr );
1368static int writeEEProm( bktr_ptr_t bktr, int offset, int count,
1369 u_char* data );
1370static int readEEProm( bktr_ptr_t bktr, int offset, int count,
1371 u_char* data );
1372
1373#if ((!defined(__FreeBSD__)) || (NSMBUS == 0) )
1374/*
1375 * i2c primatives for low level control of i2c bus. Added for MSP34xx control
1376 */
1377static void i2c_start( bktr_ptr_t bktr);
1378static void i2c_stop( bktr_ptr_t bktr);
1379static int i2c_write_byte( bktr_ptr_t bktr, unsigned char data);
1380static int i2c_read_byte( bktr_ptr_t bktr, unsigned char *data, int last );
1381#endif
1382
1383/*
1384 * CARD_GV_BCTV specific functions.
1385 */
1386static void set_bctv_audio( bktr_ptr_t bktr );
1387static void bctv_gpio_write( bktr_ptr_t bktr, int port, int val );
1388/*static int bctv_gpio_read( bktr_ptr_t bktr, int port );*/ /* Not used */
1389
1390
1391/*
1392 * the common attach code, used by all OS versions.
1393 */
1394static void
1395common_bktr_attach( bktr_ptr_t bktr, int unit, u_long pci_id, u_int rev )
1396{
1397 bt848_ptr_t bt848;
1398 vm_offset_t buf;
1399
1400 bt848 = bktr->base;
1401
1402/***************************************/
1403/* *** OS Specific memory routines *** */
1404/***************************************/
1405#if defined(__NetBSD__) || defined(__OpenBSD__)
1406 /* allocate space for dma program */
1407 bktr->dma_prog = get_bktr_mem(bktr, &bktr->dm_prog, DMA_PROG_ALLOC);
1408 bktr->odd_dma_prog = get_bktr_mem(bktr, &bktr->dm_oprog, DMA_PROG_ALLOC)
1409;
1410 /* allocte space for the VBI buffer */
1411 bktr->vbidata = get_bktr_mem(bktr, &bktr->dm_vbidata, VBI_DATA_SIZE);
1412 bktr->vbibuffer = get_bktr_mem(bktr, &bktr->dm_vbibuffer, VBI_BUFFER_SIZE);
1413
1414 /* allocate space for pixel buffer */
1415 if ( BROOKTREE_ALLOC )
1416 buf = get_bktr_mem(bktr, &bktr->dm_mem, BROOKTREE_ALLOC);
1417 else
1418 buf = 0;
1419#endif
1420
1421#if defined(__FreeBSD__) || defined(__bsdi__)
1422 /* allocate space for dma program */
1423 bktr->dma_prog = get_bktr_mem(unit, DMA_PROG_ALLOC);
1424 bktr->odd_dma_prog = get_bktr_mem(unit, DMA_PROG_ALLOC);
1425
1426 /* allocte space for the VBI buffer */
1427 bktr->vbidata = get_bktr_mem(unit, VBI_DATA_SIZE);
1428 bktr->vbibuffer = get_bktr_mem(unit, VBI_BUFFER_SIZE);
1429
1430 /* allocate space for pixel buffer */
1431 if ( BROOKTREE_ALLOC )
1432 buf = get_bktr_mem(unit, BROOKTREE_ALLOC);
1433 else
1434 buf = 0;
1435#endif
1436
1437 if ( bootverbose ) {
1438 printf("bktr%d: buffer size %d, addr 0x%x\n",
1439 unit, BROOKTREE_ALLOC, vtophys(buf));
1440 }
1441
1442 if ( buf != 0 ) {
1443 bktr->bigbuf = buf;
1444 bktr->alloc_pages = BROOKTREE_ALLOC_PAGES;
1445 bzero((caddr_t) bktr->bigbuf, BROOKTREE_ALLOC);
1446 } else {
1447 bktr->alloc_pages = 0;
1448 }
1449
1450
1451 bktr->flags = METEOR_INITALIZED | METEOR_AUTOMODE |
1452 METEOR_DEV0 | METEOR_RGB16;
1453 bktr->dma_prog_loaded = FALSE;
1454 bktr->cols = 640;
1455 bktr->rows = 480;
1456 bktr->frames = 1; /* one frame */
1457 bktr->format = METEOR_GEO_RGB16;
1458 bktr->pixfmt = oformat_meteor_to_bt( bktr->format );
1459 bktr->pixfmt_compat = TRUE;
1460
1461
1462 bktr->vbiinsert = 0;
1463 bktr->vbistart = 0;
1464 bktr->vbisize = 0;
1465 bktr->vbiflags = 0;
1466
1467
1468 /* using the pci device id and revision id */
1469 /* and determine the card type */
1470 switch (pci_id) {
1471 case BROOKTREE_848_PCI_ID:
1472 if (rev == 0x12) bktr->id = BROOKTREE_848A;
1473 else bktr->id = BROOKTREE_848;
1474 break;
1475 case BROOKTREE_849_PCI_ID:
1476 bktr->id = BROOKTREE_849A;
1477 break;
1478 case BROOKTREE_878_PCI_ID:
1479 bktr->id = BROOKTREE_878;
1480 break;
1481 case BROOKTREE_879_PCI_ID:
1482 bktr->id = BROOKTREE_879;
1483 break;
1484 };
1485
1486 bktr->clr_on_start = FALSE;
1487
1488 /* defaults for the tuner section of the card */
1489 bktr->tflags = TUNER_INITALIZED;
1490 bktr->tuner.frequency = 0;
1491 bktr->tuner.channel = 0;
1492 bktr->tuner.chnlset = DEFAULT_CHNLSET;
1493 bktr->audio_mux_select = 0;
1494 bktr->audio_mute_state = FALSE;
1495 bktr->bt848_card = -1;
1496 bktr->bt848_tuner = -1;
1497 bktr->reverse_mute = -1;
1498
1499 probeCard( bktr, TRUE, unit );
1500
1501 /* If there is an MSP Audio device, reset it and display the model */
1502 if (bktr->card.msp3400c)msp_reset(bktr);
1503 if (bktr->card.msp3400c)msp_read_id(bktr, unit);
1504
1505}
1506
1507
1508/* Copy the vbi lines from 'vbidata' into the circular buffer, 'vbibuffer'.
1509 * The circular buffer holds 'n' fixed size data blocks.
1510 * vbisize is the number of bytes in the circular buffer
1511 * vbiread is the point we reading data out of the circular buffer
1512 * vbiinsert is the point we insert data into the circular buffer
1513 */
1514static void vbidecode(bktr_ptr_t bktr) {
1515 unsigned char *dest;
1516 unsigned int *seq_dest;
1517
1518 /* Check if there is room in the buffer to insert the data. */
1519 if (bktr->vbisize + VBI_DATA_SIZE > VBI_BUFFER_SIZE) return;
1520
1521 /* Copy the VBI data into the next free slot in the buffer. */
1522 /* 'dest' is the point in vbibuffer where we want to insert new data */
1523 dest = (unsigned char *)bktr->vbibuffer + bktr->vbiinsert;
1524 memcpy(dest, (unsigned char*)bktr->vbidata, VBI_DATA_SIZE);
1525
1526 /* Write the VBI sequence number to the end of the vbi data */
1527 /* This is used by the AleVT teletext program */
1528 seq_dest = (unsigned int *)((unsigned char *)bktr->vbibuffer + bktr->vbiinsert
1529 + (VBI_DATA_SIZE - sizeof(bktr->vbi_sequence_number)));
1530 *seq_dest = bktr->vbi_sequence_number;
1531
1532 /* And increase the VBI sequence number */
1533 /* This can wrap around */
1534 bktr->vbi_sequence_number++;
1535
1536
1537 /* Increment the vbiinsert pointer */
1538 /* This can wrap around */
1539 bktr->vbiinsert += VBI_DATA_SIZE;
1540 bktr->vbiinsert = (bktr->vbiinsert % VBI_BUFFER_SIZE);
1541
1542 /* And increase the amount of vbi data in the buffer */
1543 bktr->vbisize = bktr->vbisize + VBI_DATA_SIZE;
1544
1545}
1546
1547
1548/*
1549 * the common interrupt handler.
1550 * Returns a 0 or 1 depending on whether the interrupt has handled.
1551 * In the OS specific section, bktr_intr() is defined which calls this
1552 * common interrupt handler.
1553 */
1554static int
1555common_bktr_intr( void *arg )
1556{
1557 bktr_ptr_t bktr;
1558 bt848_ptr_t bt848;
1559 u_long bktr_status;
1560 u_char dstatus;
1561 u_long field;
1562 u_long w_field;
1563 u_long req_field;
1564
1565 bktr = (bktr_ptr_t) arg;
1566 bt848 = bktr->base;
1567
1568 /*
1569 * check to see if any interrupts are unmasked on this device. If
1570 * none are, then we likely got here by way of being on a PCI shared
1571 * interrupt dispatch list.
1572 */
1573 if (bt848->int_mask == ALL_INTS_DISABLED)
1574 return 0; /* bail out now, before we do something we
1575 shouldn't */
1576
1577 if (!(bktr->flags & METEOR_OPEN)) {
1578 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
1579 bt848->int_mask = ALL_INTS_DISABLED;
1580 /* return; ?? */
1581 }
1582
1583 /* record and clear the INTerrupt status bits */
1584 bktr_status = bt848->int_stat;
1585 bt848->int_stat = bktr_status & ~I2C_BITS; /* don't touch i2c */
1586
1587 /* record and clear the device status register */
1588 dstatus = bt848->dstatus;
1589 bt848->dstatus = 0x00;
1590
1591#if defined( STATUS_SUM )
1592 /* add any new device status or INTerrupt status bits */
1593 status_sum |= (bktr_status & ~(BT848_INT_RSV0|BT848_INT_RSV1));
1594 status_sum |= ((dstatus & (BT848_DSTATUS_COF|BT848_DSTATUS_LOF)) << 6);
1595#endif /* STATUS_SUM */
1596 /* printf( " STATUS %x %x %x \n",
1597 dstatus, bktr_status, bt848->risc_count );
1598 */
1599
1600
1601 /* if risc was disabled re-start process again */
1602 /* if there was one of the following errors re-start again */
1603 if ( !(bktr_status & BT848_INT_RISC_EN) ||
1604 ((bktr_status &(/* BT848_INT_FBUS | */
1605 /* BT848_INT_FTRGT | */
1606 /* BT848_INT_FDSR | */
1607 BT848_INT_PPERR |
1608 BT848_INT_RIPERR | BT848_INT_PABORT |
1609 BT848_INT_OCERR | BT848_INT_SCERR) ) != 0)
1610 || ((bt848->tdec == 0) && (bktr_status & TDEC_BITS)) ) {
1611
1612 u_short tdec_save = bt848->tdec;
1613
1614 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
1615
1616 bt848->int_mask = ALL_INTS_DISABLED;
1617
1618 /* Reset temporal decimation ctr */
1619 bt848->tdec = 0;
1620 bt848->tdec = tdec_save;
1621
1622 /* Reset to no-fields captured state */
1623 if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) {
1624 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
1625 case METEOR_ONLY_ODD_FIELDS:
1626 bktr->flags |= METEOR_WANT_ODD;
1627 break;
1628 case METEOR_ONLY_EVEN_FIELDS:
1629 bktr->flags |= METEOR_WANT_EVEN;
1630 break;
1631 default:
1632 bktr->flags |= METEOR_WANT_MASK;
1633 break;
1634 }
1635 }
1636
1637 bt848->risc_strt_add = vtophys(bktr->dma_prog);
1638 bt848->gpio_dma_ctl = FIFO_ENABLED;
1639 bt848->gpio_dma_ctl = bktr->capcontrol;
1640
1641 bt848->int_mask = BT848_INT_MYSTERYBIT |
1642 BT848_INT_RISCI |
1643 BT848_INT_VSYNC |
1644 BT848_INT_FMTCHG;
1645
1646 bt848->cap_ctl = bktr->bktr_cap_ctl;
1647 return 1;
1648 }
1649
1650 /* If this is not a RISC program interrupt, return */
1651 if (!(bktr_status & BT848_INT_RISCI))
1652 return 0;
1653
1654/**
1655 printf( "intr status %x %x %x\n",
1656 bktr_status, dstatus, bt848->risc_count );
1657 */
1658
1659
1660 /*
1661 * Disable future interrupts if a capture mode is not selected.
1662 * This can happen when we are in the process of closing or
1663 * changing capture modes, otherwise it shouldn't happen.
1664 */
1665 if (!(bktr->flags & METEOR_CAP_MASK))
1666 bt848->cap_ctl = CAPTURE_OFF;
1667
1668
1669 /* Determine which field generated this interrupt */
1670 field = ( bktr_status & BT848_INT_FIELD ) ? EVEN_F : ODD_F;
1671
1672
1673 /*
1674 * Process the VBI data if it is being captured. We do this once
1675 * both Odd and Even VBI data is captured. Therefore we do this
1676 * in the Even field interrupt handler.
1677 */
1678 if ((bktr->vbiflags & VBI_CAPTURE)&&(field==EVEN_F)) {
1679 /* Put VBI data into circular buffer */
1680 vbidecode(bktr);
1681
1682 /* If someone is blocked on reading from /dev/vbi, wake them */
1683 if (bktr->vbi_read_blocked) {
1684 bktr->vbi_read_blocked = FALSE;
1685 wakeup(VBI_SLEEP);
1686 }
1687
1688 /* If someone has a select() on /dev/vbi, inform them */
1689 if (bktr->vbi_select.si_pid) {
1690 selwakeup(&bktr->vbi_select);
1691 }
1692
1693
1694 }
1695
1696
1697 /*
1698 * Register the completed field
1699 * (For dual-field mode, require fields from the same frame)
1700 */
1701 switch ( bktr->flags & METEOR_WANT_MASK ) {
1702 case METEOR_WANT_ODD : w_field = ODD_F ; break;
1703 case METEOR_WANT_EVEN : w_field = EVEN_F ; break;
1704 default : w_field = (ODD_F|EVEN_F); break;
1705 }
1706 switch ( bktr->flags & METEOR_ONLY_FIELDS_MASK ) {
1707 case METEOR_ONLY_ODD_FIELDS : req_field = ODD_F ; break;
1708 case METEOR_ONLY_EVEN_FIELDS : req_field = EVEN_F ; break;
1709 default : req_field = (ODD_F|EVEN_F);
1710 break;
1711 }
1712
1713 if (( field == EVEN_F ) && ( w_field == EVEN_F ))
1714 bktr->flags &= ~METEOR_WANT_EVEN;
1715 else if (( field == ODD_F ) && ( req_field == ODD_F ) &&
1716 ( w_field == ODD_F ))
1717 bktr->flags &= ~METEOR_WANT_ODD;
1718 else if (( field == ODD_F ) && ( req_field == (ODD_F|EVEN_F) ) &&
1719 ( w_field == (ODD_F|EVEN_F) ))
1720 bktr->flags &= ~METEOR_WANT_ODD;
1721 else if (( field == ODD_F ) && ( req_field == (ODD_F|EVEN_F) ) &&
1722 ( w_field == ODD_F )) {
1723 bktr->flags &= ~METEOR_WANT_ODD;
1724 bktr->flags |= METEOR_WANT_EVEN;
1725 }
1726 else {
1727 /* We're out of sync. Start over. */
1728 if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) {
1729 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
1730 case METEOR_ONLY_ODD_FIELDS:
1731 bktr->flags |= METEOR_WANT_ODD;
1732 break;
1733 case METEOR_ONLY_EVEN_FIELDS:
1734 bktr->flags |= METEOR_WANT_EVEN;
1735 break;
1736 default:
1737 bktr->flags |= METEOR_WANT_MASK;
1738 break;
1739 }
1740 }
1741 return 1;
1742 }
1743
1744 /*
1745 * If we have a complete frame.
1746 */
1747 if (!(bktr->flags & METEOR_WANT_MASK)) {
1748 bktr->frames_captured++;
1749 /*
1750 * post the completion time.
1751 */
1752 if (bktr->flags & METEOR_WANT_TS) {
1753 struct timeval *ts;
1754
1755 if ((u_int) bktr->alloc_pages * PAGE_SIZE
1756 <= (bktr->frame_size + sizeof(struct timeval))) {
1757 ts =(struct timeval *)bktr->bigbuf +
1758 bktr->frame_size;
1759 /* doesn't work in synch mode except
1760 * for first frame */
1761 /* XXX */
1762 microtime(ts);
1763 }
1764 }
1765
1766
1767 /*
1768 * Wake up the user in single capture mode.
1769 */
1770 if (bktr->flags & METEOR_SINGLE) {
1771
1772 /* stop dma */
1773 bt848->int_mask = ALL_INTS_DISABLED;
1774
1775 /* disable risc, leave fifo running */
1776 bt848->gpio_dma_ctl = FIFO_ENABLED;
1777 wakeup(BKTR_SLEEP);
1778 }
1779
1780 /*
1781 * If the user requested to be notified via signal,
1782 * let them know the frame is complete.
1783 */
1784
1785 if (bktr->proc && !(bktr->signal & METEOR_SIG_MODE_MASK))
1786 psignal( bktr->proc,
1787 bktr->signal&(~METEOR_SIG_MODE_MASK) );
1788
1789 /*
1790 * Reset the want flags if in continuous or
1791 * synchronous capture mode.
1792 */
1793/*
1794* XXX NOTE (Luigi):
1795* currently we only support 3 capture modes: odd only, even only,
1796* odd+even interlaced (odd field first). A fourth mode (non interlaced,
1797* either even OR odd) could provide 60 (50 for PAL) pictures per
1798* second, but it would require this routine to toggle the desired frame
1799* each time, and one more different DMA program for the Bt848.
1800* As a consequence, this fourth mode is currently unsupported.
1801*/
1802
1803 if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) {
1804 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
1805 case METEOR_ONLY_ODD_FIELDS:
1806 bktr->flags |= METEOR_WANT_ODD;
1807 break;
1808 case METEOR_ONLY_EVEN_FIELDS:
1809 bktr->flags |= METEOR_WANT_EVEN;
1810 break;
1811 default:
1812 bktr->flags |= METEOR_WANT_MASK;
1813 break;
1814 }
1815 }
1816 }
1817
1818 return 1;
1819}
1820
1821
1822
1823
1824/*
1825 *
1826 */
1827static int
1828video_open( bktr_ptr_t bktr )
1829{
1830 bt848_ptr_t bt848;
1831 int frame_rate, video_format=0;
1832
1833 if (bktr->flags & METEOR_OPEN) /* device is busy */
1834 return( EBUSY );
1835
1836 bktr->flags |= METEOR_OPEN;
1837
1838 bt848 = bktr->base;
1839
1840#ifdef BT848_DUMP
1841 dump_bt848( bt848 );
1842#endif
1843
1844 bktr->clr_on_start = FALSE;
1845
1846 bt848->dstatus = 0x00; /* clear device status reg. */
1847
1848 bt848->adc = SYNC_LEVEL;
1849
1850#if BROOKTREE_SYSTEM_DEFAULT == BROOKTREE_PAL
1851 video_format = 0;
1852#else
1853 video_format = 1;
1854#endif
1855
1856 if (bt848_format == 0 )
1857 video_format = 0;
1858
1859 if (bt848_format == 1 )
1860 video_format = 1;
1861
1862 if (video_format == 1 ) {
1863 bt848->iform = BT848_IFORM_F_NTSCM;
1864 bktr->format_params = BT848_IFORM_F_NTSCM;
1865
1866 } else {
1867 bt848->iform = BT848_IFORM_F_PALBDGHI;
1868 bktr->format_params = BT848_IFORM_F_PALBDGHI;
1869
1870 }
1871
1872 bt848->iform |= format_params[bktr->format_params].iform_xtsel;
1873
1874 /* work around for new Hauppauge 878 cards */
1875 if ((bktr->card.card_id == CARD_HAUPPAUGE) &&
1876 (bktr->id==BROOKTREE_878 || bktr->id==BROOKTREE_879) )
1877 bt848->iform |= BT848_IFORM_M_MUX3;
1878 else
1879 bt848->iform |= BT848_IFORM_M_MUX1;
1880
1881 bt848->adelay = format_params[bktr->format_params].adelay;
1882 bt848->bdelay = format_params[bktr->format_params].bdelay;
1883 frame_rate = format_params[bktr->format_params].frame_rate;
1884
1885 /* enable PLL mode using 28Mhz crystal for PAL/SECAM users */
1886 if (bktr->xtal_pll_mode == BT848_USE_PLL) {
1887 bt848->tgctrl=0;
1888 bt848->pll_f_lo=0xf9;
1889 bt848->pll_f_hi=0xdc;
1890 bt848->pll_f_xci=0x8e;
1891 }
1892
1893 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK) | METEOR_DEV0;
1894
1895 bktr->max_clip_node = 0;
1896
1897 bt848->color_ctl_gamma = 1;
1898 bt848->color_ctl_rgb_ded = 1;
1899 bt848->color_ctl_color_bars = 0;
1900 bt848->color_ctl_ext_frmrate = 0;
1901 bt848->color_ctl_swap = 0;
1902
1903 bt848->e_hscale_lo = 170;
1904 bt848->o_hscale_lo = 170;
1905
1906 bt848->e_delay_lo = 0x72;
1907 bt848->o_delay_lo = 0x72;
1908 bt848->e_scloop = 0;
1909 bt848->o_scloop = 0;
1910
1911 bt848->vbi_pack_size = 0;
1912 bt848->vbi_pack_del = 0;
1913
1914 bktr->fifo_errors = 0;
1915 bktr->dma_errors = 0;
1916 bktr->frames_captured = 0;
1917 bktr->even_fields_captured = 0;
1918 bktr->odd_fields_captured = 0;
1919 bktr->proc = (struct proc *)0;
1920 set_fps(bktr, frame_rate);
1921 bktr->video.addr = 0;
1922 bktr->video.width = 0;
1923 bktr->video.banksize = 0;
1924 bktr->video.ramsize = 0;
1925 bktr->pixfmt_compat = TRUE;
1926 bktr->format = METEOR_GEO_RGB16;
1927 bktr->pixfmt = oformat_meteor_to_bt( bktr->format );
1928
1929 bktr->capture_area_enabled = FALSE;
1930
1931 bt848->int_mask = BT848_INT_MYSTERYBIT; /* if you take this out triton
1932 based motherboards will
1933 operate unreliably */
1934 return( 0 );
1935}
1936
1937static int
1938vbi_open( bktr_ptr_t bktr )
1939{
1940 if (bktr->vbiflags & VBI_OPEN) /* device is busy */
1941 return( EBUSY );
1942
1943 bktr->vbiflags |= VBI_OPEN;
1944
1945 /* reset the VBI circular buffer pointers and clear the buffers */
1946 bktr->vbiinsert = 0;
1947 bktr->vbistart = 0;
1948 bktr->vbisize = 0;
1949 bktr->vbi_sequence_number = 0;
1950 bktr->vbi_read_blocked = FALSE;
1951
1952 bzero((caddr_t) bktr->vbibuffer, VBI_BUFFER_SIZE);
1953 bzero((caddr_t) bktr->vbidata, VBI_DATA_SIZE);
1954
1955 return( 0 );
1956}
1957
1958/*
1959 *
1960 */
1961static int
1962tuner_open( bktr_ptr_t bktr )
1963{
1964 if ( !(bktr->tflags & TUNER_INITALIZED) ) /* device not found */
1965 return( ENXIO );
1966
1967 if ( bktr->tflags & TUNER_OPEN ) /* already open */
1968 return( 0 );
1969
1970 bktr->tflags |= TUNER_OPEN;
1971 bktr->tuner.radio_mode = 0;
1972
1973 /* enable drivers on the GPIO port that control the MUXes */
1974 bktr->base->gpio_out_en |= bktr->card.gpio_mux_bits;
1975
1976 /* unmute the audio stream */
1977 set_audio( bktr, AUDIO_UNMUTE );
1978
1979 /* enable stereo if appropriate on TDA audio chip */
1980 if ( bktr->card.dbx )
1981 init_BTSC( bktr );
1982
1983 /* reset the MSP34xx stereo audio chip */
1984 if ( bktr->card.msp3400c )
1985 msp_reset( bktr );
1986
1987 return( 0 );
1988}
1989
1990
1991
1992
1993/*
1994 *
1995 */
1996static int
1997video_close( bktr_ptr_t bktr )
1998{
1999 bt848_ptr_t bt848;
2000
2001 bktr->flags &= ~(METEOR_OPEN |
2002 METEOR_SINGLE |
2003 METEOR_CAP_MASK |
2004 METEOR_WANT_MASK);
2005
2006 bt848 = bktr->base;
2007 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
2008 bt848->cap_ctl = CAPTURE_OFF;
2009
2010 bktr->dma_prog_loaded = FALSE;
2011 bt848->tdec = 0;
2012 bt848->int_mask = ALL_INTS_DISABLED;
2013
2014/** FIXME: is 0xf magic, wouldn't 0x00 work ??? */
2015 bt848->sreset = 0xf;
2016 bt848->int_stat = ALL_INTS_CLEARED;
2017
2018 return( 0 );
2019}
2020
2021
2022/*
2023 * tuner close handle,
2024 * place holder for tuner specific operations on a close.
2025 */
2026static int
2027tuner_close( bktr_ptr_t bktr )
2028{
2029 bktr->tflags &= ~TUNER_OPEN;
2030
2031 /* mute the audio by switching the mux */
2032 set_audio( bktr, AUDIO_MUTE );
2033
2034 /* disable drivers on the GPIO port that control the MUXes */
2035 bktr->base->gpio_out_en = bktr->base->gpio_out_en & ~bktr->card.gpio_mux_bits;
2036
2037 return( 0 );
2038}
2039
2040static int
2041vbi_close( bktr_ptr_t bktr )
2042{
2043
2044 bktr->vbiflags &= ~VBI_OPEN;
2045
2046 return( 0 );
2047}
2048
2049/*
2050 *
2051 */
2052static int
2053video_read(bktr_ptr_t bktr, int unit, dev_t dev, struct uio *uio)
2054{
2055 bt848_ptr_t bt848;
2056 int status;
2057 int count;
2058
2059
2060 bt848 = bktr->base;
2061
2062 if (bktr->bigbuf == 0) /* no frame buffer allocated (ioctl failed) */
2063 return( ENOMEM );
2064
2065 if (bktr->flags & METEOR_CAP_MASK)
2066 return( EIO ); /* already capturing */
2067
2068 bt848->cap_ctl = bktr->bktr_cap_ctl;
2069
2070
2071 count = bktr->rows * bktr->cols *
2072 pixfmt_table[ bktr->pixfmt ].public.Bpp;
2073
2074 if ((int) uio->uio_iov->iov_len < count)
2075 return( EINVAL );
2076
2077 bktr->flags &= ~(METEOR_CAP_MASK | METEOR_WANT_MASK);
2078
2079 /* capture one frame */
2080 start_capture(bktr, METEOR_SINGLE);
2081 /* wait for capture to complete */
2082 bt848->int_stat = ALL_INTS_CLEARED;
2083 bt848->gpio_dma_ctl = FIFO_ENABLED;
2084 bt848->gpio_dma_ctl = bktr->capcontrol;
2085 bt848->int_mask = BT848_INT_MYSTERYBIT |
2086 BT848_INT_RISCI |
2087 BT848_INT_VSYNC |
2088 BT848_INT_FMTCHG;
2089
2090
2091 status = tsleep(BKTR_SLEEP, BKTRPRI, "captur", 0);
2092 if (!status) /* successful capture */
2093 status = uiomove((caddr_t)bktr->bigbuf, count, uio);
2094 else
2095 printf ("bktr%d: read: tsleep error %d\n", unit, status);
2096
2097 bktr->flags &= ~(METEOR_SINGLE | METEOR_WANT_MASK);
2098
2099 return( status );
2100}
2101
2102/*
2103 * Read VBI data from the vbi circular buffer
2104 * The buffer holds vbi data blocks which are the same size
2105 * vbiinsert is the position we will insert the next item into the buffer
2106 * vbistart is the actual position in the buffer we want to read from
2107 * vbisize is the exact number of bytes in the buffer left to read
2108 */
2109static int
2110vbi_read(bktr_ptr_t bktr, struct uio *uio, int ioflag)
2111{
2112 int readsize, readsize2;
2113 int status;
2114
2115
2116 while(bktr->vbisize == 0) {
2117 if (ioflag & IO_NDELAY) {
2118 return EWOULDBLOCK;
2119 }
2120
2121 bktr->vbi_read_blocked = TRUE;
2122 if ((status = tsleep(VBI_SLEEP, VBIPRI, "vbi", 0))) {
2123 return status;
2124 }
2125 }
2126
2127 /* Now we have some data to give to the user */
2128
2129 /* We cannot read more bytes than there are in
2130 * the circular buffer
2131 */
2132 readsize = (int)uio->uio_iov->iov_len;
2133
2134 if (readsize > bktr->vbisize) readsize = bktr->vbisize;
2135
2136 /* Check if we can read this number of bytes without having
2137 * to wrap around the circular buffer */
2138 if((bktr->vbistart + readsize) >= VBI_BUFFER_SIZE) {
2139 /* We need to wrap around */
2140
2141 readsize2 = VBI_BUFFER_SIZE - bktr->vbistart;
2142 status = uiomove((caddr_t)bktr->vbibuffer + bktr->vbistart, readsize2, uio);
2143 status += uiomove((caddr_t)bktr->vbibuffer, (readsize - readsize2), uio);
2144 } else {
2145 /* We do not need to wrap around */
2146 status = uiomove((caddr_t)bktr->vbibuffer + bktr->vbistart, readsize, uio);
2147 }
2148
2149 /* Update the number of bytes left to read */
2150 bktr->vbisize -= readsize;
2151
2152 /* Update vbistart */
2153 bktr->vbistart += readsize;
2154 bktr->vbistart = bktr->vbistart % VBI_BUFFER_SIZE; /* wrap around if needed */
2155
2156return( status );
2157
2158}
2159
2160
2161
2162/*
2163 * video ioctls
2164 */
2165static int
2166video_ioctl( bktr_ptr_t bktr, int unit, int cmd, caddr_t arg, struct proc* pr )
2167{
2168 bt848_ptr_t bt848;
2169 volatile u_char c_temp;
2170 unsigned int temp;
2171 unsigned int temp_iform;
2172 unsigned int error;
2173 struct meteor_geomet *geo;
2174 struct meteor_counts *counts;
2175 struct meteor_video *video;
2176 struct bktr_capture_area *cap_area;
2177 vm_offset_t buf;
2178 int i;
2179 char char_temp;
2180
2181 bt848 = bktr->base;
2182
2183 switch ( cmd ) {
2184
2185 case BT848SCLIP: /* set clip region */
2186 bktr->max_clip_node = 0;
2187 memcpy(&bktr->clip_list, arg, sizeof(bktr->clip_list));
2188
2189 for (i = 0; i < BT848_MAX_CLIP_NODE; i++) {
2190 if (bktr->clip_list[i].y_min == 0 &&
2191 bktr->clip_list[i].y_max == 0)
2192 break;
2193 }
2194 bktr->max_clip_node = i;
2195
2196 /* make sure that the list contains a valid clip secquence */
2197 /* the clip rectangles should be sorted by x then by y as the
2198 second order sort key */
2199
2200 /* clip rectangle list is terminated by y_min and y_max set to 0 */
2201
2202 /* to disable clipping set y_min and y_max to 0 in the first
2203 clip rectangle . The first clip rectangle is clip_list[0].
2204 */
2205
2206
2207
2208 if (bktr->max_clip_node == 0 &&
2209 (bktr->clip_list[0].y_min != 0 &&
2210 bktr->clip_list[0].y_max != 0)) {
2211 return EINVAL;
2212 }
2213
2214 for (i = 0; i < BT848_MAX_CLIP_NODE - 1 ; i++) {
2215 if (bktr->clip_list[i].y_min == 0 &&
2216 bktr->clip_list[i].y_max == 0) {
2217 break;
2218 }
2219 if ( bktr->clip_list[i+1].y_min != 0 &&
2220 bktr->clip_list[i+1].y_max != 0 &&
2221 bktr->clip_list[i].x_min > bktr->clip_list[i+1].x_min ) {
2222
2223 bktr->max_clip_node = 0;
2224 return (EINVAL);
2225
2226 }
2227
2228 if (bktr->clip_list[i].x_min >= bktr->clip_list[i].x_max ||
2229 bktr->clip_list[i].y_min >= bktr->clip_list[i].y_max ||
2230 bktr->clip_list[i].x_min < 0 ||
2231 bktr->clip_list[i].x_max < 0 ||
2232 bktr->clip_list[i].y_min < 0 ||
2233 bktr->clip_list[i].y_max < 0 ) {
2234 bktr->max_clip_node = 0;
2235 return (EINVAL);
2236 }
2237 }
2238
2239 bktr->dma_prog_loaded = FALSE;
2240
2241 break;
2242
2243 case METEORSTATUS: /* get Bt848 status */
2244 c_temp = bt848->dstatus;
2245 temp = 0;
2246 if (!(c_temp & 0x40)) temp |= METEOR_STATUS_HCLK;
2247 if (!(c_temp & 0x10)) temp |= METEOR_STATUS_FIDT;
2248 *(u_short *)arg = temp;
2249 break;
2250
2251 case BT848SFMT: /* set input format */
2252 temp = *(unsigned long*)arg & BT848_IFORM_FORMAT;
2253 temp_iform = bt848->iform;
2254 temp_iform &= ~BT848_IFORM_FORMAT;
2255 temp_iform &= ~BT848_IFORM_XTSEL;
2256 bt848->iform = (temp_iform | temp | format_params[temp].iform_xtsel);
2257 switch( temp ) {
2258 case BT848_IFORM_F_AUTO:
2259 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
2260 METEOR_AUTOMODE;
2261 break;
2262
2263 case BT848_IFORM_F_NTSCM:
2264 case BT848_IFORM_F_NTSCJ:
2265 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
2266 METEOR_NTSC;
2267 bt848->adelay = format_params[temp].adelay;
2268 bt848->bdelay = format_params[temp].bdelay;
2269 bktr->format_params = temp;
2270 break;
2271
2272 case BT848_IFORM_F_PALBDGHI:
2273 case BT848_IFORM_F_PALN:
2274 case BT848_IFORM_F_SECAM:
2275 case BT848_IFORM_F_RSVD:
2276 case BT848_IFORM_F_PALM:
2277 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
2278 METEOR_PAL;
2279 bt848->adelay = format_params[temp].adelay;
2280 bt848->bdelay = format_params[temp].bdelay;
2281 bktr->format_params = temp;
2282 break;
2283
2284 }
2285 bktr->dma_prog_loaded = FALSE;
2286 break;
2287
2288 case METEORSFMT: /* set input format */
2289 temp_iform = bt848->iform;
2290 temp_iform &= ~BT848_IFORM_FORMAT;
2291 temp_iform &= ~BT848_IFORM_XTSEL;
2292 switch(*(unsigned long *)arg & METEOR_FORM_MASK ) {
2293 case 0: /* default */
2294 case METEOR_FMT_NTSC:
2295 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
2296 METEOR_NTSC;
2297 bt848->iform = temp_iform | BT848_IFORM_F_NTSCM |
2298 format_params[BT848_IFORM_F_NTSCM].iform_xtsel;
2299 bt848->adelay = format_params[BT848_IFORM_F_NTSCM].adelay;
2300 bt848->bdelay = format_params[BT848_IFORM_F_NTSCM].bdelay;
2301 bktr->format_params = BT848_IFORM_F_NTSCM;
2302 break;
2303
2304 case METEOR_FMT_PAL:
2305 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
2306 METEOR_PAL;
2307 bt848->iform = temp_iform | BT848_IFORM_F_PALBDGHI |
2308 format_params[BT848_IFORM_F_PALBDGHI].iform_xtsel;
2309 bt848->adelay = format_params[BT848_IFORM_F_PALBDGHI].adelay;
2310 bt848->bdelay = format_params[BT848_IFORM_F_PALBDGHI].bdelay;
2311 bktr->format_params = BT848_IFORM_F_PALBDGHI;
2312 break;
2313
2314 case METEOR_FMT_AUTOMODE:
2315 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
2316 METEOR_AUTOMODE;
2317 bt848->iform = temp_iform | BT848_IFORM_F_AUTO |
2318 format_params[BT848_IFORM_F_AUTO].iform_xtsel;
2319 break;
2320
2321 default:
2322 return( EINVAL );
2323 }
2324 bktr->dma_prog_loaded = FALSE;
2325 break;
2326
2327 case METEORGFMT: /* get input format */
2328 *(u_long *)arg = bktr->flags & METEOR_FORM_MASK;
2329 break;
2330
2331
2332 case BT848GFMT: /* get input format */
2333 *(u_long *)arg = bt848->iform & BT848_IFORM_FORMAT;
2334 break;
2335
2336 case METEORSCOUNT: /* (re)set error counts */
2337 counts = (struct meteor_counts *) arg;
2338 bktr->fifo_errors = counts->fifo_errors;
2339 bktr->dma_errors = counts->dma_errors;
2340 bktr->frames_captured = counts->frames_captured;
2341 bktr->even_fields_captured = counts->even_fields_captured;
2342 bktr->odd_fields_captured = counts->odd_fields_captured;
2343 break;
2344
2345 case METEORGCOUNT: /* get error counts */
2346 counts = (struct meteor_counts *) arg;
2347 counts->fifo_errors = bktr->fifo_errors;
2348 counts->dma_errors = bktr->dma_errors;
2349 counts->frames_captured = bktr->frames_captured;
2350 counts->even_fields_captured = bktr->even_fields_captured;
2351 counts->odd_fields_captured = bktr->odd_fields_captured;
2352 break;
2353
2354 case METEORGVIDEO:
2355 video = (struct meteor_video *)arg;
2356 video->addr = bktr->video.addr;
2357 video->width = bktr->video.width;
2358 video->banksize = bktr->video.banksize;
2359 video->ramsize = bktr->video.ramsize;
2360 break;
2361
2362 case METEORSVIDEO:
2363 video = (struct meteor_video *)arg;
2364 bktr->video.addr = video->addr;
2365 bktr->video.width = video->width;
2366 bktr->video.banksize = video->banksize;
2367 bktr->video.ramsize = video->ramsize;
2368 break;
2369
2370 case METEORSFPS:
2371 set_fps(bktr, *(u_short *)arg);
2372 break;
2373
2374 case METEORGFPS:
2375 *(u_short *)arg = bktr->fps;
2376 break;
2377
2378 case METEORSHUE: /* set hue */
2379 bt848->hue = (*(u_char *) arg) & 0xff;
2380 break;
2381
2382 case METEORGHUE: /* get hue */
2383 *(u_char *)arg = bt848->hue;
2384 break;
2385
2386 case METEORSBRIG: /* set brightness */
2387 char_temp = ( *(u_char *)arg & 0xff) - 128;
2388 bt848->bright = char_temp;
2389
2390 break;
2391
2392 case METEORGBRIG: /* get brightness */
2393 *(u_char *)arg = bt848->bright;
2394 break;
2395
2396 case METEORSCSAT: /* set chroma saturation */
2397 temp = (int)*(u_char *)arg;
2398
2399 bt848->sat_u_lo = bt848->sat_v_lo = (temp << 1) & 0xff;
2400
2401 bt848->e_control &= ~(BT848_E_CONTROL_SAT_U_MSB |
2402 BT848_E_CONTROL_SAT_V_MSB);
2403 bt848->o_control &= ~(BT848_O_CONTROL_SAT_U_MSB |
2404 BT848_O_CONTROL_SAT_V_MSB);
2405
2406 if ( temp & BIT_SEVEN_HIGH ) {
2407 bt848->e_control |= (BT848_E_CONTROL_SAT_U_MSB |
2408 BT848_E_CONTROL_SAT_V_MSB);
2409 bt848->o_control |= (BT848_O_CONTROL_SAT_U_MSB |
2410 BT848_O_CONTROL_SAT_V_MSB);
2411 }
2412 break;
2413
2414 case METEORGCSAT: /* get chroma saturation */
2415 temp = (bt848->sat_v_lo >> 1) & 0xff;
2416 if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB )
2417 temp |= BIT_SEVEN_HIGH;
2418 *(u_char *)arg = (u_char)temp;
2419 break;
2420
2421 case METEORSCONT: /* set contrast */
2422 temp = (int)*(u_char *)arg & 0xff;
2423 temp <<= 1;
2424 bt848->contrast_lo = temp & 0xff;
2425 bt848->e_control &= ~BT848_E_CONTROL_CON_MSB;
2426 bt848->o_control &= ~BT848_O_CONTROL_CON_MSB;
2427 bt848->e_control |=
2428 ((temp & 0x100) >> 6 ) & BT848_E_CONTROL_CON_MSB;
2429 bt848->o_control |=
2430 ((temp & 0x100) >> 6 ) & BT848_O_CONTROL_CON_MSB;
2431 break;
2432
2433 case METEORGCONT: /* get contrast */
2434 temp = (int)bt848->contrast_lo & 0xff;
2435 temp |= ((int)bt848->o_control & 0x04) << 6;
2436 *(u_char *)arg = (u_char)((temp >> 1) & 0xff);
2437 break;
2438
2439 case BT848SCBUF: /* set Clear-Buffer-on-start flag */
2440 bktr->clr_on_start = (*(int *)arg != 0);
2441 break;
2442
2443 case BT848GCBUF: /* get Clear-Buffer-on-start flag */
2444 *(int *)arg = (int) bktr->clr_on_start;
2445 break;
2446
2447 case METEORSSIGNAL:
2448 if(*(int *)arg == 0 || *(int *)arg >= NSIG) {
2449 return( EINVAL );
2450 break;
2451 }
2452 bktr->signal = *(int *) arg;
2453 bktr->proc = pr;
2454 break;
2455
2456 case METEORGSIGNAL:
2457 *(int *)arg = bktr->signal;
2458 break;
2459
2460 case METEORCAPTUR:
2461 temp = bktr->flags;
2462 switch (*(int *) arg) {
2463 case METEOR_CAP_SINGLE:
2464
2465 if (bktr->bigbuf==0) /* no frame buffer allocated */
2466 return( ENOMEM );
2467 /* already capturing */
2468 if (temp & METEOR_CAP_MASK)
2469 return( EIO );
2470
2471
2472
2473 start_capture(bktr, METEOR_SINGLE);
2474
2475 /* wait for capture to complete */
2476 bt848->int_stat = ALL_INTS_CLEARED;
2477 bt848->gpio_dma_ctl = FIFO_ENABLED;
2478 bt848->gpio_dma_ctl = bktr->capcontrol;
2479
2480 bt848->int_mask = BT848_INT_MYSTERYBIT |
2481 BT848_INT_RISCI |
2482 BT848_INT_VSYNC |
2483 BT848_INT_FMTCHG;
2484
2485 bt848->cap_ctl = bktr->bktr_cap_ctl;
2486 error = tsleep(BKTR_SLEEP, BKTRPRI, "captur", hz);
2487 if (error && (error != ERESTART)) {
2488 /* Here if we didn't get complete frame */
2489#ifdef DIAGNOSTIC
2490 printf( "bktr%d: ioctl: tsleep error %d %x\n",
2491 unit, error, bt848->risc_count);
2492#endif
2493
2494 /* stop dma */
2495 bt848->int_mask = ALL_INTS_DISABLED;
2496
2497 /* disable risc, leave fifo running */
2498 bt848->gpio_dma_ctl = FIFO_ENABLED;
2499 }
2500
2501 bktr->flags &= ~(METEOR_SINGLE|METEOR_WANT_MASK);
2502 /* FIXME: should we set bt848->int_stat ??? */
2503 break;
2504
2505 case METEOR_CAP_CONTINOUS:
2506 if (bktr->bigbuf==0) /* no frame buffer allocated */
2507 return( ENOMEM );
2508 /* already capturing */
2509 if (temp & METEOR_CAP_MASK)
2510 return( EIO );
2511
2512
2513 start_capture(bktr, METEOR_CONTIN);
2514 bt848->int_stat = bt848->int_stat;
2515
2516 bt848->gpio_dma_ctl = FIFO_ENABLED;
2517 bt848->gpio_dma_ctl = bktr->capcontrol;
2518 bt848->cap_ctl = bktr->bktr_cap_ctl;
2519
2520 bt848->int_mask = BT848_INT_MYSTERYBIT |
2521 BT848_INT_RISCI |
2522 BT848_INT_VSYNC |
2523 BT848_INT_FMTCHG;
2524#ifdef BT848_DUMP
2525 dump_bt848( bt848 );
2526#endif
2527 break;
2528
2529 case METEOR_CAP_STOP_CONT:
2530 if (bktr->flags & METEOR_CONTIN) {
2531 /* turn off capture */
2532 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
2533 bt848->cap_ctl = CAPTURE_OFF;
2534 bt848->int_mask = ALL_INTS_DISABLED;
2535 bktr->flags &=
2536 ~(METEOR_CONTIN | METEOR_WANT_MASK);
2537
2538 }
2539 }
2540 break;
2541
2542 case METEORSETGEO:
2543 /* can't change parameters while capturing */
2544 if (bktr->flags & METEOR_CAP_MASK)
2545 return( EBUSY );
2546
2547
2548 geo = (struct meteor_geomet *) arg;
2549
2550 error = 0;
2551 /* Either even or odd, if even & odd, then these a zero */
2552 if ((geo->oformat & METEOR_GEO_ODD_ONLY) &&
2553 (geo->oformat & METEOR_GEO_EVEN_ONLY)) {
2554 printf( "bktr%d: ioctl: Geometry odd or even only.\n",
2555 unit);
2556 return( EINVAL );
2557 }
2558
2559 /* set/clear even/odd flags */
2560 if (geo->oformat & METEOR_GEO_ODD_ONLY)
2561 bktr->flags |= METEOR_ONLY_ODD_FIELDS;
2562 else
2563 bktr->flags &= ~METEOR_ONLY_ODD_FIELDS;
2564 if (geo->oformat & METEOR_GEO_EVEN_ONLY)
2565 bktr->flags |= METEOR_ONLY_EVEN_FIELDS;
2566 else
2567 bktr->flags &= ~METEOR_ONLY_EVEN_FIELDS;
2568
2569 if (geo->columns <= 0) {
2570 printf(
2571 "bktr%d: ioctl: %d: columns must be greater than zero.\n",
2572 unit, geo->columns);
2573 error = EINVAL;
2574 }
2575 else if ((geo->columns & 0x3fe) != geo->columns) {
2576 printf(
2577 "bktr%d: ioctl: %d: columns too large or not even.\n",
2578 unit, geo->columns);
2579 error = EINVAL;
2580 }
2581
2582 if (geo->rows <= 0) {
2583 printf(
2584 "bktr%d: ioctl: %d: rows must be greater than zero.\n",
2585 unit, geo->rows);
2586 error = EINVAL;
2587 }
2588 else if (((geo->rows & 0x7fe) != geo->rows) ||
2589 ((geo->oformat & METEOR_GEO_FIELD_MASK) &&
2590 ((geo->rows & 0x3fe) != geo->rows)) ) {
2591 printf(
2592 "bktr%d: ioctl: %d: rows too large or not even.\n",
2593 unit, geo->rows);
2594 error = EINVAL;
2595 }
2596
2597 if (geo->frames > 32) {
2598 printf("bktr%d: ioctl: too many frames.\n", unit);
2599
2600 error = EINVAL;
2601 }
2602
2603 if (error)
2604 return( error );
2605
2606 bktr->dma_prog_loaded = FALSE;
2607 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
2608
2609 bt848->int_mask = ALL_INTS_DISABLED;
2610
2611 if ((temp=(geo->rows * geo->columns * geo->frames * 2))) {
2612 if (geo->oformat & METEOR_GEO_RGB24) temp = temp * 2;
2613
2614 /* meteor_mem structure for SYNC Capture */
2615 if (geo->frames > 1) temp += PAGE_SIZE;
2616
2617 temp = btoc(temp);
2618 if ((int) temp > bktr->alloc_pages
2619 && bktr->video.addr == 0) {
2620
2621/*****************************/
2622/* *** OS Dependant code *** */
2623/*****************************/
2624#if defined(__NetBSD__) || defined(__OpenBSD__)
2625 bus_dmamap_t dmamap;
2626
2627 buf = get_bktr_mem(bktr, &dmamap,
2628 temp * PAGE_SIZE);
2629 if (buf != 0) {
2630 free_bktr_mem(bktr, bktr->dm_mem,
2631 bktr->bigbuf);
2632 bktr->dm_mem = dmamap;
2633
2634#else
2635 buf = get_bktr_mem(unit, temp*PAGE_SIZE);
2636 if (buf != 0) {
2637 kmem_free(kernel_map, bktr->bigbuf,
2638 (bktr->alloc_pages * PAGE_SIZE));
2639#endif
2640
2641 bktr->bigbuf = buf;
2642 bktr->alloc_pages = temp;
2643 if (bootverbose)
2644 printf(
2645 "bktr%d: ioctl: Allocating %d bytes\n",
2646 unit, temp*PAGE_SIZE);
2647 }
2648 else
2649 error = ENOMEM;
2650 }
2651 }
2652
2653 if (error)
2654 return error;
2655
2656 bktr->rows = geo->rows;
2657 bktr->cols = geo->columns;
2658 bktr->frames = geo->frames;
2659
2660 /* Pixel format (if in meteor pixfmt compatibility mode) */
2661 if ( bktr->pixfmt_compat ) {
2662 bktr->format = METEOR_GEO_YUV_422;
2663 switch (geo->oformat & METEOR_GEO_OUTPUT_MASK) {
2664 case 0: /* default */
2665 case METEOR_GEO_RGB16:
2666 bktr->format = METEOR_GEO_RGB16;
2667 break;
2668 case METEOR_GEO_RGB24:
2669 bktr->format = METEOR_GEO_RGB24;
2670 break;
2671 case METEOR_GEO_YUV_422:
2672 bktr->format = METEOR_GEO_YUV_422;
2673 if (geo->oformat & METEOR_GEO_YUV_12)
2674 bktr->format = METEOR_GEO_YUV_12;
2675 break;
2676 case METEOR_GEO_YUV_PACKED:
2677 bktr->format = METEOR_GEO_YUV_PACKED;
2678 break;
2679 }
2680 bktr->pixfmt = oformat_meteor_to_bt( bktr->format );
2681 }
2682
2683 if (bktr->flags & METEOR_CAP_MASK) {
2684
2685 if (bktr->flags & (METEOR_CONTIN|METEOR_SYNCAP)) {
2686 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
2687 case METEOR_ONLY_ODD_FIELDS:
2688 bktr->flags |= METEOR_WANT_ODD;
2689 break;
2690 case METEOR_ONLY_EVEN_FIELDS:
2691 bktr->flags |= METEOR_WANT_EVEN;
2692 break;
2693 default:
2694 bktr->flags |= METEOR_WANT_MASK;
2695 break;
2696 }
2697
2698 start_capture(bktr, METEOR_CONTIN);
2699 bt848->int_stat = bt848->int_stat;
2700 bt848->gpio_dma_ctl = FIFO_ENABLED;
2701 bt848->gpio_dma_ctl = bktr->capcontrol;
2702 bt848->int_mask = BT848_INT_MYSTERYBIT |
2703 BT848_INT_VSYNC |
2704 BT848_INT_FMTCHG;
2705 }
2706 }
2707 break;
2708 /* end of METEORSETGEO */
2709
2710 /* FIXME. The Capture Area currently has the following restrictions:
2711 GENERAL
2712 y_offset may need to be even in interlaced modes
2713 RGB24 - Interlaced mode
2714 x_size must be greater than or equal to 1.666*METEORSETGEO width (cols)
2715 y_size must be greater than or equal to METEORSETGEO height (rows)
2716 RGB24 - Even Only (or Odd Only) mode
2717 x_size must be greater than or equal to 1.666*METEORSETGEO width (cols)
2718 y_size must be greater than or equal to 2*METEORSETGEO height (rows)
2719 YUV12 - Interlaced mode
2720 x_size must be greater than or equal to METEORSETGEO width (cols)
2721 y_size must be greater than or equal to METEORSETGEO height (rows)
2722 YUV12 - Even Only (or Odd Only) mode
2723 x_size must be greater than or equal to METEORSETGEO width (cols)
2724 y_size must be greater than or equal to 2*METEORSETGEO height (rows)
2725 */
2726
2727 case BT848_SCAPAREA: /* set capture area of each video frame */
2728 /* can't change parameters while capturing */
2729 if (bktr->flags & METEOR_CAP_MASK)
2730 return( EBUSY );
2731
2732 cap_area = (struct bktr_capture_area *) arg;
2733 bktr->capture_area_x_offset = cap_area->x_offset;
2734 bktr->capture_area_y_offset = cap_area->y_offset;
2735 bktr->capture_area_x_size = cap_area->x_size;
2736 bktr->capture_area_y_size = cap_area->y_size;
2737 bktr->capture_area_enabled = TRUE;
2738
2739 bktr->dma_prog_loaded = FALSE;
2740 break;
2741
2742 case BT848_GCAPAREA: /* get capture area of each video frame */
2743 cap_area = (struct bktr_capture_area *) arg;
2744 if (bktr->capture_area_enabled == FALSE) {
2745 cap_area->x_offset = 0;
2746 cap_area->y_offset = 0;
2747 cap_area->x_size = format_params[
2748 bktr->format_params].scaled_hactive;
2749 cap_area->y_size = format_params[
2750 bktr->format_params].vactive;
2751 } else {
2752 cap_area->x_offset = bktr->capture_area_x_offset;
2753 cap_area->y_offset = bktr->capture_area_y_offset;
2754 cap_area->x_size = bktr->capture_area_x_size;
2755 cap_area->y_size = bktr->capture_area_y_size;
2756 }
2757 break;
2758
2759 default:
2760 return common_ioctl( bktr, bt848, cmd, arg );
2761 }
2762
2763 return( 0 );
2764}
2765
2766/*
2767 * tuner ioctls
2768 */
2769static int
2770tuner_ioctl( bktr_ptr_t bktr, int unit, int cmd, caddr_t arg, struct proc* pr )
2771{
2772 bt848_ptr_t bt848;
2773 int tmp_int;
2774 unsigned int temp, temp1;
2775 int offset;
2776 int count;
2777 u_char *buf;
2778 u_long par;
2779 u_char write;
2780 int i2c_addr;
2781 int i2c_port;
2782 u_long data;
2783
2784 bt848 = bktr->base;
2785
2786 switch ( cmd ) {
2787
2788 case REMOTE_GETKEY:
2789 /* Read the last key pressed by the Remote Control */
2790 if (bktr->remote_control == 0) return (EINVAL);
2791 remote_read(bktr, (struct bktr_remote *)arg);
2792 break;
2793
2794#if defined( TUNER_AFC )
2795 case TVTUNER_SETAFC:
2796 bktr->tuner.afc = (*(int *)arg != 0);
2797 break;
2798
2799 case TVTUNER_GETAFC:
2800 *(int *)arg = bktr->tuner.afc;
2801 /* XXX Perhaps use another bit to indicate AFC success? */
2802 break;
2803#endif /* TUNER_AFC */
2804
2805 case TVTUNER_SETCHNL:
2806 temp_mute( bktr, TRUE );
2807 temp = tv_channel( bktr, (int)*(unsigned long *)arg );
2808 temp_mute( bktr, FALSE );
2809 if ( temp < 0 )
2810 return( EINVAL );
2811 *(unsigned long *)arg = temp;
2812
2813 /* after every channel change, we must restart the MSP34xx */
2814 /* audio chip to reselect NICAM STEREO or MONO audio */
2815 if ( bktr->card.msp3400c )
2816 msp_autodetect( bktr );
2817 break;
2818
2819 case TVTUNER_GETCHNL:
2820 *(unsigned long *)arg = bktr->tuner.channel;
2821 break;
2822
2823 case TVTUNER_SETTYPE:
2824 temp = *(unsigned long *)arg;
2825 if ( (temp < CHNLSET_MIN) || (temp > CHNLSET_MAX) )
2826 return( EINVAL );
2827 bktr->tuner.chnlset = temp;
2828 break;
2829
2830 case TVTUNER_GETTYPE:
2831 *(unsigned long *)arg = bktr->tuner.chnlset;
2832 break;
2833
2834 case TVTUNER_GETSTATUS:
2835 temp = i2cRead( bktr, bktr->card.tuner_pllAddr + 1 );
2836 *(unsigned long *)arg = temp & 0xff;
2837 break;
2838
2839 case TVTUNER_SETFREQ:
2840 temp_mute( bktr, TRUE );
2841 temp = tv_freq( bktr, (int)*(unsigned long *)arg );
2842 temp_mute( bktr, FALSE );
2843 if ( temp < 0 )
2844 return( EINVAL );
2845 *(unsigned long *)arg = temp;
2846
2847 /* after every channel change, we must restart the MSP34xx */
2848 /* audio chip to reselect NICAM STEREO or MONO audio */
2849 if ( bktr->card.msp3400c )
2850 msp_autodetect( bktr );
2851 break;
2852
2853 case TVTUNER_GETFREQ:
2854 *(unsigned long *)arg = bktr->tuner.frequency;
2855 break;
2856
2857 case TVTUNER_GETCHNLSET:
2858 return tuner_getchnlset((struct bktr_chnlset *)arg);
2859
2860 case BT848_SAUDIO: /* set audio channel */
2861 if ( set_audio( bktr, *(int*)arg ) < 0 )
2862 return( EIO );
2863 break;
2864
2865 /* hue is a 2's compliment number, -90' to +89.3' in 0.7' steps */
2866 case BT848_SHUE: /* set hue */
2867 bt848->hue = (u_char)(*(int*)arg & 0xff);
2868 break;
2869
2870 case BT848_GHUE: /* get hue */
2871 *(int*)arg = (signed char)(bt848->hue & 0xff);
2872 break;
2873
2874 /* brightness is a 2's compliment #, -50 to +%49.6% in 0.39% steps */
2875 case BT848_SBRIG: /* set brightness */
2876 bt848->bright = (u_char)(*(int *)arg & 0xff);
2877 break;
2878
2879 case BT848_GBRIG: /* get brightness */
2880 *(int *)arg = (signed char)(bt848->bright & 0xff);
2881 break;
2882
2883 /* */
2884 case BT848_SCSAT: /* set chroma saturation */
2885 tmp_int = *(int*)arg;
2886
2887 temp = bt848->e_control;
2888 temp1 = bt848->o_control;
2889 if ( tmp_int & BIT_EIGHT_HIGH ) {
2890 temp |= (BT848_E_CONTROL_SAT_U_MSB |
2891 BT848_E_CONTROL_SAT_V_MSB);
2892 temp1 |= (BT848_O_CONTROL_SAT_U_MSB |
2893 BT848_O_CONTROL_SAT_V_MSB);
2894 }
2895 else {
2896 temp &= ~(BT848_E_CONTROL_SAT_U_MSB |
2897 BT848_E_CONTROL_SAT_V_MSB);
2898 temp1 &= ~(BT848_O_CONTROL_SAT_U_MSB |
2899 BT848_O_CONTROL_SAT_V_MSB);
2900 }
2901
2902 bt848->sat_u_lo = (u_char)(tmp_int & 0xff);
2903 bt848->sat_v_lo = (u_char)(tmp_int & 0xff);
2904 bt848->e_control = temp;
2905 bt848->o_control = temp1;
2906 break;
2907
2908 case BT848_GCSAT: /* get chroma saturation */
2909 tmp_int = (int)(bt848->sat_v_lo & 0xff);
2910 if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB )
2911 tmp_int |= BIT_EIGHT_HIGH;
2912 *(int*)arg = tmp_int;
2913 break;
2914
2915 /* */
2916 case BT848_SVSAT: /* set chroma V saturation */
2917 tmp_int = *(int*)arg;
2918
2919 temp = bt848->e_control;
2920 temp1 = bt848->o_control;
2921 if ( tmp_int & BIT_EIGHT_HIGH) {
2922 temp |= BT848_E_CONTROL_SAT_V_MSB;
2923 temp1 |= BT848_O_CONTROL_SAT_V_MSB;
2924 }
2925 else {
2926 temp &= ~BT848_E_CONTROL_SAT_V_MSB;
2927 temp1 &= ~BT848_O_CONTROL_SAT_V_MSB;
2928 }
2929
2930 bt848->sat_v_lo = (u_char)(tmp_int & 0xff);
2931 bt848->e_control = temp;
2932 bt848->o_control = temp1;
2933 break;
2934
2935 case BT848_GVSAT: /* get chroma V saturation */
2936 tmp_int = (int)bt848->sat_v_lo & 0xff;
2937 if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB )
2938 tmp_int |= BIT_EIGHT_HIGH;
2939 *(int*)arg = tmp_int;
2940 break;
2941
2942 /* */
2943 case BT848_SUSAT: /* set chroma U saturation */
2944 tmp_int = *(int*)arg;
2945
2946 temp = bt848->e_control;
2947 temp1 = bt848->o_control;
2948 if ( tmp_int & BIT_EIGHT_HIGH ) {
2949 temp |= BT848_E_CONTROL_SAT_U_MSB;
2950 temp1 |= BT848_O_CONTROL_SAT_U_MSB;
2951 }
2952 else {
2953 temp &= ~BT848_E_CONTROL_SAT_U_MSB;
2954 temp1 &= ~BT848_O_CONTROL_SAT_U_MSB;
2955 }
2956
2957 bt848->sat_u_lo = (u_char)(tmp_int & 0xff);
2958 bt848->e_control = temp;
2959 bt848->o_control = temp1;
2960 break;
2961
2962 case BT848_GUSAT: /* get chroma U saturation */
2963 tmp_int = (int)bt848->sat_u_lo & 0xff;
2964 if ( bt848->e_control & BT848_E_CONTROL_SAT_U_MSB )
2965 tmp_int |= BIT_EIGHT_HIGH;
2966 *(int*)arg = tmp_int;
2967 break;
2968
2969/* lr 970528 luma notch etc - 3 high bits of e_control/o_control */
2970
2971 case BT848_SLNOTCH: /* set luma notch */
2972 tmp_int = (*(int *)arg & 0x7) << 5 ;
2973 bt848->e_control &= ~0xe0 ;
2974 bt848->o_control &= ~0xe0 ;
2975 bt848->e_control |= tmp_int ;
2976 bt848->o_control |= tmp_int ;
2977 break;
2978
2979 case BT848_GLNOTCH: /* get luma notch */
2980 *(int *)arg = (int) ( (bt848->e_control & 0xe0) >> 5) ;
2981 break;
2982
2983
2984 /* */
2985 case BT848_SCONT: /* set contrast */
2986 tmp_int = *(int*)arg;
2987
2988 temp = bt848->e_control;
2989 temp1 = bt848->o_control;
2990 if ( tmp_int & BIT_EIGHT_HIGH ) {
2991 temp |= BT848_E_CONTROL_CON_MSB;
2992 temp1 |= BT848_O_CONTROL_CON_MSB;
2993 }
2994 else {
2995 temp &= ~BT848_E_CONTROL_CON_MSB;
2996 temp1 &= ~BT848_O_CONTROL_CON_MSB;
2997 }
2998
2999 bt848->contrast_lo = (u_char)(tmp_int & 0xff);
3000 bt848->e_control = temp;
3001 bt848->o_control = temp1;
3002 break;
3003
3004 case BT848_GCONT: /* get contrast */
3005 tmp_int = (int)bt848->contrast_lo & 0xff;
3006 if ( bt848->e_control & BT848_E_CONTROL_CON_MSB )
3007 tmp_int |= BIT_EIGHT_HIGH;
3008 *(int*)arg = tmp_int;
3009 break;
3010
3011 /* FIXME: SCBARS and CCBARS require a valid int * */
3012 /* argument to succeed, but its not used; consider */
3013 /* using the arg to store the on/off state so */
3014 /* there's only one ioctl() needed to turn cbars on/off */
3015 case BT848_SCBARS: /* set colorbar output */
3016 bt848->color_ctl_color_bars = 1;
3017 break;
3018
3019 case BT848_CCBARS: /* clear colorbar output */
3020 bt848->color_ctl_color_bars = 0;
3021 break;
3022
3023 case BT848_GAUDIO: /* get audio channel */
3024 temp = bktr->audio_mux_select;
3025 if ( bktr->audio_mute_state == TRUE )
3026 temp |= AUDIO_MUTE;
3027 *(int*)arg = temp;
3028 break;
3029
3030 case BT848_SBTSC: /* set audio channel */
3031 if ( set_BTSC( bktr, *(int*)arg ) < 0 )
3032 return( EIO );
3033 break;
3034
3035 case BT848_WEEPROM: /* write eeprom */
3036 offset = (((struct eeProm *)arg)->offset);
3037 count = (((struct eeProm *)arg)->count);
3038 buf = &(((struct eeProm *)arg)->bytes[ 0 ]);
3039 if ( writeEEProm( bktr, offset, count, buf ) < 0 )
3040 return( EIO );
3041 break;
3042
3043 case BT848_REEPROM: /* read eeprom */
3044 offset = (((struct eeProm *)arg)->offset);
3045 count = (((struct eeProm *)arg)->count);
3046 buf = &(((struct eeProm *)arg)->bytes[ 0 ]);
3047 if ( readEEProm( bktr, offset, count, buf ) < 0 )
3048 return( EIO );
3049 break;
3050
3051 case BT848_SIGNATURE:
3052 offset = (((struct eeProm *)arg)->offset);
3053 count = (((struct eeProm *)arg)->count);
3054 buf = &(((struct eeProm *)arg)->bytes[ 0 ]);
3055 if ( signCard( bktr, offset, count, buf ) < 0 )
3056 return( EIO );
3057 break;
3058
3059 /* Ioctl's for direct gpio access */
3060#ifdef BKTR_GPIO_ACCESS
3061 case BT848_GPIO_GET_EN:
3062 *(int*)arg = bt848->gpio_out_en;
3063 break;
3064
3065 case BT848_GPIO_SET_EN:
3066 bt848->gpio_out_en = *(int*)arg;
3067 break;
3068
3069 case BT848_GPIO_GET_DATA:
3070 *(int*)arg = bt848->gpio_data;
3071 break;
3072
3073 case BT848_GPIO_SET_DATA:
3074 bt848->gpio_data = *(int*)arg;
3075 break;
3076#endif /* BKTR_GPIO_ACCESS */
3077
3078 /* Ioctl's for running the tuner device in radio mode */
3079
3080 case RADIO_GETMODE:
3081 *(unsigned char *)arg = bktr->tuner.radio_mode;
3082 break;
3083
3084 case RADIO_SETMODE:
3085 bktr->tuner.radio_mode = *(unsigned char *)arg;
3086 break;
3087
3088 case RADIO_GETFREQ:
3089 *(unsigned long *)arg = (bktr->tuner.frequency+407)*5;
3090 break;
3091
3092 case RADIO_SETFREQ:
3093 /* The argument to this ioctl is NOT freq*16. It is
3094 ** freq*100.
3095 */
3096
3097 /* The radio in my stereo and the linear regression function
3098 ** in my HP48 have reached the conclusion that in order to
3099 ** set the radio tuner of the FM1216 to f MHz, the value to
3100 ** enter into the Tuner PLL is: f*20-407
3101 ** If anyone has the exact values from the spec. sheet
3102 ** please forward them -- fj@login.dknet.dk
3103 */
3104
3105 if(bktr->bt848_tuner == ALPS_TSCH5) {
3106 temp=((int)*(unsigned long *)arg + 4125) * 32;
3107 temp=temp/100 + (temp%100 >= 50 ? 1 : 0) +RADIO_OFFSET;
3108 } else {
3109 temp=(int)*(unsigned long *)arg/5-407 +RADIO_OFFSET;
3110 }
3111
3112#ifdef BKTR_RADIO_DEBUG
3113 printf("bktr%d: arg=%d temp=%d\n",unit,(int)*(unsigned long *)arg,temp);
3114#endif
3115
3116#ifndef BKTR_RADIO_NOFREQCHECK
3117 /* According to the spec. sheet the band: 87.5MHz-108MHz */
3118 /* is supported. */
3119 if(temp<1343+RADIO_OFFSET || temp>1753+RADIO_OFFSET) {
3120 printf("bktr%d: Radio frequency out of range\n",unit);
3121 return(EINVAL);
3122 }
3123#endif
3124 temp_mute( bktr, TRUE );
3125 temp = tv_freq( bktr, temp );
3126 temp_mute( bktr, FALSE );
3127#ifdef BKTR_RADIO_DEBUG
3128 if(temp)
3129 printf("bktr%d: tv_freq returned: %d\n",unit,temp);
3130#endif
3131 if ( temp < 0 )
3132 return( EINVAL );
3133 *(unsigned long *)arg = temp;
3134 break;
3135 /* Luigi's I2CWR ioctl */
3136 case BT848_I2CWR:
3137 par = *(u_long *)arg;
3138 write = (par >> 24) & 0xff ;
3139 i2c_addr = (par >> 16) & 0xff ;
3140 i2c_port = (par >> 8) & 0xff ;
3141 data = (par) & 0xff ;
3142
3143 if (write) {
3144 i2cWrite( bktr, i2c_addr, i2c_port, data);
3145 } else {
3146 data = i2cRead( bktr, i2c_addr);
3147 }
3148 *(u_long *)arg = (par & 0xffffff00) | ( data & 0xff );
3149 break;
3150
3151
3152 default:
3153 return common_ioctl( bktr, bt848, cmd, arg );
3154 }
3155
3156 return( 0 );
3157}
3158
3159
3160/*
3161 * common ioctls
3162 */
3163int
3164common_ioctl( bktr_ptr_t bktr, bt848_ptr_t bt848, int cmd, caddr_t arg )
3165{
3166 int pixfmt;
3167 unsigned int temp;
3168 struct meteor_pixfmt *pf_pub;
3169
3170 switch (cmd) {
3171
3172 case METEORSINPUT: /* set input device */
3173 /*Bt848 has 3 MUX Inputs. Bt848A/849A/878/879 has 4 MUX Inputs*/
3174 /* On the original bt848 boards, */
3175 /* Tuner is MUX0, RCA is MUX1, S-Video is MUX2 */
3176 /* On the Hauppauge bt878 boards, */
3177 /* Tuner is MUX0, RCA is MUX3 */
3178 /* Unfortunatly Meteor driver codes DEV_RCA as DEV_0, so we */
3179 /* stick with this system in our Meteor Emulation */
3180
3181 switch(*(unsigned long *)arg & METEOR_DEV_MASK) {
3182
3183 /* this is the RCA video input */
3184 case 0: /* default */
3185 case METEOR_INPUT_DEV0:
3186 /* METEOR_INPUT_DEV_RCA: */
3187 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
3188 | METEOR_DEV0;
3189 bt848->iform &= ~BT848_IFORM_MUXSEL;
3190
3191 /* work around for new Hauppauge 878 cards */
3192 if ((bktr->card.card_id == CARD_HAUPPAUGE) &&
3193 (bktr->id==BROOKTREE_878 ||
3194 bktr->id==BROOKTREE_879) )
3195 bt848->iform |= BT848_IFORM_M_MUX3;
3196 else
3197 bt848->iform |= BT848_IFORM_M_MUX1;
3198
3199 bt848->e_control &= ~BT848_E_CONTROL_COMP;
3200 bt848->o_control &= ~BT848_O_CONTROL_COMP;
3201 set_audio( bktr, AUDIO_EXTERN );
3202 break;
3203
3204 /* this is the tuner input */
3205 case METEOR_INPUT_DEV1:
3206 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
3207 | METEOR_DEV1;
3208 bt848->iform &= ~BT848_IFORM_MUXSEL;
3209 bt848->iform |= BT848_IFORM_M_MUX0;
3210 bt848->e_control &= ~BT848_E_CONTROL_COMP;
3211 bt848->o_control &= ~BT848_O_CONTROL_COMP;
3212 set_audio( bktr, AUDIO_TUNER );
3213 break;
3214
3215 /* this is the S-VHS input, but with a composite camera */
3216 case METEOR_INPUT_DEV2:
3217 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
3218 | METEOR_DEV2;
3219 bt848->iform &= ~BT848_IFORM_MUXSEL;
3220 bt848->iform |= BT848_IFORM_M_MUX2;
3221 bt848->e_control &= ~BT848_E_CONTROL_COMP;
3222 bt848->o_control &= ~BT848_O_CONTROL_COMP;
3223 set_audio( bktr, AUDIO_EXTERN );
3224 break;
3225
3226 /* this is the S-VHS input */
3227 case METEOR_INPUT_DEV_SVIDEO:
3228 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
3229 | METEOR_DEV_SVIDEO;
3230 bt848->iform &= ~BT848_IFORM_MUXSEL;
3231 bt848->iform |= BT848_IFORM_M_MUX2;
3232 bt848->e_control |= BT848_E_CONTROL_COMP;
3233 bt848->o_control |= BT848_O_CONTROL_COMP;
3234 set_audio( bktr, AUDIO_EXTERN );
3235 break;
3236
3237 case METEOR_INPUT_DEV3:
3238 if ((bktr->id == BROOKTREE_848A) ||
3239 (bktr->id == BROOKTREE_849A) ||
3240 (bktr->id == BROOKTREE_878) ||
3241 (bktr->id == BROOKTREE_879) ) {
3242 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
3243 | METEOR_DEV3;
3244 bt848->iform &= ~BT848_IFORM_MUXSEL;
3245
3246 /* work around for new Hauppauge 878 cards */
3247 if ((bktr->card.card_id == CARD_HAUPPAUGE) &&
3248 (bktr->id==BROOKTREE_878 ||
3249 bktr->id==BROOKTREE_879) )
3250 bt848->iform |= BT848_IFORM_M_MUX1;
3251 else
3252 bt848->iform |= BT848_IFORM_M_MUX3;
3253
3254 bt848->e_control &= ~BT848_E_CONTROL_COMP;
3255 bt848->o_control &= ~BT848_O_CONTROL_COMP;
3256 set_audio( bktr, AUDIO_EXTERN );
3257
3258 break;
3259 }
3260
3261 default:
3262 return( EINVAL );
3263 }
3264 break;
3265
3266 case METEORGINPUT: /* get input device */
3267 *(u_long *)arg = bktr->flags & METEOR_DEV_MASK;
3268 break;
3269
3270 case METEORSACTPIXFMT:
3271 if (( *(int *)arg < 0 ) ||
3272 ( *(int *)arg >= PIXFMT_TABLE_SIZE ))
3273 return( EINVAL );
3274
3275 bktr->pixfmt = *(int *)arg;
3276 bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt );
3277 bktr->pixfmt_compat = FALSE;
3278 break;
3279
3280 case METEORGACTPIXFMT:
3281 *(int *)arg = bktr->pixfmt;
3282 break;
3283
3284 case METEORGSUPPIXFMT :
3285 pf_pub = (struct meteor_pixfmt *)arg;
3286 pixfmt = pf_pub->index;
3287
3288 if (( pixfmt < 0 ) || ( pixfmt >= PIXFMT_TABLE_SIZE ))
3289 return( EINVAL );
3290
3291 memcpy( pf_pub, &pixfmt_table[ pixfmt ].public,
3292 sizeof( *pf_pub ) );
3293
3294 /* Patch in our format index */
3295 pf_pub->index = pixfmt;
3296 break;
3297
3298#if defined( STATUS_SUM )
3299 case BT848_GSTATUS: /* reap status */
3300 disable_intr();
3301 temp = status_sum;
3302 status_sum = 0;
3303 enable_intr();
3304 *(u_int*)arg = temp;
3305 break;
3306#endif /* STATUS_SUM */
3307
3308 default:
3309 return( ENOTTY );
3310 }
3311
3312 return( 0 );
3313}
3314
3315
3316
3317
3318/******************************************************************************
3319 * bt848 RISC programming routines:
3320 */
3321
3322
3323/*
3324 *
3325 */
3326#ifdef BT848_DEBUG
3327static int
3328dump_bt848( bt848_ptr_t bt848 )
3329{
3330 volatile u_char *bt848r = (u_char *)bt848;
3331 int r[60]={
3332 4, 8, 0xc, 0x8c, 0x10, 0x90, 0x14, 0x94,
3333 0x18, 0x98, 0x1c, 0x9c, 0x20, 0xa0, 0x24, 0xa4,
3334 0x28, 0x2c, 0xac, 0x30, 0x34, 0x38, 0x3c, 0x40,
3335 0xc0, 0x48, 0x4c, 0xcc, 0x50, 0xd0, 0xd4, 0x60,
3336 0x64, 0x68, 0x6c, 0xec, 0xd8, 0xdc, 0xe0, 0xe4,
3337 0, 0, 0, 0
3338 };
3339 int i;
3340
3341 for (i = 0; i < 40; i+=4) {
3342 printf(" Reg:value : \t%x:%x \t%x:%x \t %x:%x \t %x:%x\n",
3343 r[i], bt848r[r[i]],
3344 r[i+1], bt848r[r[i+1]],
3345 r[i+2], bt848r[r[i+2]],
3346 r[i+3], bt848r[r[i+3]]);
3347 }
3348
3349 printf(" INT STAT %x \n", bt848->int_stat);
3350 printf(" Reg INT_MASK %x \n", bt848->int_mask);
3351 printf(" Reg GPIO_DMA_CTL %x \n", bt848->gpio_dma_ctl);
3352
3353 return( 0 );
3354}
3355
3356#endif
3357
3358/*
3359 * build write instruction
3360 */
3361#define BKTR_FM1 0x6 /* packed data to follow */
3362#define BKTR_FM3 0xe /* planar data to follow */
3363#define BKTR_VRE 0x4 /* Marks the end of the even field */
3364#define BKTR_VRO 0xC /* Marks the end of the odd field */
3365#define BKTR_PXV 0x0 /* valid word (never used) */
3366#define BKTR_EOL 0x1 /* last dword, 4 bytes */
3367#define BKTR_SOL 0x2 /* first dword */
3368
3369#define OP_WRITE (0x1 << 28)
3370#define OP_SKIP (0x2 << 28)
3371#define OP_WRITEC (0x5 << 28)
3372#define OP_JUMP (0x7 << 28)
3373#define OP_SYNC (0x8 << 28)
3374#define OP_WRITE123 (0x9 << 28)
3375#define OP_WRITES123 (0xb << 28)
3376#define OP_SOL (1 << 27) /* first instr for scanline */
3377#define OP_EOL (1 << 26)
3378
3379#define BKTR_RESYNC (1 << 15)
3380#define BKTR_GEN_IRQ (1 << 24)
3381
3382/*
3383 * The RISC status bits can be set/cleared in the RISC programs
3384 * and tested in the Interrupt Handler
3385 */
3386#define BKTR_SET_RISC_STATUS_BIT0 (1 << 16)
3387#define BKTR_SET_RISC_STATUS_BIT1 (1 << 17)
3388#define BKTR_SET_RISC_STATUS_BIT2 (1 << 18)
3389#define BKTR_SET_RISC_STATUS_BIT3 (1 << 19)
3390
3391#define BKTR_CLEAR_RISC_STATUS_BIT0 (1 << 20)
3392#define BKTR_CLEAR_RISC_STATUS_BIT1 (1 << 21)
3393#define BKTR_CLEAR_RISC_STATUS_BIT2 (1 << 22)
3394#define BKTR_CLEAR_RISC_STATUS_BIT3 (1 << 23)
3395
3396#define BKTR_TEST_RISC_STATUS_BIT0 (1 << 28)
3397#define BKTR_TEST_RISC_STATUS_BIT1 (1 << 29)
3398#define BKTR_TEST_RISC_STATUS_BIT2 (1 << 30)
3399#define BKTR_TEST_RISC_STATUS_BIT3 (1 << 31)
3400
3401bool_t notclipped (bktr_reg_t * bktr, int x, int width) {
3402 int i;
3403 bktr_clip_t * clip_node;
3404 bktr->clip_start = -1;
3405 bktr->last_y = 0;
3406 bktr->y = 0;
3407 bktr->y2 = width;
3408 bktr->line_length = width;
3409 bktr->yclip = -1;
3410 bktr->yclip2 = -1;
3411 bktr->current_col = 0;
3412
3413 if (bktr->max_clip_node == 0 ) return TRUE;
3414 clip_node = (bktr_clip_t *) &bktr->clip_list[0];
3415
3416
3417 for (i = 0; i < bktr->max_clip_node; i++ ) {
3418 clip_node = (bktr_clip_t *) &bktr->clip_list[i];
3419 if (x >= clip_node->x_min && x <= clip_node->x_max ) {
3420 bktr->clip_start = i;
3421 return FALSE;
3422 }
3423 }
3424
3425 return TRUE;
3426}
3427
3428bool_t getline(bktr_reg_t *bktr, int x ) {
3429 int i, j;
3430 bktr_clip_t * clip_node ;
3431
3432 if (bktr->line_length == 0 ||
3433 bktr->current_col >= bktr->line_length) return FALSE;
3434
3435 bktr->y = min(bktr->last_y, bktr->line_length);
3436 bktr->y2 = bktr->line_length;
3437
3438 bktr->yclip = bktr->yclip2 = -1;
3439 for (i = bktr->clip_start; i < bktr->max_clip_node; i++ ) {
3440 clip_node = (bktr_clip_t *) &bktr->clip_list[i];
3441 if (x >= clip_node->x_min && x <= clip_node->x_max) {
3442 if (bktr->last_y <= clip_node->y_min) {
3443 bktr->y = min(bktr->last_y, bktr->line_length);
3444 bktr->y2 = min(clip_node->y_min, bktr->line_length);
3445 bktr->yclip = min(clip_node->y_min, bktr->line_length);
3446 bktr->yclip2 = min(clip_node->y_max, bktr->line_length);
3447 bktr->last_y = bktr->yclip2;
3448 bktr->clip_start = i;
3449
3450 for (j = i+1; j < bktr->max_clip_node; j++ ) {
3451 clip_node = (bktr_clip_t *) &bktr->clip_list[j];
3452 if (x >= clip_node->x_min && x <= clip_node->x_max) {
3453 if (bktr->last_y >= clip_node->y_min) {
3454 bktr->yclip2 = min(clip_node->y_max, bktr->line_length);
3455 bktr->last_y = bktr->yclip2;
3456 bktr->clip_start = j;
3457 }
3458 } else break ;
3459 }
3460 return TRUE;
3461 }
3462 }
3463 }
3464
3465 if (bktr->current_col <= bktr->line_length) {
3466 bktr->current_col = bktr->line_length;
3467 return TRUE;
3468 }
3469 return FALSE;
3470}
3471
3472static bool_t split(bktr_reg_t * bktr, volatile u_long **dma_prog, int width ,
3473 u_long operation, int pixel_width,
3474 volatile u_char ** target_buffer, int cols ) {
3475
3476 u_long flag, flag2;
3477 struct meteor_pixfmt *pf = &pixfmt_table[ bktr->pixfmt ].public;
3478 u_int skip, start_skip;
3479
3480 /* For RGB24, we need to align the component in FIFO Byte Lane 0 */
3481 /* to the 1st byte in the mem dword containing our start addr. */
3482 /* BTW, we know this pixfmt's 1st byte is Blue; thus the start addr */
3483 /* must be Blue. */
3484 start_skip = 0;
3485 if (( pf->type == METEOR_PIXTYPE_RGB ) && ( pf->Bpp == 3 ))
3486 switch ( ((uintptr_t) (volatile void *) *target_buffer) % 4 ) {
3487 case 2 : start_skip = 4 ; break;
3488 case 1 : start_skip = 8 ; break;
3489 }
3490
3491 if ((width * pixel_width) < DMA_BT848_SPLIT ) {
3492 if ( width == cols) {
3493 flag = OP_SOL | OP_EOL;
3494 } else if (bktr->current_col == 0 ) {
3495 flag = OP_SOL;
3496 } else if (bktr->current_col == cols) {
3497 flag = OP_EOL;
3498 } else flag = 0;
3499
3500 skip = 0;
3501 if (( flag & OP_SOL ) && ( start_skip > 0 )) {
3502 *(*dma_prog)++ = OP_SKIP | OP_SOL | start_skip;
3503 flag &= ~OP_SOL;
3504 skip = start_skip;
3505 }
3506
3507 *(*dma_prog)++ = operation | flag | (width * pixel_width - skip);
3508 if (operation != OP_SKIP )
3509 *(*dma_prog)++ = (uintptr_t) (volatile void *) *target_buffer;
3510
3511 *target_buffer += width * pixel_width;
3512 bktr->current_col += width;
3513
3514 } else {
3515
3516 if (bktr->current_col == 0 && width == cols) {
3517 flag = OP_SOL ;
3518 flag2 = OP_EOL;
3519 } else if (bktr->current_col == 0 ) {
3520 flag = OP_SOL;
3521 flag2 = 0;
3522 } else if (bktr->current_col >= cols) {
3523 flag = 0;
3524 flag2 = OP_EOL;
3525 } else {
3526 flag = 0;
3527 flag2 = 0;
3528 }
3529
3530 skip = 0;
3531 if (( flag & OP_SOL ) && ( start_skip > 0 )) {
3532 *(*dma_prog)++ = OP_SKIP | OP_SOL | start_skip;
3533 flag &= ~OP_SOL;
3534 skip = start_skip;
3535 }
3536
3537 *(*dma_prog)++ = operation | flag |
3538 (width * pixel_width / 2 - skip);
3539 if (operation != OP_SKIP )
3540 *(*dma_prog)++ = (uintptr_t) (volatile void *) *target_buffer ;
3541 *target_buffer += (width * pixel_width / 2) ;
3542
3543 if ( operation == OP_WRITE )
3544 operation = OP_WRITEC;
3545 *(*dma_prog)++ = operation | flag2 |
3546 (width * pixel_width / 2);
3547 *target_buffer += (width * pixel_width / 2) ;
3548 bktr->current_col += width;
3549
3550 }
3551 return TRUE;
3552}
3553
3554
3555/*
3556 * Generate the RISC instructions to capture both VBI and video images
3557 */
3558static void
3559rgb_vbi_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace )
3560{
3561 int i;
3562 bt848_ptr_t bt848;
3563 volatile u_long target_buffer, buffer, target,width;
3564 volatile u_long pitch;
3565 volatile u_long *dma_prog;
3566 vm_offset_t loop_point;
3567 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
3568 u_int Bpp = pf_int->public.Bpp;
3569 unsigned int vbisamples; /* VBI samples per line */
3570 unsigned int vbilines; /* VBI lines per field */
3571 unsigned int num_dwords; /* DWORDS per line */
3572
3573 vbisamples = format_params[bktr->format_params].vbi_num_samples;
3574 vbilines = format_params[bktr->format_params].vbi_num_lines;
3575 num_dwords = vbisamples/4;
3576
3577 bt848 = bktr->base;
3578
3579 bt848->color_fmt = pf_int->color_fmt;
3580 bt848->adc = SYNC_LEVEL;
3581 bt848->vbi_pack_size = ((num_dwords)) & 0xff;
3582 bt848->vbi_pack_del = ((num_dwords)>> 8) & 0x01; /* no hdelay */
3583 /* no ext frame */
3584
3585 bt848->oform = 0x00;
3586
3587 bt848->e_vscale_hi |= 0x40; /* set chroma comb */
3588 bt848->o_vscale_hi |= 0x40;
3589 bt848->e_vscale_hi &= ~0x80; /* clear Ycomb */
3590 bt848->o_vscale_hi &= ~0x80;
3591
3592 /* disable gamma correction removal */
3593 bt848->color_ctl_gamma = 1;
3594
3595
3596 if (cols > 385 ) {
3597 bt848->e_vtc = 0;
3598 bt848->o_vtc = 0;
3599 } else {
3600 bt848->e_vtc = 1;
3601 bt848->o_vtc = 1;
3602 }
3603 bktr->capcontrol = 3 << 2 | 3;
3604
3605 dma_prog = (u_long *) bktr->dma_prog;
3606
3607 /* Construct Write */
3608
3609 if (bktr->video.addr) {
3610 target_buffer = (u_long) bktr->video.addr;
3611 pitch = bktr->video.width;
3612 }
3613 else {
3614 target_buffer = (u_long) vtophys(bktr->bigbuf);
3615 pitch = cols*Bpp;
3616 }
3617
3618 buffer = target_buffer;
3619
3620 /* Wait for the VRE sync marking the end of the Even and
3621 * the start of the Odd field. Resync here.
3622 */
3623 *dma_prog++ = OP_SYNC | BKTR_RESYNC |BKTR_VRE;
3624 *dma_prog++ = 0;
3625
3626 loop_point = dma_prog;
3627
3628 /* store the VBI data */
3629 /* look for sync with packed data */
3630 *dma_prog++ = OP_SYNC | BKTR_FM1;
3631 *dma_prog++ = 0;
3632 for(i = 0; i < vbilines; i++) {
3633 *dma_prog++ = OP_WRITE | OP_SOL | OP_EOL | vbisamples;
3634 *dma_prog++ = (u_long) vtophys(bktr->vbidata +
3635 (i * VBI_LINE_SIZE));
3636 }
3637
3638 if ( (i_flag == 2/*Odd*/) || (i_flag==3) /*interlaced*/ ) {
3639 /* store the Odd field video image */
3640 /* look for sync with packed data */
3641 *dma_prog++ = OP_SYNC | BKTR_FM1;
3642 *dma_prog++ = 0; /* NULL WORD */
3643 width = cols;
3644 for (i = 0; i < (rows/interlace); i++) {
3645 target = target_buffer;
3646 if ( notclipped(bktr, i, width)) {
3647 split(bktr, (volatile u_long **) &dma_prog,
3648 bktr->y2 - bktr->y, OP_WRITE,
3649 Bpp, (volatile u_char **) &target, cols);
3650
3651 } else {
3652 while(getline(bktr, i)) {
3653 if (bktr->y != bktr->y2 ) {
3654 split(bktr, (volatile u_long **) &dma_prog,
3655 bktr->y2 - bktr->y, OP_WRITE,
3656 Bpp, (volatile u_char **) &target, cols);
3657 }
3658 if (bktr->yclip != bktr->yclip2 ) {
3659 split(bktr,(volatile u_long **) &dma_prog,
3660 bktr->yclip2 - bktr->yclip,
3661 OP_SKIP,
3662 Bpp, (volatile u_char **) &target, cols);
3663 }
3664 }
3665
3666 }
3667
3668 target_buffer += interlace * pitch;
3669
3670 }
3671
3672 } /* end if */
3673
3674 /* Grab the Even field */
3675 /* Look for the VRO, end of Odd field, marker */
3676 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO;
3677 *dma_prog++ = 0; /* NULL WORD */
3678
3679 /* store the VBI data */
3680 /* look for sync with packed data */
3681 *dma_prog++ = OP_SYNC | BKTR_FM1;
3682 *dma_prog++ = 0;
3683 for(i = 0; i < vbilines; i++) {
3684 *dma_prog++ = OP_WRITE | OP_SOL | OP_EOL | vbisamples;
3685 *dma_prog++ = (u_long) vtophys(bktr->vbidata +
3686 ((i+MAX_VBI_LINES) * VBI_LINE_SIZE));
3687 }
3688
3689 /* store the video image */
3690 if (i_flag == 1) /*Even Only*/
3691 target_buffer = buffer;
3692 if (i_flag == 3) /*interlaced*/
3693 target_buffer = buffer+pitch;
3694
3695
3696 if ((i_flag == 1) /*Even Only*/ || (i_flag==3) /*interlaced*/) {
3697 /* look for sync with packed data */
3698 *dma_prog++ = OP_SYNC | BKTR_FM1;
3699 *dma_prog++ = 0; /* NULL WORD */
3700 width = cols;
3701 for (i = 0; i < (rows/interlace); i++) {
3702 target = target_buffer;
3703 if ( notclipped(bktr, i, width)) {
3704 split(bktr, (volatile u_long **) &dma_prog,
3705 bktr->y2 - bktr->y, OP_WRITE,
3706 Bpp, (volatile u_char **) &target, cols);
3707 } else {
3708 while(getline(bktr, i)) {
3709 if (bktr->y != bktr->y2 ) {
3710 split(bktr, (volatile u_long **) &dma_prog,
3711 bktr->y2 - bktr->y, OP_WRITE,
3712 Bpp, (volatile u_char **) &target,
3713 cols);
3714 }
3715 if (bktr->yclip != bktr->yclip2 ) {
3716 split(bktr, (volatile u_long **) &dma_prog,
3717 bktr->yclip2 - bktr->yclip, OP_SKIP,
3718 Bpp, (volatile u_char **) &target, cols);
3719 }
3720
3721 }
3722
3723 }
3724
3725 target_buffer += interlace * pitch;
3726
3727 }
3728 }
3729
3730 /* Look for end of 'Even Field' */
3731 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE;
3732 *dma_prog++ = 0; /* NULL WORD */
3733
3734 *dma_prog++ = OP_JUMP ;
3735 *dma_prog++ = (u_long ) vtophys(loop_point) ;
3736 *dma_prog++ = 0; /* NULL WORD */
3737
3738}
3739
3740
3741
3742
3743static void
3744rgb_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace )
3745{
3746 int i;
3747 bt848_ptr_t bt848;
3748 volatile u_long target_buffer, buffer, target,width;
3749 volatile u_long pitch;
3750 volatile u_long *dma_prog;
3751 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
3752 u_int Bpp = pf_int->public.Bpp;
3753
3754 bt848 = bktr->base;
3755
3756 bt848->color_fmt = pf_int->color_fmt;
3757 bt848->vbi_pack_size = 0;
3758 bt848->vbi_pack_del = 0;
3759 bt848->adc = SYNC_LEVEL;
3760
3761 bt848->oform = 0x00;
3762
3763 bt848->e_vscale_hi |= 0x40; /* set chroma comb */
3764 bt848->o_vscale_hi |= 0x40;
3765 bt848->e_vscale_hi &= ~0x80; /* clear Ycomb */
3766 bt848->o_vscale_hi &= ~0x80;
3767
3768 /* disable gamma correction removal */
3769 bt848->color_ctl_gamma = 1;
3770
3771
3772 if (cols > 385 ) {
3773 bt848->e_vtc = 0;
3774 bt848->o_vtc = 0;
3775 } else {
3776 bt848->e_vtc = 1;
3777 bt848->o_vtc = 1;
3778 }
3779 bktr->capcontrol = 3 << 2 | 3;
3780
3781 dma_prog = (u_long *) bktr->dma_prog;
3782
3783 /* Construct Write */
3784
3785 if (bktr->video.addr) {
3786 target_buffer = (u_long) bktr->video.addr;
3787 pitch = bktr->video.width;
3788 }
3789 else {
3790 target_buffer = (u_long) vtophys(bktr->bigbuf);
3791 pitch = cols*Bpp;
3792 }
3793
3794 buffer = target_buffer;
3795
3796 /* contruct sync : for video packet format */
3797 *dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_FM1;
3798
3799 /* sync, mode indicator packed data */
3800 *dma_prog++ = 0; /* NULL WORD */
3801 width = cols;
3802 for (i = 0; i < (rows/interlace); i++) {
3803 target = target_buffer;
3804 if ( notclipped(bktr, i, width)) {
3805 split(bktr, (volatile u_long **) &dma_prog,
3806 bktr->y2 - bktr->y, OP_WRITE,
3807 Bpp, (volatile u_char **) &target, cols);
3808
3809 } else {
3810 while(getline(bktr, i)) {
3811 if (bktr->y != bktr->y2 ) {
3812 split(bktr, (volatile u_long **) &dma_prog,
3813 bktr->y2 - bktr->y, OP_WRITE,
3814 Bpp, (volatile u_char **) &target, cols);
3815 }
3816 if (bktr->yclip != bktr->yclip2 ) {
3817 split(bktr,(volatile u_long **) &dma_prog,
3818 bktr->yclip2 - bktr->yclip,
3819 OP_SKIP,
3820 Bpp, (volatile u_char **) &target, cols);
3821 }
3822 }
3823
3824 }
3825
3826 target_buffer += interlace * pitch;
3827
3828 }
3829
3830 switch (i_flag) {
3831 case 1:
3832 /* sync vre */
3833 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_VRO;
3834 *dma_prog++ = 0; /* NULL WORD */
3835
3836 *dma_prog++ = OP_JUMP;
3837 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3838 return;
3839
3840 case 2:
3841 /* sync vro */
3842 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_VRE;
3843 *dma_prog++ = 0; /* NULL WORD */
3844
3845 *dma_prog++ = OP_JUMP;
3846 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3847 return;
3848
3849 case 3:
3850 /* sync vro */
3851 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO;
3852 *dma_prog++ = 0; /* NULL WORD */
3853 *dma_prog++ = OP_JUMP; ;
3854 *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
3855 break;
3856 }
3857
3858 if (interlace == 2) {
3859
3860 target_buffer = buffer + pitch;
3861
3862 dma_prog = (u_long *) bktr->odd_dma_prog;
3863
3864 /* sync vre IRQ bit */
3865 *dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_FM1;
3866 *dma_prog++ = 0; /* NULL WORD */
3867 width = cols;
3868 for (i = 0; i < (rows/interlace); i++) {
3869 target = target_buffer;
3870 if ( notclipped(bktr, i, width)) {
3871 split(bktr, (volatile u_long **) &dma_prog,
3872 bktr->y2 - bktr->y, OP_WRITE,
3873 Bpp, (volatile u_char **) &target, cols);
3874 } else {
3875 while(getline(bktr, i)) {
3876 if (bktr->y != bktr->y2 ) {
3877 split(bktr, (volatile u_long **) &dma_prog,
3878 bktr->y2 - bktr->y, OP_WRITE,
3879 Bpp, (volatile u_char **) &target,
3880 cols);
3881 }
3882 if (bktr->yclip != bktr->yclip2 ) {
3883 split(bktr, (volatile u_long **) &dma_prog,
3884 bktr->yclip2 - bktr->yclip, OP_SKIP,
3885 Bpp, (volatile u_char **) &target, cols);
3886 }
3887
3888 }
3889
3890 }
3891
3892 target_buffer += interlace * pitch;
3893
3894 }
3895 }
3896
3897 /* sync vre IRQ bit */
3898 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE;
3899 *dma_prog++ = 0; /* NULL WORD */
3900 *dma_prog++ = OP_JUMP ;
3901 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog) ;
3902 *dma_prog++ = 0; /* NULL WORD */
3903}
3904
3905
3906/*
3907 *
3908 */
3909static void
3910yuvpack_prog( bktr_ptr_t bktr, char i_flag,
3911 int cols, int rows, int interlace )
3912{
3913 int i;
3914 volatile unsigned int inst;
3915 volatile unsigned int inst3;
3916 volatile u_long target_buffer, buffer;
3917 bt848_ptr_t bt848;
3918 volatile u_long *dma_prog;
3919 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
3920 int b;
3921
3922 bt848 = bktr->base;
3923
3924 bt848->color_fmt = pf_int->color_fmt;
3925
3926 bt848->e_scloop |= BT848_E_SCLOOP_CAGC; /* enable chroma comb */
3927 bt848->o_scloop |= BT848_O_SCLOOP_CAGC;
3928
3929 bt848->color_ctl_rgb_ded = 1;
3930 bt848->color_ctl_gamma = 1;
3931 bt848->adc = SYNC_LEVEL;
3932
3933 bktr->capcontrol = 1 << 6 | 1 << 4 | 1 << 2 | 3;
3934 bktr->capcontrol = 3 << 2 | 3;
3935
3936 dma_prog = (u_long *) bktr->dma_prog;
3937
3938 /* Construct Write */
3939
3940 /* write , sol, eol */
3941 inst = OP_WRITE | OP_SOL | (cols);
3942 /* write , sol, eol */
3943 inst3 = OP_WRITE | OP_EOL | (cols);
3944
3945 if (bktr->video.addr)
3946 target_buffer = (u_long) bktr->video.addr;
3947 else
3948 target_buffer = (u_long) vtophys(bktr->bigbuf);
3949
3950 buffer = target_buffer;
3951
3952 /* contruct sync : for video packet format */
3953 /* sync, mode indicator packed data */
3954 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM1;
3955 *dma_prog++ = 0; /* NULL WORD */
3956
3957 b = cols;
3958
3959 for (i = 0; i < (rows/interlace); i++) {
3960 *dma_prog++ = inst;
3961 *dma_prog++ = target_buffer;
3962 *dma_prog++ = inst3;
3963 *dma_prog++ = target_buffer + b;
3964 target_buffer += interlace*(cols * 2);
3965 }
3966
3967 switch (i_flag) {
3968 case 1:
3969 /* sync vre */
3970 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE;
3971 *dma_prog++ = 0; /* NULL WORD */
3972
3973 *dma_prog++ = OP_JUMP;
3974 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3975 return;
3976
3977 case 2:
3978 /* sync vro */
3979 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO;
3980 *dma_prog++ = 0; /* NULL WORD */
3981 *dma_prog++ = OP_JUMP;
3982 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3983 return;
3984
3985 case 3:
3986 /* sync vro */
3987 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO;
3988 *dma_prog++ = 0; /* NULL WORD */
3989 *dma_prog++ = OP_JUMP ;
3990 *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
3991 break;
3992 }
3993
3994 if (interlace == 2) {
3995
3996 target_buffer = (u_long) buffer + cols*2;
3997
3998 dma_prog = (u_long * ) bktr->odd_dma_prog;
3999
4000 /* sync vre */
4001 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_FM1;
4002 *dma_prog++ = 0; /* NULL WORD */
4003
4004 for (i = 0; i < (rows/interlace) ; i++) {
4005 *dma_prog++ = inst;
4006 *dma_prog++ = target_buffer;
4007 *dma_prog++ = inst3;
4008 *dma_prog++ = target_buffer + b;
4009 target_buffer += interlace * ( cols*2);
4010 }
4011 }
4012
4013 /* sync vro IRQ bit */
4014 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE;
4015 *dma_prog++ = 0; /* NULL WORD */
4016 *dma_prog++ = OP_JUMP ;
4017 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4018
4019 *dma_prog++ = OP_JUMP;
4020 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4021 *dma_prog++ = 0; /* NULL WORD */
4022}
4023
4024
4025/*
4026 *
4027 */
4028static void
4029yuv422_prog( bktr_ptr_t bktr, char i_flag,
4030 int cols, int rows, int interlace ){
4031
4032 int i;
4033 volatile unsigned int inst;
4034 volatile u_long target_buffer, t1, buffer;
4035 bt848_ptr_t bt848;
4036 volatile u_long *dma_prog;
4037 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
4038
4039 bt848 = bktr->base;
4040
4041 bt848->color_fmt = pf_int->color_fmt;
4042
4043 dma_prog = (u_long *) bktr->dma_prog;
4044
4045 bktr->capcontrol = 1 << 6 | 1 << 4 | 3;
4046
4047 bt848->adc = SYNC_LEVEL;
4048 bt848->oform = 0x00;
4049
4050 bt848->e_control |= BT848_E_CONTROL_LDEC; /* disable luma decimation */
4051 bt848->o_control |= BT848_O_CONTROL_LDEC;
4052
4053 bt848->e_scloop |= BT848_O_SCLOOP_CAGC; /* chroma agc enable */
4054 bt848->o_scloop |= BT848_O_SCLOOP_CAGC;
4055
4056 bt848->e_vscale_hi &= ~0x80; /* clear Ycomb */
4057 bt848->o_vscale_hi &= ~0x80;
4058 bt848->e_vscale_hi |= 0x40; /* set chroma comb */
4059 bt848->o_vscale_hi |= 0x40;
4060
4061 /* disable gamma correction removal */
4062 bt848->color_ctl_gamma = 1;
4063
4064 /* Construct Write */
4065 inst = OP_WRITE123 | OP_SOL | OP_EOL | (cols);
4066 if (bktr->video.addr)
4067 target_buffer = (u_long) bktr->video.addr;
4068 else
4069 target_buffer = (u_long) vtophys(bktr->bigbuf);
4070
4071 buffer = target_buffer;
4072
4073 t1 = buffer;
4074
4075 /* contruct sync : for video packet format */
4076 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3; /*sync, mode indicator packed data*/
4077 *dma_prog++ = 0; /* NULL WORD */
4078
4079 for (i = 0; i < (rows/interlace ) ; i++) {
4080 *dma_prog++ = inst;
4081 *dma_prog++ = cols/2 | cols/2 << 16;
4082 *dma_prog++ = target_buffer;
4083 *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
4084 *dma_prog++ = t1 + (cols*rows) + (cols*rows/2) + i*cols/2 * interlace;
4085 target_buffer += interlace*cols;
4086 }
4087
4088 switch (i_flag) {
4089 case 1:
4090 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE; /*sync vre*/
4091 *dma_prog++ = 0; /* NULL WORD */
4092
4093 *dma_prog++ = OP_JUMP ;
4094 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4095 return;
4096
4097 case 2:
4098 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO; /*sync vre*/
4099 *dma_prog++ = 0; /* NULL WORD */
4100
4101 *dma_prog++ = OP_JUMP;
4102 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4103 return;
4104
4105 case 3:
4106 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO;
4107 *dma_prog++ = 0; /* NULL WORD */
4108
4109 *dma_prog++ = OP_JUMP ;
4110 *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
4111 break;
4112 }
4113
4114 if (interlace == 2) {
4115
4116 dma_prog = (u_long * ) bktr->odd_dma_prog;
4117
4118 target_buffer = (u_long) buffer + cols;
4119 t1 = buffer + cols/2;
4120 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3;
4121 *dma_prog++ = 0; /* NULL WORD */
4122
4123 for (i = 0; i < (rows/interlace ) ; i++) {
4124 *dma_prog++ = inst;
4125 *dma_prog++ = cols/2 | cols/2 << 16;
4126 *dma_prog++ = target_buffer;
4127 *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
4128 *dma_prog++ = t1 + (cols*rows) + (cols*rows/2) + i*cols/2 * interlace;
4129 target_buffer += interlace*cols;
4130 }
4131 }
4132
4133 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE;
4134 *dma_prog++ = 0; /* NULL WORD */
4135 *dma_prog++ = OP_JUMP ;
4136 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog) ;
4137 *dma_prog++ = 0; /* NULL WORD */
4138}
4139
4140
4141/*
4142 *
4143 */
4144static void
4145yuv12_prog( bktr_ptr_t bktr, char i_flag,
4146 int cols, int rows, int interlace ){
4147
4148 int i;
4149 volatile unsigned int inst;
4150 volatile unsigned int inst1;
4151 volatile u_long target_buffer, t1, buffer;
4152 bt848_ptr_t bt848;
4153 volatile u_long *dma_prog;
4154 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
4155
4156 bt848 = bktr->base;
4157
4158 bt848->color_fmt = pf_int->color_fmt;
4159
4160 dma_prog = (u_long *) bktr->dma_prog;
4161
4162 bktr->capcontrol = 1 << 6 | 1 << 4 | 3;
4163
4164 bt848->adc = SYNC_LEVEL;
4165 bt848->oform = 0x0;
4166
4167 /* Construct Write */
4168 inst = OP_WRITE123 | OP_SOL | OP_EOL | (cols);
4169 inst1 = OP_WRITES123 | OP_SOL | OP_EOL | (cols);
4170 if (bktr->video.addr)
4171 target_buffer = (u_long) bktr->video.addr;
4172 else
4173 target_buffer = (u_long) vtophys(bktr->bigbuf);
4174
4175 buffer = target_buffer;
4176 t1 = buffer;
4177
4178 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3; /*sync, mode indicator packed data*/
4179 *dma_prog++ = 0; /* NULL WORD */
4180
4181 for (i = 0; i < (rows/interlace )/2 ; i++) {
4182 *dma_prog++ = inst;
4183 *dma_prog++ = cols/2 | (cols/2 << 16);
4184 *dma_prog++ = target_buffer;
4185 *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
4186 *dma_prog++ = t1 + (cols*rows) + (cols*rows/4) + i*cols/2 * interlace;
4187 target_buffer += interlace*cols;
4188 *dma_prog++ = inst1;
4189 *dma_prog++ = cols/2 | (cols/2 << 16);
4190 *dma_prog++ = target_buffer;
4191 target_buffer += interlace*cols;
4192
4193 }
4194
4195 switch (i_flag) {
4196 case 1:
4197 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE; /*sync vre*/
4198 *dma_prog++ = 0; /* NULL WORD */
4199
4200 *dma_prog++ = OP_JUMP;
4201 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4202 return;
4203
4204 case 2:
4205 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO; /*sync vro*/
4206 *dma_prog++ = 0; /* NULL WORD */
4207
4208 *dma_prog++ = OP_JUMP;
4209 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4210 return;
4211
4212 case 3:
4213 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO;
4214 *dma_prog++ = 0; /* NULL WORD */
4215 *dma_prog++ = OP_JUMP ;
4216 *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
4217 break;
4218 }
4219
4220 if (interlace == 2) {
4221
4222 dma_prog = (u_long * ) bktr->odd_dma_prog;
4223
4224 target_buffer = (u_long) buffer + cols;
4225 t1 = buffer + cols/2;
4226 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3;
4227 *dma_prog++ = 0; /* NULL WORD */
4228
4229 for (i = 0; i < ((rows/interlace )/2 ) ; i++) {
4230 *dma_prog++ = inst;
4231 *dma_prog++ = cols/2 | (cols/2 << 16);
4232 *dma_prog++ = target_buffer;
4233 *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
4234 *dma_prog++ = t1 + (cols*rows) + (cols*rows/4) + i*cols/2 * interlace;
4235 target_buffer += interlace*cols;
4236 *dma_prog++ = inst1;
4237 *dma_prog++ = cols/2 | (cols/2 << 16);
4238 *dma_prog++ = target_buffer;
4239 target_buffer += interlace*cols;
4240
4241 }
4242
4243
4244 }
4245
4246 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE;
4247 *dma_prog++ = 0; /* NULL WORD */
4248 *dma_prog++ = OP_JUMP;
4249 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4250 *dma_prog++ = 0; /* NULL WORD */
4251}
4252
4253
4254
4255/*
4256 *
4257 */
4258static void
4259build_dma_prog( bktr_ptr_t bktr, char i_flag )
4260{
4261 int rows, cols, interlace;
4262 bt848_ptr_t bt848;
4263 int tmp_int;
4264 unsigned int temp;
4265 struct format_params *fp;
4266 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
4267
4268
4269 fp = &format_params[bktr->format_params];
4270
4271 bt848 = bktr->base;
4272 bt848->int_mask = ALL_INTS_DISABLED;
4273
4274 /* disable FIFO & RISC, leave other bits alone */
4275 bt848->gpio_dma_ctl &= ~FIFO_RISC_ENABLED;
4276
4277 /* set video parameters */
4278 if (bktr->capture_area_enabled)
4279 temp = ((quad_t ) fp->htotal* (quad_t) bktr->capture_area_x_size * 4096
4280 / fp->scaled_htotal / bktr->cols) - 4096;
4281 else
4282 temp = ((quad_t ) fp->htotal* (quad_t) fp->scaled_hactive * 4096
4283 / fp->scaled_htotal / bktr->cols) - 4096;
4284
4285 /* printf("HSCALE value is %d\n",temp); */
4286 bt848->e_hscale_lo = temp & 0xff;
4287 bt848->o_hscale_lo = temp & 0xff;
4288 bt848->e_hscale_hi = (temp >> 8) & 0xff;
4289 bt848->o_hscale_hi = (temp >> 8) & 0xff;
4290
4291 /* horizontal active */
4292 temp = bktr->cols;
4293 /* printf("HACTIVE value is %d\n",temp); */
4294 bt848->e_hactive_lo = temp & 0xff;
4295 bt848->o_hactive_lo = temp & 0xff;
4296 bt848->e_crop &= ~0x3;
4297 bt848->o_crop &= ~0x3;
4298 bt848->e_crop |= (temp >> 8) & 0x3;
4299 bt848->o_crop |= (temp >> 8) & 0x3;
4300
4301 /* horizontal delay */
4302 if (bktr->capture_area_enabled)
4303 temp = ( (fp->hdelay* fp->scaled_hactive + bktr->capture_area_x_offset* fp->scaled_htotal)
4304 * bktr->cols) / (bktr->capture_area_x_size * fp->hactive);
4305 else
4306 temp = (fp->hdelay * bktr->cols) / fp->hactive;
4307
4308 temp = temp & 0x3fe;
4309
4310 /* printf("HDELAY value is %d\n",temp); */
4311 bt848->e_delay_lo = temp & 0xff;
4312 bt848->o_delay_lo = temp & 0xff;
4313 bt848->e_crop &= ~0xc;
4314 bt848->o_crop &= ~0xc;
4315 bt848->e_crop |= (temp >> 6) & 0xc;
4316 bt848->o_crop |= (temp >> 6) & 0xc;
4317
4318 /* vertical scale */
4319
4320 if (bktr->capture_area_enabled) {
4321 if (bktr->flags & METEOR_ONLY_ODD_FIELDS ||
4322 bktr->flags & METEOR_ONLY_EVEN_FIELDS)
4323 tmp_int = 65536 -
4324 (((bktr->capture_area_y_size * 256 + (bktr->rows/2)) / bktr->rows) - 512);
4325 else {
4326 tmp_int = 65536 -
4327 (((bktr->capture_area_y_size * 512 + (bktr->rows / 2)) / bktr->rows) - 512);
4328 }
4329 } else {
4330 if (bktr->flags & METEOR_ONLY_ODD_FIELDS ||
4331 bktr->flags & METEOR_ONLY_EVEN_FIELDS)
4332 tmp_int = 65536 -
4333 (((fp->vactive * 256 + (bktr->rows/2)) / bktr->rows) - 512);
4334 else {
4335 tmp_int = 65536 -
4336 (((fp->vactive * 512 + (bktr->rows / 2)) / bktr->rows) - 512);
4337 }
4338 }
4339
4340 tmp_int &= 0x1fff;
4341 /* printf("VSCALE value is %d\n",tmp_int); */
4342 bt848->e_vscale_lo = tmp_int & 0xff;
4343 bt848->o_vscale_lo = tmp_int & 0xff;
4344 bt848->e_vscale_hi &= ~0x1f;
4345 bt848->o_vscale_hi &= ~0x1f;
4346 bt848->e_vscale_hi |= (tmp_int >> 8) & 0x1f;
4347 bt848->o_vscale_hi |= (tmp_int >> 8) & 0x1f;
4348
4349
4350 /* vertical active */
4351 if (bktr->capture_area_enabled)
4352 temp = bktr->capture_area_y_size;
4353 else
4354 temp = fp->vactive;
4355 /* printf("VACTIVE is %d\n",temp); */
4356 bt848->e_crop &= ~0x30;
4357 bt848->e_crop |= (temp >> 4) & 0x30;
4358 bt848->e_vactive_lo = temp & 0xff;
4359 bt848->o_crop &= ~0x30;
4360 bt848->o_crop |= (temp >> 4) & 0x30;
4361 bt848->o_vactive_lo = temp & 0xff;
4362
4363 /* vertical delay */
4364 if (bktr->capture_area_enabled)
4365 temp = fp->vdelay + (bktr->capture_area_y_offset);
4366 else
4367 temp = fp->vdelay;
4368 /* printf("VDELAY is %d\n",temp); */
4369 bt848->e_crop &= ~0xC0;
4370 bt848->e_crop |= (temp >> 2) & 0xC0;
4371 bt848->e_vdelay_lo = temp & 0xff;
4372 bt848->o_crop &= ~0xC0;
4373 bt848->o_crop |= (temp >> 2) & 0xC0;
4374 bt848->o_vdelay_lo = temp & 0xff;
4375
4376 /* end of video params */
4377
4378 if ((bktr->xtal_pll_mode == BT848_USE_PLL)
4379 && (fp->iform_xtsel==BT848_IFORM_X_XT1)) {
4380 bt848->tgctrl=8; /* Select PLL mode */
4381 } else {
4382 bt848->tgctrl=0; /* Select Normal xtal 0/xtal 1 mode */
4383 }
4384
4385 /* capture control */
4386 switch (i_flag) {
4387 case 1:
4388 bktr->bktr_cap_ctl =
4389 (BT848_CAP_CTL_DITH_FRAME | BT848_CAP_CTL_EVEN);
4390 bt848->e_vscale_hi &= ~0x20;
4391 bt848->o_vscale_hi &= ~0x20;
4392 interlace = 1;
4393 break;
4394 case 2:
4395 bktr->bktr_cap_ctl =
4396 (BT848_CAP_CTL_DITH_FRAME | BT848_CAP_CTL_ODD);
4397 bt848->e_vscale_hi &= ~0x20;
4398 bt848->o_vscale_hi &= ~0x20;
4399 interlace = 1;
4400 break;
4401 default:
4402 bktr->bktr_cap_ctl =
4403 (BT848_CAP_CTL_DITH_FRAME |
4404 BT848_CAP_CTL_EVEN | BT848_CAP_CTL_ODD);
4405 bt848->e_vscale_hi |= 0x20;
4406 bt848->o_vscale_hi |= 0x20;
4407 interlace = 2;
4408 break;
4409 }
4410
4411 bt848->risc_strt_add = vtophys(bktr->dma_prog);
4412
4413 rows = bktr->rows;
4414 cols = bktr->cols;
4415
4416 bktr->vbiflags &= ~VBI_CAPTURE; /* default - no vbi capture */
4417
4418 /* If /dev/vbi is already open, then use the rgb_vbi RISC program */
4419 if ( (pf_int->public.type == METEOR_PIXTYPE_RGB)
4420 &&(bktr->vbiflags & VBI_OPEN) ) {
4421 if (i_flag==1) bktr->bktr_cap_ctl |= BT848_CAP_CTL_VBI_EVEN;
4422 if (i_flag==2) bktr->bktr_cap_ctl |= BT848_CAP_CTL_VBI_ODD;
4423 if (i_flag==3) bktr->bktr_cap_ctl |=
4424 BT848_CAP_CTL_VBI_EVEN | BT848_CAP_CTL_VBI_ODD;
4425 bktr->bktr_cap_ctl |=
4426 BT848_CAP_CTL_VBI_EVEN | BT848_CAP_CTL_VBI_ODD;
4427 bktr->vbiflags |= VBI_CAPTURE;
4428 rgb_vbi_prog(bktr, i_flag, cols, rows, interlace);
4429 return;
4430 }
4431
4432 if ( pf_int->public.type == METEOR_PIXTYPE_RGB ) {
4433 rgb_prog(bktr, i_flag, cols, rows, interlace);
4434 return;
4435 }
4436
4437 if ( pf_int->public.type == METEOR_PIXTYPE_YUV ) {
4438 yuv422_prog(bktr, i_flag, cols, rows, interlace);
4439 bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt );
4440 return;
4441 }
4442
4443 if ( pf_int->public.type == METEOR_PIXTYPE_YUV_PACKED ) {
4444 yuvpack_prog(bktr, i_flag, cols, rows, interlace);
4445 bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt );
4446 return;
4447 }
4448
4449 if ( pf_int->public.type == METEOR_PIXTYPE_YUV_12 ) {
4450 yuv12_prog(bktr, i_flag, cols, rows, interlace);
4451 bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt );
4452 return;
4453 }
4454 return;
4455}
4456
4457
4458/******************************************************************************
4459 * video & video capture specific routines:
4460 */
4461
4462
4463/*
4464 *
4465 */
4466static void
4467start_capture( bktr_ptr_t bktr, unsigned type )
4468{
4469 bt848_ptr_t bt848;
4470 u_char i_flag;
4471 struct format_params *fp;
4472
4473 fp = &format_params[bktr->format_params];
4474
4475 /* If requested, clear out capture buf first */
4476 if (bktr->clr_on_start && (bktr->video.addr == 0)) {
4477 bzero((caddr_t)bktr->bigbuf,
4478 (size_t)bktr->rows * bktr->cols * bktr->frames *
4479 pixfmt_table[ bktr->pixfmt ].public.Bpp);
4480 }
4481
4482 bt848 = bktr->base;
4483
4484 bt848->dstatus = 0;
4485 bt848->int_stat = bt848->int_stat;
4486
4487 bktr->flags |= type;
4488 bktr->flags &= ~METEOR_WANT_MASK;
4489 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
4490 case METEOR_ONLY_EVEN_FIELDS:
4491 bktr->flags |= METEOR_WANT_EVEN;
4492 i_flag = 1;
4493 break;
4494 case METEOR_ONLY_ODD_FIELDS:
4495 bktr->flags |= METEOR_WANT_ODD;
4496 i_flag = 2;
4497 break;
4498 default:
4499 bktr->flags |= METEOR_WANT_MASK;
4500 i_flag = 3;
4501 break;
4502 }
4503
4504 /* TDEC is only valid for continuous captures */
4505 if ( type == METEOR_SINGLE ) {
4506 u_short fps_save = bktr->fps;
4507
4508 set_fps(bktr, fp->frame_rate);
4509 bktr->fps = fps_save;
4510 }
4511 else
4512 set_fps(bktr, bktr->fps);
4513
4514 if (bktr->dma_prog_loaded == FALSE) {
4515 build_dma_prog(bktr, i_flag);
4516 bktr->dma_prog_loaded = TRUE;
4517 }
4518
4519
4520 bt848->risc_strt_add = vtophys(bktr->dma_prog);
4521
4522}
4523
4524
4525/*
4526 *
4527 */
4528static void
4529set_fps( bktr_ptr_t bktr, u_short fps )
4530{
4531 bt848_ptr_t bt848;
4532 struct format_params *fp;
4533 int i_flag;
4534
4535 fp = &format_params[bktr->format_params];
4536
4537 bt848 = bktr->base;
4538
4539 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
4540 case METEOR_ONLY_EVEN_FIELDS:
4541 bktr->flags |= METEOR_WANT_EVEN;
4542 i_flag = 1;
4543 break;
4544 case METEOR_ONLY_ODD_FIELDS:
4545 bktr->flags |= METEOR_WANT_ODD;
4546 i_flag = 1;
4547 break;
4548 default:
4549 bktr->flags |= METEOR_WANT_MASK;
4550 i_flag = 2;
4551 break;
4552 }
4553
4554 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
4555 bt848->int_stat = ALL_INTS_CLEARED;
4556
4557 bktr->fps = fps;
4558 bt848->tdec = 0;
4559
4560 if (fps < fp->frame_rate)
4561 bt848->tdec = i_flag*(fp->frame_rate - fps) & 0x3f;
4562 else
4563 bt848->tdec = 0;
4564 return;
4565
4566}
4567
4568
4569
4570
4571
4572/*
4573 * Given a pixfmt index, compute the bt848 swap_flags necessary to
4574 * achieve the specified swapping.
4575 * Note that without bt swapping, 2Bpp and 3Bpp modes are written
4576 * byte-swapped, and 4Bpp modes are byte and word swapped (see Table 6
4577 * and read R->L).
4578 * Note also that for 3Bpp, we may additionally need to do some creative
4579 * SKIPing to align the FIFO bytelines with the target buffer (see split()).
4580 * This is abstracted here: e.g. no swaps = RGBA; byte & short swap = ABGR
4581 * as one would expect.
4582 */
4583
4584static u_int pixfmt_swap_flags( int pixfmt )
4585{
4586 struct meteor_pixfmt *pf = &pixfmt_table[ pixfmt ].public;
4587 u_int swapf = 0;
4588
4589 switch ( pf->Bpp ) {
4590 case 2 : swapf = ( pf->swap_bytes ? 0 : BSWAP );
4591 break;
4592
4593 case 3 : /* no swaps supported for 3bpp - makes no sense w/ bt848 */
4594 break;
4595
4596 case 4 : if ( pf->swap_bytes )
4597 swapf = pf->swap_shorts ? 0 : WSWAP;
4598 else
4599 swapf = pf->swap_shorts ? BSWAP : (BSWAP | WSWAP);
4600 break;
4601 }
4602 return swapf;
4603}
4604
4605
4606
4607/*
4608 * Converts meteor-defined pixel formats (e.g. METEOR_GEO_RGB16) into
4609 * our pixfmt_table indices.
4610 */
4611
4612static int oformat_meteor_to_bt( u_long format )
4613{
4614 int i;
4615 struct meteor_pixfmt *pf1, *pf2;
4616
4617 /* Find format in compatibility table */
4618 for ( i = 0; i < METEOR_PIXFMT_TABLE_SIZE; i++ )
4619 if ( meteor_pixfmt_table[i].meteor_format == format )
4620 break;
4621
4622 if ( i >= METEOR_PIXFMT_TABLE_SIZE )
4623 return -1;
4624 pf1 = &meteor_pixfmt_table[i].public;
4625
4626 /* Match it with an entry in master pixel format table */
4627 for ( i = 0; i < PIXFMT_TABLE_SIZE; i++ ) {
4628 pf2 = &pixfmt_table[i].public;
4629
4630 if (( pf1->type == pf2->type ) &&
4631 ( pf1->Bpp == pf2->Bpp ) &&
4632 !bcmp( pf1->masks, pf2->masks, sizeof( pf1->masks )) &&
4633 ( pf1->swap_bytes == pf2->swap_bytes ) &&
4634 ( pf1->swap_shorts == pf2->swap_shorts ))
4635 break;
4636 }
4637 if ( i >= PIXFMT_TABLE_SIZE )
4638 return -1;
4639
4640 return i;
4641}
4642
4643/******************************************************************************
4644 * i2c primitives:
4645 */
4646
4647/* */
4648#define I2CBITTIME (0x5<<4) /* 5 * 0.48uS */
4649#define I2CBITTIME_878 (1 << 7)
4650#define I2C_READ 0x01
4651#define I2C_COMMAND (I2CBITTIME | \
4652 BT848_DATA_CTL_I2CSCL | \
4653 BT848_DATA_CTL_I2CSDA)
4654
4655#define I2C_COMMAND_878 (I2CBITTIME_878 | \
4656 BT848_DATA_CTL_I2CSCL | \
4657 BT848_DATA_CTL_I2CSDA)
4658
4659/* Select between old i2c code and new iicbus / smbus code */
4660#if (defined(__FreeBSD__) && (NSMBUS > 0))
4661
4662/*
4663 * The hardware interface is actually SMB commands
4664 */
4665static int
4666i2cWrite( bktr_ptr_t bktr, int addr, int byte1, int byte2 )
4667{
4668 char cmd;
4669
4670 if (bktr->id == BROOKTREE_848 ||
4671 bktr->id == BROOKTREE_848A ||
4672 bktr->id == BROOKTREE_849A)
4673 cmd = I2C_COMMAND;
4674 else
4675 cmd = I2C_COMMAND_878;
4676
4677 if (byte2 != -1) {
4678 if (smbus_writew(bktr->i2c_sc.smbus, addr, cmd,
4679 (short)(((byte2 & 0xff) << 8) | (byte1 & 0xff))))
4680 return (-1);
4681 } else {
4682 if (smbus_writeb(bktr->i2c_sc.smbus, addr, cmd,
4683 (char)(byte1 & 0xff)))
4684 return (-1);
4685 }
4686
4687 /* return OK */
4688 return( 0 );
4689}
4690
4691static int
4692i2cRead( bktr_ptr_t bktr, int addr )
4693{
4694 char result;
4695 char cmd;
4696
4697 if (bktr->id == BROOKTREE_848 ||
4698 bktr->id == BROOKTREE_848A ||
4699 bktr->id == BROOKTREE_849A)
4700 cmd = I2C_COMMAND;
4701 else
4702 cmd = I2C_COMMAND_878;
4703
4704 if (smbus_readb(bktr->i2c_sc.smbus, addr, cmd, &result))
4705 return (-1);
4706
4707 return ((int)((unsigned char)result));
4708}
4709
4710#define IICBUS(bktr) ((bktr)->i2c_sc.iicbus)
4711
4712/* The MSP34xx Audio chip require i2c bus writes of up to 5 bytes which the */
4713/* bt848 automated i2c bus controller cannot handle */
4714/* Therefore we need low level control of the i2c bus hardware */
4715
4716/* Write to the MSP registers */
4717static void
4718msp_write(bktr_ptr_t bktr, unsigned char dev, unsigned int addr, unsigned int data)
4719{
4720 unsigned char addr_l, addr_h, data_h, data_l ;
4721
4722 addr_h = (addr >>8) & 0xff;
4723 addr_l = addr & 0xff;
4724 data_h = (data >>8) & 0xff;
4725 data_l = data & 0xff;
4726
4727 iicbus_start(IICBUS(bktr), MSP3400C_WADDR, 0 /* no timeout? */);
4728
4729 iicbus_write_byte(IICBUS(bktr), dev, 0);
4730 iicbus_write_byte(IICBUS(bktr), addr_h, 0);
4731 iicbus_write_byte(IICBUS(bktr), addr_l, 0);
4732 iicbus_write_byte(IICBUS(bktr), data_h, 0);
4733 iicbus_write_byte(IICBUS(bktr), data_l, 0);
4734
4735 iicbus_stop(IICBUS(bktr));
4736
4737 return;
4738}
4739
4740/* Write to the MSP registers */
4741static unsigned int
4742msp_read(bktr_ptr_t bktr, unsigned char dev, unsigned int addr)
4743{
4744 unsigned int data;
4745 unsigned char addr_l, addr_h, dev_r;
4746 int read;
4747 u_char data_read[2];
4748
4749 addr_h = (addr >>8) & 0xff;
4750 addr_l = addr & 0xff;
4751 dev_r = dev+1;
4752
4753 /* XXX errors ignored */
4754 iicbus_start(IICBUS(bktr), MSP3400C_WADDR, 0 /* no timeout? */);
4755
4756 iicbus_write_byte(IICBUS(bktr), dev_r, 0);
4757 iicbus_write_byte(IICBUS(bktr), addr_h, 0);
4758 iicbus_write_byte(IICBUS(bktr), addr_l, 0);
4759
4760 iicbus_repeated_start(IICBUS(bktr), MSP3400C_RADDR, 0 /* no timeout? */);
4761 iicbus_read(IICBUS(bktr), data_read, 2, &read, IIC_LAST_READ, 0);
4762 iicbus_stop(IICBUS(bktr));
4763
4764 data = (data_read[0]<<8) | data_read[1];
4765
4766 return (data);
4767}
4768
4769/* Reset the MSP chip */
4770/* The user can block the reset (which is handy if you initialise the
4771 * MSP audio in another operating system first (eg in Windows)
4772 */
4773static void
4774msp_reset( bktr_ptr_t bktr )
4775{
4776
4777#ifndef BKTR_NO_MSP_RESET
4778 /* put into reset mode */
4779 iicbus_start(IICBUS(bktr), MSP3400C_WADDR, 0 /* no timeout? */);
4780 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
4781 iicbus_write_byte(IICBUS(bktr), 0x80, 0);
4782 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
4783 iicbus_stop(IICBUS(bktr));
4784
4785 /* put back to operational mode */
4786 iicbus_start(IICBUS(bktr), MSP3400C_WADDR, 0 /* no timeout? */);
4787 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
4788 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
4789 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
4790 iicbus_stop(IICBUS(bktr));
4791#endif
4792 return;
4793}
4794
4795static void remote_read(bktr_ptr_t bktr, struct bktr_remote *remote) {
4796 int read;
4797
4798 /* XXX errors ignored */
4799 iicbus_start(IICBUS(bktr), bktr->remote_control_addr, 0 /* no timeout? */);
4800 iicbus_read(IICBUS(bktr), remote->data, 3, &read, IIC_LAST_READ, 0);
4801 iicbus_stop(IICBUS(bktr));
4802
4803 return;
4804}
4805
4806#else /* defined(__FreeBSD__) && (NSMBUS > 0) */
4807
4808/*
4809 * Program the i2c bus directly
4810 */
4811static int
4812i2cWrite( bktr_ptr_t bktr, int addr, int byte1, int byte2 )
4813{
4814 u_long x;
4815 u_long data;
4816 bt848_ptr_t bt848;
4817
4818 bt848 = bktr->base;
4819
4820 /* clear status bits */
4821 bt848->int_stat = (BT848_INT_RACK | BT848_INT_I2CDONE);
4822
4823 /* build the command datum */
4824 if (bktr->id == BROOKTREE_848 ||
4825 bktr->id == BROOKTREE_848A ||
4826 bktr->id == BROOKTREE_849A) {
4827 data = ((addr & 0xff) << 24) | ((byte1 & 0xff) << 16) | I2C_COMMAND;
4828 } else {
4829 data = ((addr & 0xff) << 24) | ((byte1 & 0xff) << 16) | I2C_COMMAND_878;
4830 }
4831 if ( byte2 != -1 ) {
4832 data |= ((byte2 & 0xff) << 8);
4833 data |= BT848_DATA_CTL_I2CW3B;
4834 }
4835
4836 /* write the address and data */
4837 bt848->i2c_data_ctl = data;
4838
4839 /* wait for completion */
4840 for ( x = 0x7fffffff; x; --x ) { /* safety valve */
4841 if ( bt848->int_stat & BT848_INT_I2CDONE )
4842 break;
4843 }
4844
4845 /* check for ACK */
4846 if ( !x || !(bt848->int_stat & BT848_INT_RACK) )
4847 return( -1 );
4848
4849 /* return OK */
4850 return( 0 );
4851}
4852
4853
4854/*
4855 *
4856 */
4857static int
4858i2cRead( bktr_ptr_t bktr, int addr )
4859{
4860 u_long x;
4861 bt848_ptr_t bt848;
4862
4863 bt848 = bktr->base;
4864
4865 /* clear status bits */
4866 bt848->int_stat = (BT848_INT_RACK | BT848_INT_I2CDONE);
4867
4868 /* write the READ address */
4869 /* The Bt878 and Bt879 differed on the treatment of i2c commands */
4870
4871 if (bktr->id == BROOKTREE_848 ||
4872 bktr->id == BROOKTREE_848A ||
4873 bktr->id == BROOKTREE_849A) {
4874 bt848->i2c_data_ctl = ((addr & 0xff) << 24) | I2C_COMMAND;
4875 } else {
4876 bt848->i2c_data_ctl = ((addr & 0xff) << 24) | I2C_COMMAND_878;
4877 }
4878
4879 /* wait for completion */
4880 for ( x = 0x7fffffff; x; --x ) { /* safety valve */
4881 if ( bt848->int_stat & BT848_INT_I2CDONE )
4882 break;
4883 }
4884
4885 /* check for ACK */
4886 if ( !x || !(bt848->int_stat & BT848_INT_RACK) )
4887 return( -1 );
4888
4889 /* it was a read */
4890 return( (bt848->i2c_data_ctl >> 8) & 0xff );
4891}
4892
4893/* The MSP34xx Audio chip require i2c bus writes of up to 5 bytes which the */
4894/* bt848 automated i2c bus controller cannot handle */
4895/* Therefore we need low level control of the i2c bus hardware */
4896/* Idea for the following functions are from elsewhere in this driver and */
4897/* from the Linux BTTV i2c driver by Gerd Knorr <kraxel@cs.tu-berlin.de> */
4898
4899#define BITD 40
4900static void i2c_start( bktr_ptr_t bktr) {
4901 bt848_ptr_t bt848;
4902 bt848 = bktr->base;
4903
4904 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release data */
4905 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release clock */
4906 bt848->i2c_data_ctl = 2; DELAY( BITD ); /* lower data */
4907 bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock */
4908}
4909
4910static void i2c_stop( bktr_ptr_t bktr) {
4911 bt848_ptr_t bt848;
4912 bt848 = bktr->base;
4913
4914 bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock & data */
4915 bt848->i2c_data_ctl = 2; DELAY( BITD ); /* release clock */
4916 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release data */
4917}
4918
4919static int i2c_write_byte( bktr_ptr_t bktr, unsigned char data) {
4920 int x;
4921 int status;
4922 bt848_ptr_t bt848;
4923 bt848 = bktr->base;
4924
4925 /* write out the byte */
4926 for ( x = 7; x >= 0; --x ) {
4927 if ( data & (1<<x) ) {
4928 bt848->i2c_data_ctl = 1;
4929 DELAY( BITD ); /* assert HI data */
4930 bt848->i2c_data_ctl = 3;
4931 DELAY( BITD ); /* strobe clock */
4932 bt848->i2c_data_ctl = 1;
4933 DELAY( BITD ); /* release clock */
4934 }
4935 else {
4936 bt848->i2c_data_ctl = 0;
4937 DELAY( BITD ); /* assert LO data */
4938 bt848->i2c_data_ctl = 2;
4939 DELAY( BITD ); /* strobe clock */
4940 bt848->i2c_data_ctl = 0;
4941 DELAY( BITD ); /* release clock */
4942 }
4943 }
4944
4945 /* look for an ACK */
4946 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* float data */
4947 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* strobe clock */
4948 status = bt848->i2c_data_ctl & 1; /* read the ACK bit */
4949 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release clock */
4950
4951 return( status );
4952}
4953
4954static int i2c_read_byte( bktr_ptr_t bktr, unsigned char *data, int last ) {
4955 int x;
4956 int bit;
4957 int byte = 0;
4958 bt848_ptr_t bt848;
4959 bt848 = bktr->base;
4960
4961 /* read in the byte */
4962 bt848->i2c_data_ctl = 1;
4963 DELAY( BITD ); /* float data */
4964 for ( x = 7; x >= 0; --x ) {
4965 bt848->i2c_data_ctl = 3;
4966 DELAY( BITD ); /* strobe clock */
4967 bit = bt848->i2c_data_ctl & 1; /* read the data bit */
4968 if ( bit ) byte |= (1<<x);
4969 bt848->i2c_data_ctl = 1;
4970 DELAY( BITD ); /* release clock */
4971 }
4972 /* After reading the byte, send an ACK */
4973 /* (unless that was the last byte, for which we send a NAK */
4974 if (last) { /* send NAK - same a writing a 1 */
4975 bt848->i2c_data_ctl = 1;
4976 DELAY( BITD ); /* set data bit */
4977 bt848->i2c_data_ctl = 3;
4978 DELAY( BITD ); /* strobe clock */
4979 bt848->i2c_data_ctl = 1;
4980 DELAY( BITD ); /* release clock */
4981 } else { /* send ACK - same as writing a 0 */
4982 bt848->i2c_data_ctl = 0;
4983 DELAY( BITD ); /* set data bit */
4984 bt848->i2c_data_ctl = 2;
4985 DELAY( BITD ); /* strobe clock */
4986 bt848->i2c_data_ctl = 0;
4987 DELAY( BITD ); /* release clock */
4988 }
4989
4990 *data=byte;
4991 return 0;
4992}
4993#undef BITD
4994
4995/* Write to the MSP registers */
4996static void msp_write( bktr_ptr_t bktr, unsigned char dev, unsigned int addr, unsigned int data){
4997 unsigned int msp_w_addr = MSP3400C_WADDR;
4998 unsigned char addr_l, addr_h, data_h, data_l ;
4999 addr_h = (addr >>8) & 0xff;
5000 addr_l = addr & 0xff;
5001 data_h = (data >>8) & 0xff;
5002 data_l = data & 0xff;
5003
5004 i2c_start(bktr);
5005 i2c_write_byte(bktr, msp_w_addr);
5006 i2c_write_byte(bktr, dev);
5007 i2c_write_byte(bktr, addr_h);
5008 i2c_write_byte(bktr, addr_l);
5009 i2c_write_byte(bktr, data_h);
5010 i2c_write_byte(bktr, data_l);
5011 i2c_stop(bktr);
5012}
5013
5014/* Write to the MSP registers */
5015static unsigned int msp_read(bktr_ptr_t bktr, unsigned char dev, unsigned int addr){
5016 unsigned int data;
5017 unsigned char addr_l, addr_h, data_1, data_2, dev_r ;
5018 addr_h = (addr >>8) & 0xff;
5019 addr_l = addr & 0xff;
5020 dev_r = dev+1;
5021
5022 i2c_start(bktr);
5023 i2c_write_byte(bktr,MSP3400C_WADDR);
5024 i2c_write_byte(bktr,dev_r);
5025 i2c_write_byte(bktr,addr_h);
5026 i2c_write_byte(bktr,addr_l);
5027
5028 i2c_start(bktr);
5029 i2c_write_byte(bktr,MSP3400C_RADDR);
5030 i2c_read_byte(bktr,&data_1, 0);
5031 i2c_read_byte(bktr,&data_2, 1);
5032 i2c_stop(bktr);
5033 data = (data_1<<8) | data_2;
5034 return data;
5035}
5036
5037/* Reset the MSP chip */
5038/* The user can block the reset (which is handy if you initialise the
5039 * MSP audio in another operating system first (eg in Windows)
5040 */
5041static void msp_reset( bktr_ptr_t bktr ) {
5042
5043#ifndef BKTR_NO_MSP_RESET
5044 /* put into reset mode */
5045 i2c_start(bktr);
5046 i2c_write_byte(bktr, MSP3400C_WADDR);
5047 i2c_write_byte(bktr, 0x00);
5048 i2c_write_byte(bktr, 0x80);
5049 i2c_write_byte(bktr, 0x00);
5050 i2c_stop(bktr);
5051
5052 /* put back to operational mode */
5053 i2c_start(bktr);
5054 i2c_write_byte(bktr, MSP3400C_WADDR);
5055 i2c_write_byte(bktr, 0x00);
5056 i2c_write_byte(bktr, 0x00);
5057 i2c_write_byte(bktr, 0x00);
5058 i2c_stop(bktr);
5059#endif
5060 return;
5061
5062}
5063
5064static void remote_read(bktr_ptr_t bktr, struct bktr_remote *remote) {
5065
5066 /* XXX errors ignored */
5067 i2c_start(bktr);
5068 i2c_write_byte(bktr,bktr->remote_control_addr);
5069 i2c_read_byte(bktr,&(remote->data[0]), 0);
5070 i2c_read_byte(bktr,&(remote->data[1]), 0);
5071 i2c_read_byte(bktr,&(remote->data[2]), 0);
5072 i2c_stop(bktr);
5073
5074 return;
5075}
5076
5077#endif /* defined(__FreeBSD__) && (NSMBUS > 0) */
5078
5079
5080#if defined( I2C_SOFTWARE_PROBE )
5081
5082/*
5083 * we are keeping this around for any parts that we need to probe
5084 * but that CANNOT be probed via an i2c read.
5085 * this is necessary because the hardware i2c mechanism
5086 * cannot be programmed for 1 byte writes.
5087 * currently there are no known i2c parts that we need to probe
5088 * and that cannot be safely read.
5089 */
5090static int i2cProbe( bktr_ptr_t bktr, int addr );
5091#define BITD 40
5092#define EXTRA_START
5093
5094/*
5095 * probe for an I2C device at addr.
5096 */
5097static int
5098i2cProbe( bktr_ptr_t bktr, int addr )
5099{
5100 int x, status;
5101 bt848_ptr_t bt848;
5102
5103 bt848 = bktr->base;
5104
5105 /* the START */
5106#if defined( EXTRA_START )
5107 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release data */
5108 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release clock */
5109#endif /* EXTRA_START */
5110 bt848->i2c_data_ctl = 2; DELAY( BITD ); /* lower data */
5111 bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock */
5112
5113 /* write addr */
5114 for ( x = 7; x >= 0; --x ) {
5115 if ( addr & (1<<x) ) {
5116 bt848->i2c_data_ctl = 1;
5117 DELAY( BITD ); /* assert HI data */
5118 bt848->i2c_data_ctl = 3;
5119 DELAY( BITD ); /* strobe clock */
5120 bt848->i2c_data_ctl = 1;
5121 DELAY( BITD ); /* release clock */
5122 }
5123 else {
5124 bt848->i2c_data_ctl = 0;
5125 DELAY( BITD ); /* assert LO data */
5126 bt848->i2c_data_ctl = 2;
5127 DELAY( BITD ); /* strobe clock */
5128 bt848->i2c_data_ctl = 0;
5129 DELAY( BITD ); /* release clock */
5130 }
5131 }
5132
5133 /* look for an ACK */
5134 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* float data */
5135 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* strobe clock */
5136 status = bt848->i2c_data_ctl & 1; /* read the ACK bit */
5137 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release clock */
5138
5139 /* the STOP */
5140 bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock & data */
5141 bt848->i2c_data_ctl = 2; DELAY( BITD ); /* release clock */
5142 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release data */
5143
5144 return( status );
5145}
5146#undef EXTRA_START
5147#undef BITD
5148
5149#endif /* I2C_SOFTWARE_PROBE */
5150
5151
5152/*
5153 *
5154 */
5155static int
5156writeEEProm( bktr_ptr_t bktr, int offset, int count, u_char *data )
5157{
5158 return( -1 );
5159}
5160
5161
5162/*
5163 *
5164 */
5165static int
5166readEEProm( bktr_ptr_t bktr, int offset, int count, u_char *data )
5167{
5168 int x;
5169 int addr;
5170 int max;
5171 int byte;
5172
5173 /* get the address of the EEProm */
5174 addr = (int)(bktr->card.eepromAddr & 0xff);
5175 if ( addr == 0 )
5176 return( -1 );
5177
5178 max = (int)(bktr->card.eepromSize * EEPROMBLOCKSIZE);
5179 if ( (offset + count) > max )
5180 return( -1 );
5181
5182 /* set the start address */
5183 if ( i2cWrite( bktr, addr, offset, -1 ) == -1 )
5184 return( -1 );
5185
5186 /* the read cycle */
5187 for ( x = 0; x < count; ++x ) {
5188 if ( (byte = i2cRead( bktr, (addr | 1) )) == -1 )
5189 return( -1 );
5190 data[ x ] = byte;
5191 }
5192
5193 return( 0 );
5194}
5195
5196#define ABSENT (-1)
5197
5198/*
5199 * get a signature of the card
5200 * read all 128 possible i2c read addresses from 0x01 thru 0xff
5201 * build a bit array with a 1 bit for each i2c device that responds
5202 *
5203 * XXX FIXME: use offset & count args
5204 */
5205static int
5206signCard( bktr_ptr_t bktr, int offset, int count, u_char* sig )
5207{
5208 int x;
5209
5210 for ( x = 0; x < 16; ++x )
5211 sig[ x ] = 0;
5212
5213 for ( x = 0; x < count; ++x ) {
5214 if ( i2cRead( bktr, (2 * x) + 1 ) != ABSENT ) {
5215 sig[ x / 8 ] |= (1 << (x % 8) );
5216 }
5217 }
5218
5219 return( 0 );
5220}
5221
5222/*
5223 * any_i2c_devices.
5224 * Some BT848/BT848A cards have no tuner and no additional i2c devices
5225 * eg stereo decoder. These are used for video conferencing or capture from
5226 * a video camera. (VideoLogic Captivator PCI, Intel SmartCapture card).
5227 *
5228 * Determine if there are any i2c devices present. There are none present if
5229 * a) reading from all 128 devices returns ABSENT (-1) for each one
5230 * (eg VideoLogic Captivator PCI with BT848)
5231 * b) reading from all 128 devices returns 0 for each one
5232 * (eg VideoLogic Captivator PCI rev. 2F with BT848A)
5233 */
5234static int check_for_i2c_devices( bktr_ptr_t bktr ){
5235 int x, temp_read;
5236 int i2c_all_0 = 1;
5237 int i2c_all_absent = 1;
5238 for ( x = 0; x < 128; ++x ) {
5239 temp_read = i2cRead( bktr, (2 * x) + 1 );
5240 if (temp_read != 0) i2c_all_0 = 0;
5241 if (temp_read != ABSENT) i2c_all_absent = 0;
5242 }
5243
5244 if ((i2c_all_0) || (i2c_all_absent)) return 0;
5245 else return 1;
5246}
5247
5248/*
5249 * Temic/Philips datasheets say tuners can be at i2c addresses 0xc0, 0xc2,
5250 * 0xc4 or 0xc6, settable by links on the tuner
5251 * Determine the actual address used on the TV card by probing read addresses
5252 */
5253static int locate_tuner_address( bktr_ptr_t bktr) {
5254 if (i2cRead( bktr, 0xc1) != ABSENT) return 0xc0;
5255 if (i2cRead( bktr, 0xc3) != ABSENT) return 0xc2;
5256 if (i2cRead( bktr, 0xc5) != ABSENT) return 0xc4;
5257 if (i2cRead( bktr, 0xc7) != ABSENT) return 0xc6;
5258 return -1; /* no tuner found */
5259}
5260
5261/*
5262 * Search for a configuration EEPROM on the i2c bus by looking at i2c addresses
5263 * where EEPROMs are usually found.
5264 */
5265static int locate_eeprom_address( bktr_ptr_t bktr) {
5266 if (i2cRead( bktr, 0xa0) != ABSENT) return 0xa0;
5267 if (i2cRead( bktr, 0xac) != ABSENT) return 0xac;
5268 if (i2cRead( bktr, 0xae) != ABSENT) return 0xae;
5269 return -1; /* no eeprom found */
5270}
5271
5272/*
5273 * determine the card brand/model
5274 * OVERRIDE_CARD, OVERRIDE_TUNER, OVERRIDE_DBX and OVERRIDE_MSP
5275 * can be used to select a specific device, regardless of the
5276 * autodetection and i2c device checks.
5277 *
5278 * The scheme used for probing cards has one major drawback:
5279 * on bt848/849 based cards, it is impossible to work out which type
5280 * of tuner is actually fitted, or if there is extra hardware on board
5281 * connected to GPIO pins (eg radio chips or MSP34xx reset logic)
5282 * The driver cannot tell if the Tuner is PAL,NTSC, Temic or Philips.
5283 *
5284 * All Hauppauge cards have a configuration eeprom which tells us the
5285 * tuner type and other features of the their cards.
5286 * Also, Bt878 based cards (certainly Hauppauge and AverMedia) should support
5287 * sub-system vendor id, identifying the make and model of the card.
5288 *
5289 * The current probe code works as follows
5290 * 1) Check if it is a BT878. If so, read the sub-system vendor id.
5291 * Select the required tuner and other onboard features.
5292 * 2) If it is a BT848, 848A or 849A, continue on:
5293 * 3) Some cards have no I2C devices. Check if the i2c bus is empty
5294 * and if so, our detection job is nearly over.
5295 * 4) Check I2C address 0xa0. If present this will be a Hauppauge card
5296 * or an Osprey card. The Hauppauge EEPROM can determine on board tuner
5297 * type and other features.
5298 * 4) Check I2C address 0xa8. If present this is a STB card.
5299 * Still have to guess on the tuner type.
5300 * 5) Otherwise we are in the dark. Miro cards have the tuner type
5301 * hard-coded on the GPIO pins, but we do not actually know if we have
5302 * a Miro card.
5303 * Some older makes of card put Philips tuners and Temic tuners at
5304 * different I2C addresses, so an i2c bus probe can help, but it is
5305 * really just a guess.
5306 *
5307 * 6) After determining the Tuner Type, we probe the i2c bus for other
5308 * devices at known locations, eg IR-Remote Control, MSP34xx and TDA
5309 * stereo chips.
5310 */
5311
5312#define VENDOR_AVER_MEDIA 0x1461
5313#define VENDOR_HAUPPAUGE 0x0070
5314#define VENDOR_FLYVIDEO 0x1851
5315#define VENDOR_STB 0x10B4
5316
5317static void
5318probeCard( bktr_ptr_t bktr, int verbose, int unit )
5319{
5320 int card, i,j, card_found;
5321 int status;
5322 bt848_ptr_t bt848;
5323 u_char probe_signature[128], *probe_temp;
5324 int any_i2c_devices;
5325 u_char eeprom[256];
5326 u_char tuner_code = 0;
5327 int tuner_i2c_address = -1;
5328 int eeprom_i2c_address = -1;
5329
5330 bt848 = bktr->base;
5331
5332 /* Select all GPIO bits as inputs */
5333 bt848->gpio_out_en = 0;
5334 if (bootverbose)
5335 printf("bktr: GPIO is 0x%08x\n", bt848->gpio_data);
5336
5337#ifdef HAUPPAUGE_MSP_RESET
5338 /* Reset the MSP34xx audio chip. This resolves bootup card
5339 * detection problems with old Bt848 based Hauppauge cards with
5340 * MSP34xx stereo audio chips. This must be user enabled because
5341 * at this point the probe function does not know the card type. */
5342 bt848->gpio_out_en = bt848->gpio_out_en | (1<<5);
5343 bt848->gpio_data = bt848->gpio_data | (1<<5); /* write '1' */
5344 DELAY(2500); /* wait 2.5ms */
5345 bt848->gpio_data = bt848->gpio_data & ~(1<<5); /* write '0' */
5346 DELAY(2500); /* wait 2.5ms */
5347 bt848->gpio_data = bt848->gpio_data | (1<<5); /* write '1' */
5348 DELAY(2500); /* wait 2.5ms */
5349#endif
5350
5351 /* Check for the presence of i2c devices */
5352 any_i2c_devices = check_for_i2c_devices( bktr );
5353
5354
5355 /* Check for a user specified override on the card selection */
5356#if defined( OVERRIDE_CARD )
5357 bktr->card = cards[ (card = OVERRIDE_CARD) ];
5358 goto checkEEPROM;
5359#endif
5360 if (bktr->bt848_card != -1 ) {
5361 bktr->card = cards[ (card = bktr->bt848_card) ];
5362 goto checkEEPROM;
5363 }
5364
5365
5366 /* No override, so try and determine the make of the card */
5367
5368 /* On BT878/879 cards, read the sub-system vendor id */
5369 /* This identifies the manufacturer of the card and the model */
5370 /* In theory this can be read from PCI registers but this does not */
5371 /* appear to work on the FlyVideo 98. Hauppauge also warned that */
5372 /* the PCI registers are sometimes not loaded correctly. */
5373 /* Therefore, I will read the sub-system vendor ID from the EEPROM */
5374 /* (just like the Bt878 does during power up initialisation) */
5375
5376 if (bktr->id==BROOKTREE_878 || bktr->id==BROOKTREE_879) {
5377
5378 /* Try and locate the EEPROM */
5379 eeprom_i2c_address = locate_eeprom_address( bktr );
5380 if (eeprom_i2c_address != -1) {
5381
5382 unsigned int subsystem_vendor_id; /* vendors PCI-SIG ID */
5383 unsigned int subsystem_id; /* board model number */
5384 unsigned int byte_252, byte_253, byte_254, byte_255;
5385
5386 bktr->card = cards[ (card = CARD_UNKNOWN) ];
5387 bktr->card.eepromAddr = eeprom_i2c_address;
5388 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5389
5390 readEEProm(bktr, 0, 256, (u_char *) &eeprom );
5391 byte_252 = (unsigned int)eeprom[252];
5392 byte_253 = (unsigned int)eeprom[253];
5393 byte_254 = (unsigned int)eeprom[254];
5394 byte_255 = (unsigned int)eeprom[255];
5395
5396 subsystem_id = (byte_252 << 8) | byte_253;
5397 subsystem_vendor_id = (byte_254 << 8) | byte_255;
5398
5399 if ( bootverbose )
5400 printf("subsytem 0x%04x 0x%04x\n",subsystem_vendor_id,
5401 subsystem_id);
5402
5403 if (subsystem_vendor_id == VENDOR_AVER_MEDIA) {
5404 bktr->card = cards[ (card = CARD_AVER_MEDIA) ];
5405 bktr->card.eepromAddr = eeprom_i2c_address;
5406 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5407 goto checkTuner;
5408 }
5409
5410 if (subsystem_vendor_id == VENDOR_HAUPPAUGE) {
5411 bktr->card = cards[ (card = CARD_HAUPPAUGE) ];
5412 bktr->card.eepromAddr = eeprom_i2c_address;
5413 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5414 goto checkTuner;
5415 }
5416
5417 if (subsystem_vendor_id == VENDOR_FLYVIDEO) {
5418 bktr->card = cards[ (card = CARD_FLYVIDEO) ];
5419 bktr->card.eepromAddr = eeprom_i2c_address;
5420 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5421 goto checkTuner;
5422 }
5423
5424 if (subsystem_vendor_id == VENDOR_STB) {
5425 bktr->card = cards[ (card = CARD_STB) ];
5426 bktr->card.eepromAddr = eeprom_i2c_address;
5427 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5428 goto checkTuner;
5429 }
5430
5431 /* Vendor is unknown. We will use the standard probe code */
5432 /* which may not give best results */
5433 printf("Warning - card vendor 0x%04x (model 0x%04x) unknown. This may cause poor performance\n",subsystem_vendor_id,subsystem_id);
5434 }
5435 else
5436 {
5437 printf("Warning - card has no configuration EEPROM. Cannot determine card make. This may cause poor performance\n");
5438 }
5439 } /* end of bt878/bt879 card detection code */
5440
5441 /* If we get to this point, we must have a Bt848/848A/849A card */
5442 /* or a Bt878/879 with an unknown subsystem vendor id */
5443 /* Try and determine the make of card by clever i2c probing */
5444
5445 /* Check for i2c devices. If none, move on */
5446 if (!any_i2c_devices) {
5447 bktr->card = cards[ (card = CARD_INTEL) ];
5448 bktr->card.eepromAddr = 0;
5449 bktr->card.eepromSize = 0;
5450 goto checkTuner;
5451 }
5452
5453
5454 /* Look for Hauppauge, STB and Osprey cards by the presence */
5455 /* of an EEPROM */
5456 /* Note: Bt878 based cards also use EEPROMs so we can only do this */
5457 /* test on BT848/848A and 849A based cards. */
5458 if ((bktr->id==BROOKTREE_848) ||
5459 (bktr->id==BROOKTREE_848A) ||
5460 (bktr->id==BROOKTREE_849A)) {
5461
5462 /* At i2c address 0xa0, look for Hauppauge and Osprey cards */
5463 if ( (status = i2cRead( bktr, PFC8582_RADDR )) != ABSENT ) {
5464
5465 /* Read the eeprom contents */
5466 bktr->card = cards[ (card = CARD_UNKNOWN) ];
5467 bktr->card.eepromAddr = PFC8582_WADDR;
5468 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5469 readEEProm(bktr, 0, 128, (u_char *) &eeprom );
5470
5471 /* For Hauppauge, check the EEPROM begins with 0x84 */
5472 if (eeprom[0] == 0x84) {
5473 bktr->card = cards[ (card = CARD_HAUPPAUGE) ];
5474 bktr->card.eepromAddr = PFC8582_WADDR;
5475 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5476 goto checkTuner;
5477 }
5478
5479 /* For Osprey, check the EEPROM begins with "MMAC" */
5480 if ( (eeprom[0] == 'M') &&(eeprom[1] == 'M')
5481 &&(eeprom[2] == 'A') &&(eeprom[3] == 'C')) {
5482 bktr->card = cards[ (card = CARD_OSPREY) ];
5483 bktr->card.eepromAddr = PFC8582_WADDR;
5484 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5485 goto checkTuner;
5486 }
5487 printf("Warning: Unknown card type. EEPROM data not recognised\n");
5488 printf("%x %x %x %x\n",eeprom[0],eeprom[1],eeprom[2],eeprom[3]);
5489 }
5490
5491 /* look for an STB card */
5492 if ( (status = i2cRead( bktr, X24C01_RADDR )) != ABSENT ) {
5493 bktr->card = cards[ (card = CARD_STB) ];
5494 bktr->card.eepromAddr = X24C01_WADDR;
5495 bktr->card.eepromSize = (u_char)(128 / EEPROMBLOCKSIZE);
5496 goto checkTuner;
5497 }
5498
5499 }
5500
5501 signCard( bktr, 1, 128, (u_char *) &probe_signature );
5502
5503 if (bootverbose) {
5504 printf("card signature \n");
5505 for (j = 0; j < Bt848_MAX_SIGN; j++) {
5506 printf(" %02x ", probe_signature[j]);
5507 }
5508 printf("\n\n");
5509 }
5510 for (i = 0;
5511 i < (sizeof bt848_card_signature)/ sizeof (struct bt848_card_sig);
5512 i++ ) {
5513
5514 card_found = 1;
5515 probe_temp = (u_char *) &bt848_card_signature[i].signature;
5516
5517 for (j = 0; j < Bt848_MAX_SIGN; j++) {
5518 if ((probe_temp[j] & 0xf) != (probe_signature[j] & 0xf)) {
5519 card_found = 0;
5520 break;
5521 }
5522
5523 }
5524 if (card_found) {
5525 bktr->card = cards[ card = bt848_card_signature[i].card];
5526 bktr->card.tuner = &tuners[ bt848_card_signature[i].tuner];
5527 eeprom_i2c_address = locate_eeprom_address( bktr );
5528 if (eeprom_i2c_address != -1) {
5529 bktr->card.eepromAddr = eeprom_i2c_address;
5530 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5531 } else {
5532 bktr->card.eepromAddr = 0;
5533 bktr->card.eepromSize = 0;
5534 }
5535 goto checkDBX;
5536 }
5537 }
5538
5539 /* We do not know the card type. Default to Miro */
5540 bktr->card = cards[ (card = CARD_MIRO) ];
5541
5542
5543checkEEPROM:
5544 /* look for a configuration eeprom */
5545 eeprom_i2c_address = locate_eeprom_address( bktr );
5546 if (eeprom_i2c_address != -1) {
5547 bktr->card.eepromAddr = eeprom_i2c_address;
5548 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5549 } else {
5550 bktr->card.eepromAddr = 0;
5551 bktr->card.eepromSize = 0;
5552 }
5553
5554
5555checkTuner:
5556
5557 /* look for a tuner */
5558 tuner_i2c_address = locate_tuner_address( bktr );
5559 if ( tuner_i2c_address == -1 ) {
5560 bktr->card.tuner = &tuners[ NO_TUNER ];
5561 goto checkDBX;
5562 }
5563
5564#if defined( OVERRIDE_TUNER )
5565 bktr->card.tuner = &tuners[ OVERRIDE_TUNER ];
5566 goto checkDBX;
5567#endif
5568 if (bktr->bt848_tuner != -1 ) {
5569 bktr->card.tuner = &tuners[ bktr->bt848_tuner & 0xff ];
5570 goto checkDBX;
5571 }
5572
5573 /* Check for i2c devices */
5574 if (!any_i2c_devices) {
5575 bktr->card.tuner = &tuners[ NO_TUNER ];
5576 goto checkDBX;
5577 }
5578
5579 /* differentiate type of tuner */
5580
5581 switch (card) {
5582 case CARD_MIRO:
5583 switch (((bt848->gpio_data >> 10)-1)&7) {
5584 case 0: bktr->card.tuner = &tuners[ TEMIC_PAL ]; break;
5585 case 1: bktr->card.tuner = &tuners[ PHILIPS_PAL ]; break;
5586 case 2: bktr->card.tuner = &tuners[ PHILIPS_NTSC ]; break;
5587 case 3: bktr->card.tuner = &tuners[ PHILIPS_SECAM ]; break;
5588 case 4: bktr->card.tuner = &tuners[ NO_TUNER ]; break;
5589 case 5: bktr->card.tuner = &tuners[ PHILIPS_PALI ]; break;
5590 case 6: bktr->card.tuner = &tuners[ TEMIC_NTSC ]; break;
5591 case 7: bktr->card.tuner = &tuners[ TEMIC_PALI ]; break;
5592 }
5593 goto checkDBX;
5594 break;
5595
5596 case CARD_HAUPPAUGE:
5597 /* Hauppauge kindly supplied the following Tuner Table */
5598 /* FIXME: I think the tuners the driver selects for types */
5599 /* 0x08 and 0x15 may be incorrect but no one has complained. */
5600 /*
5601 ID Tuner Model Format We select Format
5602 0 NONE
5603 1 EXTERNAL
5604 2 OTHER
5605 3 Philips FI1216 BG
5606 4 Philips FI1216MF BGLL'
5607 5 Philips FI1236 MN PHILIPS_NTSC
5608 6 Philips FI1246 I
5609 7 Philips FI1256 DK
5610 8 Philips FI1216 MK2 BG PHILIPS_PALI
5611 9 Philips FI1216MF MK2 BGLL'
5612 a Philips FI1236 MK2 MN PHILIPS_NTSC
5613 b Philips FI1246 MK2 I PHILIPS_PALI
5614 c Philips FI1256 MK2 DK
5615 d Temic 4032FY5 NTSC TEMIC_NTSC
5616 e Temic 4002FH5 BG TEMIC_PAL
5617 f Temic 4062FY5 I TEMIC_PALI
5618 10 Philips FR1216 MK2 BG
5619 11 Philips FR1216MF MK2 BGLL'
5620 12 Philips FR1236 MK2 MN PHILIPS_FR1236_NTSC
5621 13 Philips FR1246 MK2 I
5622 14 Philips FR1256 MK2 DK
5623 15 Philips FM1216 BG PHILIPS_FR1216_PAL
5624 16 Philips FM1216MF BGLL'
5625 17 Philips FM1236 MN PHILIPS_FR1236_NTSC
5626 18 Philips FM1246 I
5627 19 Philips FM1256 DK
5628 1a Temic 4036FY5 MN - FI1236 MK2 clone
5629 1b Samsung TCPN9082D MN
5630 1c Samsung TCPM9092P Pal BG/I/DK
5631 1d Temic 4006FH5 BG PHILIPS_PALI clone
5632 1e Samsung TCPN9085D MN/Radio
5633 1f Samsung TCPB9085P Pal BG/I/DK / Radio
5634 20 Samsung TCPL9091P Pal BG & Secam L/L'
5635 21 Temic 4039FY5 NTSC Radio
5636
5637 */
5638
5639 readEEProm(bktr, 0, 128, (u_char *) &eeprom );
5640
5641
5642 /* Determine the model number from the eeprom */
5643 {
5644 u_int model;
5645 u_int revision;
5646 model = (eeprom[12] << 8 | eeprom[11]);
5647 revision = (eeprom[15] << 16 | eeprom[14] << 8 | eeprom[13]);
5648 if (verbose)
5649 printf("bktr%d: Hauppauge Model %d %c%c%c%c\n",
5650 unit,
5651 model,
5652 ((revision >> 18) & 0x3f) + 32,
5653 ((revision >> 12) & 0x3f) + 32,
5654 ((revision >> 6) & 0x3f) + 32,
5655 ((revision >> 0) & 0x3f) + 32 );
5656 }
5657
5658 /* Determine the tuner type from the eeprom */
5659 tuner_code = eeprom[9];
5660 switch (tuner_code) {
5661
5662 case 0x5:
5663 case 0x0a:
5664 case 0x1a:
5665 bktr->card.tuner = &tuners[ PHILIPS_NTSC ];
5666 goto checkDBX;
5667
5668 case 0x12:
5669 case 0x17:
5670 bktr->card.tuner = &tuners[ PHILIPS_FR1236_NTSC ];
5671 goto checkDBX;
5672
5673 case 0x8:
5674 case 0xb:
5675 case 0x1d:
5676 bktr->card.tuner = &tuners[ PHILIPS_PALI ];
5677 goto checkDBX;
5678
5679 case 0xd:
5680 bktr->card.tuner = &tuners[ TEMIC_NTSC ];
5681 goto checkDBX;
5682
5683 case 0xe:
5684 bktr->card.tuner = &tuners[ TEMIC_PAL];
5685 goto checkDBX;
5686
5687 case 0xf:
5688 bktr->card.tuner = &tuners[ TEMIC_PALI ];
5689 goto checkDBX;
5690
5691 case 0x15:
5692 bktr->card.tuner = &tuners[ PHILIPS_FR1216_PAL];
5693 goto checkDBX;
5694
5695 default :
5696 printf("Warning - Unknown Hauppauge Tuner 0x%x\n",tuner_code);
5697 }
5698 break;
5699
5700 } /* end switch(card) */
5701
5702 /* At this point, a goto checkDBX has not occured */
5703 /* We have not been able to select a Tuner */
5704 /* Some cards make use of the tuner address to */
5705 /* identify the make/model of tuner */
5706
5707 /* At address 0xc0/0xc1 we often find a TEMIC NTSC */
5708 if ( i2cRead( bktr, 0xc1 ) != ABSENT ) {
5709 bktr->card.tuner = &tuners[ TEMIC_NTSC ];
5710 goto checkDBX;
5711 }
5712
5713 /* At address 0xc6/0xc7 we often find a PHILIPS NTSC Tuner */
5714 if ( i2cRead( bktr, 0xc7 ) != ABSENT ) {
5715 bktr->card.tuner = &tuners[ PHILIPS_NTSC ];
5716 goto checkDBX;
5717 }
5718
5719 /* Address 0xc2/0xc3 is default (or common address) for several */
5720 /* tuners and we cannot tell which is which. */
5721 /* And for all other tuner i2c addresses, select the default */
5722 bktr->card.tuner = &tuners[ DEFAULT_TUNER ];
5723
5724
5725checkDBX:
5726#if defined( OVERRIDE_DBX )
5727 bktr->card.dbx = OVERRIDE_DBX;
5728 goto checkMSP;
5729#endif
5730 /* Check for i2c devices */
5731 if (!any_i2c_devices) {
5732 goto checkMSP;
5733 }
5734
5735 /* probe for BTSC (dbx) chip */
5736 if ( i2cRead( bktr, TDA9850_RADDR ) != ABSENT )
5737 bktr->card.dbx = 1;
5738
5739checkMSP:
5740 /* If this is a Hauppauge Bt878 card, we need to enable the
5741 * MSP 34xx audio chip.
5742 * If this is a Hauppauge Bt848 card, reset the MSP device.
5743 * The MSP reset line is wired to GPIO pin 5. On Bt878 cards a pulldown
5744 * resistor holds the device in reset until we set GPIO pin 5.
5745 */
5746
5747 /* Optionally skip the MSP reset. This is handy if you initialise the
5748 * MSP audio in another operating system (eg Windows) first and then
5749 * do a soft reboot.
5750 */
5751
5752#ifndef BKTR_NO_MSP_RESET
5753 if (card == CARD_HAUPPAUGE) {
5754 bt848->gpio_out_en = bt848->gpio_out_en | (1<<5);
5755 bt848->gpio_data = bt848->gpio_data | (1<<5); /* write '1' */
5756 DELAY(2500); /* wait 2.5ms */
5757 bt848->gpio_data = bt848->gpio_data & ~(1<<5); /* write '0' */
5758 DELAY(2500); /* wait 2.5ms */
5759 bt848->gpio_data = bt848->gpio_data | (1<<5); /* write '1' */
5760 DELAY(2500); /* wait 2.5ms */
5761 }
5762#endif
5763
5764#if defined( OVERRIDE_MSP )
5765 bktr->card.msp3400c = OVERRIDE_MSP;
5766 goto checkMSPEnd;
5767#endif
5768
5769 /* Check for i2c devices */
5770 if (!any_i2c_devices) {
5771 goto checkMSPEnd;
5772 }
5773
5774 if ( i2cRead( bktr, MSP3400C_RADDR ) != ABSENT )
5775 bktr->card.msp3400c = 1;
5776
5777checkMSPEnd:
5778
5779/* Start of Check Remote */
5780 /* Check for the Hauppauge IR Remote Control */
5781 /* If there is an external unit, the internal will be ignored */
5782
5783 bktr->remote_control = 0; /* initial value */
5784
5785 if (any_i2c_devices) {
5786 if (i2cRead( bktr, HAUP_REMOTE_EXT_RADDR ) != ABSENT )
5787 {
5788 bktr->remote_control = 1;
5789 bktr->remote_control_addr = HAUP_REMOTE_EXT_RADDR;
5790 }
5791 else if (i2cRead( bktr, HAUP_REMOTE_INT_RADDR ) != ABSENT )
5792 {
5793 bktr->remote_control = 1;
5794 bktr->remote_control_addr = HAUP_REMOTE_INT_RADDR;
5795 }
5796
5797 }
5798 /* If a remote control is found, poll it 5 times to turn off the LED */
5799 if (bktr->remote_control) {
5800 int i;
5801 for (i=0; i<5; i++)
5802 i2cRead( bktr, bktr->remote_control_addr );
5803 }
5804/* End of Check Remote */
5805
5806#if defined( BKTR_USE_PLL )
5807 bktr->xtal_pll_mode = BT848_USE_PLL;
5808 goto checkPLLEnd;
5809#endif
5810 /* Default is to use XTALS and not PLL mode */
5811 bktr->xtal_pll_mode = BT848_USE_XTALS;
5812
5813 /* Enable PLL mode for PAL/SECAM users on Hauppauge 878 cards */
5814 if ((card == CARD_HAUPPAUGE) &&
5815 (bktr->id==BROOKTREE_878 || bktr->id==BROOKTREE_879) )
5816 bktr->xtal_pll_mode = BT848_USE_PLL;
5817
5818
5819 /* Enable PLL mode for OSPREY users */
5820 if (card == CARD_OSPREY)
5821 bktr->xtal_pll_mode = BT848_USE_PLL;
5822
5823 /* Enable PLL mode for PAL/SECAM users on FlyVideo 878 cards */
5824 if ((card == CARD_FLYVIDEO) &&
5825 (bktr->id==BROOKTREE_878 || bktr->id==BROOKTREE_879) )
5826 bktr->xtal_pll_mode = BT848_USE_PLL;
5827
5828#if defined( BKTR_USE_PLL )
5829checkPLLEnd:
5830#endif
5831
5832
5833 bktr->card.tuner_pllAddr = tuner_i2c_address;
5834
5835 if ( verbose ) {
5836 printf( "%s", bktr->card.name );
5837 if ( bktr->card.tuner )
5838 printf( ", %s tuner", bktr->card.tuner->name );
5839 if ( bktr->card.dbx )
5840 printf( ", dbx stereo" );
5841 if ( bktr->card.msp3400c )
5842 printf( ", msp3400c stereo" );
5843 if ( bktr->remote_control )
5844 printf( ", remote control" );
5845 printf( ".\n" );
5846 }
5847}
5848#undef ABSENT
5849
5850
5851/******************************************************************************
5852 * tuner specific routines:
5853 */
5854
5855
5856/* scaling factor for frequencies expressed as ints */
5857#define FREQFACTOR 16
5858
5859/*
5860 * Format:
5861 * entry 0: MAX legal channel
5862 * entry 1: IF frequency
5863 * expressed as fi{mHz} * 16,
5864 * eg 45.75mHz == 45.75 * 16 = 732
5865 * entry 2: [place holder/future]
5866 * entry 3: base of channel record 0
5867 * entry 3 + (x*3): base of channel record 'x'
5868 * entry LAST: NULL channel entry marking end of records
5869 *
5870 * Record:
5871 * int 0: base channel
5872 * int 1: frequency of base channel,
5873 * expressed as fb{mHz} * 16,
5874 * int 2: offset frequency between channels,
5875 * expressed as fo{mHz} * 16,
5876 */
5877
5878/*
5879 * North American Broadcast Channels:
5880 *
5881 * 2: 55.25 mHz - 4: 67.25 mHz
5882 * 5: 77.25 mHz - 6: 83.25 mHz
5883 * 7: 175.25 mHz - 13: 211.25 mHz
5884 * 14: 471.25 mHz - 83: 885.25 mHz
5885 *
5886 * IF freq: 45.75 mHz
5887 */
5888#define OFFSET 6.00
5889static int nabcst[] = {
5890 83, (int)( 45.75 * FREQFACTOR), 0,
5891 14, (int)(471.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5892 7, (int)(175.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5893 5, (int)( 77.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5894 2, (int)( 55.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5895 0
5896};
5897#undef OFFSET
5898
5899/*
5900 * North American Cable Channels, IRC:
5901 *
5902 * 2: 55.25 mHz - 4: 67.25 mHz
5903 * 5: 77.25 mHz - 6: 83.25 mHz
5904 * 7: 175.25 mHz - 13: 211.25 mHz
5905 * 14: 121.25 mHz - 22: 169.25 mHz
5906 * 23: 217.25 mHz - 94: 643.25 mHz
5907 * 95: 91.25 mHz - 99: 115.25 mHz
5908 *
5909 * IF freq: 45.75 mHz
5910 */
5911#define OFFSET 6.00
5912static int irccable[] = {
5913 99, (int)( 45.75 * FREQFACTOR), 0,
5914 95, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5915 23, (int)(217.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5916 14, (int)(121.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5917 7, (int)(175.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5918 5, (int)( 77.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5919 2, (int)( 55.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5920 0
5921};
5922#undef OFFSET
5923
5924/*
5925 * North American Cable Channels, HRC:
5926 *
5927 * 2: 54 mHz - 4: 66 mHz
5928 * 5: 78 mHz - 6: 84 mHz
5929 * 7: 174 mHz - 13: 210 mHz
5930 * 14: 120 mHz - 22: 168 mHz
5931 * 23: 216 mHz - 94: 642 mHz
5932 * 95: 90 mHz - 99: 114 mHz
5933 *
5934 * IF freq: 45.75 mHz
5935 */
5936#define OFFSET 6.00
5937static int hrccable[] = {
5938 99, (int)( 45.75 * FREQFACTOR), 0,
5939 95, (int)( 90.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5940 23, (int)(216.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5941 14, (int)(120.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5942 7, (int)(174.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5943 5, (int)( 78.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5944 2, (int)( 54.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
5945 0
5946};
5947#undef OFFSET
5948
5949/*
5950 * Western European broadcast channels:
5951 *
5952 * (there are others that appear to vary between countries - rmt)
5953 *
5954 * here's the table Philips provides:
5955 * caution, some of the offsets don't compute...
5956 *
5957 * 1 4525 700 N21
5958 *
5959 * 2 4825 700 E2
5960 * 3 5525 700 E3
5961 * 4 6225 700 E4
5962 *
5963 * 5 17525 700 E5
5964 * 6 18225 700 E6
5965 * 7 18925 700 E7
5966 * 8 19625 700 E8
5967 * 9 20325 700 E9
5968 * 10 21025 700 E10
5969 * 11 21725 700 E11
5970 * 12 22425 700 E12
5971 *
5972 * 13 5375 700 ITA
5973 * 14 6225 700 ITB
5974 *
5975 * 15 8225 700 ITC
5976 *
5977 * 16 17525 700 ITD
5978 * 17 18325 700 ITE
5979 *
5980 * 18 19225 700 ITF
5981 * 19 20125 700 ITG
5982 * 20 21025 700 ITH
5983 *
5984 * 21 47125 800 E21
5985 * 22 47925 800 E22
5986 * 23 48725 800 E23
5987 * 24 49525 800 E24
5988 * 25 50325 800 E25
5989 * 26 51125 800 E26
5990 * 27 51925 800 E27
5991 * 28 52725 800 E28
5992 * 29 53525 800 E29
5993 * 30 54325 800 E30
5994 * 31 55125 800 E31
5995 * 32 55925 800 E32
5996 * 33 56725 800 E33
5997 * 34 57525 800 E34
5998 * 35 58325 800 E35
5999 * 36 59125 800 E36
6000 * 37 59925 800 E37
6001 * 38 60725 800 E38
6002 * 39 61525 800 E39
6003 * 40 62325 800 E40
6004 * 41 63125 800 E41
6005 * 42 63925 800 E42
6006 * 43 64725 800 E43
6007 * 44 65525 800 E44
6008 * 45 66325 800 E45
6009 * 46 67125 800 E46
6010 * 47 67925 800 E47
6011 * 48 68725 800 E48
6012 * 49 69525 800 E49
6013 * 50 70325 800 E50
6014 * 51 71125 800 E51
6015 * 52 71925 800 E52
6016 * 53 72725 800 E53
6017 * 54 73525 800 E54
6018 * 55 74325 800 E55
6019 * 56 75125 800 E56
6020 * 57 75925 800 E57
6021 * 58 76725 800 E58
6022 * 59 77525 800 E59
6023 * 60 78325 800 E60
6024 * 61 79125 800 E61
6025 * 62 79925 800 E62
6026 * 63 80725 800 E63
6027 * 64 81525 800 E64
6028 * 65 82325 800 E65
6029 * 66 83125 800 E66
6030 * 67 83925 800 E67
6031 * 68 84725 800 E68
6032 * 69 85525 800 E69
6033 *
6034 * 70 4575 800 IA
6035 * 71 5375 800 IB
6036 * 72 6175 800 IC
6037 *
6038 * 74 6925 700 S01
6039 * 75 7625 700 S02
6040 * 76 8325 700 S03
6041 *
6042 * 80 10525 700 S1
6043 * 81 11225 700 S2
6044 * 82 11925 700 S3
6045 * 83 12625 700 S4
6046 * 84 13325 700 S5
6047 * 85 14025 700 S6
6048 * 86 14725 700 S7
6049 * 87 15425 700 S8
6050 * 88 16125 700 S9
6051 * 89 16825 700 S10
6052 * 90 23125 700 S11
6053 * 91 23825 700 S12
6054 * 92 24525 700 S13
6055 * 93 25225 700 S14
6056 * 94 25925 700 S15
6057 * 95 26625 700 S16
6058 * 96 27325 700 S17
6059 * 97 28025 700 S18
6060 * 98 28725 700 S19
6061 * 99 29425 700 S20
6062 *
6063 *
6064 * Channels S21 - S41 are taken from
6065 * http://gemma.apple.com:80/dev/technotes/tn/tn1012.html
6066 *
6067 * 100 30325 800 S21
6068 * 101 31125 800 S22
6069 * 102 31925 800 S23
6070 * 103 32725 800 S24
6071 * 104 33525 800 S25
6072 * 105 34325 800 S26
6073 * 106 35125 800 S27
6074 * 107 35925 800 S28
6075 * 108 36725 800 S29
6076 * 109 37525 800 S30
6077 * 110 38325 800 S31
6078 * 111 39125 800 S32
6079 * 112 39925 800 S33
6080 * 113 40725 800 S34
6081 * 114 41525 800 S35
6082 * 115 42325 800 S36
6083 * 116 43125 800 S37
6084 * 117 43925 800 S38
6085 * 118 44725 800 S39
6086 * 119 45525 800 S40
6087 * 120 46325 800 S41
6088 *
6089 * 121 3890 000 IFFREQ
6090 *
6091 */
6092static int weurope[] = {
6093 121, (int)( 38.90 * FREQFACTOR), 0,
6094 100, (int)(303.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6095 90, (int)(231.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR),
6096 80, (int)(105.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR),
6097 74, (int)( 69.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR),
6098 21, (int)(471.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6099 17, (int)(183.25 * FREQFACTOR), (int)(9.00 * FREQFACTOR),
6100 16, (int)(175.25 * FREQFACTOR), (int)(9.00 * FREQFACTOR),
6101 15, (int)(82.25 * FREQFACTOR), (int)(8.50 * FREQFACTOR),
6102 13, (int)(53.75 * FREQFACTOR), (int)(8.50 * FREQFACTOR),
6103 5, (int)(175.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR),
6104 2, (int)(48.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR),
6105 0
6106};
6107
6108/*
6109 * Japanese Broadcast Channels:
6110 *
6111 * 1: 91.25MHz - 3: 103.25MHz
6112 * 4: 171.25MHz - 7: 189.25MHz
6113 * 8: 193.25MHz - 12: 217.25MHz (VHF)
6114 * 13: 471.25MHz - 62: 765.25MHz (UHF)
6115 *
6116 * IF freq: 45.75 mHz
6117 * OR
6118 * IF freq: 58.75 mHz
6119 */
6120#define OFFSET 6.00
6121#define IF_FREQ 45.75
6122static int jpnbcst[] = {
6123 62, (int)(IF_FREQ * FREQFACTOR), 0,
6124 13, (int)(471.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6125 8, (int)(193.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6126 4, (int)(171.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6127 1, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6128 0
6129};
6130#undef IF_FREQ
6131#undef OFFSET
6132
6133/*
6134 * Japanese Cable Channels:
6135 *
6136 * 1: 91.25MHz - 3: 103.25MHz
6137 * 4: 171.25MHz - 7: 189.25MHz
6138 * 8: 193.25MHz - 12: 217.25MHz
6139 * 13: 109.25MHz - 21: 157.25MHz
6140 * 22: 165.25MHz
6141 * 23: 223.25MHz - 63: 463.25MHz
6142 *
6143 * IF freq: 45.75 mHz
6144 */
6145#define OFFSET 6.00
6146#define IF_FREQ 45.75
6147static int jpncable[] = {
6148 63, (int)(IF_FREQ * FREQFACTOR), 0,
6149 23, (int)(223.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6150 22, (int)(165.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6151 13, (int)(109.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6152 8, (int)(193.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6153 4, (int)(171.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6154 1, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6155 0
6156};
6157#undef IF_FREQ
6158#undef OFFSET
6159
6160/*
6161 * xUSSR Broadcast Channels:
6162 *
6163 * 1: 49.75MHz - 2: 59.25MHz
6164 * 3: 77.25MHz - 5: 93.25MHz
6165 * 6: 175.25MHz - 12: 223.25MHz
6166 * 13-20 - not exist
6167 * 21: 471.25MHz - 34: 575.25MHz
6168 * 35: 583.25MHz - 69: 855.25MHz
6169 *
6170 * Cable channels
6171 *
6172 * 70: 111.25MHz - 77: 167.25MHz
6173 * 78: 231.25MHz -107: 463.25MHz
6174 *
6175 * IF freq: 38.90 MHz
6176 */
6177#define IF_FREQ 38.90
6178static int xussr[] = {
6179 107, (int)(IF_FREQ * FREQFACTOR), 0,
6180 78, (int)(231.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6181 70, (int)(111.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6182 35, (int)(583.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6183 21, (int)(471.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6184 6, (int)(175.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6185 3, (int)( 77.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6186 1, (int)( 49.75 * FREQFACTOR), (int)(9.50 * FREQFACTOR),
6187 0
6188};
6189#undef IF_FREQ
6190
6191/*
6192 * Australian broadcast channels
6193 */
6194#define OFFSET 7.00
6195static int australia[] = {
6196 83, (int)( 45.00 * FREQFACTOR), 0,
6197 28, (int)(520.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6198 14, (int)(471.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6199 11, (int)(214.50 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6200 10, (int)(201.50 * FREQFACTOR), (int)( 13.00 * FREQFACTOR),
6201 7, (int)(174.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6202 3, (int)( 85.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6203 2, (int)( 56.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6204 0
6205};
6206#undef OFFSET
6207
6208static struct {
6209 int *ptr;
6210 char name[BT848_MAX_CHNLSET_NAME_LEN];
6211} freqTable[] = {
6212 {NULL, ""},
6213 {nabcst, "nabcst"},
6214 {irccable, "cableirc"},
6215 {hrccable, "cablehrc"},
6216 {weurope, "weurope"},
6217 {jpnbcst, "jpnbcst"},
6218 {jpncable, "jpncable"},
6219 {xussr, "xussr"},
6220 {australia, "australia"},
6221
6222};
6223
6224#define TBL_CHNL freqTable[ bktr->tuner.chnlset ].ptr[ x ]
6225#define TBL_BASE_FREQ freqTable[ bktr->tuner.chnlset ].ptr[ x + 1 ]
6226#define TBL_OFFSET freqTable[ bktr->tuner.chnlset ].ptr[ x + 2 ]
6227static int
6228frequency_lookup( bktr_ptr_t bktr, int channel )
6229{
6230 int x;
6231
6232 /* check for "> MAX channel" */
6233 x = 0;
6234 if ( channel > TBL_CHNL )
6235 return( -1 );
6236
6237 /* search the table for data */
6238 for ( x = 3; TBL_CHNL; x += 3 ) {
6239 if ( channel >= TBL_CHNL ) {
6240 return( TBL_BASE_FREQ +
6241 ((channel - TBL_CHNL) * TBL_OFFSET) );
6242 }
6243 }
6244
6245 /* not found, must be below the MIN channel */
6246 return( -1 );
6247}
6248#undef TBL_OFFSET
6249#undef TBL_BASE_FREQ
6250#undef TBL_CHNL
6251
6252
6253#define TBL_IF freqTable[ bktr->tuner.chnlset ].ptr[ 1 ]
6254/*
6255 * set the frequency of the tuner
6256 */
6257static int
6258tv_freq( bktr_ptr_t bktr, int frequency )
6259{
6260 const struct TUNER* tuner;
6261 u_char addr;
6262 u_char control;
6263 u_char band;
6264 int N;
6265
6266 tuner = bktr->card.tuner;
6267 if ( tuner == NULL )
6268 return( -1 );
6269
6270 /*
6271 * select the band based on frequency
6272 * XXX FIXME: get the cross-over points from the tuner struct
6273 */
6274 if ( frequency < (160 * FREQFACTOR) )
6275 N = 0;
6276 else if ( frequency < (454 * FREQFACTOR) )
6277 N = 1;
6278 else
6279 N = 2;
6280
6281 if(frequency > RADIO_OFFSET) {
6282 N=3;
6283 frequency -= RADIO_OFFSET;
6284 }
6285
6286 /* set the address of the PLL */
6287 addr = bktr->card.tuner_pllAddr;
6288 control = tuner->pllControl[ N ];
6289 band = tuner->bandAddrs[ N ];
6290 if(!(band && control)) /* Don't try to set un- */
6291 return(-1); /* supported modes. */
6292
6293 if(N==3)
6294 band |= bktr->tuner.radio_mode;
6295
6296 /*
6297 * N = 16 * { fRF(pc) + fIF(pc) }
6298 * where:
6299 * pc is picture carrier, fRF & fIF are in mHz
6300 *
6301 * frequency was passed in as mHz * 16
6302 */
6303#if defined( TEST_TUNER_AFC )
6304 if ( bktr->tuner.afc )
6305 frequency -= 4;
6306#endif
6307
6308 if(bktr->bt848_tuner == ALPS_TSCH5 && N == 3) /* for FM frequency */
6309 N = frequency;
6310 else
6311 N = frequency + TBL_IF;
6312
6313 if ( frequency > bktr->tuner.frequency ) {
6314 i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff );
6315 i2cWrite( bktr, addr, control, band );
6316 }
6317 else {
6318 i2cWrite( bktr, addr, control, band );
6319 i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff );
6320 }
6321
6322#if defined( TUNER_AFC )
6323 if ( bktr->tuner.afc == TRUE ) {
6324 if ( (N = do_afc( bktr, addr, N )) < 0 ) {
6325 /* AFC failed, restore requested frequency */
6326 N = frequency + TBL_IF;
6327 i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff );
6328 }
6329 else
6330 frequency = N - TBL_IF;
6331 }
6332#endif /* TUNER_AFC */
6333
6334 /* update frequency */
6335 bktr->tuner.frequency = frequency;
6336
6337 return( 0 );
6338}
6339
6340#if defined( TUNER_AFC )
6341/*
6342 *
6343 */
6344static int
6345do_afc( bktr_ptr_t bktr, int addr, int frequency )
6346{
6347 int step;
6348 int status;
6349 int origFrequency;
6350
6351 origFrequency = frequency;
6352
6353 /* wait for first setting to take effect */
6354 tsleep( BKTR_SLEEP, PZERO, "tuning", hz/8 );
6355
6356 if ( (status = i2cRead( bktr, addr + 1 )) < 0 )
6357 return( -1 );
6358
6359#if defined( TEST_TUNER_AFC )
6360 printf( "\nOriginal freq: %d, status: 0x%02x\n", frequency, status );
6361#endif
6362 for ( step = 0; step < AFC_MAX_STEP; ++step ) {
6363 if ( (status = i2cRead( bktr, addr + 1 )) < 0 )
6364 goto fubar;
6365 if ( !(status & 0x40) ) {
6366#if defined( TEST_TUNER_AFC )
6367 printf( "no lock!\n" );
6368#endif
6369 goto fubar;
6370 }
6371
6372 switch( status & AFC_BITS ) {
6373 case AFC_FREQ_CENTERED:
6374#if defined( TEST_TUNER_AFC )
6375 printf( "Centered, freq: %d, status: 0x%02x\n", frequency, status );
6376#endif
6377 return( frequency );
6378
6379 case AFC_FREQ_MINUS_125:
6380 case AFC_FREQ_MINUS_62:
6381#if defined( TEST_TUNER_AFC )
6382 printf( "Low, freq: %d, status: 0x%02x\n", frequency, status );
6383#endif
6384 --frequency;
6385 break;
6386
6387 case AFC_FREQ_PLUS_62:
6388 case AFC_FREQ_PLUS_125:
6389#if defined( TEST_TUNER_AFC )
6390 printf( "Hi, freq: %d, status: 0x%02x\n", frequency, status );
6391#endif
6392 ++frequency;
6393 break;
6394 }
6395
6396 i2cWrite( bktr, addr,
6397 (frequency>>8) & 0x7f, frequency & 0xff );
6398 DELAY( AFC_DELAY );
6399 }
6400
6401 fubar:
6402 i2cWrite( bktr, addr,
6403 (origFrequency>>8) & 0x7f, origFrequency & 0xff );
6404
6405 return( -1 );
6406}
6407#endif /* TUNER_AFC */
6408#undef TBL_IF
6409
6410
6411/*
6412 * set the channel of the tuner
6413 */
6414static int
6415tv_channel( bktr_ptr_t bktr, int channel )
6416{
6417 int frequency;
6418
6419 /* calculate the frequency according to tuner type */
6420 if ( (frequency = frequency_lookup( bktr, channel )) < 0 )
6421 return( -1 );
6422
6423 /* set the new frequency */
6424 if ( tv_freq( bktr, frequency ) < 0 )
6425 return( -1 );
6426
6427 /* OK to update records */
6428 return( (bktr->tuner.channel = channel) );
6429}
6430
6431/*
6432 * get channelset name
6433 */
6434static int
6435tuner_getchnlset(struct bktr_chnlset *chnlset)
6436{
6437 if (( chnlset->index < CHNLSET_MIN ) ||
6438 ( chnlset->index > CHNLSET_MAX ))
6439 return( EINVAL );
6440
6441 memcpy(&chnlset->name, &freqTable[chnlset->index].name,
6442 BT848_MAX_CHNLSET_NAME_LEN);
6443
6444 chnlset->max_channel=freqTable[chnlset->index].ptr[0];
6445 return( 0 );
6446}
6447/******************************************************************************
6448 * audio specific routines:
6449 */
6450
6451
6452/*
6453 *
6454 */
6455#define AUDIOMUX_DISCOVER_NOT
6456static int
6457set_audio( bktr_ptr_t bktr, int cmd )
6458{
6459 bt848_ptr_t bt848;
6460 u_long temp;
6461 volatile u_char idx;
6462
6463#if defined( AUDIOMUX_DISCOVER )
6464 if ( cmd >= 200 )
6465 cmd -= 200;
6466 else
6467#endif /* AUDIOMUX_DISCOVER */
6468
6469 /* check for existance of audio MUXes */
6470 if ( !bktr->card.audiomuxs[ 4 ] )
6471 return( -1 );
6472
6473 switch (cmd) {
6474 case AUDIO_TUNER:
6475#ifdef BKTR_REVERSEMUTE
6476 bktr->audio_mux_select = 3;
6477#else
6478 bktr->audio_mux_select = 0;
6479#endif
6480
6481 if (bktr->reverse_mute )
6482 bktr->audio_mux_select = 0;
6483 else
6484 bktr->audio_mux_select = 3;
6485
6486 break;
6487 case AUDIO_EXTERN:
6488 bktr->audio_mux_select = 1;
6489 break;
6490 case AUDIO_INTERN:
6491 bktr->audio_mux_select = 2;
6492 break;
6493 case AUDIO_MUTE:
6494 bktr->audio_mute_state = TRUE; /* set mute */
6495 break;
6496 case AUDIO_UNMUTE:
6497 bktr->audio_mute_state = FALSE; /* clear mute */
6498 break;
6499 default:
6500 printf("bktr: audio cmd error %02x\n", cmd);
6501 return( -1 );
6502 }
6503
6504
6505 /* Most cards have a simple audio multiplexer to select the
6506 * audio source. The I/O_GV card has a more advanced multiplexer
6507 * and requires special handling.
6508 */
6509 if ( bktr->bt848_card == CARD_IO_GV ) {
6510 set_bctv_audio( bktr );
6511 return( 0 );
6512 }
6513
6514 /* Proceed with the simpler audio multiplexer code for the majority
6515 * of Bt848 cards.
6516 */
6517
6518 bt848 = bktr->base;
6519
6520 /*
6521 * Leave the upper bits of the GPIO port alone in case they control
6522 * something like the dbx or teletext chips. This doesn't guarantee
6523 * success, but follows the rule of least astonishment.
6524 */
6525
6526 if ( bktr->audio_mute_state == TRUE ) {
6527#ifdef BKTR_REVERSEMUTE
6528 idx = 0;
6529#else
6530 idx = 3;
6531#endif
6532
6533 if (bktr->reverse_mute )
6534 idx = 3;
6535 else
6536 idx = 0;
6537
6538 }
6539 else
6540 idx = bktr->audio_mux_select;
6541
6542 temp = bt848->gpio_data & ~bktr->card.gpio_mux_bits;
6543 bt848->gpio_data =
6544#if defined( AUDIOMUX_DISCOVER )
6545 bt848->gpio_data = temp | (cmd & 0xff);
6546 printf("cmd: %d audio mux %x temp %x \n", cmd,bktr->card.audiomuxs[ idx ], temp );
6547#else
6548 temp | bktr->card.audiomuxs[ idx ];
6549#endif /* AUDIOMUX_DISCOVER */
6550
6551 return( 0 );
6552}
6553
6554
6555/*
6556 *
6557 */
6558static void
6559temp_mute( bktr_ptr_t bktr, int flag )
6560{
6561 static int muteState = FALSE;
6562
6563 if ( flag == TRUE ) {
6564 muteState = bktr->audio_mute_state;
6565 set_audio( bktr, AUDIO_MUTE ); /* prevent 'click' */
6566 }
6567 else {
6568 tsleep( BKTR_SLEEP, PZERO, "tuning", hz/8 );
6569 if ( muteState == FALSE )
6570 set_audio( bktr, AUDIO_UNMUTE );
6571 }
6572}
6573
6574
6575/*
6576 * initialise the dbx chip
6577 * taken from the Linux bttv driver TDA9850 initialisation code
6578 */
6579static void
6580init_BTSC( bktr_ptr_t bktr )
6581{
6582 i2cWrite(bktr, TDA9850_WADDR, CON1ADDR, 0x08); /* noise threshold st */
6583 i2cWrite(bktr, TDA9850_WADDR, CON2ADDR, 0x08); /* noise threshold sap */
6584 i2cWrite(bktr, TDA9850_WADDR, CON3ADDR, 0x40); /* stereo mode */
6585 i2cWrite(bktr, TDA9850_WADDR, CON4ADDR, 0x07); /* 0 dB input gain? */
6586 i2cWrite(bktr, TDA9850_WADDR, ALI1ADDR, 0x10); /* wideband alignment? */
6587 i2cWrite(bktr, TDA9850_WADDR, ALI2ADDR, 0x10); /* spectral alignment? */
6588 i2cWrite(bktr, TDA9850_WADDR, ALI3ADDR, 0x03);
6589}
6590
6591/*
6592 * setup the dbx chip
6593 * XXX FIXME: alot of work to be done here, this merely unmutes it.
6594 */
6595static int
6596set_BTSC( bktr_ptr_t bktr, int control )
6597{
6598 return( i2cWrite( bktr, TDA9850_WADDR, CON3ADDR, control ) );
6599}
6600
6601/*
6602 * CARD_GV_BCTV specific functions.
6603 */
6604
6605#define BCTV_AUDIO_MAIN 0x10 /* main audio program */
6606#define BCTV_AUDIO_SUB 0x20 /* sub audio program */
6607#define BCTV_AUDIO_BOTH 0x30 /* main(L) + sub(R) program */
6608
6609#define BCTV_GPIO_REG0 1
6610#define BCTV_GPIO_REG1 3
6611
6612#define BCTV_GR0_AUDIO_MODE 3
6613#define BCTV_GR0_AUDIO_MAIN 0 /* main program */
6614#define BCTV_GR0_AUDIO_SUB 3 /* sub program */
6615#define BCTV_GR0_AUDIO_BOTH 1 /* main(L) + sub(R) */
6616#define BCTV_GR0_AUDIO_MUTE 4 /* audio mute */
6617#define BCTV_GR0_AUDIO_MONO 8 /* force mono */
6618
6619static void
6620set_bctv_audio( bktr_ptr_t bktr )
6621{
6622 int data;
6623
6624 switch (bktr->audio_mux_select) {
6625 case 1: /* external */
6626 case 2: /* internal */
6627 bctv_gpio_write(bktr, BCTV_GPIO_REG1, 0);
6628 break;
6629 default: /* tuner */
6630 bctv_gpio_write(bktr, BCTV_GPIO_REG1, 1);
6631 break;
6632 }
6633/* switch (bktr->audio_sap_select) { */
6634 switch (BCTV_AUDIO_BOTH) {
6635 case BCTV_AUDIO_SUB:
6636 data = BCTV_GR0_AUDIO_SUB;
6637 break;
6638 case BCTV_AUDIO_BOTH:
6639 data = BCTV_GR0_AUDIO_BOTH;
6640 break;
6641 case BCTV_AUDIO_MAIN:
6642 default:
6643 data = BCTV_GR0_AUDIO_MAIN;
6644 break;
6645 }
6646 if (bktr->audio_mute_state == TRUE)
6647 data |= BCTV_GR0_AUDIO_MUTE;
6648
6649 bctv_gpio_write(bktr, BCTV_GPIO_REG0, data);
6650
6651 return;
6652}
6653
6654/* gpio_data bit assignment */
6655#define BCTV_GPIO_ADDR_MASK 0x000300
6656#define BCTV_GPIO_WE 0x000400
6657#define BCTV_GPIO_OE 0x000800
6658#define BCTV_GPIO_VAL_MASK 0x00f000
6659
6660#define BCTV_GPIO_PORT_MASK 3
6661#define BCTV_GPIO_ADDR_SHIFT 8
6662#define BCTV_GPIO_VAL_SHIFT 12
6663
6664/* gpio_out_en value for read/write */
6665#define BCTV_GPIO_OUT_RMASK 0x000f00
6666#define BCTV_GPIO_OUT_WMASK 0x00ff00
6667
6668#define BCTV_BITS 100
6669
6670static void
6671bctv_gpio_write( bktr_ptr_t bktr, int port, int val )
6672{
6673 bt848_ptr_t bt848 = bktr->base;
6674 u_long data, outbits;
6675
6676 port &= BCTV_GPIO_PORT_MASK;
6677 switch (port) {
6678 case 1:
6679 case 3:
6680 data = ((val << BCTV_GPIO_VAL_SHIFT) & BCTV_GPIO_VAL_MASK) |
6681 ((port << BCTV_GPIO_ADDR_SHIFT) & BCTV_GPIO_ADDR_MASK) |
6682 BCTV_GPIO_WE | BCTV_GPIO_OE;
6683 outbits = BCTV_GPIO_OUT_WMASK;
6684 break;
6685 default:
6686 return;
6687 }
6688 bt848->gpio_out_en = 0;
6689 bt848->gpio_data = data;
6690 bt848->gpio_out_en = outbits;
6691 DELAY(BCTV_BITS);
6692 bt848->gpio_data = data & ~BCTV_GPIO_WE;
6693 DELAY(BCTV_BITS);
6694 bt848->gpio_data = data;
6695 DELAY(BCTV_BITS);
6696 bt848->gpio_data = ~0;
6697 bt848->gpio_out_en = 0;
6698}
6699
6700/* Not yet used
6701static int
6702bctv_gpio_read( bktr_ptr_t bktr, int port )
6703{
6704 bt848_ptr_t bt848 = bktr->base;
6705 u_long data, outbits, ret;
6706
6707 port &= BCTV_GPIO_PORT_MASK;
6708 switch (port) {
6709 case 1:
6710 case 3:
6711 data = ((port << BCTV_GPIO_ADDR_SHIFT) & BCTV_GPIO_ADDR_MASK) |
6712 BCTV_GPIO_WE | BCTV_GPIO_OE;
6713 outbits = BCTV_GPIO_OUT_RMASK;
6714 break;
6715 default:
6716 return( -1 );
6717 }
6718 bt848->gpio_out_en = 0;
6719 bt848->gpio_data = data;
6720 bt848->gpio_out_en = outbits;
6721 DELAY(BCTV_BITS);
6722 bt848->gpio_data = data & ~BCTV_GPIO_OE;
6723 DELAY(BCTV_BITS);
6724 ret = bt848->gpio_data;
6725 DELAY(BCTV_BITS);
6726 bt848->gpio_data = data;
6727 DELAY(BCTV_BITS);
6728 bt848->gpio_data = ~0;
6729 bt848->gpio_out_en = 0;
6730 return( (ret & BCTV_GPIO_VAL_MASK) >> BCTV_GPIO_VAL_SHIFT );
6731}
6732*/
6733
6734/*
6735 * setup the MSP34xx Stereo Audio Chip
6736 * This uses the Auto Configuration Option on MSP3410D and MSP3415D chips
6737 * and DBX mode selection for MSP3430G chips.
6738 * For MSP3400C support, the full programming sequence is required and is
6739 * not yet supported.
6740 */
6741
6742/* Read the MSP version string */
6743static void msp_read_id( bktr_ptr_t bktr, int unit ){
6744 int rev1=0, rev2=0;
6745 rev1 = msp_read(bktr, 0x12, 0x001e);
6746 rev2 = msp_read(bktr, 0x12, 0x001f);
6747
6748 sprintf(bktr->msp_version_string, "34%02d%c-%c%d",
6749 (rev2>>8)&0xff, (rev1&0xff)+'@', ((rev1>>8)&0xff)+'@', rev2&0x1f);
6750
6751 printf("bktr%d: Detected a MSP%s\n",unit,bktr->msp_version_string);
6752}
6753
6754
6755/* Configure the MSP chip to Auto-detect the audio format */
6756static void msp_autodetect( bktr_ptr_t bktr ) {
6757
6758 if (strncmp("3430G", bktr->msp_version_string, 5) == 0){
6759
6760 /* For MSP3430G - countries with mono and DBX stereo */
6761 msp_write(bktr, 0x10, 0x0030,0x2003);/* Enable Auto format detection */
6762 msp_write(bktr, 0x10, 0x0020,0x0020);/* Standard Select Reg. = BTSC-Stereo*/
6763 msp_write(bktr, 0x12, 0x000E,0x2403);/* darned if I know */
6764 msp_write(bktr, 0x12, 0x0008,0x0320);/* Source select = (St or A) */
6765 /* & Ch. Matrix = St */
6766 msp_write(bktr, 0x12, 0x0000,0x7300);/* Set volume to 0db gain */
6767
6768 } else {
6769
6770 /* For MSP3410 / 3415 - countries with mono, FM stereo and NICAM */
6771 msp_write(bktr, 0x12, 0x0000,0x7300);/* Set volume to 0db gain */
6772 msp_write(bktr, 0x10, 0x0020,0x0001);/* Enable Auto format detection */
6773 msp_write(bktr, 0x10, 0x0021,0x0001);/* Auto selection of NICAM/MONO mode */
6774 }
6775
6776 /* uncomment the following line to enable the MSP34xx 1Khz Tone Generator */
6777 /* turn your speaker volume down low before trying this */
6778 /* msp_write(bktr, 0x12, 0x0014, 0x7f40); */
6779}
6780
6781
6782
6783/*
6784 *
6785 * Operating System Dependant Parts
6786 * This section contains OS Dependant code like
6787 * probe and attach and the cdev open/close/read/mmap interface
6788 *
6789 */
6790
6791/****************************/
6792/* *** FreeBSD 4.x code *** */
6793/****************************/
6794#if (__FreeBSD_version >= 400000)
6795
6796static int bktr_probe( device_t dev );
6797static int bktr_attach( device_t dev );
6798static int bktr_detach( device_t dev );
6799static int bktr_shutdown( device_t dev );
6800static void bktr_intr(void *arg) { common_bktr_intr(arg); }
6801
6802static device_method_t bktr_methods[] = {
6803 /* Device interface */
6804 DEVMETHOD(device_probe, bktr_probe),
6805 DEVMETHOD(device_attach, bktr_attach),
6806 DEVMETHOD(device_detach, bktr_detach),
6807 DEVMETHOD(device_shutdown, bktr_shutdown),
6808
6809 { 0, 0 }
6810};
6811
6812static driver_t bktr_driver = {
6813 "bktr",
6814 bktr_methods,
6815 sizeof(struct bktr_softc),
6816};
6817
6818static devclass_t bktr_devclass;
6819
6820static d_open_t bktr_open;
6821static d_close_t bktr_close;
6822static d_read_t bktr_read;
6823static d_write_t bktr_write;
6824static d_ioctl_t bktr_ioctl;
6825static d_mmap_t bktr_mmap;
6826static d_poll_t bktr_poll;
6827
6828#define CDEV_MAJOR 92
6829static struct cdevsw bktr_cdevsw = {
6830 /* open */ bktr_open,
6831 /* close */ bktr_close,
6832 /* read */ bktr_read,
6833 /* write */ bktr_write,
6834 /* ioctl */ bktr_ioctl,
6835 /* stop */ nostop,
6836 /* reset */ noreset,
6837 /* devtotty */ nodevtotty,
6838 /* poll */ bktr_poll,
6839 /* mmap */ bktr_mmap,
6840 /* strategy */ nostrategy,
6841 /* name */ "bktr",
6842 /* parms */ noparms,
6843 /* maj */ CDEV_MAJOR,
6844 /* dump */ nodump,
6845 /* psize */ nopsize,
6846 /* flags */ 0,
6847 /* maxio */ 0,
6848 /* bmaj */ -1
6849};
6850
6851DEV_DRIVER_MODULE(bktr, pci, bktr_driver, bktr_devclass, bktr_cdevsw, 0, 0);
6852
6853
6854/*
6855 * the boot time probe routine.
6856 */
6857static int
6858bktr_probe( device_t dev )
6859{
6860 unsigned int type = pci_get_devid(dev);
6861 unsigned int rev = pci_get_revid(dev);
6862 static int once;
6863
6864 if (!once++)
6865 cdevsw_add(&bktr_cdevsw);
6866
6867 switch (type) {
6868 case BROOKTREE_848_PCI_ID:
6869 if (rev == 0x12) device_set_desc(dev, "BrookTree 848A");
6870 else device_set_desc(dev, "BrookTree 848");
6871 return 0;
6872 case BROOKTREE_849_PCI_ID:
6873 device_set_desc(dev, "BrookTree 849A");
6874 return 0;
6875 case BROOKTREE_878_PCI_ID:
6876 device_set_desc(dev, "BrookTree 878");
6877 return 0;
6878 case BROOKTREE_879_PCI_ID:
6879 device_set_desc(dev, "BrookTree 879");
6880 return 0;
6881 };
6882
6883 return ENXIO;
6884}
6885
6886
6887/*
6888 * the attach routine.
6889 */
6890static int
6891bktr_attach( device_t dev )
6892{
6893 bt848_ptr_t bt848;
6894 u_long latency;
6895 u_long fun;
6896 u_long val;
6897 unsigned int rev;
6898 unsigned int unit;
6899 int error = 0;
6900 int rid;
6901#ifdef BROOKTREE_IRQ
6902 u_long old_irq, new_irq;
6903#endif
6904
6905 struct bktr_softc *bktr = device_get_softc(dev);
6906
6907 unit = device_get_unit(dev);
6908
6909 /*
6910 * Enable bus mastering and Memory Mapped device
6911 */
6912 val = pci_read_config(dev, PCIR_COMMAND, 4);
6913 val |= (PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
6914 pci_write_config(dev, PCIR_COMMAND, val, 4);
6915
6916 /*
6917 * Map control/status registers.
6918 */
6919 rid = PCI_MAP_REG_START;
6920 bktr->res_mem = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
6921 0, ~0, 1, RF_ACTIVE);
6922
6923 if (!bktr->res_mem) {
6924 device_printf(dev, "could not map memory\n");
6925 error = ENXIO;
6926 goto fail;
6927 }
6928 bktr->base = rman_get_virtual(bktr->res_mem); /* XXX use bus_space */
6929
6930 /*
6931 * Disable the brooktree device
6932 */
6933 bt848 = bktr->base;
6934 bt848->int_mask = ALL_INTS_DISABLED;
6935 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
6936
6937
6938#ifdef BROOKTREE_IRQ /* from the configuration file */
6939 old_irq = pci_conf_read(tag, PCI_INTERRUPT_REG);
6940 pci_conf_write(tag, PCI_INTERRUPT_REG, BROOKTREE_IRQ);
6941 new_irq = pci_conf_read(tag, PCI_INTERRUPT_REG);
6942 printf("bktr%d: attach: irq changed from %d to %d\n",
6943 unit, (old_irq & 0xff), (new_irq & 0xff));
6944#endif
6945
6946 /*
6947 * Allocate our interrupt.
6948 */
6949 rid = 0;
6950 bktr->res_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
6951 RF_SHAREABLE | RF_ACTIVE);
6952 if (bktr->res_irq == NULL) {
6953 device_printf(dev, "could not map interrupt\n");
6954 error = ENXIO;
6955 goto fail;
6956 }
6957
6958 error = bus_setup_intr(dev, bktr->res_irq, INTR_TYPE_NET,
6959 bktr_intr, bktr, &bktr->res_ih);
6960 if (error) {
6961 device_printf(dev, "could not setup irq\n");
6962 goto fail;
6963
6964 }
6965
6966
6967 /* Update the Device Control Register */
6968 /* on Bt878 and Bt879 cards */
6969 fun = pci_read_config( dev, 0x40, 2);
6970 fun = fun | 1; /* Enable writes to the sub-system vendor ID */
6971
6972#if defined( BKTR_430_FX_MODE )
6973 if (bootverbose) printf("Using 430 FX chipset compatibilty mode\n");
6974 fun = fun | 2; /* Enable Intel 430 FX compatibility mode */
6975#endif
6976
6977#if defined( BKTR_SIS_VIA_MODE )
6978 if (bootverbose) printf("Using SiS/VIA chipset compatibilty mode\n");
6979 fun = fun | 4; /* Enable SiS/VIA compatibility mode (usefull for
6980 OPTi chipset motherboards too */
6981#endif
6982 pci_write_config(dev, 0x40, fun, 2);
6983
6984
6985 /* XXX call bt848_i2c dependent attach() routine */
6986#if (NSMBUS > 0)
6987 if (bt848_i2c_attach(unit, bktr->base, &bktr->i2c_sc))
6988 printf("bktr%d: i2c_attach: can't attach\n", unit);
6989#endif
6990
6991
6992/*
6993 * PCI latency timer. 32 is a good value for 4 bus mastering slots, if
6994 * you have more than four, then 16 would probably be a better value.
6995 */
6996#ifndef BROOKTREE_DEF_LATENCY_VALUE
6997#define BROOKTREE_DEF_LATENCY_VALUE 10
6998#endif
6999 latency = pci_read_config(dev, PCI_LATENCY_TIMER, 4);
7000 latency = (latency >> 8) & 0xff;
7001 if ( bootverbose ) {
7002 if (latency)
7003 printf("brooktree%d: PCI bus latency is", unit);
7004 else
7005 printf("brooktree%d: PCI bus latency was 0 changing to",
7006 unit);
7007 }
7008 if ( !latency ) {
7009 latency = BROOKTREE_DEF_LATENCY_VALUE;
7010 pci_write_config(dev, PCI_LATENCY_TIMER, latency<<8, 4);
7011 }
7012 if ( bootverbose ) {
7013 printf(" %d.\n", (int) latency);
7014 }
7015
7016 /* read the pci device id and revision id */
7017 fun = pci_get_devid(dev);
7018 rev = pci_get_revid(dev);
7019
7020 /* call the common attach code */
7021 common_bktr_attach( bktr, unit, fun, rev );
7022
7023 make_dev(&bktr_cdevsw, unit, 0, 0, 0444, "bktr%d", unit);
7024 make_dev(&bktr_cdevsw, unit+16, 0, 0, 0444, "tuner%d", unit);
7025 make_dev(&bktr_cdevsw, unit+32, 0, 0, 0444, "vbi%d", unit);
7026
7027 return 0;
7028
7029fail:
7030 return error;
7031
7032}
7033
7034/*
7035 * the detach routine.
7036 */
7037static int
7038bktr_detach( device_t dev )
7039{
7040 struct bktr_softc *bktr = device_get_softc(dev);
7041 bt848_ptr_t bt848;
7042
7043 /* Disable the brooktree device */
7044 bt848 = bktr->base;
7045 bt848->int_mask = ALL_INTS_DISABLED;
7046 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
7047
7048 /* FIXME - Free memory for RISC programs, grab buffer, vbi buffers */
7049
7050 /*
7051 * Deallocate resources.
7052 */
7053 bus_teardown_intr(dev, bktr->res_irq, bktr->res_ih);
7054 bus_release_resource(dev, SYS_RES_IRQ, 0, bktr->res_irq);
7055 bus_release_resource(dev, SYS_RES_MEMORY, PCI_MAP_REG_START, bktr->res_mem);
7056
7057 return 0;
7058}
7059
7060/*
7061 * the shutdown routine.
7062 */
7063static int
7064bktr_shutdown( device_t dev )
7065{
7066 struct bktr_softc *bktr = device_get_softc(dev);
7067 bt848_ptr_t bt848;
7068
7069 /* Disable the brooktree device */
7070 bt848 = bktr->base;
7071 bt848->int_mask = ALL_INTS_DISABLED;
7072 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
7073
7074 return 0;
7075}
7076
7077
7078/*
7079 * Special Memory Allocation
7080 */
7081static vm_offset_t
7082get_bktr_mem( int unit, unsigned size )
7083{
7084 vm_offset_t addr = 0;
7085
7086 addr = vm_page_alloc_contig(size, 0, 0xffffffff, 1<<24);
7087 if (addr == 0)
7088 addr = vm_page_alloc_contig(size, 0, 0xffffffff, PAGE_SIZE);
7089 if (addr == 0) {
7090 printf("bktr%d: Unable to allocate %d bytes of memory.\n",
7091 unit, size);
7092 }
7093
7094 return( addr );
7095}
7096
7097
7098/*---------------------------------------------------------
7099**
7100** BrookTree 848 character device driver routines
7101**
7102**---------------------------------------------------------
7103*/
7104
7105#define VIDEO_DEV 0x00
7106#define TUNER_DEV 0x01
7107#define VBI_DEV 0x02
7108
7109#define UNIT(x) ((x) & 0x0f)
7110#define FUNCTION(x) (x >> 4)
7111
7112/*
7113 *
7114 */
7115int
7116bktr_open( dev_t dev, int flags, int fmt, struct proc *p )
7117{
7118 bktr_ptr_t bktr;
7119 int unit;
7120 int result;
7121
7122 unit = UNIT( minor(dev) );
7123
7124 /* Get the device data */
7125 bktr = (struct bktr_softc*)devclass_get_softc(bktr_devclass, unit);
7126 if (bktr == NULL) {
7127 /* the device is no longer valid/functioning */
7128 return (ENXIO);
7129 }
7130
7131 if (!(bktr->flags & METEOR_INITALIZED)) /* device not found */
7132 return( ENXIO );
7133
7134 /* Record that the device is now busy */
7135 device_busy(devclass_get_device(bktr_devclass, unit));
7136
7137
7138 if (bt848_card != -1) {
7139 if ((bt848_card >> 8 == unit ) &&
7140 ( (bt848_card & 0xff) < Bt848_MAX_CARD )) {
7141 if ( bktr->bt848_card != (bt848_card & 0xff) ) {
7142 bktr->bt848_card = (bt848_card & 0xff);
7143 probeCard(bktr, FALSE, unit);
7144 }
7145 }
7146 }
7147
7148 if (bt848_tuner != -1) {
7149 if ((bt848_tuner >> 8 == unit ) &&
7150 ( (bt848_tuner & 0xff) < Bt848_MAX_TUNER )) {
7151 if ( bktr->bt848_tuner != (bt848_tuner & 0xff) ) {
7152 bktr->bt848_tuner = (bt848_tuner & 0xff);
7153 probeCard(bktr, FALSE, unit);
7154 }
7155 }
7156 }
7157
7158 if (bt848_reverse_mute != -1) {
7159 if (((bt848_reverse_mute >> 8) == unit ) &&
7160 ((bt848_reverse_mute & 0xff) < Bt848_MAX_TUNER) ) {
7161 bktr->reverse_mute = bt848_reverse_mute & 0xff;
7162 bt848_reverse_mute = -1;
7163 }
7164 }
7165
7166 switch ( FUNCTION( minor(dev) ) ) {
7167 case VIDEO_DEV:
7168 result = video_open( bktr );
7169 break;
7170 case TUNER_DEV:
7171 result = tuner_open( bktr );
7172 break;
7173 case VBI_DEV:
7174 result = vbi_open( bktr );
7175 break;
7176 default:
7177 result = ENXIO;
7178 break;
7179 }
7180
7181 /* If there was an error opening the device, undo the busy status */
7182 if (result != 0)
7183 device_unbusy(devclass_get_device(bktr_devclass, unit));
7184 return( result );
7185}
7186
7187
7188/*
7189 *
7190 */
7191int
7192bktr_close( dev_t dev, int flags, int fmt, struct proc *p )
7193{
7194 bktr_ptr_t bktr;
7195 int unit;
7196 int result;
7197
7198 unit = UNIT( minor(dev) );
7199
7200 /* Get the device data */
7201 bktr = (struct bktr_softc*)devclass_get_softc(bktr_devclass, unit);
7202 if (bktr == NULL) {
7203 /* the device is no longer valid/functioning */
7204 return (ENXIO);
7205 }
7206
7207 switch ( FUNCTION( minor(dev) ) ) {
7208 case VIDEO_DEV:
7209 result = video_close( bktr );
7210 break;
7211 case TUNER_DEV:
7212 result = tuner_close( bktr );
7213 break;
7214 case VBI_DEV:
7215 result = vbi_close( bktr );
7216 break;
7217 default:
7218 return (ENXIO);
7219 break;
7220 }
7221
7222 device_unbusy(devclass_get_device(bktr_devclass, unit));
7223 return( result );
7224}
7225
7226
7227/*
7228 *
7229 */
7230int
7231bktr_read( dev_t dev, struct uio *uio, int ioflag )
7232{
7233 bktr_ptr_t bktr;
7234 int unit;
7235
7236 unit = UNIT(minor(dev));
7237
7238 /* Get the device data */
7239 bktr = (struct bktr_softc*)devclass_get_softc(bktr_devclass, unit);
7240 if (bktr == NULL) {
7241 /* the device is no longer valid/functioning */
7242 return (ENXIO);
7243 }
7244
7245 switch ( FUNCTION( minor(dev) ) ) {
7246 case VIDEO_DEV:
7247 return( video_read( bktr, unit, dev, uio ) );
7248 case VBI_DEV:
7249 return( vbi_read( bktr, uio, ioflag ) );
7250 }
7251 return( ENXIO );
7252}
7253
7254
7255/*
7256 *
7257 */
7258int
7259bktr_write( dev_t dev, struct uio *uio, int ioflag )
7260{
7261 return( EINVAL ); /* XXX or ENXIO ? */
7262}
7263
7264
7265/*
7266 *
7267 */
7268int
7269bktr_ioctl( dev_t dev, ioctl_cmd_t cmd, caddr_t arg, int flag, struct proc* pr )
7270{
7271 bktr_ptr_t bktr;
7272 int unit;
7273
7274 unit = UNIT(minor(dev));
7275
7276 /* Get the device data */
7277 bktr = (struct bktr_softc*)devclass_get_softc(bktr_devclass, unit);
7278 if (bktr == NULL) {
7279 /* the device is no longer valid/functioning */
7280 return (ENXIO);
7281 }
7282
7283 if (bktr->bigbuf == 0) /* no frame buffer allocated (ioctl failed) */
7284 return( ENOMEM );
7285
7286 switch ( FUNCTION( minor(dev) ) ) {
7287 case VIDEO_DEV:
7288 return( video_ioctl( bktr, unit, cmd, arg, pr ) );
7289 case TUNER_DEV:
7290 return( tuner_ioctl( bktr, unit, cmd, arg, pr ) );
7291 }
7292
7293 return( ENXIO );
7294}
7295
7296
7297/*
7298 *
7299 */
7300int
7301bktr_mmap( dev_t dev, vm_offset_t offset, int nprot )
7302{
7303 int unit;
7304 bktr_ptr_t bktr;
7305
7306 unit = UNIT(minor(dev));
7307
7308 if (FUNCTION(minor(dev)) > 0) /* only allow mmap on /dev/bktr[n] */
7309 return( -1 );
7310
7311 /* Get the device data */
7312 bktr = (struct bktr_softc*)devclass_get_softc(bktr_devclass, unit);
7313 if (bktr == NULL) {
7314 /* the device is no longer valid/functioning */
7315 return (ENXIO);
7316 }
7317
7318 if (nprot & PROT_EXEC)
7319 return( -1 );
7320
7321 if (offset < 0)
7322 return( -1 );
7323
7324 if (offset >= bktr->alloc_pages * PAGE_SIZE)
7325 return( -1 );
7326
7327 return( i386_btop(vtophys(bktr->bigbuf) + offset) );
7328}
7329
7330int bktr_poll( dev_t dev, int events, struct proc *p)
7331{
7332 int unit;
7333 bktr_ptr_t bktr;
7334 int revents = 0;
7335
7336 unit = UNIT(minor(dev));
7337
7338 /* Get the device data */
7339 bktr = (struct bktr_softc*)devclass_get_softc(bktr_devclass, unit);
7340 if (bktr == NULL) {
7341 /* the device is no longer valid/functioning */
7342 return (ENXIO);
7343 }
7344
7345 disable_intr();
7346
7347 if (events & (POLLIN | POLLRDNORM)) {
7348
7349 switch ( FUNCTION( minor(dev) ) ) {
7350 case VBI_DEV:
7351 if(bktr->vbisize == 0)
7352 selrecord(p, &bktr->vbi_select);
7353 else
7354 revents |= events & (POLLIN | POLLRDNORM);
7355 break;
7356 }
7357 }
7358
7359 enable_intr();
7360
7361 return (revents);
7362}
7363
7364#endif /* FreeBSD 4.x specific kernel interface routines */
7365
7366
7367/**********************************/
7368/* *** FreeBSD 2.2.x and 3.x *** */
7369/**********************************/
7370
7371#if ((__FreeBSD__ == 2) || (__FreeBSD__ == 3))
7372#endif /* FreeBSD 2.2.x and 3.x specific kernel interface routines */
7373
7374
7375/*****************/
7376/* *** BSDI *** */
7377/*****************/
7378
7379#if defined(__bsdi__)
7380#endif /* __bsdi__ BSDI specific kernel interface routines */
7381
7382
7383/*****************************/
7384/* *** OpenBSD / NetBSD *** */
7385/*****************************/
7386#if defined(__NetBSD__) || defined(__OpenBSD__)
7387#endif /* __NetBSD__ || __OpenBSD__ */
7388
7389
7390
7391#endif /* FreeBSD, BSDI, NetBSD, OpenBSD */
7392
7393
7394/* Local Variables: */
7395/* mode: C */
7396/* c-indent-level: 8 */
7397/* c-brace-offset: -8 */
7398/* c-argdecl-indent: 8 */
7399/* c-label-offset: -8 */
7400/* c-continued-statement-offset: 8 */
7401/* c-tab-always-indent: nil */
7402/* tab-width: 8 */
7403/* End: */