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if_ath.c (218058) if_ath.c (218065)
1/*-
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 14 unchanged lines hidden (view full) ---

23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 */
29
30#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 14 unchanged lines hidden (view full) ---

23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 218058 2011-01-29 05:08:21Z adrian $");
31__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 218065 2011-01-29 11:35:23Z adrian $");
32
33/*
34 * Driver for the Atheros Wireless LAN controller.
35 *
36 * This software is derived from work of Atsushi Onoe; his contribution
37 * is greatly appreciated.
38 */
39

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85#include <netinet/if_ether.h>
86#endif
87
88#include <dev/ath/if_athvar.h>
89#include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
90#include <dev/ath/ath_hal/ah_diagcodes.h>
91
92#include <dev/ath/if_ath_debug.h>
32
33/*
34 * Driver for the Atheros Wireless LAN controller.
35 *
36 * This software is derived from work of Atsushi Onoe; his contribution
37 * is greatly appreciated.
38 */
39

--- 45 unchanged lines hidden (view full) ---

85#include <netinet/if_ether.h>
86#endif
87
88#include <dev/ath/if_athvar.h>
89#include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
90#include <dev/ath/ath_hal/ah_diagcodes.h>
91
92#include <dev/ath/if_ath_debug.h>
93#include <dev/ath/if_ath_misc.h>
94#include <dev/ath/if_ath_tx.h>
93
94#ifdef ATH_TX99_DIAG
95#include <dev/ath/ath_tx99/ath_tx99.h>
96#endif
97
98/*
99 * ATH_BCBUF determines the number of vap's that can transmit
100 * beacons and also (currently) the number of vap's that can

--- 5 unchanged lines hidden (view full) ---

106 * another radio (and channel).
107 *
108 * The limit on the number of mac addresses is tied to our use of
109 * the U/L bit and tracking addresses in a byte; it would be
110 * worthwhile to allow more for applications like proxy sta.
111 */
112CTASSERT(ATH_BCBUF <= 8);
113
95
96#ifdef ATH_TX99_DIAG
97#include <dev/ath/ath_tx99/ath_tx99.h>
98#endif
99
100/*
101 * ATH_BCBUF determines the number of vap's that can transmit
102 * beacons and also (currently) the number of vap's that can

--- 5 unchanged lines hidden (view full) ---

108 * another radio (and channel).
109 *
110 * The limit on the number of mac addresses is tied to our use of
111 * the U/L bit and tracking addresses in a byte; it would be
112 * worthwhile to allow more for applications like proxy sta.
113 */
114CTASSERT(ATH_BCBUF <= 8);
115
114/* unaligned little endian access */
115#define LE_READ_2(p) \
116 ((u_int16_t) \
117 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8)))
118#define LE_READ_4(p) \
119 ((u_int32_t) \
120 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \
121 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)))
122
123static struct ieee80211vap *ath_vap_create(struct ieee80211com *,
124 const char name[IFNAMSIZ], int unit, int opmode,
125 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
126 const uint8_t mac[IEEE80211_ADDR_LEN]);
127static void ath_vap_delete(struct ieee80211vap *);
128static void ath_init(void *);
129static void ath_stop_locked(struct ifnet *);
130static void ath_stop(struct ifnet *);

--- 48 unchanged lines hidden (view full) ---

179static void ath_setdefantenna(struct ath_softc *, u_int);
180static void ath_rx_proc(void *, int);
181static void ath_txq_init(struct ath_softc *sc, struct ath_txq *, int);
182static struct ath_txq *ath_txq_setup(struct ath_softc*, int qtype, int subtype);
183static int ath_tx_setup(struct ath_softc *, int, int);
184static int ath_wme_update(struct ieee80211com *);
185static void ath_tx_cleanupq(struct ath_softc *, struct ath_txq *);
186static void ath_tx_cleanup(struct ath_softc *);
116static struct ieee80211vap *ath_vap_create(struct ieee80211com *,
117 const char name[IFNAMSIZ], int unit, int opmode,
118 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
119 const uint8_t mac[IEEE80211_ADDR_LEN]);
120static void ath_vap_delete(struct ieee80211vap *);
121static void ath_init(void *);
122static void ath_stop_locked(struct ifnet *);
123static void ath_stop(struct ifnet *);

--- 48 unchanged lines hidden (view full) ---

172static void ath_setdefantenna(struct ath_softc *, u_int);
173static void ath_rx_proc(void *, int);
174static void ath_txq_init(struct ath_softc *sc, struct ath_txq *, int);
175static struct ath_txq *ath_txq_setup(struct ath_softc*, int qtype, int subtype);
176static int ath_tx_setup(struct ath_softc *, int, int);
177static int ath_wme_update(struct ieee80211com *);
178static void ath_tx_cleanupq(struct ath_softc *, struct ath_txq *);
179static void ath_tx_cleanup(struct ath_softc *);
187static void ath_freetx(struct mbuf *);
188static int ath_tx_start(struct ath_softc *, struct ieee80211_node *,
189 struct ath_buf *, struct mbuf *);
190static void ath_tx_proc_q0(void *, int);
191static void ath_tx_proc_q0123(void *, int);
192static void ath_tx_proc(void *, int);
193static void ath_tx_draintxq(struct ath_softc *, struct ath_txq *);
194static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *);
195static void ath_draintxq(struct ath_softc *);
196static void ath_stoprecv(struct ath_softc *);
197static int ath_startrecv(struct ath_softc *);

--- 12 unchanged lines hidden (view full) ---

210 struct ieee80211_channel []);
211static int ath_getchannels(struct ath_softc *);
212static void ath_led_event(struct ath_softc *, int);
213
214static int ath_rate_setup(struct ath_softc *, u_int mode);
215static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode);
216
217static void ath_sysctlattach(struct ath_softc *);
180static void ath_tx_proc_q0(void *, int);
181static void ath_tx_proc_q0123(void *, int);
182static void ath_tx_proc(void *, int);
183static void ath_tx_draintxq(struct ath_softc *, struct ath_txq *);
184static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *);
185static void ath_draintxq(struct ath_softc *);
186static void ath_stoprecv(struct ath_softc *);
187static int ath_startrecv(struct ath_softc *);

--- 12 unchanged lines hidden (view full) ---

200 struct ieee80211_channel []);
201static int ath_getchannels(struct ath_softc *);
202static void ath_led_event(struct ath_softc *, int);
203
204static int ath_rate_setup(struct ath_softc *, u_int mode);
205static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode);
206
207static void ath_sysctlattach(struct ath_softc *);
218static int ath_raw_xmit(struct ieee80211_node *,
219 struct mbuf *, const struct ieee80211_bpf_params *);
220static void ath_announce(struct ath_softc *);
221static void ath_sysctl_stats_attach(struct ath_softc *sc);
222
223#ifdef IEEE80211_SUPPORT_TDMA
224static void ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt,
225 u_int32_t bintval);
226static void ath_tdma_bintvalsetup(struct ath_softc *sc,
227 const struct ieee80211_tdma_state *tdma);

--- 1437 unchanged lines hidden (view full) ---

1665 */
1666 if (!ath_hal_gettpc(ah))
1667 ath_hal_settxpowlimit(ah, ic->ic_txpowlimit);
1668 return 0;
1669 }
1670 return ath_reset(ifp);
1671}
1672
208static void ath_announce(struct ath_softc *);
209static void ath_sysctl_stats_attach(struct ath_softc *sc);
210
211#ifdef IEEE80211_SUPPORT_TDMA
212static void ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt,
213 u_int32_t bintval);
214static void ath_tdma_bintvalsetup(struct ath_softc *sc,
215 const struct ieee80211_tdma_state *tdma);

--- 1437 unchanged lines hidden (view full) ---

1653 */
1654 if (!ath_hal_gettpc(ah))
1655 ath_hal_settxpowlimit(ah, ic->ic_txpowlimit);
1656 return 0;
1657 }
1658 return ath_reset(ifp);
1659}
1660
1673static struct ath_buf *
1661struct ath_buf *
1674_ath_getbuf_locked(struct ath_softc *sc)
1675{
1676 struct ath_buf *bf;
1677
1678 ATH_TXBUF_LOCK_ASSERT(sc);
1679
1680 bf = STAILQ_FIRST(&sc->sc_txbuf);
1681 if (bf != NULL && (bf->bf_flags & ATH_BUF_BUSY) == 0)
1682 STAILQ_REMOVE_HEAD(&sc->sc_txbuf, bf_list);
1683 else
1684 bf = NULL;
1685 if (bf == NULL) {
1686 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: %s\n", __func__,
1687 STAILQ_FIRST(&sc->sc_txbuf) == NULL ?
1688 "out of xmit buffers" : "xmit buffer busy");
1689 }
1690 return bf;
1691}
1692
1662_ath_getbuf_locked(struct ath_softc *sc)
1663{
1664 struct ath_buf *bf;
1665
1666 ATH_TXBUF_LOCK_ASSERT(sc);
1667
1668 bf = STAILQ_FIRST(&sc->sc_txbuf);
1669 if (bf != NULL && (bf->bf_flags & ATH_BUF_BUSY) == 0)
1670 STAILQ_REMOVE_HEAD(&sc->sc_txbuf, bf_list);
1671 else
1672 bf = NULL;
1673 if (bf == NULL) {
1674 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: %s\n", __func__,
1675 STAILQ_FIRST(&sc->sc_txbuf) == NULL ?
1676 "out of xmit buffers" : "xmit buffer busy");
1677 }
1678 return bf;
1679}
1680
1693static struct ath_buf *
1681struct ath_buf *
1694ath_getbuf(struct ath_softc *sc)
1695{
1696 struct ath_buf *bf;
1697
1698 ATH_TXBUF_LOCK(sc);
1699 bf = _ath_getbuf_locked(sc);
1700 if (bf == NULL) {
1701 struct ifnet *ifp = sc->sc_ifp;
1702
1703 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: stop queue\n", __func__);
1704 sc->sc_stats.ast_tx_qstop++;
1705 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1706 }
1707 ATH_TXBUF_UNLOCK(sc);
1708 return bf;
1709}
1710
1682ath_getbuf(struct ath_softc *sc)
1683{
1684 struct ath_buf *bf;
1685
1686 ATH_TXBUF_LOCK(sc);
1687 bf = _ath_getbuf_locked(sc);
1688 if (bf == NULL) {
1689 struct ifnet *ifp = sc->sc_ifp;
1690
1691 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: stop queue\n", __func__);
1692 sc->sc_stats.ast_tx_qstop++;
1693 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1694 }
1695 ATH_TXBUF_UNLOCK(sc);
1696 return bf;
1697}
1698
1711/*
1712 * Cleanup driver resources when we run out of buffers
1713 * while processing fragments; return the tx buffers
1714 * allocated and drop node references.
1715 */
1716static void
1699static void
1717ath_txfrag_cleanup(struct ath_softc *sc,
1718 ath_bufhead *frags, struct ieee80211_node *ni)
1719{
1720 struct ath_buf *bf, *next;
1721
1722 ATH_TXBUF_LOCK_ASSERT(sc);
1723
1724 STAILQ_FOREACH_SAFE(bf, frags, bf_list, next) {
1725 /* NB: bf assumed clean */
1726 STAILQ_REMOVE_HEAD(frags, bf_list);
1727 STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
1728 ieee80211_node_decref(ni);
1729 }
1730}
1731
1732/*
1733 * Setup xmit of a fragmented frame. Allocate a buffer
1734 * for each frag and bump the node reference count to
1735 * reflect the held reference to be setup by ath_tx_start.
1736 */
1737static int
1738ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
1739 struct mbuf *m0, struct ieee80211_node *ni)
1740{
1741 struct mbuf *m;
1742 struct ath_buf *bf;
1743
1744 ATH_TXBUF_LOCK(sc);
1745 for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
1746 bf = _ath_getbuf_locked(sc);
1747 if (bf == NULL) { /* out of buffers, cleanup */
1748 ath_txfrag_cleanup(sc, frags, ni);
1749 break;
1750 }
1751 ieee80211_node_incref(ni);
1752 STAILQ_INSERT_TAIL(frags, bf, bf_list);
1753 }
1754 ATH_TXBUF_UNLOCK(sc);
1755
1756 return !STAILQ_EMPTY(frags);
1757}
1758
1759static void
1760ath_start(struct ifnet *ifp)
1761{
1762 struct ath_softc *sc = ifp->if_softc;
1763 struct ieee80211_node *ni;
1764 struct ath_buf *bf;
1765 struct mbuf *m, *next;
1766 ath_bufhead frags;
1767

--- 2454 unchanged lines hidden (view full) ---

4222 if (ATH_TXQ_SETUP(sc, i))
4223 ath_tx_cleanupq(sc, &sc->sc_txq[i]);
4224}
4225
4226/*
4227 * Return h/w rate index for an IEEE rate (w/o basic rate bit)
4228 * using the current rates in sc_rixmap.
4229 */
1700ath_start(struct ifnet *ifp)
1701{
1702 struct ath_softc *sc = ifp->if_softc;
1703 struct ieee80211_node *ni;
1704 struct ath_buf *bf;
1705 struct mbuf *m, *next;
1706 ath_bufhead frags;
1707

--- 2454 unchanged lines hidden (view full) ---

4162 if (ATH_TXQ_SETUP(sc, i))
4163 ath_tx_cleanupq(sc, &sc->sc_txq[i]);
4164}
4165
4166/*
4167 * Return h/w rate index for an IEEE rate (w/o basic rate bit)
4168 * using the current rates in sc_rixmap.
4169 */
4230static __inline int
4170int
4231ath_tx_findrix(const struct ath_softc *sc, uint8_t rate)
4232{
4233 int rix = sc->sc_rixmap[rate];
4234 /* NB: return lowest rix for invalid rate */
4235 return (rix == 0xff ? 0 : rix);
4236}
4237
4238/*
4171ath_tx_findrix(const struct ath_softc *sc, uint8_t rate)
4172{
4173 int rix = sc->sc_rixmap[rate];
4174 /* NB: return lowest rix for invalid rate */
4175 return (rix == 0xff ? 0 : rix);
4176}
4177
4178/*
4239 * Reclaim mbuf resources. For fragmented frames we
4240 * need to claim each frag chained with m_nextpkt.
4241 */
4242static void
4243ath_freetx(struct mbuf *m)
4244{
4245 struct mbuf *next;
4246
4247 do {
4248 next = m->m_nextpkt;
4249 m->m_nextpkt = NULL;
4250 m_freem(m);
4251 } while ((m = next) != NULL);
4252}
4253
4254static int
4255ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
4256{
4257 struct mbuf *m;
4258 int error;
4259
4260 /*
4261 * Load the DMA map so any coalescing is done. This
4262 * also calculates the number of descriptors we need.
4263 */
4264 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
4265 bf->bf_segs, &bf->bf_nseg,
4266 BUS_DMA_NOWAIT);
4267 if (error == EFBIG) {
4268 /* XXX packet requires too many descriptors */
4269 bf->bf_nseg = ATH_TXDESC+1;
4270 } else if (error != 0) {
4271 sc->sc_stats.ast_tx_busdma++;
4272 ath_freetx(m0);
4273 return error;
4274 }
4275 /*
4276 * Discard null packets and check for packets that
4277 * require too many TX descriptors. We try to convert
4278 * the latter to a cluster.
4279 */
4280 if (bf->bf_nseg > ATH_TXDESC) { /* too many desc's, linearize */
4281 sc->sc_stats.ast_tx_linear++;
4282 m = m_collapse(m0, M_DONTWAIT, ATH_TXDESC);
4283 if (m == NULL) {
4284 ath_freetx(m0);
4285 sc->sc_stats.ast_tx_nombuf++;
4286 return ENOMEM;
4287 }
4288 m0 = m;
4289 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
4290 bf->bf_segs, &bf->bf_nseg,
4291 BUS_DMA_NOWAIT);
4292 if (error != 0) {
4293 sc->sc_stats.ast_tx_busdma++;
4294 ath_freetx(m0);
4295 return error;
4296 }
4297 KASSERT(bf->bf_nseg <= ATH_TXDESC,
4298 ("too many segments after defrag; nseg %u", bf->bf_nseg));
4299 } else if (bf->bf_nseg == 0) { /* null packet, discard */
4300 sc->sc_stats.ast_tx_nodata++;
4301 ath_freetx(m0);
4302 return EIO;
4303 }
4304 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
4305 __func__, m0, m0->m_pkthdr.len);
4306 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
4307 bf->bf_m = m0;
4308
4309 return 0;
4310}
4311
4312static void
4313ath_tx_handoff(struct ath_softc *sc, struct ath_txq *txq, struct ath_buf *bf)
4314{
4315 struct ath_hal *ah = sc->sc_ah;
4316 struct ath_desc *ds, *ds0;
4317 int i;
4318
4319 /*
4320 * Fillin the remainder of the descriptor info.
4321 */
4322 ds0 = ds = bf->bf_desc;
4323 for (i = 0; i < bf->bf_nseg; i++, ds++) {
4324 ds->ds_data = bf->bf_segs[i].ds_addr;
4325 if (i == bf->bf_nseg - 1)
4326 ds->ds_link = 0;
4327 else
4328 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
4329 ath_hal_filltxdesc(ah, ds
4330 , bf->bf_segs[i].ds_len /* segment length */
4331 , i == 0 /* first segment */
4332 , i == bf->bf_nseg - 1 /* last segment */
4333 , ds0 /* first descriptor */
4334 );
4335 DPRINTF(sc, ATH_DEBUG_XMIT,
4336 "%s: %d: %08x %08x %08x %08x %08x %08x\n",
4337 __func__, i, ds->ds_link, ds->ds_data,
4338 ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1]);
4339 }
4340 /*
4341 * Insert the frame on the outbound list and pass it on
4342 * to the hardware. Multicast frames buffered for power
4343 * save stations and transmit from the CAB queue are stored
4344 * on a s/w only queue and loaded on to the CAB queue in
4345 * the SWBA handler since frames only go out on DTIM and
4346 * to avoid possible races.
4347 */
4348 ATH_TXQ_LOCK(txq);
4349 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
4350 ("busy status 0x%x", bf->bf_flags));
4351 if (txq->axq_qnum != ATH_TXQ_SWQ) {
4352#ifdef IEEE80211_SUPPORT_TDMA
4353 int qbusy;
4354
4355 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
4356 qbusy = ath_hal_txqenabled(ah, txq->axq_qnum);
4357 if (txq->axq_link == NULL) {
4358 /*
4359 * Be careful writing the address to TXDP. If
4360 * the tx q is enabled then this write will be
4361 * ignored. Normally this is not an issue but
4362 * when tdma is in use and the q is beacon gated
4363 * this race can occur. If the q is busy then
4364 * defer the work to later--either when another
4365 * packet comes along or when we prepare a beacon
4366 * frame at SWBA.
4367 */
4368 if (!qbusy) {
4369 ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
4370 txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
4371 DPRINTF(sc, ATH_DEBUG_XMIT,
4372 "%s: TXDP[%u] = %p (%p) depth %d\n",
4373 __func__, txq->axq_qnum,
4374 (caddr_t)bf->bf_daddr, bf->bf_desc,
4375 txq->axq_depth);
4376 } else {
4377 txq->axq_flags |= ATH_TXQ_PUTPENDING;
4378 DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT,
4379 "%s: Q%u busy, defer enable\n", __func__,
4380 txq->axq_qnum);
4381 }
4382 } else {
4383 *txq->axq_link = bf->bf_daddr;
4384 DPRINTF(sc, ATH_DEBUG_XMIT,
4385 "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
4386 txq->axq_qnum, txq->axq_link,
4387 (caddr_t)bf->bf_daddr, bf->bf_desc, txq->axq_depth);
4388 if ((txq->axq_flags & ATH_TXQ_PUTPENDING) && !qbusy) {
4389 /*
4390 * The q was busy when we previously tried
4391 * to write the address of the first buffer
4392 * in the chain. Since it's not busy now
4393 * handle this chore. We are certain the
4394 * buffer at the front is the right one since
4395 * axq_link is NULL only when the buffer list
4396 * is/was empty.
4397 */
4398 ath_hal_puttxbuf(ah, txq->axq_qnum,
4399 STAILQ_FIRST(&txq->axq_q)->bf_daddr);
4400 txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
4401 DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT,
4402 "%s: Q%u restarted\n", __func__,
4403 txq->axq_qnum);
4404 }
4405 }
4406#else
4407 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
4408 if (txq->axq_link == NULL) {
4409 ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
4410 DPRINTF(sc, ATH_DEBUG_XMIT,
4411 "%s: TXDP[%u] = %p (%p) depth %d\n",
4412 __func__, txq->axq_qnum,
4413 (caddr_t)bf->bf_daddr, bf->bf_desc,
4414 txq->axq_depth);
4415 } else {
4416 *txq->axq_link = bf->bf_daddr;
4417 DPRINTF(sc, ATH_DEBUG_XMIT,
4418 "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
4419 txq->axq_qnum, txq->axq_link,
4420 (caddr_t)bf->bf_daddr, bf->bf_desc, txq->axq_depth);
4421 }
4422#endif /* IEEE80211_SUPPORT_TDMA */
4423 txq->axq_link = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
4424 ath_hal_txstart(ah, txq->axq_qnum);
4425 } else {
4426 if (txq->axq_link != NULL) {
4427 struct ath_buf *last = ATH_TXQ_LAST(txq);
4428 struct ieee80211_frame *wh;
4429
4430 /* mark previous frame */
4431 wh = mtod(last->bf_m, struct ieee80211_frame *);
4432 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
4433 bus_dmamap_sync(sc->sc_dmat, last->bf_dmamap,
4434 BUS_DMASYNC_PREWRITE);
4435
4436 /* link descriptor */
4437 *txq->axq_link = bf->bf_daddr;
4438 }
4439 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
4440 txq->axq_link = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
4441 }
4442 ATH_TXQ_UNLOCK(txq);
4443}
4444
4445static int
4446ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf,
4447 struct mbuf *m0)
4448{
4449 struct ieee80211vap *vap = ni->ni_vap;
4450 struct ath_vap *avp = ATH_VAP(vap);
4451 struct ath_hal *ah = sc->sc_ah;
4452 struct ifnet *ifp = sc->sc_ifp;
4453 struct ieee80211com *ic = ifp->if_l2com;
4454 const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams;
4455 int error, iswep, ismcast, isfrag, ismrr;
4456 int keyix, hdrlen, pktlen, try0;
4457 u_int8_t rix, txrate, ctsrate;
4458 u_int8_t cix = 0xff; /* NB: silence compiler */
4459 struct ath_desc *ds;
4460 struct ath_txq *txq;
4461 struct ieee80211_frame *wh;
4462 u_int subtype, flags, ctsduration;
4463 HAL_PKT_TYPE atype;
4464 const HAL_RATE_TABLE *rt;
4465 HAL_BOOL shortPreamble;
4466 struct ath_node *an;
4467 u_int pri;
4468
4469 wh = mtod(m0, struct ieee80211_frame *);
4470 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
4471 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
4472 isfrag = m0->m_flags & M_FRAG;
4473 hdrlen = ieee80211_anyhdrsize(wh);
4474 /*
4475 * Packet length must not include any
4476 * pad bytes; deduct them here.
4477 */
4478 pktlen = m0->m_pkthdr.len - (hdrlen & 3);
4479
4480 if (iswep) {
4481 const struct ieee80211_cipher *cip;
4482 struct ieee80211_key *k;
4483
4484 /*
4485 * Construct the 802.11 header+trailer for an encrypted
4486 * frame. The only reason this can fail is because of an
4487 * unknown or unsupported cipher/key type.
4488 */
4489 k = ieee80211_crypto_encap(ni, m0);
4490 if (k == NULL) {
4491 /*
4492 * This can happen when the key is yanked after the
4493 * frame was queued. Just discard the frame; the
4494 * 802.11 layer counts failures and provides
4495 * debugging/diagnostics.
4496 */
4497 ath_freetx(m0);
4498 return EIO;
4499 }
4500 /*
4501 * Adjust the packet + header lengths for the crypto
4502 * additions and calculate the h/w key index. When
4503 * a s/w mic is done the frame will have had any mic
4504 * added to it prior to entry so m0->m_pkthdr.len will
4505 * account for it. Otherwise we need to add it to the
4506 * packet length.
4507 */
4508 cip = k->wk_cipher;
4509 hdrlen += cip->ic_header;
4510 pktlen += cip->ic_header + cip->ic_trailer;
4511 /* NB: frags always have any TKIP MIC done in s/w */
4512 if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
4513 pktlen += cip->ic_miclen;
4514 keyix = k->wk_keyix;
4515
4516 /* packet header may have moved, reset our local pointer */
4517 wh = mtod(m0, struct ieee80211_frame *);
4518 } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
4519 /*
4520 * Use station key cache slot, if assigned.
4521 */
4522 keyix = ni->ni_ucastkey.wk_keyix;
4523 if (keyix == IEEE80211_KEYIX_NONE)
4524 keyix = HAL_TXKEYIX_INVALID;
4525 } else
4526 keyix = HAL_TXKEYIX_INVALID;
4527
4528 pktlen += IEEE80211_CRC_LEN;
4529
4530 /*
4531 * Load the DMA map so any coalescing is done. This
4532 * also calculates the number of descriptors we need.
4533 */
4534 error = ath_tx_dmasetup(sc, bf, m0);
4535 if (error != 0)
4536 return error;
4537 bf->bf_node = ni; /* NB: held reference */
4538 m0 = bf->bf_m; /* NB: may have changed */
4539 wh = mtod(m0, struct ieee80211_frame *);
4540
4541 /* setup descriptors */
4542 ds = bf->bf_desc;
4543 rt = sc->sc_currates;
4544 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
4545
4546 /*
4547 * NB: the 802.11 layer marks whether or not we should
4548 * use short preamble based on the current mode and
4549 * negotiated parameters.
4550 */
4551 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
4552 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
4553 shortPreamble = AH_TRUE;
4554 sc->sc_stats.ast_tx_shortpre++;
4555 } else {
4556 shortPreamble = AH_FALSE;
4557 }
4558
4559 an = ATH_NODE(ni);
4560 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
4561 ismrr = 0; /* default no multi-rate retry*/
4562 pri = M_WME_GETAC(m0); /* honor classification */
4563 /* XXX use txparams instead of fixed values */
4564 /*
4565 * Calculate Atheros packet type from IEEE80211 packet header,
4566 * setup for rate calculations, and select h/w transmit queue.
4567 */
4568 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
4569 case IEEE80211_FC0_TYPE_MGT:
4570 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4571 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
4572 atype = HAL_PKT_TYPE_BEACON;
4573 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4574 atype = HAL_PKT_TYPE_PROBE_RESP;
4575 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
4576 atype = HAL_PKT_TYPE_ATIM;
4577 else
4578 atype = HAL_PKT_TYPE_NORMAL; /* XXX */
4579 rix = an->an_mgmtrix;
4580 txrate = rt->info[rix].rateCode;
4581 if (shortPreamble)
4582 txrate |= rt->info[rix].shortPreamble;
4583 try0 = ATH_TXMGTTRY;
4584 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
4585 break;
4586 case IEEE80211_FC0_TYPE_CTL:
4587 atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */
4588 rix = an->an_mgmtrix;
4589 txrate = rt->info[rix].rateCode;
4590 if (shortPreamble)
4591 txrate |= rt->info[rix].shortPreamble;
4592 try0 = ATH_TXMGTTRY;
4593 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
4594 break;
4595 case IEEE80211_FC0_TYPE_DATA:
4596 atype = HAL_PKT_TYPE_NORMAL; /* default */
4597 /*
4598 * Data frames: multicast frames go out at a fixed rate,
4599 * EAPOL frames use the mgmt frame rate; otherwise consult
4600 * the rate control module for the rate to use.
4601 */
4602 if (ismcast) {
4603 rix = an->an_mcastrix;
4604 txrate = rt->info[rix].rateCode;
4605 if (shortPreamble)
4606 txrate |= rt->info[rix].shortPreamble;
4607 try0 = 1;
4608 } else if (m0->m_flags & M_EAPOL) {
4609 /* XXX? maybe always use long preamble? */
4610 rix = an->an_mgmtrix;
4611 txrate = rt->info[rix].rateCode;
4612 if (shortPreamble)
4613 txrate |= rt->info[rix].shortPreamble;
4614 try0 = ATH_TXMAXTRY; /* XXX?too many? */
4615 } else {
4616 ath_rate_findrate(sc, an, shortPreamble, pktlen,
4617 &rix, &try0, &txrate);
4618 sc->sc_txrix = rix; /* for LED blinking */
4619 sc->sc_lastdatarix = rix; /* for fast frames */
4620 if (try0 != ATH_TXMAXTRY)
4621 ismrr = 1;
4622 }
4623 if (cap->cap_wmeParams[pri].wmep_noackPolicy)
4624 flags |= HAL_TXDESC_NOACK;
4625 break;
4626 default:
4627 if_printf(ifp, "bogus frame type 0x%x (%s)\n",
4628 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
4629 /* XXX statistic */
4630 ath_freetx(m0);
4631 return EIO;
4632 }
4633 txq = sc->sc_ac2q[pri];
4634
4635 /*
4636 * When servicing one or more stations in power-save mode
4637 * (or) if there is some mcast data waiting on the mcast
4638 * queue (to prevent out of order delivery) multicast
4639 * frames must be buffered until after the beacon.
4640 */
4641 if (ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth))
4642 txq = &avp->av_mcastq;
4643
4644 /*
4645 * Calculate miscellaneous flags.
4646 */
4647 if (ismcast) {
4648 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */
4649 } else if (pktlen > vap->iv_rtsthreshold &&
4650 (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
4651 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */
4652 cix = rt->info[rix].controlRate;
4653 sc->sc_stats.ast_tx_rts++;
4654 }
4655 if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */
4656 sc->sc_stats.ast_tx_noack++;
4657#ifdef IEEE80211_SUPPORT_TDMA
4658 if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
4659 DPRINTF(sc, ATH_DEBUG_TDMA,
4660 "%s: discard frame, ACK required w/ TDMA\n", __func__);
4661 sc->sc_stats.ast_tdma_ack++;
4662 ath_freetx(m0);
4663 return EIO;
4664 }
4665#endif
4666
4667 /*
4668 * If 802.11g protection is enabled, determine whether
4669 * to use RTS/CTS or just CTS. Note that this is only
4670 * done for OFDM unicast frames.
4671 */
4672 if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
4673 rt->info[rix].phy == IEEE80211_T_OFDM &&
4674 (flags & HAL_TXDESC_NOACK) == 0) {
4675 /* XXX fragments must use CCK rates w/ protection */
4676 if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4677 flags |= HAL_TXDESC_RTSENA;
4678 else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4679 flags |= HAL_TXDESC_CTSENA;
4680 if (isfrag) {
4681 /*
4682 * For frags it would be desirable to use the
4683 * highest CCK rate for RTS/CTS. But stations
4684 * farther away may detect it at a lower CCK rate
4685 * so use the configured protection rate instead
4686 * (for now).
4687 */
4688 cix = rt->info[sc->sc_protrix].controlRate;
4689 } else
4690 cix = rt->info[sc->sc_protrix].controlRate;
4691 sc->sc_stats.ast_tx_protect++;
4692 }
4693
4694 /*
4695 * Calculate duration. This logically belongs in the 802.11
4696 * layer but it lacks sufficient information to calculate it.
4697 */
4698 if ((flags & HAL_TXDESC_NOACK) == 0 &&
4699 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
4700 u_int16_t dur;
4701 if (shortPreamble)
4702 dur = rt->info[rix].spAckDuration;
4703 else
4704 dur = rt->info[rix].lpAckDuration;
4705 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
4706 dur += dur; /* additional SIFS+ACK */
4707 KASSERT(m0->m_nextpkt != NULL, ("no fragment"));
4708 /*
4709 * Include the size of next fragment so NAV is
4710 * updated properly. The last fragment uses only
4711 * the ACK duration
4712 */
4713 dur += ath_hal_computetxtime(ah, rt,
4714 m0->m_nextpkt->m_pkthdr.len,
4715 rix, shortPreamble);
4716 }
4717 if (isfrag) {
4718 /*
4719 * Force hardware to use computed duration for next
4720 * fragment by disabling multi-rate retry which updates
4721 * duration based on the multi-rate duration table.
4722 */
4723 ismrr = 0;
4724 try0 = ATH_TXMGTTRY; /* XXX? */
4725 }
4726 *(u_int16_t *)wh->i_dur = htole16(dur);
4727 }
4728
4729 /*
4730 * Calculate RTS/CTS rate and duration if needed.
4731 */
4732 ctsduration = 0;
4733 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) {
4734 /*
4735 * CTS transmit rate is derived from the transmit rate
4736 * by looking in the h/w rate table. We must also factor
4737 * in whether or not a short preamble is to be used.
4738 */
4739 /* NB: cix is set above where RTS/CTS is enabled */
4740 KASSERT(cix != 0xff, ("cix not setup"));
4741 ctsrate = rt->info[cix].rateCode;
4742 /*
4743 * Compute the transmit duration based on the frame
4744 * size and the size of an ACK frame. We call into the
4745 * HAL to do the computation since it depends on the
4746 * characteristics of the actual PHY being used.
4747 *
4748 * NB: CTS is assumed the same size as an ACK so we can
4749 * use the precalculated ACK durations.
4750 */
4751 if (shortPreamble) {
4752 ctsrate |= rt->info[cix].shortPreamble;
4753 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
4754 ctsduration += rt->info[cix].spAckDuration;
4755 ctsduration += ath_hal_computetxtime(ah,
4756 rt, pktlen, rix, AH_TRUE);
4757 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
4758 ctsduration += rt->info[rix].spAckDuration;
4759 } else {
4760 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
4761 ctsduration += rt->info[cix].lpAckDuration;
4762 ctsduration += ath_hal_computetxtime(ah,
4763 rt, pktlen, rix, AH_FALSE);
4764 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
4765 ctsduration += rt->info[rix].lpAckDuration;
4766 }
4767 /*
4768 * Must disable multi-rate retry when using RTS/CTS.
4769 */
4770 ismrr = 0;
4771 try0 = ATH_TXMGTTRY; /* XXX */
4772 } else
4773 ctsrate = 0;
4774
4775 /*
4776 * At this point we are committed to sending the frame
4777 * and we don't need to look at m_nextpkt; clear it in
4778 * case this frame is part of frag chain.
4779 */
4780 m0->m_nextpkt = NULL;
4781
4782 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
4783 ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
4784 sc->sc_hwmap[rix].ieeerate, -1);
4785
4786 if (ieee80211_radiotap_active_vap(vap)) {
4787 u_int64_t tsf = ath_hal_gettsf64(ah);
4788
4789 sc->sc_tx_th.wt_tsf = htole64(tsf);
4790 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
4791 if (iswep)
4792 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4793 if (isfrag)
4794 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
4795 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
4796 sc->sc_tx_th.wt_txpower = ni->ni_txpower;
4797 sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
4798
4799 ieee80211_radiotap_tx(vap, m0);
4800 }
4801
4802 /*
4803 * Determine if a tx interrupt should be generated for
4804 * this descriptor. We take a tx interrupt to reap
4805 * descriptors when the h/w hits an EOL condition or
4806 * when the descriptor is specifically marked to generate
4807 * an interrupt. We periodically mark descriptors in this
4808 * way to insure timely replenishing of the supply needed
4809 * for sending frames. Defering interrupts reduces system
4810 * load and potentially allows more concurrent work to be
4811 * done but if done to aggressively can cause senders to
4812 * backup.
4813 *
4814 * NB: use >= to deal with sc_txintrperiod changing
4815 * dynamically through sysctl.
4816 */
4817 if (flags & HAL_TXDESC_INTREQ) {
4818 txq->axq_intrcnt = 0;
4819 } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
4820 flags |= HAL_TXDESC_INTREQ;
4821 txq->axq_intrcnt = 0;
4822 }
4823
4824 /*
4825 * Formulate first tx descriptor with tx controls.
4826 */
4827 /* XXX check return value? */
4828 ath_hal_setuptxdesc(ah, ds
4829 , pktlen /* packet length */
4830 , hdrlen /* header length */
4831 , atype /* Atheros packet type */
4832 , ni->ni_txpower /* txpower */
4833 , txrate, try0 /* series 0 rate/tries */
4834 , keyix /* key cache index */
4835 , sc->sc_txantenna /* antenna mode */
4836 , flags /* flags */
4837 , ctsrate /* rts/cts rate */
4838 , ctsduration /* rts/cts duration */
4839 );
4840 bf->bf_txflags = flags;
4841 /*
4842 * Setup the multi-rate retry state only when we're
4843 * going to use it. This assumes ath_hal_setuptxdesc
4844 * initializes the descriptors (so we don't have to)
4845 * when the hardware supports multi-rate retry and
4846 * we don't use it.
4847 */
4848 if (ismrr)
4849 ath_rate_setupxtxdesc(sc, an, ds, shortPreamble, rix);
4850
4851 ath_tx_handoff(sc, txq, bf);
4852 return 0;
4853}
4854
4855/*
4856 * Process completed xmit descriptors from the specified queue.
4857 */
4858static int
4859ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
4860{
4861 struct ath_hal *ah = sc->sc_ah;
4862 struct ifnet *ifp = sc->sc_ifp;
4863 struct ieee80211com *ic = ifp->if_l2com;

--- 1717 unchanged lines hidden (view full) ---

6581 "TDMA calculated super frame");
6582 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6583 "setcca", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6584 ath_sysctl_setcca, "I", "enable CCA control");
6585 }
6586#endif
6587}
6588
4179 * Process completed xmit descriptors from the specified queue.
4180 */
4181static int
4182ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
4183{
4184 struct ath_hal *ah = sc->sc_ah;
4185 struct ifnet *ifp = sc->sc_ifp;
4186 struct ieee80211com *ic = ifp->if_l2com;

--- 1717 unchanged lines hidden (view full) ---

5904 "TDMA calculated super frame");
5905 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
5906 "setcca", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
5907 ath_sysctl_setcca, "I", "enable CCA control");
5908 }
5909#endif
5910}
5911
6589static int
6590ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
6591 struct ath_buf *bf, struct mbuf *m0,
6592 const struct ieee80211_bpf_params *params)
6593{
6594 struct ifnet *ifp = sc->sc_ifp;
6595 struct ieee80211com *ic = ifp->if_l2com;
6596 struct ath_hal *ah = sc->sc_ah;
6597 struct ieee80211vap *vap = ni->ni_vap;
6598 int error, ismcast, ismrr;
6599 int keyix, hdrlen, pktlen, try0, txantenna;
6600 u_int8_t rix, cix, txrate, ctsrate, rate1, rate2, rate3;
6601 struct ieee80211_frame *wh;
6602 u_int flags, ctsduration;
6603 HAL_PKT_TYPE atype;
6604 const HAL_RATE_TABLE *rt;
6605 struct ath_desc *ds;
6606 u_int pri;
6607
6608 wh = mtod(m0, struct ieee80211_frame *);
6609 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
6610 hdrlen = ieee80211_anyhdrsize(wh);
6611 /*
6612 * Packet length must not include any
6613 * pad bytes; deduct them here.
6614 */
6615 /* XXX honor IEEE80211_BPF_DATAPAD */
6616 pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
6617
6618 if (params->ibp_flags & IEEE80211_BPF_CRYPTO) {
6619 const struct ieee80211_cipher *cip;
6620 struct ieee80211_key *k;
6621
6622 /*
6623 * Construct the 802.11 header+trailer for an encrypted
6624 * frame. The only reason this can fail is because of an
6625 * unknown or unsupported cipher/key type.
6626 */
6627 k = ieee80211_crypto_encap(ni, m0);
6628 if (k == NULL) {
6629 /*
6630 * This can happen when the key is yanked after the
6631 * frame was queued. Just discard the frame; the
6632 * 802.11 layer counts failures and provides
6633 * debugging/diagnostics.
6634 */
6635 ath_freetx(m0);
6636 return EIO;
6637 }
6638 /*
6639 * Adjust the packet + header lengths for the crypto
6640 * additions and calculate the h/w key index. When
6641 * a s/w mic is done the frame will have had any mic
6642 * added to it prior to entry so m0->m_pkthdr.len will
6643 * account for it. Otherwise we need to add it to the
6644 * packet length.
6645 */
6646 cip = k->wk_cipher;
6647 hdrlen += cip->ic_header;
6648 pktlen += cip->ic_header + cip->ic_trailer;
6649 /* NB: frags always have any TKIP MIC done in s/w */
6650 if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0)
6651 pktlen += cip->ic_miclen;
6652 keyix = k->wk_keyix;
6653
6654 /* packet header may have moved, reset our local pointer */
6655 wh = mtod(m0, struct ieee80211_frame *);
6656 } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
6657 /*
6658 * Use station key cache slot, if assigned.
6659 */
6660 keyix = ni->ni_ucastkey.wk_keyix;
6661 if (keyix == IEEE80211_KEYIX_NONE)
6662 keyix = HAL_TXKEYIX_INVALID;
6663 } else
6664 keyix = HAL_TXKEYIX_INVALID;
6665
6666 error = ath_tx_dmasetup(sc, bf, m0);
6667 if (error != 0)
6668 return error;
6669 m0 = bf->bf_m; /* NB: may have changed */
6670 wh = mtod(m0, struct ieee80211_frame *);
6671 bf->bf_node = ni; /* NB: held reference */
6672
6673 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
6674 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
6675 if (params->ibp_flags & IEEE80211_BPF_RTS)
6676 flags |= HAL_TXDESC_RTSENA;
6677 else if (params->ibp_flags & IEEE80211_BPF_CTS)
6678 flags |= HAL_TXDESC_CTSENA;
6679 /* XXX leave ismcast to injector? */
6680 if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
6681 flags |= HAL_TXDESC_NOACK;
6682
6683 rt = sc->sc_currates;
6684 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
6685 rix = ath_tx_findrix(sc, params->ibp_rate0);
6686 txrate = rt->info[rix].rateCode;
6687 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
6688 txrate |= rt->info[rix].shortPreamble;
6689 sc->sc_txrix = rix;
6690 try0 = params->ibp_try0;
6691 ismrr = (params->ibp_try1 != 0);
6692 txantenna = params->ibp_pri >> 2;
6693 if (txantenna == 0) /* XXX? */
6694 txantenna = sc->sc_txantenna;
6695 ctsduration = 0;
6696 if (flags & (HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA)) {
6697 cix = ath_tx_findrix(sc, params->ibp_ctsrate);
6698 ctsrate = rt->info[cix].rateCode;
6699 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE) {
6700 ctsrate |= rt->info[cix].shortPreamble;
6701 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
6702 ctsduration += rt->info[cix].spAckDuration;
6703 ctsduration += ath_hal_computetxtime(ah,
6704 rt, pktlen, rix, AH_TRUE);
6705 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
6706 ctsduration += rt->info[rix].spAckDuration;
6707 } else {
6708 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
6709 ctsduration += rt->info[cix].lpAckDuration;
6710 ctsduration += ath_hal_computetxtime(ah,
6711 rt, pktlen, rix, AH_FALSE);
6712 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
6713 ctsduration += rt->info[rix].lpAckDuration;
6714 }
6715 ismrr = 0; /* XXX */
6716 } else
6717 ctsrate = 0;
6718 pri = params->ibp_pri & 3;
6719 /*
6720 * NB: we mark all packets as type PSPOLL so the h/w won't
6721 * set the sequence number, duration, etc.
6722 */
6723 atype = HAL_PKT_TYPE_PSPOLL;
6724
6725 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
6726 ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
6727 sc->sc_hwmap[rix].ieeerate, -1);
6728
6729 if (ieee80211_radiotap_active_vap(vap)) {
6730 u_int64_t tsf = ath_hal_gettsf64(ah);
6731
6732 sc->sc_tx_th.wt_tsf = htole64(tsf);
6733 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
6734 if (wh->i_fc[1] & IEEE80211_FC1_WEP)
6735 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
6736 if (m0->m_flags & M_FRAG)
6737 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
6738 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
6739 sc->sc_tx_th.wt_txpower = ni->ni_txpower;
6740 sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
6741
6742 ieee80211_radiotap_tx(vap, m0);
6743 }
6744
6745 /*
6746 * Formulate first tx descriptor with tx controls.
6747 */
6748 ds = bf->bf_desc;
6749 /* XXX check return value? */
6750 ath_hal_setuptxdesc(ah, ds
6751 , pktlen /* packet length */
6752 , hdrlen /* header length */
6753 , atype /* Atheros packet type */
6754 , params->ibp_power /* txpower */
6755 , txrate, try0 /* series 0 rate/tries */
6756 , keyix /* key cache index */
6757 , txantenna /* antenna mode */
6758 , flags /* flags */
6759 , ctsrate /* rts/cts rate */
6760 , ctsduration /* rts/cts duration */
6761 );
6762 bf->bf_txflags = flags;
6763
6764 if (ismrr) {
6765 rix = ath_tx_findrix(sc, params->ibp_rate1);
6766 rate1 = rt->info[rix].rateCode;
6767 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
6768 rate1 |= rt->info[rix].shortPreamble;
6769 if (params->ibp_try2) {
6770 rix = ath_tx_findrix(sc, params->ibp_rate2);
6771 rate2 = rt->info[rix].rateCode;
6772 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
6773 rate2 |= rt->info[rix].shortPreamble;
6774 } else
6775 rate2 = 0;
6776 if (params->ibp_try3) {
6777 rix = ath_tx_findrix(sc, params->ibp_rate3);
6778 rate3 = rt->info[rix].rateCode;
6779 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
6780 rate3 |= rt->info[rix].shortPreamble;
6781 } else
6782 rate3 = 0;
6783 ath_hal_setupxtxdesc(ah, ds
6784 , rate1, params->ibp_try1 /* series 1 */
6785 , rate2, params->ibp_try2 /* series 2 */
6786 , rate3, params->ibp_try3 /* series 3 */
6787 );
6788 }
6789
6790 /* NB: no buffered multicast in power save support */
6791 ath_tx_handoff(sc, sc->sc_ac2q[pri], bf);
6792 return 0;
6793}
6794
6795static int
6796ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
6797 const struct ieee80211_bpf_params *params)
6798{
6799 struct ieee80211com *ic = ni->ni_ic;
6800 struct ifnet *ifp = ic->ic_ifp;
6801 struct ath_softc *sc = ifp->if_softc;
6802 struct ath_buf *bf;
6803 int error;
6804
6805 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) {
6806 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, %s", __func__,
6807 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ?
6808 "!running" : "invalid");
6809 m_freem(m);
6810 error = ENETDOWN;
6811 goto bad;
6812 }
6813 /*
6814 * Grab a TX buffer and associated resources.
6815 */
6816 bf = ath_getbuf(sc);
6817 if (bf == NULL) {
6818 sc->sc_stats.ast_tx_nobuf++;
6819 m_freem(m);
6820 error = ENOBUFS;
6821 goto bad;
6822 }
6823
6824 if (params == NULL) {
6825 /*
6826 * Legacy path; interpret frame contents to decide
6827 * precisely how to send the frame.
6828 */
6829 if (ath_tx_start(sc, ni, bf, m)) {
6830 error = EIO; /* XXX */
6831 goto bad2;
6832 }
6833 } else {
6834 /*
6835 * Caller supplied explicit parameters to use in
6836 * sending the frame.
6837 */
6838 if (ath_tx_raw_start(sc, ni, bf, m, params)) {
6839 error = EIO; /* XXX */
6840 goto bad2;
6841 }
6842 }
6843 sc->sc_wd_timer = 5;
6844 ifp->if_opackets++;
6845 sc->sc_stats.ast_tx_raw++;
6846
6847 return 0;
6848bad2:
6849 ATH_TXBUF_LOCK(sc);
6850 STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
6851 ATH_TXBUF_UNLOCK(sc);
6852bad:
6853 ifp->if_oerrors++;
6854 sc->sc_stats.ast_tx_raw_fail++;
6855 ieee80211_free_node(ni);
6856 return error;
6857}
6858
6859/*
6860 * Announce various information on device/driver attach.
6861 */
6862static void
6863ath_announce(struct ath_softc *sc)
6864{
6865 struct ifnet *ifp = sc->sc_ifp;
6866 struct ath_hal *ah = sc->sc_ah;

--- 572 unchanged lines hidden --- 		5912/*
5913 * Announce various information on device/driver attach.
5914 */
5915static void
5916ath_announce(struct ath_softc *sc)
5917{
5918 struct ifnet *ifp = sc->sc_ifp;
5919 struct ath_hal *ah = sc->sc_ah;

--- 572 unchanged lines hidden ---