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aic7xxx.h (76634) aic7xxx.h (79874)
1/*
2 * Core definitions and data structures shareable across OS platforms.
3 *
4 * Copyright (c) 1994-2001 Justin T. Gibbs.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
1/*
2 * Core definitions and data structures shareable across OS platforms.
3 *
4 * Copyright (c) 1994-2001 Justin T. Gibbs.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 * $Id: //depot/src/aic7xxx/aic7xxx.h#27 $
31 * $Id: //depot/src/aic7xxx/aic7xxx.h#29 $
32 *
32 *
33 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.h 76634 2001-05-15 19:41:12Z gibbs $
33 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.h 79874 2001-07-18 21:39:48Z gibbs $
34 */
35
36#ifndef _AIC7XXX_H_
37#define _AIC7XXX_H_
38
39/* Register Definitions */
40#include "aic7xxx_reg.h"
41

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330 AHC_SCB_BTT = 0x40000,/*
331 * The busy targets table is
332 * stored in SCB space rather
333 * than SRAM.
334 */
335 AHC_BIOS_ENABLED = 0x80000,
336 AHC_ALL_INTERRUPTS = 0x100000,
337 AHC_PAGESCBS = 0x400000, /* Enable SCB paging */
34 */
35
36#ifndef _AIC7XXX_H_
37#define _AIC7XXX_H_
38
39/* Register Definitions */
40#include "aic7xxx_reg.h"
41

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330 AHC_SCB_BTT = 0x40000,/*
331 * The busy targets table is
332 * stored in SCB space rather
333 * than SRAM.
334 */
335 AHC_BIOS_ENABLED = 0x80000,
336 AHC_ALL_INTERRUPTS = 0x100000,
337 AHC_PAGESCBS = 0x400000, /* Enable SCB paging */
338 AHC_EDGE_INTERRUPT = 0x800000 /* Device uses edge triggered ints */
338 AHC_EDGE_INTERRUPT = 0x800000, /* Device uses edge triggered ints */
339 AHC_39BIT_ADDRESSING = 0x1000000 /* Use 39 bit addressing scheme. */
339} ahc_flag;
340
340} ahc_flag;
341
341/*
342 * Controller Information composed at probe time.
343 */
344struct ahc_probe_config {
345 const char *description;
346 char channel;
347 char channel_b;
348 ahc_chip chip;
349 ahc_feature features;
350 ahc_bug bugs;
351 ahc_flag flags;
352};
353
354/************************* Hardware SCB Definition ***************************/
355
356/*
357 * The driver keeps up to MAX_SCB scb structures per card in memory. The SCB
358 * consists of a "hardware SCB" mirroring the fields availible on the card
359 * and additional information the kernel stores for each transaction.
360 *
361 * To minimize space utilization, a portion of the hardware scb stores

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494struct ahc_dma_seg {
495 uint32_t addr;
496 uint32_t len;
497#define AHC_DMA_LAST_SEG 0x80000000
498#define AHC_SG_HIGH_ADDR_MASK 0x7F000000
499#define AHC_SG_LEN_MASK 0x00FFFFFF
500};
501
342/************************* Hardware SCB Definition ***************************/
343
344/*
345 * The driver keeps up to MAX_SCB scb structures per card in memory. The SCB
346 * consists of a "hardware SCB" mirroring the fields availible on the card
347 * and additional information the kernel stores for each transaction.
348 *
349 * To minimize space utilization, a portion of the hardware scb stores

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482struct ahc_dma_seg {
483 uint32_t addr;
484 uint32_t len;
485#define AHC_DMA_LAST_SEG 0x80000000
486#define AHC_SG_HIGH_ADDR_MASK 0x7F000000
487#define AHC_SG_LEN_MASK 0x00FFFFFF
488};
489
490struct sg_map_node {
491 bus_dmamap_t sg_dmamap;
492 bus_addr_t sg_physaddr;
493 struct ahc_dma_seg* sg_vaddr;
494 SLIST_ENTRY(sg_map_node) links;
495};
496
502/*
503 * The current state of this SCB.
504 */
505typedef enum {
506 SCB_FREE = 0x0000,
507 SCB_OTHERTCL_TIMEOUT = 0x0002,/*
508 * Another device was active
509 * during the first timeout for

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533 LIST_ENTRY(scb) pending_links;
534 ahc_io_ctx_t io_ctx;
535 struct ahc_softc *ahc_softc;
536 scb_flag flags;
537#ifndef __linux__
538 bus_dmamap_t dmamap;
539#endif
540 struct scb_platform_data *platform_data;
497/*
498 * The current state of this SCB.
499 */
500typedef enum {
501 SCB_FREE = 0x0000,
502 SCB_OTHERTCL_TIMEOUT = 0x0002,/*
503 * Another device was active
504 * during the first timeout for

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528 LIST_ENTRY(scb) pending_links;
529 ahc_io_ctx_t io_ctx;
530 struct ahc_softc *ahc_softc;
531 scb_flag flags;
532#ifndef __linux__
533 bus_dmamap_t dmamap;
534#endif
535 struct scb_platform_data *platform_data;
541 struct ahc_dma_seg *sg_list;
536 struct sg_map_node *sg_map;
537 struct ahc_dma_seg *sg_list;
542 bus_addr_t sg_list_phys;
543 u_int sg_count;/* How full ahc_dma_seg is */
544};
545
538 bus_addr_t sg_list_phys;
539 u_int sg_count;/* How full ahc_dma_seg is */
540};
541
546struct sg_map_node {
547 bus_dmamap_t sg_dmamap;
548 bus_addr_t sg_physaddr;
549 struct ahc_dma_seg* sg_vaddr;
550 SLIST_ENTRY(sg_map_node) links;
551};
552
553struct scb_data {
554 SLIST_HEAD(, scb) free_scbs; /*
555 * Pool of SCBs ready to be assigned
556 * commands to execute.
557 */
558 struct scb *scbindex[AHC_SCB_MAX + 1];/* Mapping from tag to SCB */
559 struct hardware_scb *hscbs; /* Array of hardware SCBs */
560 struct scb *scbarray; /* Array of kernel SCBs */

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860#endif
861 struct scb_data *scb_data;
862
863 struct scb *next_queued_scb;
864
865 /*
866 * SCBs that have been sent to the controller
867 */
542struct scb_data {
543 SLIST_HEAD(, scb) free_scbs; /*
544 * Pool of SCBs ready to be assigned
545 * commands to execute.
546 */
547 struct scb *scbindex[AHC_SCB_MAX + 1];/* Mapping from tag to SCB */
548 struct hardware_scb *hscbs; /* Array of hardware SCBs */
549 struct scb *scbarray; /* Array of kernel SCBs */

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849#endif
850 struct scb_data *scb_data;
851
852 struct scb *next_queued_scb;
853
854 /*
855 * SCBs that have been sent to the controller
856 */
868 LIST_HEAD(, scb) pending_scbs;
857 LIST_HEAD(, scb) pending_scbs;
869
870 /*
871 * Counting lock for deferring the release of additional
872 * untagged transactions from the untagged_queues. When
873 * the lock is decremented to 0, all queues in the
874 * untagged_queues array are run.
875 */
876 u_int untagged_queue_lock;

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1034 char channel;
1035 role_t role; /*
1036 * Only guaranteed to be correct if not
1037 * in the busfree state.
1038 */
1039};
1040
1041/****************************** PCI Structures ********************************/
858
859 /*
860 * Counting lock for deferring the release of additional
861 * untagged transactions from the untagged_queues. When
862 * the lock is decremented to 0, all queues in the
863 * untagged_queues array are run.
864 */
865 u_int untagged_queue_lock;

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1023 char channel;
1024 role_t role; /*
1025 * Only guaranteed to be correct if not
1026 * in the busfree state.
1027 */
1028};
1029
1030/****************************** PCI Structures ********************************/
1042typedef int (ahc_device_setup_t)(ahc_dev_softc_t,
1043 struct ahc_probe_config *);
1031typedef int (ahc_device_setup_t)(struct ahc_softc *);
1044
1045struct ahc_pci_identity {
1046 uint64_t full_id;
1047 uint64_t id_mask;
1048 char *name;
1049 ahc_device_setup_t *setup;
1050};
1051extern struct ahc_pci_identity ahc_pci_ident_table [];

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1088 struct scb_tailq *queue);
1089void ahc_qinfifo_requeue_tail(struct ahc_softc *ahc,
1090 struct scb *scb);
1091int ahc_match_scb(struct ahc_softc *ahc, struct scb *scb,
1092 int target, char channel, int lun,
1093 u_int tag, role_t role);
1094
1095/****************************** Initialization ********************************/
1032
1033struct ahc_pci_identity {
1034 uint64_t full_id;
1035 uint64_t id_mask;
1036 char *name;
1037 ahc_device_setup_t *setup;
1038};
1039extern struct ahc_pci_identity ahc_pci_ident_table [];

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1076 struct scb_tailq *queue);
1077void ahc_qinfifo_requeue_tail(struct ahc_softc *ahc,
1078 struct scb *scb);
1079int ahc_match_scb(struct ahc_softc *ahc, struct scb *scb,
1080 int target, char channel, int lun,
1081 u_int tag, role_t role);
1082
1083/****************************** Initialization ********************************/
1096void ahc_init_probe_config(struct ahc_probe_config *);
1097struct ahc_softc *ahc_alloc(void *platform_arg, char *name);
1084struct ahc_softc *ahc_alloc(void *platform_arg, char *name);
1098int ahc_softc_init(struct ahc_softc *,
1099 struct ahc_probe_config*);
1085int ahc_softc_init(struct ahc_softc *);
1100void ahc_controller_info(struct ahc_softc *ahc, char *buf);
1101int ahc_init(struct ahc_softc *ahc);
1102void ahc_intr_enable(struct ahc_softc *ahc, int enable);
1103void ahc_pause_and_flushwork(struct ahc_softc *ahc);
1104int ahc_suspend(struct ahc_softc *ahc);
1105int ahc_resume(struct ahc_softc *ahc);
1106void ahc_softc_insert(struct ahc_softc *);
1107void ahc_set_unit(struct ahc_softc *, int);

--- 102 unchanged lines hidden --- 		1086void ahc_controller_info(struct ahc_softc *ahc, char *buf);
1087int ahc_init(struct ahc_softc *ahc);
1088void ahc_intr_enable(struct ahc_softc *ahc, int enable);
1089void ahc_pause_and_flushwork(struct ahc_softc *ahc);
1090int ahc_suspend(struct ahc_softc *ahc);
1091int ahc_resume(struct ahc_softc *ahc);
1092void ahc_softc_insert(struct ahc_softc *);
1093void ahc_set_unit(struct ahc_softc *, int);

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