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ahci.c (214325) ahci.c (214988)
1/*-
2 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/dev/ahci/ahci.c 214325 2010-10-25 07:41:21Z mav $");
28__FBSDID("$FreeBSD: head/sys/dev/ahci/ahci.c 214988 2010-11-08 15:36:15Z mav $");
29
30#include <sys/param.h>
31#include <sys/module.h>
32#include <sys/systm.h>
33#include <sys/kernel.h>
34#include <sys/ata.h>
35#include <sys/bus.h>
36#include <sys/endian.h>

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1620 if (!(fis_size = ahci_setup_fis(dev, ctp, ccb, slot->slot))) {
1621 device_printf(ch->dev, "Setting up SATA FIS failed\n");
1622 ahci_end_transaction(slot, AHCI_ERR_INVALID);
1623 return;
1624 }
1625 /* Setup the command list entry */
1626 clp = (struct ahci_cmd_list *)
1627 (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot));
29
30#include <sys/param.h>
31#include <sys/module.h>
32#include <sys/systm.h>
33#include <sys/kernel.h>
34#include <sys/ata.h>
35#include <sys/bus.h>
36#include <sys/endian.h>

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1620 if (!(fis_size = ahci_setup_fis(dev, ctp, ccb, slot->slot))) {
1621 device_printf(ch->dev, "Setting up SATA FIS failed\n");
1622 ahci_end_transaction(slot, AHCI_ERR_INVALID);
1623 return;
1624 }
1625 /* Setup the command list entry */
1626 clp = (struct ahci_cmd_list *)
1627 (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot));
1628 clp->prd_length = slot->dma.nsegs;
1629 clp->cmd_flags = (ccb->ccb_h.flags & CAM_DIR_OUT ? AHCI_CMD_WRITE : 0) |
1630 (ccb->ccb_h.func_code == XPT_SCSI_IO ?
1631 (AHCI_CMD_ATAPI | AHCI_CMD_PREFETCH) : 0) |
1632 (fis_size / sizeof(u_int32_t)) |
1633 (port << 12);
1628 clp->cmd_flags = htole16(
1629 (ccb->ccb_h.flags & CAM_DIR_OUT ? AHCI_CMD_WRITE : 0) |
1630 (ccb->ccb_h.func_code == XPT_SCSI_IO ?
1631 (AHCI_CMD_ATAPI | AHCI_CMD_PREFETCH) : 0) |
1632 (fis_size / sizeof(u_int32_t)) |
1633 (port << 12));
1634 clp->prd_length = htole16(slot->dma.nsegs);
1634 /* Special handling for Soft Reset command. */
1635 if ((ccb->ccb_h.func_code == XPT_ATA_IO) &&
1636 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) {
1637 if (ccb->ataio.cmd.control & ATA_A_RESET) {
1638 /* Kick controller into sane state */
1639 ahci_stop(dev);
1640 ahci_clo(dev);
1641 ahci_start(dev, 0);
1642 clp->cmd_flags |= AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY;
1643 } else {
1644 /* Prepare FIS receive area for check. */
1645 for (i = 0; i < 20; i++)
1646 fis[i] = 0xff;
1647 }
1648 }
1649 clp->bytecount = 0;
1650 clp->cmd_table_phys = htole64(ch->dma.work_bus + AHCI_CT_OFFSET +
1651 (AHCI_CT_SIZE * slot->slot));
1652 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map,
1635 /* Special handling for Soft Reset command. */
1636 if ((ccb->ccb_h.func_code == XPT_ATA_IO) &&
1637 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) {
1638 if (ccb->ataio.cmd.control & ATA_A_RESET) {
1639 /* Kick controller into sane state */
1640 ahci_stop(dev);
1641 ahci_clo(dev);
1642 ahci_start(dev, 0);
1643 clp->cmd_flags |= AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY;
1644 } else {
1645 /* Prepare FIS receive area for check. */
1646 for (i = 0; i < 20; i++)
1647 fis[i] = 0xff;
1648 }
1649 }
1650 clp->bytecount = 0;
1651 clp->cmd_table_phys = htole64(ch->dma.work_bus + AHCI_CT_OFFSET +
1652 (AHCI_CT_SIZE * slot->slot));
1653 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map,
1653 BUS_DMASYNC_PREWRITE);
1654 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1654 bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map,
1655 BUS_DMASYNC_PREREAD);
1656 /* Set ACTIVE bit for NCQ commands. */
1657 if ((ccb->ccb_h.func_code == XPT_ATA_IO) &&
1658 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) {
1659 ATA_OUTL(ch->r_mem, AHCI_P_SACT, 1 << slot->slot);
1660 }
1661 /* If FBS is enabled, set PMP port. */

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1850
1851/* Must be called with channel locked. */
1852static void
1853ahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et)
1854{
1855 device_t dev = slot->dev;
1856 struct ahci_channel *ch = device_get_softc(dev);
1857 union ccb *ccb = slot->ccb;
1655 bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map,
1656 BUS_DMASYNC_PREREAD);
1657 /* Set ACTIVE bit for NCQ commands. */
1658 if ((ccb->ccb_h.func_code == XPT_ATA_IO) &&
1659 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) {
1660 ATA_OUTL(ch->r_mem, AHCI_P_SACT, 1 << slot->slot);
1661 }
1662 /* If FBS is enabled, set PMP port. */

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1851
1852/* Must be called with channel locked. */
1853static void
1854ahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et)
1855{
1856 device_t dev = slot->dev;
1857 struct ahci_channel *ch = device_get_softc(dev);
1858 union ccb *ccb = slot->ccb;
1859 struct ahci_cmd_list *clp;
1858 int lastto;
1859
1860 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map,
1860 int lastto;
1861
1862 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map,
1861 BUS_DMASYNC_POSTWRITE);
1863 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1864 clp = (struct ahci_cmd_list *)
1865 (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot));
1862 /* Read result registers to the result struct
1863 * May be incorrect if several commands finished same time,
1864 * so read only when sure or have to.
1865 */
1866 if (ccb->ccb_h.func_code == XPT_ATA_IO) {
1867 struct ata_res *res = &ccb->ataio.res;
1868
1869 if ((et == AHCI_ERR_TFE) ||

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1888 res->device = fis[7];
1889 res->lba_low_exp = fis[8];
1890 res->lba_mid_exp = fis[9];
1891 res->lba_high_exp = fis[10];
1892 res->sector_count = fis[12];
1893 res->sector_count_exp = fis[13];
1894 } else
1895 bzero(res, sizeof(*res));
1866 /* Read result registers to the result struct
1867 * May be incorrect if several commands finished same time,
1868 * so read only when sure or have to.
1869 */
1870 if (ccb->ccb_h.func_code == XPT_ATA_IO) {
1871 struct ata_res *res = &ccb->ataio.res;
1872
1873 if ((et == AHCI_ERR_TFE) ||

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1892 res->device = fis[7];
1893 res->lba_low_exp = fis[8];
1894 res->lba_mid_exp = fis[9];
1895 res->lba_high_exp = fis[10];
1896 res->sector_count = fis[12];
1897 res->sector_count_exp = fis[13];
1898 } else
1899 bzero(res, sizeof(*res));
1900 if ((ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) == 0 &&
1901 (ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
1902 ccb->ataio.resid =
1903 ccb->ataio.dxfer_len - le32toh(clp->bytecount);
1904 }
1905 } else {
1906 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
1907 ccb->csio.resid =
1908 ccb->csio.dxfer_len - le32toh(clp->bytecount);
1909 }
1896 }
1897 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
1898 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map,
1899 (ccb->ccb_h.flags & CAM_DIR_IN) ?
1900 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1901 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map);
1902 }
1903 if (et != AHCI_ERR_NONE)

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1910 }
1911 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
1912 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map,
1913 (ccb->ccb_h.flags & CAM_DIR_IN) ?
1914 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1915 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map);
1916 }
1917 if (et != AHCI_ERR_NONE)

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