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< __FBSDID("$FreeBSD: head/sys/dev/agp/agp_amd64.c 150645 2005-09-27 20:57:50Z jkim $");
---
> __FBSDID("$FreeBSD: head/sys/dev/agp/agp_amd64.c 152435 2005-11-14 21:54:20Z jkim $");
66a67,70
> static int agp_amd64_via_match(void);
> static void agp_amd64_via_init(device_t);
> static int agp_amd64_via_set_aperture(device_t, uint32_t);
>
77a82
> int via_agp;
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< case 0xb1881106:
< return ("VIA 838X host to PCI bridge");
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> agp_amd64_via_match(void)
> {
> /* XXX Some VIA bridge requires secondary AGP bridge at 0:1:0. */
> if (pci_cfgregread(0, 1, 0, PCIR_CLASS, 1) != PCIC_BRIDGE ||
> pci_cfgregread(0, 1, 0, PCIR_SUBCLASS, 1) != PCIS_BRIDGE_PCI ||
> pci_cfgregread(0, 1, 0, PCIR_VENDOR, 2) != 0x1106 ||
> pci_cfgregread(0, 1, 0, PCIR_DEVICE, 2) != 0xb188 ||
> (pci_cfgregread(0, 1, 0, AGP_VIA_AGPSEL, 1) & 2))
> return 0;
>
> return 1;
> }
>
> static int
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< switch (pci_get_vendor(dev)) {
< case 0x10b9: /* ULi */
< agp_amd64_uli_init(dev);
< if (agp_amd64_uli_set_aperture(dev, sc->initial_aperture))
< return ENXIO;
< break;
<
< case 0x10de: /* nVidia */
< agp_amd64_nvidia_init(dev);
< if (agp_amd64_nvidia_set_aperture(dev, sc->initial_aperture))
< return ENXIO;
< break;
< }
<
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> switch (pci_get_vendor(dev)) {
> case 0x10b9: /* ULi */
> agp_amd64_uli_init(dev);
> if (agp_amd64_uli_set_aperture(dev, sc->initial_aperture))
> return ENXIO;
> break;
>
> case 0x10de: /* nVidia */
> agp_amd64_nvidia_init(dev);
> if (agp_amd64_nvidia_set_aperture(dev, sc->initial_aperture))
> return ENXIO;
> break;
>
> case 0x1106: /* VIA */
> sc->via_agp = agp_amd64_via_match();
> if (sc->via_agp) {
> agp_amd64_via_init(dev);
> if (agp_amd64_via_set_aperture(dev,
> sc->initial_aperture))
> return ENXIO;
> }
> break;
> }
>
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>
> case 0x1106: /* VIA */
> if (sc->via_agp)
> return (agp_amd64_via_set_aperture(dev, aperture));
> break;
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> static void
> agp_amd64_via_init(device_t dev)
> {
> struct agp_amd64_softc *sc = device_get_softc(dev);
>
> agp_amd64_apbase_fixup(dev);
> pci_cfgregwrite(0, 1, 0, AGP3_VIA_ATTBASE, sc->gatt->ag_physical, 4);
> pci_cfgregwrite(0, 1, 0, AGP3_VIA_GARTCTRL,
> pci_cfgregread(0, 1, 0, AGP3_VIA_ATTBASE, 4) | 0x180, 4);
> }
>
> static int
> agp_amd64_via_set_aperture(device_t dev, uint32_t aperture)
> {
> uint32_t apsize;
>
> apsize = ((aperture - 1) >> 20) ^ 0xff;
> if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture)
> return EINVAL;
> pci_cfgregwrite(0, 1, 0, AGP3_VIA_APSIZE, apsize, 1);
>
> return 0;
> }
>