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acpi_cpu.c (133616) acpi_cpu.c (136366)
1/*-
2 * Copyright (c) 2003 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2003 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/dev/acpica/acpi_cpu.c 133616 2004-08-13 06:21:47Z njl $");
29__FBSDID("$FreeBSD: head/sys/dev/acpica/acpi_cpu.c 136366 2004-10-11 05:39:15Z njl $");
30
31#include "opt_acpi.h"
32#include <sys/param.h>
33#include <sys/bus.h>
34#include <sys/kernel.h>
35#include <sys/malloc.h>
36#include <sys/module.h>
37#include <sys/pcpu.h>
38#include <sys/power.h>
39#include <sys/proc.h>
40#include <sys/sbuf.h>
41#include <sys/smp.h>
42
43#include <dev/pci/pcivar.h>
44#include <machine/atomic.h>
45#include <machine/bus.h>
30
31#include "opt_acpi.h"
32#include <sys/param.h>
33#include <sys/bus.h>
34#include <sys/kernel.h>
35#include <sys/malloc.h>
36#include <sys/module.h>
37#include <sys/pcpu.h>
38#include <sys/power.h>
39#include <sys/proc.h>
40#include <sys/sbuf.h>
41#include <sys/smp.h>
42
43#include <dev/pci/pcivar.h>
44#include <machine/atomic.h>
45#include <machine/bus.h>
46#ifdef __ia64__
47#include <machine/pal.h>
48#endif
49#include <sys/rman.h>
50
51#include "acpi.h"
52#include <dev/acpica/acpivar.h>
53
54/*
55 * Support for ACPI Processor devices, including ACPI 2.0 throttling
56 * and C[1-3] sleep states.
57 *
58 * TODO: implement scans of all CPUs to be sure all Cx states are
59 * equivalent.
60 */
61
62/* Hooks for the ACPI CA debugging infrastructure */
63#define _COMPONENT ACPI_PROCESSOR
64ACPI_MODULE_NAME("PROCESSOR")
65
66struct acpi_cx {
67 struct resource *p_lvlx; /* Register to read to enter state. */
68 uint32_t type; /* C1-3 (C4 and up treated as C3). */
69 uint32_t trans_lat; /* Transition latency (usec). */
70 uint32_t power; /* Power consumed (mW). */
71};
72#define MAX_CX_STATES 8
73
74struct acpi_cpu_softc {
75 device_t cpu_dev;
76 ACPI_HANDLE cpu_handle;
77 uint32_t acpi_id; /* ACPI processor id */
78 uint32_t cpu_p_blk; /* ACPI P_BLK location */
79 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
80 struct resource *cpu_p_cnt; /* Throttling control register */
81 struct acpi_cx cpu_cx_states[MAX_CX_STATES];
82 int cpu_cx_count; /* Number of valid Cx states. */
83 int cpu_prev_sleep;/* Last idle sleep duration. */
84};
85
86#define CPU_GET_REG(reg, width) \
87 (bus_space_read_ ## width(rman_get_bustag((reg)), \
88 rman_get_bushandle((reg)), 0))
89#define CPU_SET_REG(reg, width, val) \
90 (bus_space_write_ ## width(rman_get_bustag((reg)), \
91 rman_get_bushandle((reg)), 0, (val)))
92
93/*
94 * Speeds are stored in counts, from 1 to CPU_MAX_SPEED, and
95 * reported to the user in tenths of a percent.
96 */
97static uint32_t cpu_duty_offset;
98static uint32_t cpu_duty_width;
99#define CPU_MAX_SPEED (1 << cpu_duty_width)
100#define CPU_SPEED_PERCENT(x) ((1000 * (x)) / CPU_MAX_SPEED)
101#define CPU_SPEED_PRINTABLE(x) (CPU_SPEED_PERCENT(x) / 10), \
102 (CPU_SPEED_PERCENT(x) % 10)
103#define CPU_P_CNT_THT_EN (1<<4)
104#define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
105
106#define ACPI_CPU_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */
107#define ACPI_CPU_NOTIFY_CX_STATES 0x81 /* _CST changed. */
108
109#define CPU_QUIRK_NO_C3 0x0001 /* C3-type states are not usable. */
110#define CPU_QUIRK_NO_THROTTLE 0x0002 /* Throttling is not usable. */
111
112#define PCI_VENDOR_INTEL 0x8086
113#define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
114#define PCI_REVISION_A_STEP 0
115#define PCI_REVISION_B_STEP 1
116#define PCI_REVISION_4E 2
117#define PCI_REVISION_4M 3
118
119/* Platform hardware resource information. */
120static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
121static uint8_t cpu_pstate_cnt;/* Register to take over throttling. */
122static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
123static int cpu_rid; /* Driver-wide resource id. */
124static int cpu_quirks; /* Indicate any hardware bugs. */
125
126/* Runtime state. */
127static int cpu_cx_count; /* Number of valid states */
128static int cpu_non_c3; /* Index of lowest non-C3 state. */
129static u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
130
131/* Values for sysctl. */
132static uint32_t cpu_throttle_state;
133static uint32_t cpu_throttle_max;
134static int cpu_cx_lowest;
135static char cpu_cx_supported[64];
136
137static device_t *cpu_devices;
138static int cpu_ndevices;
139static struct acpi_cpu_softc **cpu_softc;
140ACPI_SERIAL_DECL(cpu, "ACPI CPU");
141
142static struct sysctl_ctx_list acpi_cpu_sysctl_ctx;
143static struct sysctl_oid *acpi_cpu_sysctl_tree;
144
145static int acpi_cpu_probe(device_t dev);
146static int acpi_cpu_attach(device_t dev);
147static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id,
148 uint32_t *cpu_id);
149static int acpi_cpu_shutdown(device_t dev);
150static int acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc);
151static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
152static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
153static void acpi_cpu_startup(void *arg);
154static void acpi_cpu_startup_throttling(void);
155static void acpi_cpu_startup_cx(void);
156static void acpi_cpu_throttle_set(uint32_t speed);
157static void acpi_cpu_idle(void);
46#include <sys/rman.h>
47
48#include "acpi.h"
49#include <dev/acpica/acpivar.h>
50
51/*
52 * Support for ACPI Processor devices, including ACPI 2.0 throttling
53 * and C[1-3] sleep states.
54 *
55 * TODO: implement scans of all CPUs to be sure all Cx states are
56 * equivalent.
57 */
58
59/* Hooks for the ACPI CA debugging infrastructure */
60#define _COMPONENT ACPI_PROCESSOR
61ACPI_MODULE_NAME("PROCESSOR")
62
63struct acpi_cx {
64 struct resource *p_lvlx; /* Register to read to enter state. */
65 uint32_t type; /* C1-3 (C4 and up treated as C3). */
66 uint32_t trans_lat; /* Transition latency (usec). */
67 uint32_t power; /* Power consumed (mW). */
68};
69#define MAX_CX_STATES 8
70
71struct acpi_cpu_softc {
72 device_t cpu_dev;
73 ACPI_HANDLE cpu_handle;
74 uint32_t acpi_id; /* ACPI processor id */
75 uint32_t cpu_p_blk; /* ACPI P_BLK location */
76 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
77 struct resource *cpu_p_cnt; /* Throttling control register */
78 struct acpi_cx cpu_cx_states[MAX_CX_STATES];
79 int cpu_cx_count; /* Number of valid Cx states. */
80 int cpu_prev_sleep;/* Last idle sleep duration. */
81};
82
83#define CPU_GET_REG(reg, width) \
84 (bus_space_read_ ## width(rman_get_bustag((reg)), \
85 rman_get_bushandle((reg)), 0))
86#define CPU_SET_REG(reg, width, val) \
87 (bus_space_write_ ## width(rman_get_bustag((reg)), \
88 rman_get_bushandle((reg)), 0, (val)))
89
90/*
91 * Speeds are stored in counts, from 1 to CPU_MAX_SPEED, and
92 * reported to the user in tenths of a percent.
93 */
94static uint32_t cpu_duty_offset;
95static uint32_t cpu_duty_width;
96#define CPU_MAX_SPEED (1 << cpu_duty_width)
97#define CPU_SPEED_PERCENT(x) ((1000 * (x)) / CPU_MAX_SPEED)
98#define CPU_SPEED_PRINTABLE(x) (CPU_SPEED_PERCENT(x) / 10), \
99 (CPU_SPEED_PERCENT(x) % 10)
100#define CPU_P_CNT_THT_EN (1<<4)
101#define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
102
103#define ACPI_CPU_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */
104#define ACPI_CPU_NOTIFY_CX_STATES 0x81 /* _CST changed. */
105
106#define CPU_QUIRK_NO_C3 0x0001 /* C3-type states are not usable. */
107#define CPU_QUIRK_NO_THROTTLE 0x0002 /* Throttling is not usable. */
108
109#define PCI_VENDOR_INTEL 0x8086
110#define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
111#define PCI_REVISION_A_STEP 0
112#define PCI_REVISION_B_STEP 1
113#define PCI_REVISION_4E 2
114#define PCI_REVISION_4M 3
115
116/* Platform hardware resource information. */
117static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
118static uint8_t cpu_pstate_cnt;/* Register to take over throttling. */
119static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
120static int cpu_rid; /* Driver-wide resource id. */
121static int cpu_quirks; /* Indicate any hardware bugs. */
122
123/* Runtime state. */
124static int cpu_cx_count; /* Number of valid states */
125static int cpu_non_c3; /* Index of lowest non-C3 state. */
126static u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
127
128/* Values for sysctl. */
129static uint32_t cpu_throttle_state;
130static uint32_t cpu_throttle_max;
131static int cpu_cx_lowest;
132static char cpu_cx_supported[64];
133
134static device_t *cpu_devices;
135static int cpu_ndevices;
136static struct acpi_cpu_softc **cpu_softc;
137ACPI_SERIAL_DECL(cpu, "ACPI CPU");
138
139static struct sysctl_ctx_list acpi_cpu_sysctl_ctx;
140static struct sysctl_oid *acpi_cpu_sysctl_tree;
141
142static int acpi_cpu_probe(device_t dev);
143static int acpi_cpu_attach(device_t dev);
144static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id,
145 uint32_t *cpu_id);
146static int acpi_cpu_shutdown(device_t dev);
147static int acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc);
148static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
149static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
150static void acpi_cpu_startup(void *arg);
151static void acpi_cpu_startup_throttling(void);
152static void acpi_cpu_startup_cx(void);
153static void acpi_cpu_throttle_set(uint32_t speed);
154static void acpi_cpu_idle(void);
158static void acpi_cpu_c1(void);
159static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
160static int acpi_cpu_quirks(struct acpi_cpu_softc *sc);
161static int acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS);
162static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
163static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
164
165static device_method_t acpi_cpu_methods[] = {
166 /* Device interface */
167 DEVMETHOD(device_probe, acpi_cpu_probe),
168 DEVMETHOD(device_attach, acpi_cpu_attach),
169 DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
170
171 {0, 0}
172};
173
174static driver_t acpi_cpu_driver = {
175 "cpu",
176 acpi_cpu_methods,
177 sizeof(struct acpi_cpu_softc),
178};
179
180static devclass_t acpi_cpu_devclass;
181DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
182MODULE_DEPEND(cpu, acpi, 1, 1, 1);
183
184static int
185acpi_cpu_probe(device_t dev)
186{
187 int acpi_id, cpu_id, cx_count;
188 ACPI_BUFFER buf;
189 ACPI_HANDLE handle;
190 char msg[32];
191 ACPI_OBJECT *obj;
192 ACPI_STATUS status;
193
194 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
195 return (ENXIO);
196
197 handle = acpi_get_handle(dev);
198 if (cpu_softc == NULL)
199 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) *
200 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO);
201
202 /* Get our Processor object. */
203 buf.Pointer = NULL;
204 buf.Length = ACPI_ALLOCATE_BUFFER;
205 status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
206 if (ACPI_FAILURE(status)) {
207 device_printf(dev, "probe failed to get Processor obj - %s\n",
208 AcpiFormatException(status));
209 return (ENXIO);
210 }
211 obj = (ACPI_OBJECT *)buf.Pointer;
212 if (obj->Type != ACPI_TYPE_PROCESSOR) {
213 device_printf(dev, "Processor object has bad type %d\n", obj->Type);
214 AcpiOsFree(obj);
215 return (ENXIO);
216 }
217
218 /*
219 * Find the processor associated with our unit. We could use the
220 * ProcId as a key, however, some boxes do not have the same values
221 * in their Processor object as the ProcId values in the MADT.
222 */
223 acpi_id = obj->Processor.ProcId;
224 AcpiOsFree(obj);
225 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0)
226 return (ENXIO);
227
228 /*
229 * Check if we already probed this processor. We scan the bus twice
230 * so it's possible we've already seen this one.
231 */
232 if (cpu_softc[cpu_id] != NULL)
233 return (ENXIO);
234
235 /* Get a count of Cx states for our device string. */
236 cx_count = 0;
237 buf.Pointer = NULL;
238 buf.Length = ACPI_ALLOCATE_BUFFER;
239 status = AcpiEvaluateObject(handle, "_CST", NULL, &buf);
240 if (ACPI_SUCCESS(status)) {
241 obj = (ACPI_OBJECT *)buf.Pointer;
242 if (ACPI_PKG_VALID(obj, 2))
243 acpi_PkgInt32(obj, 0, &cx_count);
244 AcpiOsFree(obj);
245 } else {
246 if (AcpiGbl_FADT->Plvl2Lat <= 100)
247 cx_count++;
248 if (AcpiGbl_FADT->Plvl3Lat <= 1000)
249 cx_count++;
250 if (cx_count > 0)
251 cx_count++;
252 }
253 if (cx_count > 0)
254 snprintf(msg, sizeof(msg), "ACPI CPU (%d Cx states)", cx_count);
255 else
256 strlcpy(msg, "ACPI CPU", sizeof(msg));
257 device_set_desc_copy(dev, msg);
258
259 /* Mark this processor as in-use and save our derived id for attach. */
260 cpu_softc[cpu_id] = (void *)1;
261 acpi_set_magic(dev, cpu_id);
262
263 return (0);
264}
265
266static int
267acpi_cpu_attach(device_t dev)
268{
269 ACPI_BUFFER buf;
270 ACPI_OBJECT *obj;
271 struct acpi_cpu_softc *sc;
272 struct acpi_softc *acpi_sc;
273 ACPI_STATUS status;
274 int thr_ret, cx_ret;
275
276 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
277
278 sc = device_get_softc(dev);
279 sc->cpu_dev = dev;
280 sc->cpu_handle = acpi_get_handle(dev);
281 cpu_softc[acpi_get_magic(dev)] = sc;
282
283 buf.Pointer = NULL;
284 buf.Length = ACPI_ALLOCATE_BUFFER;
285 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
286 if (ACPI_FAILURE(status)) {
287 device_printf(dev, "attach failed to get Processor obj - %s\n",
288 AcpiFormatException(status));
289 return (ENXIO);
290 }
291 obj = (ACPI_OBJECT *)buf.Pointer;
292 sc->cpu_p_blk = obj->Processor.PblkAddress;
293 sc->cpu_p_blk_len = obj->Processor.PblkLength;
294 sc->acpi_id = obj->Processor.ProcId;
295 AcpiOsFree(obj);
296 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
297 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
298
299 acpi_sc = acpi_device_get_parent_softc(dev);
300 sysctl_ctx_init(&acpi_cpu_sysctl_ctx);
301 acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx,
302 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree),
303 OID_AUTO, "cpu", CTLFLAG_RD, 0, "");
304
305 /* If this is the first device probed, check for quirks. */
306 if (device_get_unit(dev) == 0)
307 acpi_cpu_quirks(sc);
308
309 /*
310 * Probe for throttling and Cx state support.
311 * If none of these is present, free up unused resources.
312 */
313 thr_ret = acpi_cpu_throttle_probe(sc);
314 cx_ret = acpi_cpu_cx_probe(sc);
315 if (thr_ret == 0 || cx_ret == 0) {
316 status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
317 acpi_cpu_notify, sc);
318 if (device_get_unit(dev) == 0)
319 AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_cpu_startup, NULL);
320 } else {
321 sysctl_ctx_free(&acpi_cpu_sysctl_ctx);
322 }
323
324 return_VALUE (0);
325}
326
327/*
328 * Find the nth present CPU and return its pc_cpuid as well as set the
329 * pc_acpi_id from the most reliable source.
330 */
331static int
332acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id)
333{
334 struct pcpu *pcpu_data;
335 uint32_t i;
336
337 KASSERT(acpi_id != NULL, ("Null acpi_id"));
338 KASSERT(cpu_id != NULL, ("Null cpu_id"));
339 for (i = 0; i <= mp_maxid; i++) {
340 if (CPU_ABSENT(i))
341 continue;
342 pcpu_data = pcpu_find(i);
343 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i));
344 if (idx-- == 0) {
345 /*
346 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box)
347 * override it with the value from the ASL. Otherwise, if the
348 * two don't match, prefer the MADT-derived value. Finally,
349 * return the pc_cpuid to reference this processor.
350 */
351 if (pcpu_data->pc_acpi_id == 0xffffffff)
352 pcpu_data->pc_acpi_id = *acpi_id;
353 else if (pcpu_data->pc_acpi_id != *acpi_id)
354 *acpi_id = pcpu_data->pc_acpi_id;
355 *cpu_id = pcpu_data->pc_cpuid;
356 return (0);
357 }
358 }
359
360 return (ESRCH);
361}
362
363static int
364acpi_cpu_shutdown(device_t dev)
365{
366 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
367
368 /* Disable any entry to the idle function. */
369 cpu_cx_count = 0;
370
371 /* Signal and wait for all processors to exit acpi_cpu_idle(). */
372 smp_rendezvous(NULL, NULL, NULL, NULL);
373
374 return_VALUE (0);
375}
376
377static int
378acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc)
379{
380 uint32_t duty_end;
381 ACPI_BUFFER buf;
382 ACPI_OBJECT obj;
383 ACPI_GENERIC_ADDRESS gas;
384 ACPI_STATUS status;
385
386 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
387
388 /* Get throttling parameters from the FADT. 0 means not supported. */
389 if (device_get_unit(sc->cpu_dev) == 0) {
390 cpu_smi_cmd = AcpiGbl_FADT->SmiCmd;
391 cpu_pstate_cnt = AcpiGbl_FADT->PstateCnt;
392 cpu_cst_cnt = AcpiGbl_FADT->CstCnt;
393 cpu_duty_offset = AcpiGbl_FADT->DutyOffset;
394 cpu_duty_width = AcpiGbl_FADT->DutyWidth;
395 }
396 if (cpu_duty_width == 0 || (cpu_quirks & CPU_QUIRK_NO_THROTTLE) != 0)
397 return (ENXIO);
398
399 /* Validate the duty offset/width. */
400 duty_end = cpu_duty_offset + cpu_duty_width - 1;
401 if (duty_end > 31) {
402 device_printf(sc->cpu_dev, "CLK_VAL field overflows P_CNT register\n");
403 return (ENXIO);
404 }
405 if (cpu_duty_offset <= 4 && duty_end >= 4) {
406 device_printf(sc->cpu_dev, "CLK_VAL field overlaps THT_EN bit\n");
407 return (ENXIO);
408 }
409
410 /*
411 * If not present, fall back to using the processor's P_BLK to find
412 * the P_CNT register.
413 *
414 * Note that some systems seem to duplicate the P_BLK pointer
415 * across multiple CPUs, so not getting the resource is not fatal.
416 */
417 buf.Pointer = &obj;
418 buf.Length = sizeof(obj);
419 status = AcpiEvaluateObject(sc->cpu_handle, "_PTC", NULL, &buf);
420 if (ACPI_SUCCESS(status)) {
421 if (obj.Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) {
422 device_printf(sc->cpu_dev, "_PTC buffer too small\n");
423 return (ENXIO);
424 }
425 memcpy(&gas, obj.Buffer.Pointer + 3, sizeof(gas));
426 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
427 if (sc->cpu_p_cnt != NULL) {
428 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from _PTC\n",
429 device_get_unit(sc->cpu_dev)));
430 }
431 }
432
433 /* If _PTC not present or other failure, try the P_BLK. */
434 if (sc->cpu_p_cnt == NULL) {
435 /*
436 * The spec says P_BLK must be 6 bytes long. However, some
437 * systems use it to indicate a fractional set of features
438 * present so we take anything >= 4.
439 */
440 if (sc->cpu_p_blk_len < 4)
441 return (ENXIO);
442 gas.Address = sc->cpu_p_blk;
443 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
444 gas.RegisterBitWidth = 32;
445 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
446 if (sc->cpu_p_cnt != NULL) {
447 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from P_BLK\n",
448 device_get_unit(sc->cpu_dev)));
449 } else {
450 device_printf(sc->cpu_dev, "Failed to attach throttling P_CNT\n");
451 return (ENXIO);
452 }
453 }
454 cpu_rid++;
455
456 return (0);
457}
458
459static int
460acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
461{
462 ACPI_GENERIC_ADDRESS gas;
463 struct acpi_cx *cx_ptr;
464 int error;
465
466 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
467
468 /* Bus mastering arbitration control is needed for C3. */
469 if (AcpiGbl_FADT->V1_Pm2CntBlk == 0 || AcpiGbl_FADT->Pm2CntLen == 0) {
470 cpu_quirks |= CPU_QUIRK_NO_C3;
471 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
472 "acpi_cpu%d: No BM control, C3 disabled\n",
473 device_get_unit(sc->cpu_dev)));
474 }
475
476 /*
477 * First, check for the ACPI 2.0 _CST sleep states object.
478 * If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3.
479 */
480 sc->cpu_cx_count = 0;
481 error = acpi_cpu_cx_cst(sc);
482 if (error != 0) {
483 cx_ptr = sc->cpu_cx_states;
484
485 /* C1 has been required since just after ACPI 1.0 */
486 cx_ptr->type = ACPI_STATE_C1;
487 cx_ptr->trans_lat = 0;
488 cpu_non_c3 = 0;
489 cx_ptr++;
490 sc->cpu_cx_count++;
491
492 /*
493 * The spec says P_BLK must be 6 bytes long. However, some systems
494 * use it to indicate a fractional set of features present so we
495 * take 5 as C2. Some may also have a value of 7 to indicate
496 * another C3 but most use _CST for this (as required) and having
497 * "only" C1-C3 is not a hardship.
498 */
499 if (sc->cpu_p_blk_len < 5)
500 goto done;
501
502 /* Validate and allocate resources for C2 (P_LVL2). */
503 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
504 gas.RegisterBitWidth = 8;
505 if (AcpiGbl_FADT->Plvl2Lat <= 100) {
506 gas.Address = sc->cpu_p_blk + 4;
507 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
508 if (cx_ptr->p_lvlx != NULL) {
509 cpu_rid++;
510 cx_ptr->type = ACPI_STATE_C2;
511 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl2Lat;
512 cpu_non_c3 = 1;
513 cx_ptr++;
514 sc->cpu_cx_count++;
515 }
516 }
517 if (sc->cpu_p_blk_len < 6)
518 goto done;
519
520 /* Validate and allocate resources for C3 (P_LVL3). */
521 if (AcpiGbl_FADT->Plvl3Lat <= 1000 &&
522 (cpu_quirks & CPU_QUIRK_NO_C3) == 0) {
523
524 gas.Address = sc->cpu_p_blk + 5;
525 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
526 if (cx_ptr->p_lvlx != NULL) {
527 cpu_rid++;
528 cx_ptr->type = ACPI_STATE_C3;
529 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl3Lat;
530 cx_ptr++;
531 sc->cpu_cx_count++;
532 }
533 }
534 }
535
536done:
537 /* If no valid registers were found, don't attach. */
538 if (sc->cpu_cx_count == 0)
539 return (ENXIO);
540
541 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
542 sc->cpu_prev_sleep = 1000000;
543
544 return (0);
545}
546
547/*
548 * Parse a _CST package and set up its Cx states. Since the _CST object
549 * can change dynamically, our notify handler may call this function
550 * to clean up and probe the new _CST package.
551 */
552static int
553acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
554{
555 struct acpi_cx *cx_ptr;
556 ACPI_STATUS status;
557 ACPI_BUFFER buf;
558 ACPI_OBJECT *top;
559 ACPI_OBJECT *pkg;
560 uint32_t count;
561 int i;
562
563 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
564
565 buf.Pointer = NULL;
566 buf.Length = ACPI_ALLOCATE_BUFFER;
567 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
568 if (ACPI_FAILURE(status))
569 return (ENXIO);
570
571 /* _CST is a package with a count and at least one Cx package. */
572 top = (ACPI_OBJECT *)buf.Pointer;
573 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
574 device_printf(sc->cpu_dev, "Invalid _CST package\n");
575 AcpiOsFree(buf.Pointer);
576 return (ENXIO);
577 }
578 if (count != top->Package.Count - 1) {
579 device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n",
580 count, top->Package.Count - 1);
581 count = top->Package.Count - 1;
582 }
583 if (count > MAX_CX_STATES) {
584 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
585 count = MAX_CX_STATES;
586 }
587
588 /* Set up all valid states. */
589 sc->cpu_cx_count = 0;
590 cx_ptr = sc->cpu_cx_states;
591 for (i = 0; i < count; i++) {
592 pkg = &top->Package.Elements[i + 1];
593 if (!ACPI_PKG_VALID(pkg, 4) ||
594 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
595 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
596 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
597
598 device_printf(sc->cpu_dev, "Skipping invalid Cx state package\n");
599 continue;
600 }
601
602 /* Validate the state to see if we should use it. */
603 switch (cx_ptr->type) {
604 case ACPI_STATE_C1:
605 cpu_non_c3 = i;
606 cx_ptr++;
607 sc->cpu_cx_count++;
608 continue;
609 case ACPI_STATE_C2:
610 if (cx_ptr->trans_lat > 100) {
611 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
612 "acpi_cpu%d: C2[%d] not available.\n",
613 device_get_unit(sc->cpu_dev), i));
614 continue;
615 }
616 cpu_non_c3 = i;
617 break;
618 case ACPI_STATE_C3:
619 default:
620 if (cx_ptr->trans_lat > 1000 ||
621 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
622
623 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
624 "acpi_cpu%d: C3[%d] not available.\n",
625 device_get_unit(sc->cpu_dev), i));
626 continue;
627 }
628 break;
629 }
630
631#ifdef notyet
632 /* Free up any previous register. */
633 if (cx_ptr->p_lvlx != NULL) {
634 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
635 cx_ptr->p_lvlx = NULL;
636 }
637#endif
638
639 /* Allocate the control register for C2 or C3. */
640 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cpu_rid, &cx_ptr->p_lvlx);
641 if (cx_ptr->p_lvlx != NULL) {
642 cpu_rid++;
643 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
644 "acpi_cpu%d: Got C%d - %d latency\n",
645 device_get_unit(sc->cpu_dev), cx_ptr->type,
646 cx_ptr->trans_lat));
647 cx_ptr++;
648 sc->cpu_cx_count++;
649 }
650 }
651 AcpiOsFree(buf.Pointer);
652
653 return (0);
654}
655
656/*
657 * Call this *after* all CPUs have been attached.
658 */
659static void
660acpi_cpu_startup(void *arg)
661{
662 struct acpi_cpu_softc *sc;
663 int count, i;
664
665 /* Get set of CPU devices */
666 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
667
668 /*
669 * Make sure all the processors' Cx counts match. We should probably
670 * also check the contents of each. However, no known systems have
671 * non-matching Cx counts so we'll deal with this later.
672 */
673 count = MAX_CX_STATES;
674 for (i = 0; i < cpu_ndevices; i++) {
675 sc = device_get_softc(cpu_devices[i]);
676 count = min(sc->cpu_cx_count, count);
677 }
678 cpu_cx_count = count;
679
680 /* Perform throttling and Cx final initialization. */
681 sc = device_get_softc(cpu_devices[0]);
682 if (sc->cpu_p_cnt != NULL)
683 acpi_cpu_startup_throttling();
684 if (cpu_cx_count > 0)
685 acpi_cpu_startup_cx();
686}
687
688/*
689 * Takes the ACPI lock to avoid fighting anyone over the SMI command
690 * port.
691 */
692static void
693acpi_cpu_startup_throttling()
694{
695
696 /* Initialise throttling states */
697 cpu_throttle_max = CPU_MAX_SPEED;
698 cpu_throttle_state = CPU_MAX_SPEED;
699
700 SYSCTL_ADD_INT(&acpi_cpu_sysctl_ctx,
701 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
702 OID_AUTO, "throttle_max", CTLFLAG_RD,
703 &cpu_throttle_max, 0, "maximum CPU speed");
704 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
705 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
706 OID_AUTO, "throttle_state",
707 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_state,
708 0, acpi_cpu_throttle_sysctl, "I", "current CPU speed");
709
710 /* If ACPI 2.0+, signal platform that we are taking over throttling. */
711 if (cpu_pstate_cnt != 0) {
712 ACPI_LOCK(acpi);
713 AcpiOsWritePort(cpu_smi_cmd, cpu_pstate_cnt, 8);
714 ACPI_UNLOCK(acpi);
715 }
716
717 /* Set initial speed to maximum. */
718 ACPI_SERIAL_BEGIN(cpu);
719 acpi_cpu_throttle_set(cpu_throttle_max);
720 ACPI_SERIAL_END(cpu);
721
722 printf("acpi_cpu: throttling enabled, %d steps (100%% to %d.%d%%), "
723 "currently %d.%d%%\n", CPU_MAX_SPEED, CPU_SPEED_PRINTABLE(1),
724 CPU_SPEED_PRINTABLE(cpu_throttle_state));
725}
726
727static void
728acpi_cpu_startup_cx()
729{
730 struct acpi_cpu_softc *sc;
731 struct sbuf sb;
732 int i;
733
734 sc = device_get_softc(cpu_devices[0]);
735 sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN);
736 for (i = 0; i < cpu_cx_count; i++)
737 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
738 sbuf_trim(&sb);
739 sbuf_finish(&sb);
740 SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx,
741 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
742 OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported,
743 0, "Cx/microsecond values for supported Cx states");
744 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
745 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
746 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
747 NULL, 0, acpi_cpu_cx_lowest_sysctl, "A",
748 "lowest Cx sleep state to use");
749 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
750 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
751 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
752 NULL, 0, acpi_cpu_usage_sysctl, "A",
753 "percent usage for each Cx state");
754
755#ifdef notyet
756 /* Signal platform that we can handle _CST notification. */
757 if (cpu_cst_cnt != 0) {
758 ACPI_LOCK(acpi);
759 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
760 ACPI_UNLOCK(acpi);
761 }
762#endif
763
764 /* Take over idling from cpu_idle_default(). */
765 cpu_idle_hook = acpi_cpu_idle;
766}
767
768/*
769 * Set CPUs to the new state.
770 *
771 * Must be called with the ACPI lock held.
772 */
773static void
774acpi_cpu_throttle_set(uint32_t speed)
775{
776 struct acpi_cpu_softc *sc;
777 int i;
778 uint32_t p_cnt, clk_val;
779
780 ACPI_SERIAL_ASSERT(cpu);
781
782 /* Iterate over processors */
783 for (i = 0; i < cpu_ndevices; i++) {
784 sc = device_get_softc(cpu_devices[i]);
785 if (sc->cpu_p_cnt == NULL)
786 continue;
787
788 /* Get the current P_CNT value and disable throttling */
789 p_cnt = CPU_GET_REG(sc->cpu_p_cnt, 4);
790 p_cnt &= ~CPU_P_CNT_THT_EN;
791 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
792
793 /* If we're at maximum speed, that's all */
794 if (speed < CPU_MAX_SPEED) {
795 /* Mask the old CLK_VAL off and or-in the new value */
796 clk_val = (CPU_MAX_SPEED - 1) << cpu_duty_offset;
797 p_cnt &= ~clk_val;
798 p_cnt |= (speed << cpu_duty_offset);
799
800 /* Write the new P_CNT value and then enable throttling */
801 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
802 p_cnt |= CPU_P_CNT_THT_EN;
803 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
804 }
805 ACPI_VPRINT(sc->cpu_dev, acpi_device_get_parent_softc(sc->cpu_dev),
806 "set speed to %d.%d%%\n", CPU_SPEED_PRINTABLE(speed));
807 }
808 cpu_throttle_state = speed;
809}
810
811/*
812 * Idle the CPU in the lowest state possible. This function is called with
813 * interrupts disabled. Note that once it re-enables interrupts, a task
814 * switch can occur so do not access shared data (i.e. the softc) after
815 * interrupts are re-enabled.
816 */
817static void
818acpi_cpu_idle()
819{
820 struct acpi_cpu_softc *sc;
821 struct acpi_cx *cx_next;
822 uint32_t start_time, end_time;
823 int bm_active, cx_next_idx, i;
824
825 /* If disabled, return immediately. */
826 if (cpu_cx_count == 0) {
827 ACPI_ENABLE_IRQS();
828 return;
829 }
830
831 /*
832 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
833 * since there is no ACPI processor object for this CPU. This occurs
834 * for logical CPUs in the HTT case.
835 */
836 sc = cpu_softc[PCPU_GET(cpuid)];
837 if (sc == NULL) {
838 acpi_cpu_c1();
839 return;
840 }
841
842 /*
843 * If we slept 100 us or more, use the lowest Cx state. Otherwise,
844 * find the lowest state that has a latency less than or equal to
845 * the length of our last sleep.
846 */
847 cx_next_idx = cpu_cx_lowest;
848 if (sc->cpu_prev_sleep < 100)
849 for (i = cpu_cx_lowest; i >= 0; i--)
850 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) {
851 cx_next_idx = i;
852 break;
853 }
854
855 /*
856 * Check for bus master activity. If there was activity, clear
857 * the bit and use the lowest non-C3 state. Note that the USB
858 * driver polling for new devices keeps this bit set all the
859 * time if USB is loaded.
860 */
861 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active,
862 ACPI_MTX_DO_NOT_LOCK);
863 if (bm_active != 0) {
864 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1,
865 ACPI_MTX_DO_NOT_LOCK);
866 cx_next_idx = min(cx_next_idx, cpu_non_c3);
867 }
868
869 /* Select the next state and update statistics. */
870 cx_next = &sc->cpu_cx_states[cx_next_idx];
871 cpu_cx_stats[cx_next_idx]++;
872 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
873
874 /*
875 * Execute HLT (or equivalent) and wait for an interrupt. We can't
876 * calculate the time spent in C1 since the place we wake up is an
877 * ISR. Assume we slept one quantum and return.
878 */
879 if (cx_next->type == ACPI_STATE_C1) {
880 sc->cpu_prev_sleep = 1000000 / hz;
881 acpi_cpu_c1();
882 return;
883 }
884
885 /* For C3, disable bus master arbitration and enable bus master wake. */
886 if (cx_next->type == ACPI_STATE_C3) {
887 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK);
888 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1, ACPI_MTX_DO_NOT_LOCK);
889 }
890
891 /*
892 * Read from P_LVLx to enter C2(+), checking time spent asleep.
893 * Use the ACPI timer for measuring sleep time. Since we need to
894 * get the time very close to the CPU start/stop clock logic, this
895 * is the only reliable time source.
896 */
897 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk);
898 CPU_GET_REG(cx_next->p_lvlx, 1);
899
900 /*
901 * Read the end time twice. Since it may take an arbitrary time
902 * to enter the idle state, the first read may be executed before
903 * the processor has stopped. Doing it again provides enough
904 * margin that we are certain to have a correct value.
905 */
906 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
907 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
908
909 /* Enable bus master arbitration and disable bus master wakeup. */
910 if (cx_next->type == ACPI_STATE_C3) {
911 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK);
912 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK);
913 }
914
915 /* Find the actual time asleep in microseconds, minus overhead. */
916 end_time = acpi_TimerDelta(end_time, start_time);
917 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat;
918 ACPI_ENABLE_IRQS();
919}
920
155static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
156static int acpi_cpu_quirks(struct acpi_cpu_softc *sc);
157static int acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS);
158static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
159static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
160
161static device_method_t acpi_cpu_methods[] = {
162 /* Device interface */
163 DEVMETHOD(device_probe, acpi_cpu_probe),
164 DEVMETHOD(device_attach, acpi_cpu_attach),
165 DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
166
167 {0, 0}
168};
169
170static driver_t acpi_cpu_driver = {
171 "cpu",
172 acpi_cpu_methods,
173 sizeof(struct acpi_cpu_softc),
174};
175
176static devclass_t acpi_cpu_devclass;
177DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
178MODULE_DEPEND(cpu, acpi, 1, 1, 1);
179
180static int
181acpi_cpu_probe(device_t dev)
182{
183 int acpi_id, cpu_id, cx_count;
184 ACPI_BUFFER buf;
185 ACPI_HANDLE handle;
186 char msg[32];
187 ACPI_OBJECT *obj;
188 ACPI_STATUS status;
189
190 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
191 return (ENXIO);
192
193 handle = acpi_get_handle(dev);
194 if (cpu_softc == NULL)
195 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) *
196 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO);
197
198 /* Get our Processor object. */
199 buf.Pointer = NULL;
200 buf.Length = ACPI_ALLOCATE_BUFFER;
201 status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
202 if (ACPI_FAILURE(status)) {
203 device_printf(dev, "probe failed to get Processor obj - %s\n",
204 AcpiFormatException(status));
205 return (ENXIO);
206 }
207 obj = (ACPI_OBJECT *)buf.Pointer;
208 if (obj->Type != ACPI_TYPE_PROCESSOR) {
209 device_printf(dev, "Processor object has bad type %d\n", obj->Type);
210 AcpiOsFree(obj);
211 return (ENXIO);
212 }
213
214 /*
215 * Find the processor associated with our unit. We could use the
216 * ProcId as a key, however, some boxes do not have the same values
217 * in their Processor object as the ProcId values in the MADT.
218 */
219 acpi_id = obj->Processor.ProcId;
220 AcpiOsFree(obj);
221 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0)
222 return (ENXIO);
223
224 /*
225 * Check if we already probed this processor. We scan the bus twice
226 * so it's possible we've already seen this one.
227 */
228 if (cpu_softc[cpu_id] != NULL)
229 return (ENXIO);
230
231 /* Get a count of Cx states for our device string. */
232 cx_count = 0;
233 buf.Pointer = NULL;
234 buf.Length = ACPI_ALLOCATE_BUFFER;
235 status = AcpiEvaluateObject(handle, "_CST", NULL, &buf);
236 if (ACPI_SUCCESS(status)) {
237 obj = (ACPI_OBJECT *)buf.Pointer;
238 if (ACPI_PKG_VALID(obj, 2))
239 acpi_PkgInt32(obj, 0, &cx_count);
240 AcpiOsFree(obj);
241 } else {
242 if (AcpiGbl_FADT->Plvl2Lat <= 100)
243 cx_count++;
244 if (AcpiGbl_FADT->Plvl3Lat <= 1000)
245 cx_count++;
246 if (cx_count > 0)
247 cx_count++;
248 }
249 if (cx_count > 0)
250 snprintf(msg, sizeof(msg), "ACPI CPU (%d Cx states)", cx_count);
251 else
252 strlcpy(msg, "ACPI CPU", sizeof(msg));
253 device_set_desc_copy(dev, msg);
254
255 /* Mark this processor as in-use and save our derived id for attach. */
256 cpu_softc[cpu_id] = (void *)1;
257 acpi_set_magic(dev, cpu_id);
258
259 return (0);
260}
261
262static int
263acpi_cpu_attach(device_t dev)
264{
265 ACPI_BUFFER buf;
266 ACPI_OBJECT *obj;
267 struct acpi_cpu_softc *sc;
268 struct acpi_softc *acpi_sc;
269 ACPI_STATUS status;
270 int thr_ret, cx_ret;
271
272 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
273
274 sc = device_get_softc(dev);
275 sc->cpu_dev = dev;
276 sc->cpu_handle = acpi_get_handle(dev);
277 cpu_softc[acpi_get_magic(dev)] = sc;
278
279 buf.Pointer = NULL;
280 buf.Length = ACPI_ALLOCATE_BUFFER;
281 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
282 if (ACPI_FAILURE(status)) {
283 device_printf(dev, "attach failed to get Processor obj - %s\n",
284 AcpiFormatException(status));
285 return (ENXIO);
286 }
287 obj = (ACPI_OBJECT *)buf.Pointer;
288 sc->cpu_p_blk = obj->Processor.PblkAddress;
289 sc->cpu_p_blk_len = obj->Processor.PblkLength;
290 sc->acpi_id = obj->Processor.ProcId;
291 AcpiOsFree(obj);
292 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
293 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
294
295 acpi_sc = acpi_device_get_parent_softc(dev);
296 sysctl_ctx_init(&acpi_cpu_sysctl_ctx);
297 acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx,
298 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree),
299 OID_AUTO, "cpu", CTLFLAG_RD, 0, "");
300
301 /* If this is the first device probed, check for quirks. */
302 if (device_get_unit(dev) == 0)
303 acpi_cpu_quirks(sc);
304
305 /*
306 * Probe for throttling and Cx state support.
307 * If none of these is present, free up unused resources.
308 */
309 thr_ret = acpi_cpu_throttle_probe(sc);
310 cx_ret = acpi_cpu_cx_probe(sc);
311 if (thr_ret == 0 || cx_ret == 0) {
312 status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
313 acpi_cpu_notify, sc);
314 if (device_get_unit(dev) == 0)
315 AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_cpu_startup, NULL);
316 } else {
317 sysctl_ctx_free(&acpi_cpu_sysctl_ctx);
318 }
319
320 return_VALUE (0);
321}
322
323/*
324 * Find the nth present CPU and return its pc_cpuid as well as set the
325 * pc_acpi_id from the most reliable source.
326 */
327static int
328acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id)
329{
330 struct pcpu *pcpu_data;
331 uint32_t i;
332
333 KASSERT(acpi_id != NULL, ("Null acpi_id"));
334 KASSERT(cpu_id != NULL, ("Null cpu_id"));
335 for (i = 0; i <= mp_maxid; i++) {
336 if (CPU_ABSENT(i))
337 continue;
338 pcpu_data = pcpu_find(i);
339 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i));
340 if (idx-- == 0) {
341 /*
342 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box)
343 * override it with the value from the ASL. Otherwise, if the
344 * two don't match, prefer the MADT-derived value. Finally,
345 * return the pc_cpuid to reference this processor.
346 */
347 if (pcpu_data->pc_acpi_id == 0xffffffff)
348 pcpu_data->pc_acpi_id = *acpi_id;
349 else if (pcpu_data->pc_acpi_id != *acpi_id)
350 *acpi_id = pcpu_data->pc_acpi_id;
351 *cpu_id = pcpu_data->pc_cpuid;
352 return (0);
353 }
354 }
355
356 return (ESRCH);
357}
358
359static int
360acpi_cpu_shutdown(device_t dev)
361{
362 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
363
364 /* Disable any entry to the idle function. */
365 cpu_cx_count = 0;
366
367 /* Signal and wait for all processors to exit acpi_cpu_idle(). */
368 smp_rendezvous(NULL, NULL, NULL, NULL);
369
370 return_VALUE (0);
371}
372
373static int
374acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc)
375{
376 uint32_t duty_end;
377 ACPI_BUFFER buf;
378 ACPI_OBJECT obj;
379 ACPI_GENERIC_ADDRESS gas;
380 ACPI_STATUS status;
381
382 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
383
384 /* Get throttling parameters from the FADT. 0 means not supported. */
385 if (device_get_unit(sc->cpu_dev) == 0) {
386 cpu_smi_cmd = AcpiGbl_FADT->SmiCmd;
387 cpu_pstate_cnt = AcpiGbl_FADT->PstateCnt;
388 cpu_cst_cnt = AcpiGbl_FADT->CstCnt;
389 cpu_duty_offset = AcpiGbl_FADT->DutyOffset;
390 cpu_duty_width = AcpiGbl_FADT->DutyWidth;
391 }
392 if (cpu_duty_width == 0 || (cpu_quirks & CPU_QUIRK_NO_THROTTLE) != 0)
393 return (ENXIO);
394
395 /* Validate the duty offset/width. */
396 duty_end = cpu_duty_offset + cpu_duty_width - 1;
397 if (duty_end > 31) {
398 device_printf(sc->cpu_dev, "CLK_VAL field overflows P_CNT register\n");
399 return (ENXIO);
400 }
401 if (cpu_duty_offset <= 4 && duty_end >= 4) {
402 device_printf(sc->cpu_dev, "CLK_VAL field overlaps THT_EN bit\n");
403 return (ENXIO);
404 }
405
406 /*
407 * If not present, fall back to using the processor's P_BLK to find
408 * the P_CNT register.
409 *
410 * Note that some systems seem to duplicate the P_BLK pointer
411 * across multiple CPUs, so not getting the resource is not fatal.
412 */
413 buf.Pointer = &obj;
414 buf.Length = sizeof(obj);
415 status = AcpiEvaluateObject(sc->cpu_handle, "_PTC", NULL, &buf);
416 if (ACPI_SUCCESS(status)) {
417 if (obj.Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) {
418 device_printf(sc->cpu_dev, "_PTC buffer too small\n");
419 return (ENXIO);
420 }
421 memcpy(&gas, obj.Buffer.Pointer + 3, sizeof(gas));
422 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
423 if (sc->cpu_p_cnt != NULL) {
424 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from _PTC\n",
425 device_get_unit(sc->cpu_dev)));
426 }
427 }
428
429 /* If _PTC not present or other failure, try the P_BLK. */
430 if (sc->cpu_p_cnt == NULL) {
431 /*
432 * The spec says P_BLK must be 6 bytes long. However, some
433 * systems use it to indicate a fractional set of features
434 * present so we take anything >= 4.
435 */
436 if (sc->cpu_p_blk_len < 4)
437 return (ENXIO);
438 gas.Address = sc->cpu_p_blk;
439 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
440 gas.RegisterBitWidth = 32;
441 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
442 if (sc->cpu_p_cnt != NULL) {
443 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from P_BLK\n",
444 device_get_unit(sc->cpu_dev)));
445 } else {
446 device_printf(sc->cpu_dev, "Failed to attach throttling P_CNT\n");
447 return (ENXIO);
448 }
449 }
450 cpu_rid++;
451
452 return (0);
453}
454
455static int
456acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
457{
458 ACPI_GENERIC_ADDRESS gas;
459 struct acpi_cx *cx_ptr;
460 int error;
461
462 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
463
464 /* Bus mastering arbitration control is needed for C3. */
465 if (AcpiGbl_FADT->V1_Pm2CntBlk == 0 || AcpiGbl_FADT->Pm2CntLen == 0) {
466 cpu_quirks |= CPU_QUIRK_NO_C3;
467 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
468 "acpi_cpu%d: No BM control, C3 disabled\n",
469 device_get_unit(sc->cpu_dev)));
470 }
471
472 /*
473 * First, check for the ACPI 2.0 _CST sleep states object.
474 * If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3.
475 */
476 sc->cpu_cx_count = 0;
477 error = acpi_cpu_cx_cst(sc);
478 if (error != 0) {
479 cx_ptr = sc->cpu_cx_states;
480
481 /* C1 has been required since just after ACPI 1.0 */
482 cx_ptr->type = ACPI_STATE_C1;
483 cx_ptr->trans_lat = 0;
484 cpu_non_c3 = 0;
485 cx_ptr++;
486 sc->cpu_cx_count++;
487
488 /*
489 * The spec says P_BLK must be 6 bytes long. However, some systems
490 * use it to indicate a fractional set of features present so we
491 * take 5 as C2. Some may also have a value of 7 to indicate
492 * another C3 but most use _CST for this (as required) and having
493 * "only" C1-C3 is not a hardship.
494 */
495 if (sc->cpu_p_blk_len < 5)
496 goto done;
497
498 /* Validate and allocate resources for C2 (P_LVL2). */
499 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
500 gas.RegisterBitWidth = 8;
501 if (AcpiGbl_FADT->Plvl2Lat <= 100) {
502 gas.Address = sc->cpu_p_blk + 4;
503 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
504 if (cx_ptr->p_lvlx != NULL) {
505 cpu_rid++;
506 cx_ptr->type = ACPI_STATE_C2;
507 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl2Lat;
508 cpu_non_c3 = 1;
509 cx_ptr++;
510 sc->cpu_cx_count++;
511 }
512 }
513 if (sc->cpu_p_blk_len < 6)
514 goto done;
515
516 /* Validate and allocate resources for C3 (P_LVL3). */
517 if (AcpiGbl_FADT->Plvl3Lat <= 1000 &&
518 (cpu_quirks & CPU_QUIRK_NO_C3) == 0) {
519
520 gas.Address = sc->cpu_p_blk + 5;
521 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
522 if (cx_ptr->p_lvlx != NULL) {
523 cpu_rid++;
524 cx_ptr->type = ACPI_STATE_C3;
525 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl3Lat;
526 cx_ptr++;
527 sc->cpu_cx_count++;
528 }
529 }
530 }
531
532done:
533 /* If no valid registers were found, don't attach. */
534 if (sc->cpu_cx_count == 0)
535 return (ENXIO);
536
537 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
538 sc->cpu_prev_sleep = 1000000;
539
540 return (0);
541}
542
543/*
544 * Parse a _CST package and set up its Cx states. Since the _CST object
545 * can change dynamically, our notify handler may call this function
546 * to clean up and probe the new _CST package.
547 */
548static int
549acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
550{
551 struct acpi_cx *cx_ptr;
552 ACPI_STATUS status;
553 ACPI_BUFFER buf;
554 ACPI_OBJECT *top;
555 ACPI_OBJECT *pkg;
556 uint32_t count;
557 int i;
558
559 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
560
561 buf.Pointer = NULL;
562 buf.Length = ACPI_ALLOCATE_BUFFER;
563 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
564 if (ACPI_FAILURE(status))
565 return (ENXIO);
566
567 /* _CST is a package with a count and at least one Cx package. */
568 top = (ACPI_OBJECT *)buf.Pointer;
569 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
570 device_printf(sc->cpu_dev, "Invalid _CST package\n");
571 AcpiOsFree(buf.Pointer);
572 return (ENXIO);
573 }
574 if (count != top->Package.Count - 1) {
575 device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n",
576 count, top->Package.Count - 1);
577 count = top->Package.Count - 1;
578 }
579 if (count > MAX_CX_STATES) {
580 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
581 count = MAX_CX_STATES;
582 }
583
584 /* Set up all valid states. */
585 sc->cpu_cx_count = 0;
586 cx_ptr = sc->cpu_cx_states;
587 for (i = 0; i < count; i++) {
588 pkg = &top->Package.Elements[i + 1];
589 if (!ACPI_PKG_VALID(pkg, 4) ||
590 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
591 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
592 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
593
594 device_printf(sc->cpu_dev, "Skipping invalid Cx state package\n");
595 continue;
596 }
597
598 /* Validate the state to see if we should use it. */
599 switch (cx_ptr->type) {
600 case ACPI_STATE_C1:
601 cpu_non_c3 = i;
602 cx_ptr++;
603 sc->cpu_cx_count++;
604 continue;
605 case ACPI_STATE_C2:
606 if (cx_ptr->trans_lat > 100) {
607 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
608 "acpi_cpu%d: C2[%d] not available.\n",
609 device_get_unit(sc->cpu_dev), i));
610 continue;
611 }
612 cpu_non_c3 = i;
613 break;
614 case ACPI_STATE_C3:
615 default:
616 if (cx_ptr->trans_lat > 1000 ||
617 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
618
619 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
620 "acpi_cpu%d: C3[%d] not available.\n",
621 device_get_unit(sc->cpu_dev), i));
622 continue;
623 }
624 break;
625 }
626
627#ifdef notyet
628 /* Free up any previous register. */
629 if (cx_ptr->p_lvlx != NULL) {
630 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
631 cx_ptr->p_lvlx = NULL;
632 }
633#endif
634
635 /* Allocate the control register for C2 or C3. */
636 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cpu_rid, &cx_ptr->p_lvlx);
637 if (cx_ptr->p_lvlx != NULL) {
638 cpu_rid++;
639 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
640 "acpi_cpu%d: Got C%d - %d latency\n",
641 device_get_unit(sc->cpu_dev), cx_ptr->type,
642 cx_ptr->trans_lat));
643 cx_ptr++;
644 sc->cpu_cx_count++;
645 }
646 }
647 AcpiOsFree(buf.Pointer);
648
649 return (0);
650}
651
652/*
653 * Call this *after* all CPUs have been attached.
654 */
655static void
656acpi_cpu_startup(void *arg)
657{
658 struct acpi_cpu_softc *sc;
659 int count, i;
660
661 /* Get set of CPU devices */
662 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
663
664 /*
665 * Make sure all the processors' Cx counts match. We should probably
666 * also check the contents of each. However, no known systems have
667 * non-matching Cx counts so we'll deal with this later.
668 */
669 count = MAX_CX_STATES;
670 for (i = 0; i < cpu_ndevices; i++) {
671 sc = device_get_softc(cpu_devices[i]);
672 count = min(sc->cpu_cx_count, count);
673 }
674 cpu_cx_count = count;
675
676 /* Perform throttling and Cx final initialization. */
677 sc = device_get_softc(cpu_devices[0]);
678 if (sc->cpu_p_cnt != NULL)
679 acpi_cpu_startup_throttling();
680 if (cpu_cx_count > 0)
681 acpi_cpu_startup_cx();
682}
683
684/*
685 * Takes the ACPI lock to avoid fighting anyone over the SMI command
686 * port.
687 */
688static void
689acpi_cpu_startup_throttling()
690{
691
692 /* Initialise throttling states */
693 cpu_throttle_max = CPU_MAX_SPEED;
694 cpu_throttle_state = CPU_MAX_SPEED;
695
696 SYSCTL_ADD_INT(&acpi_cpu_sysctl_ctx,
697 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
698 OID_AUTO, "throttle_max", CTLFLAG_RD,
699 &cpu_throttle_max, 0, "maximum CPU speed");
700 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
701 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
702 OID_AUTO, "throttle_state",
703 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_state,
704 0, acpi_cpu_throttle_sysctl, "I", "current CPU speed");
705
706 /* If ACPI 2.0+, signal platform that we are taking over throttling. */
707 if (cpu_pstate_cnt != 0) {
708 ACPI_LOCK(acpi);
709 AcpiOsWritePort(cpu_smi_cmd, cpu_pstate_cnt, 8);
710 ACPI_UNLOCK(acpi);
711 }
712
713 /* Set initial speed to maximum. */
714 ACPI_SERIAL_BEGIN(cpu);
715 acpi_cpu_throttle_set(cpu_throttle_max);
716 ACPI_SERIAL_END(cpu);
717
718 printf("acpi_cpu: throttling enabled, %d steps (100%% to %d.%d%%), "
719 "currently %d.%d%%\n", CPU_MAX_SPEED, CPU_SPEED_PRINTABLE(1),
720 CPU_SPEED_PRINTABLE(cpu_throttle_state));
721}
722
723static void
724acpi_cpu_startup_cx()
725{
726 struct acpi_cpu_softc *sc;
727 struct sbuf sb;
728 int i;
729
730 sc = device_get_softc(cpu_devices[0]);
731 sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN);
732 for (i = 0; i < cpu_cx_count; i++)
733 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
734 sbuf_trim(&sb);
735 sbuf_finish(&sb);
736 SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx,
737 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
738 OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported,
739 0, "Cx/microsecond values for supported Cx states");
740 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
741 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
742 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
743 NULL, 0, acpi_cpu_cx_lowest_sysctl, "A",
744 "lowest Cx sleep state to use");
745 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
746 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
747 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
748 NULL, 0, acpi_cpu_usage_sysctl, "A",
749 "percent usage for each Cx state");
750
751#ifdef notyet
752 /* Signal platform that we can handle _CST notification. */
753 if (cpu_cst_cnt != 0) {
754 ACPI_LOCK(acpi);
755 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
756 ACPI_UNLOCK(acpi);
757 }
758#endif
759
760 /* Take over idling from cpu_idle_default(). */
761 cpu_idle_hook = acpi_cpu_idle;
762}
763
764/*
765 * Set CPUs to the new state.
766 *
767 * Must be called with the ACPI lock held.
768 */
769static void
770acpi_cpu_throttle_set(uint32_t speed)
771{
772 struct acpi_cpu_softc *sc;
773 int i;
774 uint32_t p_cnt, clk_val;
775
776 ACPI_SERIAL_ASSERT(cpu);
777
778 /* Iterate over processors */
779 for (i = 0; i < cpu_ndevices; i++) {
780 sc = device_get_softc(cpu_devices[i]);
781 if (sc->cpu_p_cnt == NULL)
782 continue;
783
784 /* Get the current P_CNT value and disable throttling */
785 p_cnt = CPU_GET_REG(sc->cpu_p_cnt, 4);
786 p_cnt &= ~CPU_P_CNT_THT_EN;
787 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
788
789 /* If we're at maximum speed, that's all */
790 if (speed < CPU_MAX_SPEED) {
791 /* Mask the old CLK_VAL off and or-in the new value */
792 clk_val = (CPU_MAX_SPEED - 1) << cpu_duty_offset;
793 p_cnt &= ~clk_val;
794 p_cnt |= (speed << cpu_duty_offset);
795
796 /* Write the new P_CNT value and then enable throttling */
797 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
798 p_cnt |= CPU_P_CNT_THT_EN;
799 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
800 }
801 ACPI_VPRINT(sc->cpu_dev, acpi_device_get_parent_softc(sc->cpu_dev),
802 "set speed to %d.%d%%\n", CPU_SPEED_PRINTABLE(speed));
803 }
804 cpu_throttle_state = speed;
805}
806
807/*
808 * Idle the CPU in the lowest state possible. This function is called with
809 * interrupts disabled. Note that once it re-enables interrupts, a task
810 * switch can occur so do not access shared data (i.e. the softc) after
811 * interrupts are re-enabled.
812 */
813static void
814acpi_cpu_idle()
815{
816 struct acpi_cpu_softc *sc;
817 struct acpi_cx *cx_next;
818 uint32_t start_time, end_time;
819 int bm_active, cx_next_idx, i;
820
821 /* If disabled, return immediately. */
822 if (cpu_cx_count == 0) {
823 ACPI_ENABLE_IRQS();
824 return;
825 }
826
827 /*
828 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
829 * since there is no ACPI processor object for this CPU. This occurs
830 * for logical CPUs in the HTT case.
831 */
832 sc = cpu_softc[PCPU_GET(cpuid)];
833 if (sc == NULL) {
834 acpi_cpu_c1();
835 return;
836 }
837
838 /*
839 * If we slept 100 us or more, use the lowest Cx state. Otherwise,
840 * find the lowest state that has a latency less than or equal to
841 * the length of our last sleep.
842 */
843 cx_next_idx = cpu_cx_lowest;
844 if (sc->cpu_prev_sleep < 100)
845 for (i = cpu_cx_lowest; i >= 0; i--)
846 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) {
847 cx_next_idx = i;
848 break;
849 }
850
851 /*
852 * Check for bus master activity. If there was activity, clear
853 * the bit and use the lowest non-C3 state. Note that the USB
854 * driver polling for new devices keeps this bit set all the
855 * time if USB is loaded.
856 */
857 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active,
858 ACPI_MTX_DO_NOT_LOCK);
859 if (bm_active != 0) {
860 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1,
861 ACPI_MTX_DO_NOT_LOCK);
862 cx_next_idx = min(cx_next_idx, cpu_non_c3);
863 }
864
865 /* Select the next state and update statistics. */
866 cx_next = &sc->cpu_cx_states[cx_next_idx];
867 cpu_cx_stats[cx_next_idx]++;
868 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
869
870 /*
871 * Execute HLT (or equivalent) and wait for an interrupt. We can't
872 * calculate the time spent in C1 since the place we wake up is an
873 * ISR. Assume we slept one quantum and return.
874 */
875 if (cx_next->type == ACPI_STATE_C1) {
876 sc->cpu_prev_sleep = 1000000 / hz;
877 acpi_cpu_c1();
878 return;
879 }
880
881 /* For C3, disable bus master arbitration and enable bus master wake. */
882 if (cx_next->type == ACPI_STATE_C3) {
883 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK);
884 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1, ACPI_MTX_DO_NOT_LOCK);
885 }
886
887 /*
888 * Read from P_LVLx to enter C2(+), checking time spent asleep.
889 * Use the ACPI timer for measuring sleep time. Since we need to
890 * get the time very close to the CPU start/stop clock logic, this
891 * is the only reliable time source.
892 */
893 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk);
894 CPU_GET_REG(cx_next->p_lvlx, 1);
895
896 /*
897 * Read the end time twice. Since it may take an arbitrary time
898 * to enter the idle state, the first read may be executed before
899 * the processor has stopped. Doing it again provides enough
900 * margin that we are certain to have a correct value.
901 */
902 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
903 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
904
905 /* Enable bus master arbitration and disable bus master wakeup. */
906 if (cx_next->type == ACPI_STATE_C3) {
907 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK);
908 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK);
909 }
910
911 /* Find the actual time asleep in microseconds, minus overhead. */
912 end_time = acpi_TimerDelta(end_time, start_time);
913 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat;
914 ACPI_ENABLE_IRQS();
915}
916
921/* Put the CPU in C1 in a machine-dependant way. */
922static void
923acpi_cpu_c1()
924{
925#ifdef __ia64__
926 ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0);
927#else
928 __asm __volatile("sti; hlt");
929#endif
930}
931
932/*
933 * Re-evaluate the _PSS and _CST objects when we are notified that they
934 * have changed.
935 *
936 * XXX Re-evaluation disabled until locking is done.
937 */
938static void
939acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
940{
941 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
942
943 switch (notify) {
944 case ACPI_CPU_NOTIFY_PERF_STATES:
945 device_printf(sc->cpu_dev, "Performance states changed\n");
946 /* acpi_cpu_px_available(sc); */
947 break;
948 case ACPI_CPU_NOTIFY_CX_STATES:
949 device_printf(sc->cpu_dev, "Cx states changed\n");
950 /* acpi_cpu_cx_cst(sc); */
951 break;
952 default:
953 device_printf(sc->cpu_dev, "Unknown notify %#x\n", notify);
954 break;
955 }
956}
957
958static int
959acpi_cpu_quirks(struct acpi_cpu_softc *sc)
960{
961
962 /*
963 * C3 is not supported on multiple CPUs since this would require
964 * flushing all caches which is currently too expensive.
965 */
966 if (mp_ncpus > 1)
967 cpu_quirks |= CPU_QUIRK_NO_C3;
968
969#ifdef notyet
970 /* Look for various quirks of the PIIX4 part. */
971 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
972 if (acpi_dev != NULL) {
973 switch (pci_get_revid(acpi_dev)) {
974 /*
975 * Disable throttling control on PIIX4 A and B-step.
976 * See specification changes #13 ("Manual Throttle Duty Cycle")
977 * and #14 ("Enabling and Disabling Manual Throttle"), plus
978 * erratum #5 ("STPCLK# Deassertion Time") from the January
979 * 2002 PIIX4 specification update. Note that few (if any)
980 * mobile systems ever used this part.
981 */
982 case PCI_REVISION_A_STEP:
983 case PCI_REVISION_B_STEP:
984 cpu_quirks |= CPU_QUIRK_NO_THROTTLE;
985 /* FALLTHROUGH */
986 /*
987 * Disable C3 support for all PIIX4 chipsets. Some of these parts
988 * do not report the BMIDE status to the BM status register and
989 * others have a livelock bug if Type-F DMA is enabled. Linux
990 * works around the BMIDE bug by reading the BM status directly
991 * but we take the simpler approach of disabling C3 for these
992 * parts.
993 *
994 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
995 * Livelock") from the January 2002 PIIX4 specification update.
996 * Applies to all PIIX4 models.
997 */
998 case PCI_REVISION_4E:
999 case PCI_REVISION_4M:
1000 cpu_quirks |= CPU_QUIRK_NO_C3;
1001 break;
1002 default:
1003 break;
1004 }
1005 }
1006#endif
1007
1008 return (0);
1009}
1010
1011/* Handle changes in the CPU throttling setting. */
1012static int
1013acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS)
1014{
1015 uint32_t *argp;
1016 uint32_t arg;
1017 int error;
1018
1019 argp = (uint32_t *)oidp->oid_arg1;
1020 arg = *argp;
1021 error = sysctl_handle_int(oidp, &arg, 0, req);
1022
1023 /* Error or no new value */
1024 if (error != 0 || req->newptr == NULL)
1025 return (error);
1026 if (arg < 1 || arg > cpu_throttle_max)
1027 return (EINVAL);
1028
1029 /* If throttling changed, notify the BIOS of the new rate. */
1030 ACPI_SERIAL_BEGIN(cpu);
1031 if (*argp != arg) {
1032 *argp = arg;
1033 acpi_cpu_throttle_set(arg);
1034 }
1035 ACPI_SERIAL_END(cpu);
1036
1037 return (0);
1038}
1039
1040static int
1041acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
1042{
1043 struct sbuf sb;
1044 char buf[128];
1045 int i;
1046 uintmax_t fract, sum, whole;
1047
1048 sum = 0;
1049 for (i = 0; i < cpu_cx_count; i++)
1050 sum += cpu_cx_stats[i];
1051 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1052 for (i = 0; i < cpu_cx_count; i++) {
1053 if (sum > 0) {
1054 whole = (uintmax_t)cpu_cx_stats[i] * 100;
1055 fract = (whole % sum) * 100;
1056 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1057 (u_int)(fract / sum));
1058 } else
1059 sbuf_printf(&sb, "0%% ");
1060 }
1061 sbuf_trim(&sb);
1062 sbuf_finish(&sb);
1063 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1064 sbuf_delete(&sb);
1065
1066 return (0);
1067}
1068
1069static int
1070acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1071{
1072 struct acpi_cpu_softc *sc;
1073 char state[8];
1074 int val, error, i;
1075
1076 sc = device_get_softc(cpu_devices[0]);
1077 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
1078 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1079 if (error != 0 || req->newptr == NULL)
1080 return (error);
1081 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1082 return (EINVAL);
1083 val = (int) strtol(state + 1, NULL, 10) - 1;
1084 if (val < 0 || val > cpu_cx_count - 1)
1085 return (EINVAL);
1086
1087 ACPI_SERIAL_BEGIN(cpu);
1088 cpu_cx_lowest = val;
1089
1090 /* If not disabling, cache the new lowest non-C3 state. */
1091 cpu_non_c3 = 0;
1092 for (i = cpu_cx_lowest; i >= 0; i--) {
1093 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
1094 cpu_non_c3 = i;
1095 break;
1096 }
1097 }
1098
1099 /* Reset the statistics counters. */
1100 bzero(cpu_cx_stats, sizeof(cpu_cx_stats));
1101 ACPI_SERIAL_END(cpu);
1102
1103 return (0);
1104}
917/*
918 * Re-evaluate the _PSS and _CST objects when we are notified that they
919 * have changed.
920 *
921 * XXX Re-evaluation disabled until locking is done.
922 */
923static void
924acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
925{
926 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
927
928 switch (notify) {
929 case ACPI_CPU_NOTIFY_PERF_STATES:
930 device_printf(sc->cpu_dev, "Performance states changed\n");
931 /* acpi_cpu_px_available(sc); */
932 break;
933 case ACPI_CPU_NOTIFY_CX_STATES:
934 device_printf(sc->cpu_dev, "Cx states changed\n");
935 /* acpi_cpu_cx_cst(sc); */
936 break;
937 default:
938 device_printf(sc->cpu_dev, "Unknown notify %#x\n", notify);
939 break;
940 }
941}
942
943static int
944acpi_cpu_quirks(struct acpi_cpu_softc *sc)
945{
946
947 /*
948 * C3 is not supported on multiple CPUs since this would require
949 * flushing all caches which is currently too expensive.
950 */
951 if (mp_ncpus > 1)
952 cpu_quirks |= CPU_QUIRK_NO_C3;
953
954#ifdef notyet
955 /* Look for various quirks of the PIIX4 part. */
956 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
957 if (acpi_dev != NULL) {
958 switch (pci_get_revid(acpi_dev)) {
959 /*
960 * Disable throttling control on PIIX4 A and B-step.
961 * See specification changes #13 ("Manual Throttle Duty Cycle")
962 * and #14 ("Enabling and Disabling Manual Throttle"), plus
963 * erratum #5 ("STPCLK# Deassertion Time") from the January
964 * 2002 PIIX4 specification update. Note that few (if any)
965 * mobile systems ever used this part.
966 */
967 case PCI_REVISION_A_STEP:
968 case PCI_REVISION_B_STEP:
969 cpu_quirks |= CPU_QUIRK_NO_THROTTLE;
970 /* FALLTHROUGH */
971 /*
972 * Disable C3 support for all PIIX4 chipsets. Some of these parts
973 * do not report the BMIDE status to the BM status register and
974 * others have a livelock bug if Type-F DMA is enabled. Linux
975 * works around the BMIDE bug by reading the BM status directly
976 * but we take the simpler approach of disabling C3 for these
977 * parts.
978 *
979 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
980 * Livelock") from the January 2002 PIIX4 specification update.
981 * Applies to all PIIX4 models.
982 */
983 case PCI_REVISION_4E:
984 case PCI_REVISION_4M:
985 cpu_quirks |= CPU_QUIRK_NO_C3;
986 break;
987 default:
988 break;
989 }
990 }
991#endif
992
993 return (0);
994}
995
996/* Handle changes in the CPU throttling setting. */
997static int
998acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS)
999{
1000 uint32_t *argp;
1001 uint32_t arg;
1002 int error;
1003
1004 argp = (uint32_t *)oidp->oid_arg1;
1005 arg = *argp;
1006 error = sysctl_handle_int(oidp, &arg, 0, req);
1007
1008 /* Error or no new value */
1009 if (error != 0 || req->newptr == NULL)
1010 return (error);
1011 if (arg < 1 || arg > cpu_throttle_max)
1012 return (EINVAL);
1013
1014 /* If throttling changed, notify the BIOS of the new rate. */
1015 ACPI_SERIAL_BEGIN(cpu);
1016 if (*argp != arg) {
1017 *argp = arg;
1018 acpi_cpu_throttle_set(arg);
1019 }
1020 ACPI_SERIAL_END(cpu);
1021
1022 return (0);
1023}
1024
1025static int
1026acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
1027{
1028 struct sbuf sb;
1029 char buf[128];
1030 int i;
1031 uintmax_t fract, sum, whole;
1032
1033 sum = 0;
1034 for (i = 0; i < cpu_cx_count; i++)
1035 sum += cpu_cx_stats[i];
1036 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1037 for (i = 0; i < cpu_cx_count; i++) {
1038 if (sum > 0) {
1039 whole = (uintmax_t)cpu_cx_stats[i] * 100;
1040 fract = (whole % sum) * 100;
1041 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1042 (u_int)(fract / sum));
1043 } else
1044 sbuf_printf(&sb, "0%% ");
1045 }
1046 sbuf_trim(&sb);
1047 sbuf_finish(&sb);
1048 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1049 sbuf_delete(&sb);
1050
1051 return (0);
1052}
1053
1054static int
1055acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1056{
1057 struct acpi_cpu_softc *sc;
1058 char state[8];
1059 int val, error, i;
1060
1061 sc = device_get_softc(cpu_devices[0]);
1062 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
1063 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1064 if (error != 0 || req->newptr == NULL)
1065 return (error);
1066 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1067 return (EINVAL);
1068 val = (int) strtol(state + 1, NULL, 10) - 1;
1069 if (val < 0 || val > cpu_cx_count - 1)
1070 return (EINVAL);
1071
1072 ACPI_SERIAL_BEGIN(cpu);
1073 cpu_cx_lowest = val;
1074
1075 /* If not disabling, cache the new lowest non-C3 state. */
1076 cpu_non_c3 = 0;
1077 for (i = cpu_cx_lowest; i >= 0; i--) {
1078 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
1079 cpu_non_c3 = i;
1080 break;
1081 }
1082 }
1083
1084 /* Reset the statistics counters. */
1085 bzero(cpu_cx_stats, sizeof(cpu_cx_stats));
1086 ACPI_SERIAL_END(cpu);
1087
1088 return (0);
1089}