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ti_adcvar.h (266338) ti_adcvar.h (270238)
1/*-
2 * Copyright 2014 Luiz Otavio O Souza <loos@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
1/*-
2 * Copyright 2014 Luiz Otavio O Souza <loos@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: stable/10/sys/arm/ti/ti_adcvar.h 266338 2014-05-17 19:06:46Z loos $
26 * $FreeBSD: stable/10/sys/arm/ti/ti_adcvar.h 270238 2014-08-20 18:10:12Z loos $
27 */
28
29#ifndef _TI_ADCVAR_H_
30#define _TI_ADCVAR_H_
31
27 */
28
29#ifndef _TI_ADCVAR_H_
30#define _TI_ADCVAR_H_
31
32#define TI_ADC_NPINS 7
32#define TI_ADC_NPINS 8
33
34#define ADC_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg)
35#define ADC_WRITE4(_sc, reg, value) \
36 bus_write_4((_sc)->sc_mem_res, reg, value)
37
38struct ti_adc_softc {
39 device_t sc_dev;
40 int sc_last_state;
41 struct mtx sc_mtx;
42 struct resource *sc_mem_res;
43 struct resource *sc_irq_res;
44 void *sc_intrhand;
45};
46
47struct ti_adc_input {
48 int32_t enable; /* input enabled */
49 int32_t samples; /* samples average */
50 int32_t input; /* input number */
51 int32_t value; /* raw converted value */
52 uint32_t stepconfig; /* step config register */
53 uint32_t stepdelay; /* step delay register */
54 struct ti_adc_softc *sc; /* pointer to adc softc */
55};
56
57#define TI_ADC_LOCK(_sc) \
58 mtx_lock(&(_sc)->sc_mtx)
59#define TI_ADC_UNLOCK(_sc) \
60 mtx_unlock(&(_sc)->sc_mtx)
61#define TI_ADC_LOCK_INIT(_sc) \
62 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \
63 "ti_adc", MTX_DEF)
64#define TI_ADC_LOCK_DESTROY(_sc) \
65 mtx_destroy(&_sc->sc_mtx);
66#define TI_ADC_LOCK_ASSERT(_sc) \
67 mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
68
69#endif /* _TI_ADCVAR_H_ */
33
34#define ADC_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg)
35#define ADC_WRITE4(_sc, reg, value) \
36 bus_write_4((_sc)->sc_mem_res, reg, value)
37
38struct ti_adc_softc {
39 device_t sc_dev;
40 int sc_last_state;
41 struct mtx sc_mtx;
42 struct resource *sc_mem_res;
43 struct resource *sc_irq_res;
44 void *sc_intrhand;
45};
46
47struct ti_adc_input {
48 int32_t enable; /* input enabled */
49 int32_t samples; /* samples average */
50 int32_t input; /* input number */
51 int32_t value; /* raw converted value */
52 uint32_t stepconfig; /* step config register */
53 uint32_t stepdelay; /* step delay register */
54 struct ti_adc_softc *sc; /* pointer to adc softc */
55};
56
57#define TI_ADC_LOCK(_sc) \
58 mtx_lock(&(_sc)->sc_mtx)
59#define TI_ADC_UNLOCK(_sc) \
60 mtx_unlock(&(_sc)->sc_mtx)
61#define TI_ADC_LOCK_INIT(_sc) \
62 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \
63 "ti_adc", MTX_DEF)
64#define TI_ADC_LOCK_DESTROY(_sc) \
65 mtx_destroy(&_sc->sc_mtx);
66#define TI_ADC_LOCK_ASSERT(_sc) \
67 mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
68
69#endif /* _TI_ADCVAR_H_ */