1/* $NetBSD: armreg.h,v 1.37 2007/01/06 00:50:54 christos Exp $ */
2
3/*-
4 * Copyright (c) 1998, 2001 Ben Harris
5 * Copyright (c) 1994-1996 Mark Brinicombe.
6 * Copyright (c) 1994 Brini.
7 * All rights reserved.
8 *
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30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * $FreeBSD: head/sys/arm/include/armreg.h 204121 2010-02-20 14:52:07Z kevlo $
39 */
40
41#ifndef MACHINE_ARMREG_H
42#define MACHINE_ARMREG_H
43
44#define INSN_SIZE 4
45#define INSN_COND_MASK 0xf0000000 /* Condition mask */
46#define PSR_MODE 0x0000001f /* mode mask */
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146#define CPU_ID_ARM1136JS 0x4107b360
147#define CPU_ID_ARM1136JSR1 0x4117b360
148#define CPU_ID_SA110 0x4401a100
149#define CPU_ID_SA1100 0x4401a110
150#define CPU_ID_TI925T 0x54029250
151#define CPU_ID_MV88FR131 0x56251310 /* Marvell Feroceon 88FR131 Core */
152#define CPU_ID_MV88FR571_VD 0x56155710 /* Marvell Feroceon 88FR571-VD Core (ID from datasheet) */
153#define CPU_ID_MV88FR571_41 0x41159260 /* Marvell Feroceon 88FR571-VD Core (actual ID from CPU reg) */
154#define CPU_ID_FA526 0x66015260
155#define CPU_ID_FA626TE 0x66056260
156#define CPU_ID_SA1110 0x6901b110
157#define CPU_ID_IXP1200 0x6901c120
158#define CPU_ID_80200 0x69052000
159#define CPU_ID_PXA250 0x69052100 /* sans core revision */
160#define CPU_ID_PXA210 0x69052120
161#define CPU_ID_PXA250A 0x69052100 /* 1st version Core */
162#define CPU_ID_PXA210A 0x69052120 /* 1st version Core */
163#define CPU_ID_PXA250B 0x69052900 /* 3rd version Core */
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2
3/*-
4 * Copyright (c) 1998, 2001 Ben Harris
5 * Copyright (c) 1994-1996 Mark Brinicombe.
6 * Copyright (c) 1994 Brini.
7 * All rights reserved.
8 *
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30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * $FreeBSD: head/sys/arm/include/armreg.h 204121 2010-02-20 14:52:07Z kevlo $
39 */
40
41#ifndef MACHINE_ARMREG_H
42#define MACHINE_ARMREG_H
43
44#define INSN_SIZE 4
45#define INSN_COND_MASK 0xf0000000 /* Condition mask */
46#define PSR_MODE 0x0000001f /* mode mask */
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146#define CPU_ID_ARM1136JS 0x4107b360
147#define CPU_ID_ARM1136JSR1 0x4117b360
148#define CPU_ID_SA110 0x4401a100
149#define CPU_ID_SA1100 0x4401a110
150#define CPU_ID_TI925T 0x54029250
151#define CPU_ID_MV88FR131 0x56251310 /* Marvell Feroceon 88FR131 Core */
152#define CPU_ID_MV88FR571_VD 0x56155710 /* Marvell Feroceon 88FR571-VD Core (ID from datasheet) */
153#define CPU_ID_MV88FR571_41 0x41159260 /* Marvell Feroceon 88FR571-VD Core (actual ID from CPU reg) */
154#define CPU_ID_FA526 0x66015260
155#define CPU_ID_FA626TE 0x66056260
156#define CPU_ID_SA1110 0x6901b110
157#define CPU_ID_IXP1200 0x6901c120
158#define CPU_ID_80200 0x69052000
159#define CPU_ID_PXA250 0x69052100 /* sans core revision */
160#define CPU_ID_PXA210 0x69052120
161#define CPU_ID_PXA250A 0x69052100 /* 1st version Core */
162#define CPU_ID_PXA210A 0x69052120 /* 1st version Core */
163#define CPU_ID_PXA250B 0x69052900 /* 3rd version Core */
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