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1/*-
2 * Copyright (c) 2009 Yohanes Nugroho <yohanes@gmail.com>
3 * Copyright (c) 1994-1998 Mark Brinicombe.
4 * Copyright (c) 1994 Brini.
5 * All rights reserved.
6 *
7 * This code is derived from software written for Brini by Mark Brinicombe
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by Brini.
20 * 4. The name of the company nor the name of the author may be used to
21 * endorse or promote products derived from this software without specific
22 * prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 */
37
38#include <sys/cdefs.h>
39__FBSDID("$FreeBSD: stable/10/sys/arm/cavium/cns11xx/econa_machdep.c 266386 2014-05-18 00:32:35Z ian $");
40
41#define _ARM32_BUS_DMA_PRIVATE
42#include <sys/param.h>
43#include <sys/systm.h>
44#include <sys/sysproto.h>
45#include <sys/signalvar.h>
46#include <sys/imgact.h>
47#include <sys/kernel.h>
48#include <sys/ktr.h>
49#include <sys/linker.h>
50#include <sys/lock.h>
51#include <sys/malloc.h>
52#include <sys/mutex.h>
53#include <sys/pcpu.h>
54#include <sys/proc.h>
55#include <sys/ptrace.h>
56#include <sys/cons.h>
57#include <sys/bio.h>
58#include <sys/bus.h>
59#include <sys/buf.h>
60#include <sys/exec.h>
61#include <sys/kdb.h>
62#include <sys/msgbuf.h>
63#include <machine/physmem.h>
64#include <machine/reg.h>
65#include <machine/cpu.h>
66
67#include <vm/vm.h>
68#include <vm/pmap.h>
69#include <vm/vm_object.h>
70#include <vm/vm_page.h>
71#include <vm/vm_map.h>
72#include <machine/devmap.h>
73#include <machine/vmparam.h>
74#include <machine/pcb.h>
75#include <machine/undefined.h>
76#include <machine/machdep.h>
77#include <machine/metadata.h>
78#include <machine/armreg.h>
79#include <machine/bus.h>
80#include <sys/reboot.h>
81#include "econa_reg.h"
82
83/* Page table for mapping proc0 zero page */
84#define KERNEL_PT_SYS 0
85#define KERNEL_PT_KERN 1
86#define KERNEL_PT_KERN_NUM 22
87/* L2 table for mapping after kernel */
88#define KERNEL_PT_AFKERNEL KERNEL_PT_KERN + KERNEL_PT_KERN_NUM
89#define KERNEL_PT_AFKERNEL_NUM 5
90
91/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
92#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
93
94struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
95
96/* Physical and virtual addresses for some global pages */
97
98struct pv_addr systempage;
99struct pv_addr msgbufpv;
100struct pv_addr irqstack;
101struct pv_addr undstack;
102struct pv_addr abtstack;
103struct pv_addr kernelstack;
104
105/* Static device mappings. */
106static const struct arm_devmap_entry econa_devmap[] = {
107 {
108 /*
109 * This maps DDR SDRAM
110 */
111 ECONA_SDRAM_BASE, /*virtual*/
112 ECONA_SDRAM_BASE, /*physical*/
113 ECONA_SDRAM_SIZE, /*size*/
114 VM_PROT_READ|VM_PROT_WRITE,
115 PTE_DEVICE,
116 },
117 /*
118 * Map the on-board devices VA == PA so that we can access them
119 * with the MMU on or off.
120 */
121 {
122 /*
123 * This maps the interrupt controller, the UART
124 * and the timer.
125 */
126 ECONA_IO_BASE, /*virtual*/
127 ECONA_IO_BASE, /*physical*/
128 ECONA_IO_SIZE, /*size*/
129 VM_PROT_READ|VM_PROT_WRITE,
130 PTE_DEVICE,
131 },
132 {
133 /*
134 * OHCI + EHCI
135 */
136 ECONA_OHCI_VBASE, /*virtual*/
137 ECONA_OHCI_PBASE, /*physical*/
138 ECONA_USB_SIZE, /*size*/
139 VM_PROT_READ|VM_PROT_WRITE,
140 PTE_DEVICE,
141 },
142 {
143 /*
144 * CFI
145 */
146 ECONA_CFI_VBASE, /*virtual*/
147 ECONA_CFI_PBASE, /*physical*/
148 ECONA_CFI_SIZE,
149 VM_PROT_READ|VM_PROT_WRITE,
150 PTE_DEVICE,
151 },
152 {
153 0,
154 0,
155 0,
156 0,
157 0,
158 }
159};
160
161
162void *
163initarm(struct arm_boot_params *abp)
164{
165 struct pv_addr kernel_l1pt;
166 volatile uint32_t * ddr = (uint32_t *)0x4000000C;
167 int loop, i;
168 u_int l1pagetable;
169 vm_offset_t afterkern;
170 vm_offset_t freemempos;
171 vm_offset_t lastaddr;
172 uint32_t memsize;
173 int mem_info;
174
175 boothowto = RB_VERBOSE;
176 lastaddr = parse_boot_param(abp);
177 arm_physmem_kernaddr = abp->abp_physaddr;
178 set_cpufuncs();
179 pcpu0_init();
180
181 /* Do basic tuning, hz etc */
182 init_param1();
183
184
185 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
186 /* Define a macro to simplify memory allocation */
187#define valloc_pages(var, np) \
188 alloc_pages((var).pv_va, (np)); \
189 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
190
191#define alloc_pages(var, np) \
192 (var) = freemempos; \
193 freemempos += (np * PAGE_SIZE); \
194 memset((char *)(var), 0, ((np) * PAGE_SIZE));
195
196 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
197 freemempos += PAGE_SIZE;
198 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
199 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
200 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
201 valloc_pages(kernel_pt_table[loop],
202 L2_TABLE_SIZE / PAGE_SIZE);
203 } else {
204 kernel_pt_table[loop].pv_va = freemempos -
205 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
206 L2_TABLE_SIZE_REAL;
207 kernel_pt_table[loop].pv_pa =
208 kernel_pt_table[loop].pv_va - KERNVIRTADDR +
209 abp->abp_physaddr;
210 }
211 }
212 /*
213 * Allocate a page for the system page mapped to V0x00000000
214 * This page will just contain the system vectors and can be
215 * shared by all processes.
216 */
217 valloc_pages(systempage, 1);
218
219 /* Allocate stacks for all modes */
220 valloc_pages(irqstack, IRQ_STACK_SIZE);
221 valloc_pages(abtstack, ABT_STACK_SIZE);
222 valloc_pages(undstack, UND_STACK_SIZE);
223 valloc_pages(kernelstack, KSTACK_PAGES);
224 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
225
226 /*
227 * Now we start construction of the L1 page table
228 * We start by mapping the L2 page tables into the L1.
229 * This means that we can replace L1 mappings later on if necessary
230 */
231 l1pagetable = kernel_l1pt.pv_va;
232
233 /* Map the L2 pages tables in the L1 page table */
234 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
235 &kernel_pt_table[KERNEL_PT_SYS]);
236 for (i = 0; i < KERNEL_PT_KERN_NUM; i++)
237 pmap_link_l2pt(l1pagetable, KERNBASE + i * L1_S_SIZE,
238 &kernel_pt_table[KERNEL_PT_KERN + i]);
239 pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR,
240 (((uint32_t)lastaddr - KERNBASE) + PAGE_SIZE) & ~(PAGE_SIZE - 1),
241 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
242 afterkern = round_page((lastaddr + L1_S_SIZE) & ~(L1_S_SIZE - 1));
243 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
244 pmap_link_l2pt(l1pagetable, afterkern + i * L1_S_SIZE,
245 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
246 }
247
248 /* Map the vector page. */
249 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
250 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
251
252
253 /* Map the stack pages */
254 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
255 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
256 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
257 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
258 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
259 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
260 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
261 KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
262
263 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
264 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
265 pmap_map_chunk(l1pagetable, msgbufpv.pv_va, msgbufpv.pv_pa,
266 msgbufsize, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
267
268 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
269 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
270 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
271 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
272 }
273
274 arm_devmap_bootstrap(l1pagetable, econa_devmap);
275 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
276 setttb(kernel_l1pt.pv_pa);
277 cpu_tlb_flushID();
278 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
279 cninit();
280 mem_info = ((*ddr) >> 4) & 0x3;
281 memsize = (8<<mem_info)*1024*1024;
282
283 /*
284 * Pages were allocated during the secondary bootstrap for the
285 * stacks for different CPU modes.
286 * We must now set the r13 registers in the different CPU modes to
287 * point to these stacks.
288 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
289 * of the stack memory.
290 */
291 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
292
293 set_stackptrs(0);
294
295 /*
296 * We must now clean the cache again....
297 * Cleaning may be done by reading new data to displace any
298 * dirty data in the cache. This will have happened in setttb()
299 * but since we are boot strapping the addresses used for the read
300 * may have just been remapped and thus the cache could be out
301 * of sync. A re-clean after the switch will cure this.
302 * After booting there are no gross relocations of the kernel thus
303 * this problem will not occur after initarm().
304 */
305 cpu_idcache_wbinv_all();
306 cpu_setup("");
307
308 undefined_init();
309
310 init_proc0(kernelstack.pv_va);
311
312 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
313
314 pmap_curmaxkvaddr = afterkern + L1_S_SIZE * (KERNEL_PT_KERN_NUM - 1);
315 vm_max_kernel_address = KERNVIRTADDR + 3 * memsize;
316 pmap_bootstrap(freemempos, &kernel_l1pt);
317
318 msgbufp = (void*)msgbufpv.pv_va;
319 msgbufinit(msgbufp, msgbufsize);
320
321 mutex_init();
322
323 /*
324 * Add the physical ram we have available.
325 *
326 * Exclude the kernel, and all the things we allocated which immediately
327 * follow the kernel, from the VM allocation pool but not from crash
328 * dumps. virtual_avail is a global variable which tracks the kva we've
329 * "allocated" while setting up pmaps.
330 *
331 * Prepare the list of physical memory available to the vm subsystem.
332 */
333 arm_physmem_hardware_region(PHYSADDR, memsize);
334 arm_physmem_exclude_region(abp->abp_physaddr,
335 virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC);
336 arm_physmem_init_kernel_globals();
337
338 init_param2(physmem);
339 kdb_init();
340
341 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
342 sizeof(struct pcb)));
343}