| at91_machdep.c (266311) | at91_machdep.c (266386) |
|---|---|
| 1/*- 2 * Copyright (c) 1994-1998 Mark Brinicombe. 3 * Copyright (c) 1994 Brini. 4 * All rights reserved. 5 * 6 * This code is derived from software written for Brini by Mark Brinicombe 7 * 8 * Redistribution and use in source and binary forms, with or without --- 30 unchanged lines hidden (view full) --- 39 * Machine dependant functions for kernel setup 40 * 41 * This file needs a lot of work. 42 * 43 * Created : 17/09/94 44 */ 45 46#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 1994-1998 Mark Brinicombe. 3 * Copyright (c) 1994 Brini. 4 * All rights reserved. 5 * 6 * This code is derived from software written for Brini by Mark Brinicombe 7 * 8 * Redistribution and use in source and binary forms, with or without --- 30 unchanged lines hidden (view full) --- 39 * Machine dependant functions for kernel setup 40 * 41 * This file needs a lot of work. 42 * 43 * Created : 17/09/94 44 */ 45 46#include <sys/cdefs.h> |
| 47__FBSDID("$FreeBSD: stable/10/sys/arm/at91/at91_machdep.c 266311 2014-05-17 13:53:38Z ian $"); | 47__FBSDID("$FreeBSD: stable/10/sys/arm/at91/at91_machdep.c 266386 2014-05-18 00:32:35Z ian $"); |
| 48 49#define _ARM32_BUS_DMA_PRIVATE 50#include <sys/param.h> 51#include <sys/systm.h> 52#include <sys/sysproto.h> 53#include <sys/signalvar.h> 54#include <sys/imgact.h> 55#include <sys/kernel.h> --- 65 unchanged lines hidden (view full) --- 121 * 0xfffxxxxx addresses to 0xdffxxxxx. This covers all critical devices 122 * on all members of the AT91SAM9 and AT91RM9200 families. 123 */ 124 { 125 0xdff00000, 126 0xfff00000, 127 0x00100000, 128 VM_PROT_READ|VM_PROT_WRITE, | 48 49#define _ARM32_BUS_DMA_PRIVATE 50#include <sys/param.h> 51#include <sys/systm.h> 52#include <sys/sysproto.h> 53#include <sys/signalvar.h> 54#include <sys/imgact.h> 55#include <sys/kernel.h> --- 65 unchanged lines hidden (view full) --- 121 * 0xfffxxxxx addresses to 0xdffxxxxx. This covers all critical devices 122 * on all members of the AT91SAM9 and AT91RM9200 families. 123 */ 124 { 125 0xdff00000, 126 0xfff00000, 127 0x00100000, 128 VM_PROT_READ|VM_PROT_WRITE, |
| 129 PTE_NOCACHE, | 129 PTE_DEVICE, |
| 130 }, 131 /* There's a notion that we should do the rest of these lazily. */ 132 /* 133 * We can't just map the OHCI registers VA == PA, because 134 * AT91xx_xxx_BASE belongs to the userland address space. 135 * We could just choose a different virtual address, but a better 136 * solution would probably be to just use pmap_mapdev() to allocate 137 * KVA, as we don't need the OHCI controller before the vm --- 7 unchanged lines hidden (view full) --- 145 * Add the ohci controller, and anything else that might be 146 * on this chip select for a VA/PA mapping. 147 */ 148 /* Internal Memory 1MB */ 149 AT91RM92_OHCI_VA_BASE, 150 AT91RM92_OHCI_BASE, 151 0x00100000, 152 VM_PROT_READ|VM_PROT_WRITE, | 130 }, 131 /* There's a notion that we should do the rest of these lazily. */ 132 /* 133 * We can't just map the OHCI registers VA == PA, because 134 * AT91xx_xxx_BASE belongs to the userland address space. 135 * We could just choose a different virtual address, but a better 136 * solution would probably be to just use pmap_mapdev() to allocate 137 * KVA, as we don't need the OHCI controller before the vm --- 7 unchanged lines hidden (view full) --- 145 * Add the ohci controller, and anything else that might be 146 * on this chip select for a VA/PA mapping. 147 */ 148 /* Internal Memory 1MB */ 149 AT91RM92_OHCI_VA_BASE, 150 AT91RM92_OHCI_BASE, 151 0x00100000, 152 VM_PROT_READ|VM_PROT_WRITE, |
| 153 PTE_NOCACHE, | 153 PTE_DEVICE, |
| 154 }, 155 { 156 /* CompactFlash controller. Portion of EBI CS4 1MB */ 157 AT91RM92_CF_VA_BASE, 158 AT91RM92_CF_BASE, 159 0x00100000, 160 VM_PROT_READ|VM_PROT_WRITE, | 154 }, 155 { 156 /* CompactFlash controller. Portion of EBI CS4 1MB */ 157 AT91RM92_CF_VA_BASE, 158 AT91RM92_CF_BASE, 159 0x00100000, 160 VM_PROT_READ|VM_PROT_WRITE, |
| 161 PTE_NOCACHE, | 161 PTE_DEVICE, |
| 162 }, 163 /* 164 * The next two should be good for the 9260, 9261 and 9G20 since 165 * addresses mapping is the same. 166 */ 167 { 168 /* Internal Memory 1MB */ 169 AT91SAM9G20_OHCI_VA_BASE, 170 AT91SAM9G20_OHCI_BASE, 171 0x00100000, 172 VM_PROT_READ|VM_PROT_WRITE, | 162 }, 163 /* 164 * The next two should be good for the 9260, 9261 and 9G20 since 165 * addresses mapping is the same. 166 */ 167 { 168 /* Internal Memory 1MB */ 169 AT91SAM9G20_OHCI_VA_BASE, 170 AT91SAM9G20_OHCI_BASE, 171 0x00100000, 172 VM_PROT_READ|VM_PROT_WRITE, |
| 173 PTE_NOCACHE, | 173 PTE_DEVICE, |
| 174 }, 175 { 176 /* EBI CS3 256MB */ 177 AT91SAM9G20_NAND_VA_BASE, 178 AT91SAM9G20_NAND_BASE, 179 AT91SAM9G20_NAND_SIZE, 180 VM_PROT_READ|VM_PROT_WRITE, | 174 }, 175 { 176 /* EBI CS3 256MB */ 177 AT91SAM9G20_NAND_VA_BASE, 178 AT91SAM9G20_NAND_BASE, 179 AT91SAM9G20_NAND_SIZE, 180 VM_PROT_READ|VM_PROT_WRITE, |
| 181 PTE_NOCACHE, | 181 PTE_DEVICE, |
| 182 }, 183 /* 184 * The next should be good for the 9G45. 185 */ 186 { 187 /* Internal Memory 1MB */ 188 AT91SAM9G45_OHCI_VA_BASE, 189 AT91SAM9G45_OHCI_BASE, 190 0x00100000, 191 VM_PROT_READ|VM_PROT_WRITE, | 182 }, 183 /* 184 * The next should be good for the 9G45. 185 */ 186 { 187 /* Internal Memory 1MB */ 188 AT91SAM9G45_OHCI_VA_BASE, 189 AT91SAM9G45_OHCI_BASE, 190 0x00100000, 191 VM_PROT_READ|VM_PROT_WRITE, |
| 192 PTE_NOCACHE, | 192 PTE_DEVICE, |
| 193 }, 194 { 0, 0, 0, 0, 0, } 195}; 196 197/* Physical and virtual addresses for some global pages */ 198 199struct pv_addr systempage; 200struct pv_addr msgbufpv; --- 492 unchanged lines hidden --- | 193 }, 194 { 0, 0, 0, 0, 0, } 195}; 196 197/* Physical and virtual addresses for some global pages */ 198 199struct pv_addr systempage; 200struct pv_addr msgbufpv; --- 492 unchanged lines hidden --- |