ti_adc.4 (266338) | ti_adc.4 (270238) |
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1.\" 2.\" Copyright (c) 2014 Luiz Otavio O Souza <loos@freebsd.org> 3.\" All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright --- 8 unchanged lines hidden (view full) --- 17.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24.\" | 1.\" 2.\" Copyright (c) 2014 Luiz Otavio O Souza <loos@freebsd.org> 3.\" All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright --- 8 unchanged lines hidden (view full) --- 17.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24.\" |
25.\" $FreeBSD: stable/10/share/man/man4/man4.arm/ti_adc.4 266338 2014-05-17 19:06:46Z loos $ | 25.\" $FreeBSD: stable/10/share/man/man4/man4.arm/ti_adc.4 270238 2014-08-20 18:10:12Z loos $ |
26.\" | 26.\" |
27.Dd March 21, 2014 | 27.Dd June 1, 2014 |
28.Dt TI_ADC 4 29.Os 30.Sh NAME 31.Nm ti_adc 32.Nd TI AM3XXX analog to digital converter driver 33.Sh SYNOPSIS 34.Cd "device ti_adc" 35.Sh DESCRIPTION --- 37 unchanged lines hidden (view full) --- 73dev.ti_adc.0.ain.5.enable: 0 74dev.ti_adc.0.ain.5.open_delay: 0 75dev.ti_adc.0.ain.5.samples_avg: 0 76dev.ti_adc.0.ain.5.input: 0 77dev.ti_adc.0.ain.6.enable: 1 78dev.ti_adc.0.ain.6.open_delay: 0 79dev.ti_adc.0.ain.6.samples_avg: 4 80dev.ti_adc.0.ain.6.input: 2308 | 28.Dt TI_ADC 4 29.Os 30.Sh NAME 31.Nm ti_adc 32.Nd TI AM3XXX analog to digital converter driver 33.Sh SYNOPSIS 34.Cd "device ti_adc" 35.Sh DESCRIPTION --- 37 unchanged lines hidden (view full) --- 73dev.ti_adc.0.ain.5.enable: 0 74dev.ti_adc.0.ain.5.open_delay: 0 75dev.ti_adc.0.ain.5.samples_avg: 0 76dev.ti_adc.0.ain.5.input: 0 77dev.ti_adc.0.ain.6.enable: 1 78dev.ti_adc.0.ain.6.open_delay: 0 79dev.ti_adc.0.ain.6.samples_avg: 4 80dev.ti_adc.0.ain.6.input: 2308 |
81dev.ti_adc.0.ain.7.enable: 1 82dev.ti_adc.0.ain.7.open_delay: 0 83dev.ti_adc.0.ain.7.samples_avg: 0 84dev.ti_adc.0.ain.7.input: 3812 |
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81.Ed 82.Pp | 85.Ed 86.Pp |
87On Beaglebone-black the analog input 7 is connected to the 3V3B rail through 88a voltage divisor (2:1). 89The 3V3B voltage rail comes from the TL5209 LDO regulator which is limited 90to 500mA maximum. 91.Pp |
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83Global settings: 84.Bl -tag -width ".Va dev.ti_adc.0.clockdiv" 85.It Va dev.ti_adc.0.clockdiv 86Sets the ADC clock prescaler. 87The minimum value is 10 and the maximum is 65535. 88The ADC clock is based on CLK_M_OSC (24Mhz) / clockdiv. 89This gives a maximum of ~2.4Mhz for the ADC clock and ~10Khz for the default 90setting (clockdiv = 2400). --- 16 unchanged lines hidden (view full) --- 107It is made of a 12 bit value (0 ~ 4095). 108.El 109.Sh SEE ALSO 110.Xr sysctl 8 111.Sh HISTORY 112The 113.Nm 114driver first appeared in | 92Global settings: 93.Bl -tag -width ".Va dev.ti_adc.0.clockdiv" 94.It Va dev.ti_adc.0.clockdiv 95Sets the ADC clock prescaler. 96The minimum value is 10 and the maximum is 65535. 97The ADC clock is based on CLK_M_OSC (24Mhz) / clockdiv. 98This gives a maximum of ~2.4Mhz for the ADC clock and ~10Khz for the default 99setting (clockdiv = 2400). --- 16 unchanged lines hidden (view full) --- 116It is made of a 12 bit value (0 ~ 4095). 117.El 118.Sh SEE ALSO 119.Xr sysctl 8 120.Sh HISTORY 121The 122.Nm 123driver first appeared in |
115.Fx 11.0 . | 124.Fx 10.1 . |
116.Sh AUTHORS 117.An -nosplit 118The driver and this manual page was written by | 125.Sh AUTHORS 126.An -nosplit 127The driver and this manual page was written by |
119.An Luiz Otavio O Souza Aq loos@FreeBSD.org | 128.An Luiz Otavio O Souza Aq loos@FreeBSD.org . |