1//===-- X86Schedule.td - X86 Scheduling Definitions --------*- tablegen -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10//===----------------------------------------------------------------------===//
11// Instruction Itinerary classes used for X86
12def IIC_DEFAULT : InstrItinClass;
13def IIC_ALU_MEM : InstrItinClass;
14def IIC_ALU_NONMEM : InstrItinClass;
15def IIC_LEA : InstrItinClass;
16def IIC_LEA_16 : InstrItinClass;
17def IIC_MUL8 : InstrItinClass;
18def IIC_MUL16_MEM : InstrItinClass;
19def IIC_MUL16_REG : InstrItinClass;

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248def IIC_SSE_CVT_Scalar_RM : InstrItinClass;
249def IIC_SSE_CVT_SS2SI32_RM : InstrItinClass;
250def IIC_SSE_CVT_SS2SI32_RR : InstrItinClass;
251def IIC_SSE_CVT_SS2SI64_RM : InstrItinClass;
252def IIC_SSE_CVT_SS2SI64_RR : InstrItinClass;
253def IIC_SSE_CVT_SD2SI_RM : InstrItinClass;
254def IIC_SSE_CVT_SD2SI_RR : InstrItinClass;
255
256def IIC_CMPX_LOCK : InstrItinClass;
257def IIC_CMPX_LOCK_8 : InstrItinClass;
258def IIC_CMPX_LOCK_8B : InstrItinClass;
259def IIC_CMPX_LOCK_16B : InstrItinClass;
260
261def IIC_XADD_LOCK_MEM : InstrItinClass;
262def IIC_XADD_LOCK_MEM8 : InstrItinClass;
263
264
265//===----------------------------------------------------------------------===//
266// Processor instruction itineraries.
267
268def GenericItineraries : ProcessorItineraries<[], [], []>;
269
270include "X86ScheduleAtom.td"
271
272
273