Deleted Added
sdiff udiff text old ( 208954 ) new ( 218893 )
full compact
PPCScheduleG3.td (208954) PPCScheduleG3.td (218893)
1//===- PPCScheduleG3.td - PPC G3 Scheduling Definitions ----*- tablegen -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the itinerary class data for the G3 (750) processor.
11//
12//===----------------------------------------------------------------------===//
13
14
15def G3Itineraries : ProcessorItineraries<
1//===- PPCScheduleG3.td - PPC G3 Scheduling Definitions ----*- tablegen -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the itinerary class data for the G3 (750) processor.
11//
12//===----------------------------------------------------------------------===//
13
14
15def G3Itineraries : ProcessorItineraries<
16 [IU1, IU2, FPU1, BPU, SRU, SLU], [
16 [IU1, IU2, FPU1, BPU, SRU, SLU], [], [
17 InstrItinData<IntGeneral , [InstrStage<1, [IU1, IU2]>]>,
18 InstrItinData<IntCompare , [InstrStage<1, [IU1, IU2]>]>,
19 InstrItinData<IntDivW , [InstrStage<19, [IU1]>]>,
20 InstrItinData<IntMFFS , [InstrStage<1, [FPU1]>]>,
21 InstrItinData<IntMTFSB0 , [InstrStage<3, [FPU1]>]>,
22 InstrItinData<IntMulHW , [InstrStage<5, [IU1]>]>,
23 InstrItinData<IntMulHWU , [InstrStage<6, [IU1]>]>,
24 InstrItinData<IntMulLI , [InstrStage<3, [IU1]>]>,

--- 40 unchanged lines hidden --- 		17 InstrItinData<IntGeneral , [InstrStage<1, [IU1, IU2]>]>,
18 InstrItinData<IntCompare , [InstrStage<1, [IU1, IU2]>]>,
19 InstrItinData<IntDivW , [InstrStage<19, [IU1]>]>,
20 InstrItinData<IntMFFS , [InstrStage<1, [FPU1]>]>,
21 InstrItinData<IntMTFSB0 , [InstrStage<3, [FPU1]>]>,
22 InstrItinData<IntMulHW , [InstrStage<5, [IU1]>]>,
23 InstrItinData<IntMulHWU , [InstrStage<6, [IU1]>]>,
24 InstrItinData<IntMulLI , [InstrStage<3, [IU1]>]>,

--- 40 unchanged lines hidden ---