| PPCInstrInfo.h (208954) | PPCInstrInfo.h (210299) |
|---|---|
| 1//===- PPCInstrInfo.h - PowerPC Instruction Information ---------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 95 unchanged lines hidden (view full) --- 104 // Branch analysis. 105 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 106 MachineBasicBlock *&FBB, 107 SmallVectorImpl<MachineOperand> &Cond, 108 bool AllowModify) const; 109 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; 110 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 111 MachineBasicBlock *FBB, | 1//===- PPCInstrInfo.h - PowerPC Instruction Information ---------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 95 unchanged lines hidden (view full) --- 104 // Branch analysis. 105 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 106 MachineBasicBlock *&FBB, 107 SmallVectorImpl<MachineOperand> &Cond, 108 bool AllowModify) const; 109 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; 110 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 111 MachineBasicBlock *FBB, |
| 112 const SmallVectorImpl<MachineOperand> &Cond) const; 113 virtual bool copyRegToReg(MachineBasicBlock &MBB, 114 MachineBasicBlock::iterator MI, 115 unsigned DestReg, unsigned SrcReg, 116 const TargetRegisterClass *DestRC, 117 const TargetRegisterClass *SrcRC, 118 DebugLoc DL) const; | 112 const SmallVectorImpl<MachineOperand> &Cond, 113 DebugLoc DL) const; 114 virtual void copyPhysReg(MachineBasicBlock &MBB, 115 MachineBasicBlock::iterator I, DebugLoc DL, 116 unsigned DestReg, unsigned SrcReg, 117 bool KillSrc) const; |
| 119 120 virtual void storeRegToStackSlot(MachineBasicBlock &MBB, 121 MachineBasicBlock::iterator MBBI, 122 unsigned SrcReg, bool isKill, int FrameIndex, 123 const TargetRegisterClass *RC, 124 const TargetRegisterInfo *TRI) const; 125 126 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, 127 MachineBasicBlock::iterator MBBI, 128 unsigned DestReg, int FrameIndex, 129 const TargetRegisterClass *RC, 130 const TargetRegisterInfo *TRI) const; 131 132 virtual MachineInstr *emitFrameIndexDebugValue(MachineFunction &MF, 133 int FrameIx, 134 uint64_t Offset, 135 const MDNode *MDPtr, 136 DebugLoc DL) const; 137 | 118 119 virtual void storeRegToStackSlot(MachineBasicBlock &MBB, 120 MachineBasicBlock::iterator MBBI, 121 unsigned SrcReg, bool isKill, int FrameIndex, 122 const TargetRegisterClass *RC, 123 const TargetRegisterInfo *TRI) const; 124 125 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, 126 MachineBasicBlock::iterator MBBI, 127 unsigned DestReg, int FrameIndex, 128 const TargetRegisterClass *RC, 129 const TargetRegisterInfo *TRI) const; 130 131 virtual MachineInstr *emitFrameIndexDebugValue(MachineFunction &MF, 132 int FrameIx, 133 uint64_t Offset, 134 const MDNode *MDPtr, 135 DebugLoc DL) const; 136 |
| 138 /// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into 139 /// copy instructions, turning them into load/store instructions. 140 virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF, 141 MachineInstr* MI, 142 const SmallVectorImpl<unsigned> &Ops, 143 int FrameIndex) const; 144 145 virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF, 146 MachineInstr* MI, 147 const SmallVectorImpl<unsigned> &Ops, 148 MachineInstr* LoadMI) const { 149 return 0; 150 } 151 152 virtual bool canFoldMemoryOperand(const MachineInstr *MI, 153 const SmallVectorImpl<unsigned> &Ops) const; 154 | |
| 155 virtual 156 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; 157 158 /// GetInstSize - Return the number of bytes of code the specified 159 /// instruction may be. This returns the maximum number of bytes. 160 /// 161 virtual unsigned GetInstSizeInBytes(const MachineInstr *MI) const; 162}; 163 164} 165 166#endif | 137 virtual 138 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; 139 140 /// GetInstSize - Return the number of bytes of code the specified 141 /// instruction may be. This returns the maximum number of bytes. 142 /// 143 virtual unsigned GetInstSizeInBytes(const MachineInstr *MI) const; 144}; 145 146} 147 148#endif |