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MipsRegisterInfo.cpp (202878) MipsRegisterInfo.cpp (203954)
1//===- MipsRegisterInfo.cpp - MIPS Register Information -== -----*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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218//===----------------------------------------------------------------------===//
219
220void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const
221{
222 MachineFrameInfo *MFI = MF.getFrameInfo();
223 MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
224 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
225 unsigned StackAlign = MF.getTarget().getFrameInfo()->getStackAlignment();
1//===- MipsRegisterInfo.cpp - MIPS Register Information -== -----*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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218//===----------------------------------------------------------------------===//
219
220void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const
221{
222 MachineFrameInfo *MFI = MF.getFrameInfo();
223 MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
224 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
225 unsigned StackAlign = MF.getTarget().getFrameInfo()->getStackAlignment();
226 unsigned RegSize = Subtarget.isGP32bit() ? 4 : 8;
227 bool HasGP = MipsFI->needGPSaveRestore();
226
227 // Min and Max CSI FrameIndex.
228 int MinCSFI = -1, MaxCSFI = -1;
229
230 // See the description at MipsMachineFunction.h
231 int TopCPUSavedRegOff = -1, TopFPUSavedRegOff = -1;
232
233 // Replace the dummy '0' SPOffset by the negative offsets, as explained on

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243 unsigned CalleeSavedAreaSize = 0;
244 if (!CSI.empty()) {
245 MinCSFI = CSI[0].getFrameIdx();
246 MaxCSFI = CSI[CSI.size()-1].getFrameIdx();
247 }
248 for (unsigned i = 0, e = CSI.size(); i != e; ++i)
249 CalleeSavedAreaSize += MFI->getObjectAlignment(CSI[i].getFrameIdx());
250
228
229 // Min and Max CSI FrameIndex.
230 int MinCSFI = -1, MaxCSFI = -1;
231
232 // See the description at MipsMachineFunction.h
233 int TopCPUSavedRegOff = -1, TopFPUSavedRegOff = -1;
234
235 // Replace the dummy '0' SPOffset by the negative offsets, as explained on

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245 unsigned CalleeSavedAreaSize = 0;
246 if (!CSI.empty()) {
247 MinCSFI = CSI[0].getFrameIdx();
248 MaxCSFI = CSI[CSI.size()-1].getFrameIdx();
249 }
250 for (unsigned i = 0, e = CSI.size(); i != e; ++i)
251 CalleeSavedAreaSize += MFI->getObjectAlignment(CSI[i].getFrameIdx());
252
253 unsigned StackOffset = HasGP ? (MipsFI->getGPStackOffset()+RegSize)
254 : (Subtarget.isABI_O32() ? 16 : 0);
255
251 // Adjust local variables. They should come on the stack right
252 // after the arguments.
253 int LastOffsetFI = -1;
254 for (int i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
255 if (i >= MinCSFI && i <= MaxCSFI)
256 continue;
257 if (MFI->isDeadObjectIndex(i))
258 continue;
256 // Adjust local variables. They should come on the stack right
257 // after the arguments.
258 int LastOffsetFI = -1;
259 for (int i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
260 if (i >= MinCSFI && i <= MaxCSFI)
261 continue;
262 if (MFI->isDeadObjectIndex(i))
263 continue;
259 unsigned Offset = MFI->getObjectOffset(i) - CalleeSavedAreaSize;
264 unsigned Offset =
265 StackOffset + MFI->getObjectOffset(i) - CalleeSavedAreaSize;
260 if (LastOffsetFI == -1)
261 LastOffsetFI = i;
262 if (Offset > MFI->getObjectOffset(LastOffsetFI))
263 LastOffsetFI = i;
264 MFI->setObjectOffset(i, Offset);
265 }
266
267 // Adjust CPU Callee Saved Registers Area. Registers RA and FP must
266 if (LastOffsetFI == -1)
267 LastOffsetFI = i;
268 if (Offset > MFI->getObjectOffset(LastOffsetFI))
269 LastOffsetFI = i;
270 MFI->setObjectOffset(i, Offset);
271 }
272
273 // Adjust CPU Callee Saved Registers Area. Registers RA and FP must
268 // be saved in this CPU Area there is the need. This whole Area must
269 // be aligned to the default Stack Alignment requirements.
270 unsigned StackOffset = 0;
271 unsigned RegSize = Subtarget.isGP32bit() ? 4 : 8;
272
274 // be saved in this CPU Area. This whole area must be aligned to the
275 // default Stack Alignment requirements.
273 if (LastOffsetFI >= 0)
274 StackOffset = MFI->getObjectOffset(LastOffsetFI)+
275 MFI->getObjectSize(LastOffsetFI);
276 StackOffset = ((StackOffset+StackAlign-1)/StackAlign*StackAlign);
277
278 for (unsigned i = 0, e = CSI.size(); i != e ; ++i) {
279 if (CSI[i].getRegClass() != Mips::CPURegsRegisterClass)
280 break;
281 MFI->setObjectOffset(CSI[i].getFrameIdx(), StackOffset);
282 TopCPUSavedRegOff = StackOffset;
283 StackOffset += MFI->getObjectAlignment(CSI[i].getFrameIdx());
284 }
285
276 if (LastOffsetFI >= 0)
277 StackOffset = MFI->getObjectOffset(LastOffsetFI)+
278 MFI->getObjectSize(LastOffsetFI);
279 StackOffset = ((StackOffset+StackAlign-1)/StackAlign*StackAlign);
280
281 for (unsigned i = 0, e = CSI.size(); i != e ; ++i) {
282 if (CSI[i].getRegClass() != Mips::CPURegsRegisterClass)
283 break;
284 MFI->setObjectOffset(CSI[i].getFrameIdx(), StackOffset);
285 TopCPUSavedRegOff = StackOffset;
286 StackOffset += MFI->getObjectAlignment(CSI[i].getFrameIdx());
287 }
288
286 if (hasFP(MF)) {
289 // Stack locations for FP and RA. If only one of them is used,
290 // the space must be allocated for both, otherwise no space at all.
291 if (hasFP(MF) || MFI->hasCalls()) {
292 // FP stack location
287 MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize, true),
288 StackOffset);
289 MipsFI->setFPStackOffset(StackOffset);
290 TopCPUSavedRegOff = StackOffset;
291 StackOffset += RegSize;
293 MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize, true),
294 StackOffset);
295 MipsFI->setFPStackOffset(StackOffset);
296 TopCPUSavedRegOff = StackOffset;
297 StackOffset += RegSize;
292 }
293
298
294 if (MFI->hasCalls()) {
299 // SP stack location
295 MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize, true),
296 StackOffset);
297 MipsFI->setRAStackOffset(StackOffset);
300 MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize, true),
301 StackOffset);
302 MipsFI->setRAStackOffset(StackOffset);
298 TopCPUSavedRegOff = StackOffset;
299 StackOffset += RegSize;
303 StackOffset += RegSize;
304
305 if (MFI->hasCalls())
306 TopCPUSavedRegOff += RegSize;
300 }
307 }
308
301 StackOffset = ((StackOffset+StackAlign-1)/StackAlign*StackAlign);
302
303 // Adjust FPU Callee Saved Registers Area. This Area must be
304 // aligned to the default Stack Alignment requirements.
305 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
306 if (CSI[i].getRegClass() == Mips::CPURegsRegisterClass)
307 continue;
308 MFI->setObjectOffset(CSI[i].getFrameIdx(), StackOffset);

--- 216 unchanged lines hidden --- 		309 StackOffset = ((StackOffset+StackAlign-1)/StackAlign*StackAlign);
310
311 // Adjust FPU Callee Saved Registers Area. This Area must be
312 // aligned to the default Stack Alignment requirements.
313 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
314 if (CSI[i].getRegClass() == Mips::CPURegsRegisterClass)
315 continue;
316 MFI->setObjectOffset(CSI[i].getFrameIdx(), StackOffset);

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