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MSP430ISelDAGToDAG.cpp (202375) MSP430ISelDAGToDAG.cpp (203954)
1//===-- MSP430ISelDAGToDAG.cpp - A dag to dag inst selector for MSP430 ----===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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128 virtual const char *getPassName() const {
129 return "MSP430 DAG->DAG Pattern Instruction Selection";
130 }
131
132 bool MatchAddress(SDValue N, MSP430ISelAddressMode &AM);
133 bool MatchWrapper(SDValue N, MSP430ISelAddressMode &AM);
134 bool MatchAddressBase(SDValue N, MSP430ISelAddressMode &AM);
135
1//===-- MSP430ISelDAGToDAG.cpp - A dag to dag inst selector for MSP430 ----===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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128 virtual const char *getPassName() const {
129 return "MSP430 DAG->DAG Pattern Instruction Selection";
130 }
131
132 bool MatchAddress(SDValue N, MSP430ISelAddressMode &AM);
133 bool MatchWrapper(SDValue N, MSP430ISelAddressMode &AM);
134 bool MatchAddressBase(SDValue N, MSP430ISelAddressMode &AM);
135
136 bool IsLegalAndProfitableToFold(SDNode *N, SDNode *U,
137 SDNode *Root) const;
136 bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root) const;
138
139 virtual bool
140 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
141 std::vector<SDValue> &OutOps);
142
143 // Include the pieces autogenerated from the target description.
144 #include "MSP430GenDAGISel.inc"
145

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331 break;
332 }
333
334 OutOps.push_back(Op0);
335 OutOps.push_back(Op1);
336 return false;
337}
338
137
138 virtual bool
139 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
140 std::vector<SDValue> &OutOps);
141
142 // Include the pieces autogenerated from the target description.
143 #include "MSP430GenDAGISel.inc"
144

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330 break;
331 }
332
333 OutOps.push_back(Op0);
334 OutOps.push_back(Op1);
335 return false;
336}
337
339bool MSP430DAGToDAGISel::IsLegalAndProfitableToFold(SDNode *N, SDNode *U,
340 SDNode *Root) const {
338bool MSP430DAGToDAGISel::IsLegalToFold(SDValue N, SDNode *U,
339 SDNode *Root) const {
341 if (OptLevel == CodeGenOpt::None) return false;
342
343 /// RMW preprocessing creates the following code:
344 /// [Load1]
345 /// ^ ^
346 /// / |
347 /// / |
348 /// [Load2] |

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359 ///
360 /// The path Store => Load2 => Load1 is via chain. Note that in general it is
361 /// not allowed to fold Load1 into Op (and Store) since it will creates a
362 /// cycle. However, this is perfectly legal for the loads moved below the
363 /// TokenFactor by PreprocessForRMW. Query the map Store => Load1 (created
364 /// during preprocessing) to determine whether it's legal to introduce such
365 /// "cycle" for a moment.
366 DenseMap<SDNode*, SDNode*>::const_iterator I = RMWStores.find(Root);
340 if (OptLevel == CodeGenOpt::None) return false;
341
342 /// RMW preprocessing creates the following code:
343 /// [Load1]
344 /// ^ ^
345 /// / |
346 /// / |
347 /// [Load2] |

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358 ///
359 /// The path Store => Load2 => Load1 is via chain. Note that in general it is
360 /// not allowed to fold Load1 into Op (and Store) since it will creates a
361 /// cycle. However, this is perfectly legal for the loads moved below the
362 /// TokenFactor by PreprocessForRMW. Query the map Store => Load1 (created
363 /// during preprocessing) to determine whether it's legal to introduce such
364 /// "cycle" for a moment.
365 DenseMap<SDNode*, SDNode*>::const_iterator I = RMWStores.find(Root);
367 if (I != RMWStores.end() && I->second == N)
366 if (I != RMWStores.end() && I->second == N.getNode())
368 return true;
369
370 // Proceed to 'generic' cycle finder code
367 return true;
368
369 // Proceed to 'generic' cycle finder code
371 return SelectionDAGISel::IsLegalAndProfitableToFold(N, U, Root);
370 return SelectionDAGISel::IsLegalToFold(N, U, Root);
372}
373
374
375/// MoveBelowTokenFactor - Replace TokenFactor operand with load's chain operand
376/// and move load below the TokenFactor. Replace store's chain operand with
377/// load's chain result.
378static void MoveBelowTokenFactor(SelectionDAG *CurDAG, SDValue Load,
379 SDValue Store, SDValue TF) {

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651 LD->getBasePtr(), LD->getChain());
652}
653
654SDNode *MSP430DAGToDAGISel::SelectIndexedBinOp(SDNode *Op,
655 SDValue N1, SDValue N2,
656 unsigned Opc8, unsigned Opc16) {
657 if (N1.getOpcode() == ISD::LOAD &&
658 N1.hasOneUse() &&
371}
372
373
374/// MoveBelowTokenFactor - Replace TokenFactor operand with load's chain operand
375/// and move load below the TokenFactor. Replace store's chain operand with
376/// load's chain result.
377static void MoveBelowTokenFactor(SelectionDAG *CurDAG, SDValue Load,
378 SDValue Store, SDValue TF) {

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650 LD->getBasePtr(), LD->getChain());
651}
652
653SDNode *MSP430DAGToDAGISel::SelectIndexedBinOp(SDNode *Op,
654 SDValue N1, SDValue N2,
655 unsigned Opc8, unsigned Opc16) {
656 if (N1.getOpcode() == ISD::LOAD &&
657 N1.hasOneUse() &&
659 IsLegalAndProfitableToFold(N1.getNode(), Op, Op)) {
658 IsLegalToFold(N1, Op, Op)) {
660 LoadSDNode *LD = cast<LoadSDNode>(N1);
661 if (!isValidIndexedLoad(LD))
662 return NULL;
663
664 MVT VT = LD->getMemoryVT().getSimpleVT();
665 unsigned Opc = (VT == MVT::i16 ? Opc16 : Opc8);
666 MachineSDNode::mmo_iterator MemRefs0 = MF->allocateMemRefsArray(1);
667 MemRefs0[0] = cast<MemSDNode>(N1)->getMemOperand();

--- 154 unchanged lines hidden --- 		659 LoadSDNode *LD = cast<LoadSDNode>(N1);
660 if (!isValidIndexedLoad(LD))
661 return NULL;
662
663 MVT VT = LD->getMemoryVT().getSimpleVT();
664 unsigned Opc = (VT == MVT::i16 ? Opc16 : Opc8);
665 MachineSDNode::mmo_iterator MemRefs0 = MF->allocateMemRefsArray(1);
666 MemRefs0[0] = cast<MemSDNode>(N1)->getMemOperand();

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