| ARMJITInfo.cpp (199989) | ARMJITInfo.cpp (201360) |
|---|---|
| 1//===-- ARMJITInfo.cpp - Implement the JIT interfaces for the ARM target --===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 125 unchanged lines hidden (view full) --- 134TargetJITInfo::LazyResolverFn 135ARMJITInfo::getLazyResolverFunction(JITCompilerFn F) { 136 JITCompilerFunction = F; 137 return ARMCompilationCallback; 138} 139 140void *ARMJITInfo::emitGlobalValueIndirectSym(const GlobalValue *GV, void *Ptr, 141 JITCodeEmitter &JCE) { | 1//===-- ARMJITInfo.cpp - Implement the JIT interfaces for the ARM target --===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 125 unchanged lines hidden (view full) --- 134TargetJITInfo::LazyResolverFn 135ARMJITInfo::getLazyResolverFunction(JITCompilerFn F) { 136 JITCompilerFunction = F; 137 return ARMCompilationCallback; 138} 139 140void *ARMJITInfo::emitGlobalValueIndirectSym(const GlobalValue *GV, void *Ptr, 141 JITCodeEmitter &JCE) { |
| 142 MachineCodeEmitter::BufferState BS; 143 JCE.startGVStub(BS, GV, 4, 4); 144 intptr_t Addr = (intptr_t)JCE.getCurrentPCValue(); 145 if (!sys::Memory::setRangeWritable((void*)Addr, 4)) { 146 llvm_unreachable("ERROR: Unable to mark indirect symbol writable"); 147 } 148 JCE.emitWordLE((intptr_t)Ptr); 149 if (!sys::Memory::setRangeExecutable((void*)Addr, 4)) { 150 llvm_unreachable("ERROR: Unable to mark indirect symbol executable"); 151 } 152 void *PtrAddr = JCE.finishGVStub(BS); | 142 uint8_t Buffer[4]; 143 uint8_t *Cur = Buffer; 144 MachineCodeEmitter::emitWordLEInto(Cur, (intptr_t)Ptr); 145 void *PtrAddr = JCE.allocIndirectGV( 146 GV, Buffer, sizeof(Buffer), /*Alignment=*/4); |
| 153 addIndirectSymAddr(Ptr, (intptr_t)PtrAddr); 154 return PtrAddr; 155} 156 157TargetJITInfo::StubLayout ARMJITInfo::getStubLayout() { 158 // The stub contains up to 3 4-byte instructions, aligned at 4 bytes, and a 159 // 4-byte address. See emitFunctionStub for details. 160 StubLayout Result = {16, 4}; --- 169 unchanged lines hidden --- | 147 addIndirectSymAddr(Ptr, (intptr_t)PtrAddr); 148 return PtrAddr; 149} 150 151TargetJITInfo::StubLayout ARMJITInfo::getStubLayout() { 152 // The stub contains up to 3 4-byte instructions, aligned at 4 bytes, and a 153 // 4-byte address. See emitFunctionStub for details. 154 StubLayout Result = {16, 4}; --- 169 unchanged lines hidden --- |