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LegalizeDAG.cpp (193574) LegalizeDAG.cpp (193630)
1//===-- LegalizeDAG.cpp - Implement SelectionDAG::Legalize ----------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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1780 PseudoSourceValue::getFixedStack(SPFI), 0);
1781}
1782
1783
1784/// ExpandBUILD_VECTOR - Expand a BUILD_VECTOR node on targets that don't
1785/// support the operation, but do support the resultant vector type.
1786SDValue SelectionDAGLegalize::ExpandBUILD_VECTOR(SDNode *Node) {
1787 unsigned NumElems = Node->getNumOperands();
1//===-- LegalizeDAG.cpp - Implement SelectionDAG::Legalize ----------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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1780 PseudoSourceValue::getFixedStack(SPFI), 0);
1781}
1782
1783
1784/// ExpandBUILD_VECTOR - Expand a BUILD_VECTOR node on targets that don't
1785/// support the operation, but do support the resultant vector type.
1786SDValue SelectionDAGLegalize::ExpandBUILD_VECTOR(SDNode *Node) {
1787 unsigned NumElems = Node->getNumOperands();
1788 SDValue SplatValue = Node->getOperand(0);
1788 SDValue Value1, Value2;
1789 DebugLoc dl = Node->getDebugLoc();
1790 MVT VT = Node->getValueType(0);
1789 DebugLoc dl = Node->getDebugLoc();
1790 MVT VT = Node->getValueType(0);
1791 MVT OpVT = SplatValue.getValueType();
1791 MVT OpVT = Node->getOperand(0).getValueType();
1792 MVT EltVT = VT.getVectorElementType();
1793
1794 // If the only non-undef value is the low element, turn this into a
1795 // SCALAR_TO_VECTOR node. If this is { X, X, X, X }, determine X.
1796 bool isOnlyLowElement = true;
1792 MVT EltVT = VT.getVectorElementType();
1793
1794 // If the only non-undef value is the low element, turn this into a
1795 // SCALAR_TO_VECTOR node. If this is { X, X, X, X }, determine X.
1796 bool isOnlyLowElement = true;
1797
1798 // FIXME: it would be far nicer to change this into map<SDValue,uint64_t>
1799 // and use a bitmask instead of a list of elements.
1800 // FIXME: this doesn't treat <0, u, 0, u> for example, as a splat.
1801 std::map<SDValue, std::vector<unsigned> > Values;
1802 Values[SplatValue].push_back(0);
1797 bool MoreThanTwoValues = false;
1803 bool isConstant = true;
1798 bool isConstant = true;
1804 if (!isa<ConstantFPSDNode>(SplatValue) && !isa<ConstantSDNode>(SplatValue) &&
1805 SplatValue.getOpcode() != ISD::UNDEF)
1806 isConstant = false;
1807
1808 for (unsigned i = 1; i < NumElems; ++i) {
1799 for (unsigned i = 0; i < NumElems; ++i) {
1809 SDValue V = Node->getOperand(i);
1800 SDValue V = Node->getOperand(i);
1810 Values[V].push_back(i);
1811 if (V.getOpcode() != ISD::UNDEF)
1801 if (V.getOpcode() == ISD::UNDEF)
1802 continue;
1803 if (i > 0)
1812 isOnlyLowElement = false;
1804 isOnlyLowElement = false;
1813 if (SplatValue != V)
1814 SplatValue = SDValue(0, 0);
1815
1816 // If this isn't a constant element or an undef, we can't use a constant
1817 // pool load.
1818 if (!isa<ConstantFPSDNode>(V) && !isa<ConstantSDNode>(V) &&
1819 V.getOpcode() != ISD::UNDEF)
1805 if (!isa<ConstantFPSDNode>(V) && !isa<ConstantSDNode>(V))
1820 isConstant = false;
1806 isConstant = false;
1807
1808 if (!Value1.getNode()) {
1809 Value1 = V;
1810 } else if (!Value2.getNode()) {
1811 if (V != Value1)
1812 Value2 = V;
1813 } else if (V != Value1 && V != Value2) {
1814 MoreThanTwoValues = true;
1815 }
1821 }
1822
1816 }
1817
1823 if (isOnlyLowElement) {
1824 // If the low element is an undef too, then this whole things is an undef.
1825 if (Node->getOperand(0).getOpcode() == ISD::UNDEF)
1826 return DAG.getUNDEF(VT);
1827 // Otherwise, turn this into a scalar_to_vector node.
1818 if (!Value1.getNode())
1819 return DAG.getUNDEF(VT);
1820
1821 if (isOnlyLowElement)
1828 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Node->getOperand(0));
1822 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Node->getOperand(0));
1829 }
1830
1831 // If all elements are constants, create a load from the constant pool.
1832 if (isConstant) {
1833 std::vector<Constant*> CV;
1834 for (unsigned i = 0, e = NumElems; i != e; ++i) {
1835 if (ConstantFPSDNode *V =
1836 dyn_cast<ConstantFPSDNode>(Node->getOperand(i))) {
1837 CV.push_back(const_cast<ConstantFP *>(V->getConstantFPValue()));

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1847 Constant *CP = ConstantVector::get(CV);
1848 SDValue CPIdx = DAG.getConstantPool(CP, TLI.getPointerTy());
1849 unsigned Alignment = cast<ConstantPoolSDNode>(CPIdx)->getAlignment();
1850 return DAG.getLoad(VT, dl, DAG.getEntryNode(), CPIdx,
1851 PseudoSourceValue::getConstantPool(), 0,
1852 false, Alignment);
1853 }
1854
1823
1824 // If all elements are constants, create a load from the constant pool.
1825 if (isConstant) {
1826 std::vector<Constant*> CV;
1827 for (unsigned i = 0, e = NumElems; i != e; ++i) {
1828 if (ConstantFPSDNode *V =
1829 dyn_cast<ConstantFPSDNode>(Node->getOperand(i))) {
1830 CV.push_back(const_cast<ConstantFP *>(V->getConstantFPValue()));

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1840 Constant *CP = ConstantVector::get(CV);
1841 SDValue CPIdx = DAG.getConstantPool(CP, TLI.getPointerTy());
1842 unsigned Alignment = cast<ConstantPoolSDNode>(CPIdx)->getAlignment();
1843 return DAG.getLoad(VT, dl, DAG.getEntryNode(), CPIdx,
1844 PseudoSourceValue::getConstantPool(), 0,
1845 false, Alignment);
1846 }
1847
1855 if (SplatValue.getNode()) { // Splat of one value?
1856 // Build the shuffle constant vector: <0, 0, 0, 0>
1857 SmallVector<int, 8> ZeroVec(NumElems, 0);
1858
1859 // If the target supports VECTOR_SHUFFLE and this shuffle mask, use it.
1860 if (TLI.isShuffleMaskLegal(ZeroVec, Node->getValueType(0))) {
1848 if (!MoreThanTwoValues) {
1849 SmallVector<int, 8> ShuffleVec(NumElems, -1);
1850 for (unsigned i = 0; i < NumElems; ++i) {
1851 SDValue V = Node->getOperand(i);
1852 if (V.getOpcode() == ISD::UNDEF)
1853 continue;
1854 ShuffleVec[i] = V == Value1 ? 0 : NumElems;
1855 }
1856 if (TLI.isShuffleMaskLegal(ShuffleVec, Node->getValueType(0))) {
1861 // Get the splatted value into the low element of a vector register.
1857 // Get the splatted value into the low element of a vector register.
1862 SDValue LowValVec =
1863 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, SplatValue);
1858 SDValue Vec1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value1);
1859 SDValue Vec2;
1860 if (Value2.getNode())
1861 Vec2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value2);
1862 else
1863 Vec2 = DAG.getUNDEF(VT);
1864
1865 // Return shuffle(LowValVec, undef, <0,0,0,0>)
1864
1865 // Return shuffle(LowValVec, undef, <0,0,0,0>)
1866 return DAG.getVectorShuffle(VT, dl, LowValVec, DAG.getUNDEF(VT),
1867 &ZeroVec[0]);
1866 return DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec.data());
1868 }
1869 }
1870
1867 }
1868 }
1869
1871 // If there are only two unique elements, we may be able to turn this into a
1872 // vector shuffle.
1873 if (Values.size() == 2) {
1874 // Get the two values in deterministic order.
1875 SDValue Val1 = Node->getOperand(1);
1876 SDValue Val2;
1877 std::map<SDValue, std::vector<unsigned> >::iterator MI = Values.begin();
1878 if (MI->first != Val1)
1879 Val2 = MI->first;
1880 else
1881 Val2 = (++MI)->first;
1882
1883 // If Val1 is an undef, make sure it ends up as Val2, to ensure that our
1884 // vector shuffle has the undef vector on the RHS.
1885 if (Val1.getOpcode() == ISD::UNDEF)
1886 std::swap(Val1, Val2);
1887
1888 // Build the shuffle constant vector: e.g. <0, 4, 0, 4>
1889 SmallVector<int, 8> ShuffleMask(NumElems, -1);
1890
1891 // Set elements of the shuffle mask for Val1.
1892 std::vector<unsigned> &Val1Elts = Values[Val1];
1893 for (unsigned i = 0, e = Val1Elts.size(); i != e; ++i)
1894 ShuffleMask[Val1Elts[i]] = 0;
1895
1896 // Set elements of the shuffle mask for Val2.
1897 std::vector<unsigned> &Val2Elts = Values[Val2];
1898 for (unsigned i = 0, e = Val2Elts.size(); i != e; ++i)
1899 if (Val2.getOpcode() != ISD::UNDEF)
1900 ShuffleMask[Val2Elts[i]] = NumElems;
1901
1902 // If the target supports SCALAR_TO_VECTOR and this shuffle mask, use it.
1903 if (TLI.isOperationLegalOrCustom(ISD::SCALAR_TO_VECTOR, VT) &&
1904 TLI.isShuffleMaskLegal(ShuffleMask, VT)) {
1905 Val1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Val1);
1906 Val2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Val2);
1907 return DAG.getVectorShuffle(VT, dl, Val1, Val2, &ShuffleMask[0]);
1908 }
1909 }
1910
1911 // Otherwise, we can't handle this case efficiently.
1912 return ExpandVectorBuildThroughStack(Node);
1913}
1914
1915// ExpandLibCall - Expand a node into a call to a libcall. If the result value
1916// does not fit into a register, return the lo part and set the hi part to the
1917// by-reg argument. If it does fit into a single register, return the result
1918// and leave the Hi part unset.

--- 1180 unchanged lines hidden --- 		1870 // Otherwise, we can't handle this case efficiently.
1871 return ExpandVectorBuildThroughStack(Node);
1872}
1873
1874// ExpandLibCall - Expand a node into a call to a libcall. If the result value
1875// does not fit into a register, return the lo part and set the hi part to the
1876// by-reg argument. If it does fit into a single register, return the result
1877// and leave the Hi part unset.

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