| LiveVariables.cpp (208954) | LiveVariables.cpp (210299) |
|---|---|
| 1//===-- LiveVariables.cpp - Live Variable Analysis for Machine Code -------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 272 unchanged lines hidden (view full) --- 281} 282 283/// FindLastRefOrPartRef - Return the last reference or partial reference of 284/// the specified register. 285MachineInstr *LiveVariables::FindLastRefOrPartRef(unsigned Reg) { 286 MachineInstr *LastDef = PhysRegDef[Reg]; 287 MachineInstr *LastUse = PhysRegUse[Reg]; 288 if (!LastDef && !LastUse) | 1//===-- LiveVariables.cpp - Live Variable Analysis for Machine Code -------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 272 unchanged lines hidden (view full) --- 281} 282 283/// FindLastRefOrPartRef - Return the last reference or partial reference of 284/// the specified register. 285MachineInstr *LiveVariables::FindLastRefOrPartRef(unsigned Reg) { 286 MachineInstr *LastDef = PhysRegDef[Reg]; 287 MachineInstr *LastUse = PhysRegUse[Reg]; 288 if (!LastDef && !LastUse) |
| 289 return false; | 289 return 0; |
| 290 291 MachineInstr *LastRefOrPartRef = LastUse ? LastUse : LastDef; 292 unsigned LastRefOrPartRefDist = DistanceMap[LastRefOrPartRef]; 293 unsigned LastPartDefDist = 0; 294 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); 295 unsigned SubReg = *SubRegs; ++SubRegs) { 296 MachineInstr *Def = PhysRegDef[SubReg]; 297 if (Def && Def != LastDef) { --- 306 unchanged lines hidden (view full) --- 604 E = VarInfoVec.end(); I != E; ++I) 605 // Mark it alive only in the block we are representing. 606 MarkVirtRegAliveInBlock(getVarInfo(*I),MRI->getVRegDef(*I)->getParent(), 607 MBB); 608 } 609 610 // Finally, if the last instruction in the block is a return, make sure to 611 // mark it as using all of the live-out values in the function. | 290 291 MachineInstr *LastRefOrPartRef = LastUse ? LastUse : LastDef; 292 unsigned LastRefOrPartRefDist = DistanceMap[LastRefOrPartRef]; 293 unsigned LastPartDefDist = 0; 294 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); 295 unsigned SubReg = *SubRegs; ++SubRegs) { 296 MachineInstr *Def = PhysRegDef[SubReg]; 297 if (Def && Def != LastDef) { --- 306 unchanged lines hidden (view full) --- 604 E = VarInfoVec.end(); I != E; ++I) 605 // Mark it alive only in the block we are representing. 606 MarkVirtRegAliveInBlock(getVarInfo(*I),MRI->getVRegDef(*I)->getParent(), 607 MBB); 608 } 609 610 // Finally, if the last instruction in the block is a return, make sure to 611 // mark it as using all of the live-out values in the function. |
| 612 if (!MBB->empty() && MBB->back().getDesc().isReturn()) { | 612 // Things marked both call and return are tail calls; do not do this for 613 // them. The tail callee need not take the same registers as input 614 // that it produces as output, and there are dependencies for its input 615 // registers elsewhere. 616 if (!MBB->empty() && MBB->back().getDesc().isReturn() 617 && !MBB->back().getDesc().isCall()) { |
| 613 MachineInstr *Ret = &MBB->back(); 614 615 for (MachineRegisterInfo::liveout_iterator 616 I = MF->getRegInfo().liveout_begin(), 617 E = MF->getRegInfo().liveout_end(); I != E; ++I) { 618 assert(TargetRegisterInfo::isPhysicalRegister(*I) && 619 "Cannot have a live-out virtual register!"); 620 HandlePhysRegUse(*I, Ret); --- 173 unchanged lines hidden --- | 618 MachineInstr *Ret = &MBB->back(); 619 620 for (MachineRegisterInfo::liveout_iterator 621 I = MF->getRegInfo().liveout_begin(), 622 E = MF->getRegInfo().liveout_end(); I != E; ++I) { 623 assert(TargetRegisterInfo::isPhysicalRegister(*I) && 624 "Cannot have a live-out virtual register!"); 625 HandlePhysRegUse(*I, Ret); --- 173 unchanged lines hidden --- |