ofw_pcib_subr.c (163260) | ofw_pcib_subr.c (170930) |
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1/*- 2 * Copyright (c) 2003 by Thomas Moestl <tmm@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 21 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 23 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2003 by Thomas Moestl <tmm@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 21 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 23 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26#include <sys/cdefs.h> |
27__FBSDID("$FreeBSD: head/sys/sparc64/pci/ofw_pcib_subr.c 163260 2006-10-12 04:44:01Z kmacy $"); | 27__FBSDID("$FreeBSD: head/sys/sparc64/pci/ofw_pcib_subr.c 170930 2007-06-18 21:49:42Z marius $"); |
28 29#include "opt_ofw_pci.h" | 28 29#include "opt_ofw_pci.h" |
30#include "opt_global.h" | |
31 32#include <sys/param.h> 33#include <sys/systm.h> 34#include <sys/bus.h> 35 36#include <dev/ofw/ofw_bus.h> 37#include <dev/ofw/ofw_pci.h> 38#include <dev/ofw/openfirm.h> --- 10 unchanged lines hidden (view full) --- 49#include <sparc64/pci/ofw_pci.h> 50#include <sparc64/pci/ofw_pcib_subr.h> 51 52void 53ofw_pcib_gen_setup(device_t bridge) 54{ 55 struct ofw_pcib_gen_softc *sc; 56#ifndef SUN4V | 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/bus.h> 34 35#include <dev/ofw/ofw_bus.h> 36#include <dev/ofw/ofw_pci.h> 37#include <dev/ofw/openfirm.h> --- 10 unchanged lines hidden (view full) --- 48#include <sparc64/pci/ofw_pci.h> 49#include <sparc64/pci/ofw_pcib_subr.h> 50 51void 52ofw_pcib_gen_setup(device_t bridge) 53{ 54 struct ofw_pcib_gen_softc *sc; 55#ifndef SUN4V |
57 u_int secbus; | 56 int secbus; |
58 59#endif 60 sc = device_get_softc(bridge); 61 sc->ops_pcib_sc.dev = bridge; 62 sc->ops_node = ofw_bus_get_node(bridge); 63 KASSERT(sc->ops_node != 0, 64 ("ofw_pcib_gen_setup: no ofw pci parent bus!")); 65 66 /* | 57 58#endif 59 sc = device_get_softc(bridge); 60 sc->ops_pcib_sc.dev = bridge; 61 sc->ops_node = ofw_bus_get_node(bridge); 62 KASSERT(sc->ops_node != 0, 63 ("ofw_pcib_gen_setup: no ofw pci parent bus!")); 64 65 /* |
67 * Setup the secondary bus number register, by allocating a new unique 68 * bus number for it; the firmware preset does not always seem to be 69 * correct. | 66 * Setup the secondary bus number register, if supported, by 67 * allocating a new unique bus number for it; the firmware 68 * preset does not always seem to be correct in that case. |
70 */ 71#ifndef SUN4V | 69 */ 70#ifndef SUN4V |
72 secbus = ofw_pci_alloc_busno(sc->ops_node); 73 pci_write_config(bridge, PCIR_PRIBUS_1, pci_get_bus(bridge), 1); 74 pci_write_config(bridge, PCIR_SECBUS_1, secbus, 1); 75 pci_write_config(bridge, PCIR_SUBBUS_1, secbus, 1); 76 sc->ops_pcib_sc.subbus = sc->ops_pcib_sc.secbus = secbus; 77 /* Notify parent bridges. */ 78 OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), secbus); | 71 secbus = OFW_PCI_ALLOC_BUSNO(bridge); 72 if (secbus != -1) { 73 pci_write_config(bridge, PCIR_PRIBUS_1, pci_get_bus(bridge), 1); 74 pci_write_config(bridge, PCIR_SECBUS_1, secbus, 1); 75 pci_write_config(bridge, PCIR_SUBBUS_1, secbus, 1); 76 sc->ops_pcib_sc.subbus = sc->ops_pcib_sc.secbus = secbus; 77 /* Notify parent bridges. */ 78 OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), secbus); 79 } |
79 80#endif 81 ofw_bus_setup_iinfo(sc->ops_node, &sc->ops_iinfo, 82 sizeof(ofw_pci_intr_t)); 83} 84 85int 86ofw_pcib_gen_route_interrupt(device_t bridge, device_t dev, int intpin) --- 43 unchanged lines hidden (view full) --- 130ofw_pcib_gen_adjust_busrange(device_t bridge, u_int subbus) 131{ 132 struct ofw_pcib_gen_softc *sc; 133 134 sc = device_get_softc(bridge); 135 if (subbus > sc->ops_pcib_sc.subbus) { 136#ifdef OFW_PCI_DEBUG 137 device_printf(bridge, | 80 81#endif 82 ofw_bus_setup_iinfo(sc->ops_node, &sc->ops_iinfo, 83 sizeof(ofw_pci_intr_t)); 84} 85 86int 87ofw_pcib_gen_route_interrupt(device_t bridge, device_t dev, int intpin) --- 43 unchanged lines hidden (view full) --- 131ofw_pcib_gen_adjust_busrange(device_t bridge, u_int subbus) 132{ 133 struct ofw_pcib_gen_softc *sc; 134 135 sc = device_get_softc(bridge); 136 if (subbus > sc->ops_pcib_sc.subbus) { 137#ifdef OFW_PCI_DEBUG 138 device_printf(bridge, |
138 "adjusting secondary bus number from %d to %d\n", | 139 "adjusting subordinate bus number from %d to %d\n", |
139 sc->ops_pcib_sc.subbus, subbus); 140#endif 141 pci_write_config(bridge, PCIR_SUBBUS_1, subbus, 1); 142 sc->ops_pcib_sc.subbus = subbus; 143 /* Notify parent bridges. */ 144 OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), subbus); 145 } 146} | 140 sc->ops_pcib_sc.subbus, subbus); 141#endif 142 pci_write_config(bridge, PCIR_SUBBUS_1, subbus, 1); 143 sc->ops_pcib_sc.subbus = subbus; 144 /* Notify parent bridges. */ 145 OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), subbus); 146 } 147} |