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ofw_pci_if.m (166092) ofw_pci_if.m (170930)
1#-
2# Copyright (c) 2001, 2003 by Thomas Moestl <tmm@FreeBSD.org>
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8# 1. Redistributions of source code must retain the above copyright

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17# IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
18# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
19# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
20# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
21# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
22# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
23# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24#
1#-
2# Copyright (c) 2001, 2003 by Thomas Moestl <tmm@FreeBSD.org>
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8# 1. Redistributions of source code must retain the above copyright

--- 8 unchanged lines hidden (view full) ---

17# IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
18# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
19# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
20# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
21# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
22# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
23# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24#
25# $FreeBSD: head/sys/sparc64/pci/ofw_pci_if.m 166092 2007-01-18 13:52:44Z marius $
25# $FreeBSD: head/sys/sparc64/pci/ofw_pci_if.m 170930 2007-06-18 21:49:42Z marius $
26
27#include <sys/bus.h>
28
29#include <dev/ofw/openfirm.h>
30
31#include <sparc64/pci/ofw_pci.h>
32
33INTERFACE ofw_pci;
34
35CODE {
36 static ofw_pci_intr_pending_t ofw_pci_default_intr_pending;
26
27#include <sys/bus.h>
28
29#include <dev/ofw/openfirm.h>
30
31#include <sparc64/pci/ofw_pci.h>
32
33INTERFACE ofw_pci;
34
35CODE {
36 static ofw_pci_intr_pending_t ofw_pci_default_intr_pending;
37 static ofw_pci_alloc_busno_t ofw_pci_default_alloc_busno;
37 static ofw_pci_adjust_busrange_t ofw_pci_default_adjust_busrange;
38
39 static int
40 ofw_pci_default_intr_pending(device_t dev, ofw_pci_intr_t intr)
41 {
42
38 static ofw_pci_adjust_busrange_t ofw_pci_default_adjust_busrange;
39
40 static int
41 ofw_pci_default_intr_pending(device_t dev, ofw_pci_intr_t intr)
42 {
43
43 return (OFW_PCI_INTR_PENDING(device_get_parent(dev), intr));
44 if (device_get_parent(dev) != NULL)
45 return (OFW_PCI_INTR_PENDING(device_get_parent(dev),
46 intr));
47 return (0);
44 }
45
48 }
49
50 static int
51 ofw_pci_default_alloc_busno(device_t dev)
52 {
53
54 if (device_get_parent(dev) != NULL)
55 return (OFW_PCI_ALLOC_BUSNO(device_get_parent(dev)));
56 return (-1);
57 }
58
46 static void
47 ofw_pci_default_adjust_busrange(device_t dev, u_int busno)
48 {
49
59 static void
60 ofw_pci_default_adjust_busrange(device_t dev, u_int busno)
61 {
62
50 return (OFW_PCI_ADJUST_BUSRANGE(device_get_parent(dev), busno));
63 if (device_get_parent(dev) != NULL)
64 return (OFW_PCI_ADJUST_BUSRANGE(device_get_parent(dev),
65 busno));
51 }
52};
53
54# Return whether an interrupt request is pending for the INO intr.
55METHOD int intr_pending {
56 device_t dev;
57 ofw_pci_intr_t intr;
58} DEFAULT ofw_pci_default_intr_pending;
59
66 }
67};
68
69# Return whether an interrupt request is pending for the INO intr.
70METHOD int intr_pending {
71 device_t dev;
72 ofw_pci_intr_t intr;
73} DEFAULT ofw_pci_default_intr_pending;
74
60# Make sure that all PCI bridges up in the hierarchy contain this bus in their
61# subordinate bus range. This is required because we reenumerate all PCI
75# Allocate a bus number for reenumerating a PCI bus. A return value of -1
76# means that reenumeration is generally not supported, otherwise all PCI
77# busses must be reenumerated using bus numbers obtained via this method.
78METHOD int alloc_busno {
79 device_t dev;
80} DEFAULT ofw_pci_default_alloc_busno;
81
82# Make sure that all PCI bridges up in the hierarchy contain this bus in
83# their subordinate bus range. This is required when reenumerating the PCI
62# buses.
63METHOD void adjust_busrange {
64 device_t dev;
65 u_int subbus;
66} DEFAULT ofw_pci_default_adjust_busrange;
84# buses.
85METHOD void adjust_busrange {
86 device_t dev;
87 u_int subbus;
88} DEFAULT ofw_pci_default_adjust_busrange;