tte.h (182767) | tte.h (205258) |
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1/*- 2 * Copyright (c) 1997 Berkeley Software Design, Inc. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 12 unchanged lines hidden (view full) --- 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * from: BSDI: pmap.v9.h,v 1.10.2.6 1999/08/23 22:18:44 cp Exp | 1/*- 2 * Copyright (c) 1997 Berkeley Software Design, Inc. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 12 unchanged lines hidden (view full) --- 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * from: BSDI: pmap.v9.h,v 1.10.2.6 1999/08/23 22:18:44 cp Exp |
29 * $FreeBSD: head/sys/sparc64/include/tte.h 182767 2008-09-04 19:43:14Z marius $ | 29 * $FreeBSD: head/sys/sparc64/include/tte.h 205258 2010-03-17 20:23:14Z marius $ |
30 */ 31 32#ifndef _MACHINE_TTE_H_ 33#define _MACHINE_TTE_H_ 34 35#define TTE_SHIFT (5) 36 37#define TD_SIZE_SHIFT (61) 38#define TD_SOFT2_SHIFT (50) | 30 */ 31 32#ifndef _MACHINE_TTE_H_ 33#define _MACHINE_TTE_H_ 34 35#define TTE_SHIFT (5) 36 37#define TD_SIZE_SHIFT (61) 38#define TD_SOFT2_SHIFT (50) |
39#define TD_RSVD2_SHIFT (49) 40#define TD_SIZE2_SHIFT (48) |
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39#define TD_DIAG_SF_SHIFT (41) 40#define TD_RSVD_CH_SHIFT (43) | 41#define TD_DIAG_SF_SHIFT (41) 42#define TD_RSVD_CH_SHIFT (43) |
43#define TD_RSVD_OC_SHIFT (47) 44#define TD_RSVD_PT_SHIFT TD_RSVD_CH_SHIFT 45#define TD_RSVD_VE_SHIFT (41) |
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41#define TD_PA_SHIFT (13) 42#define TD_SOFT_SHIFT (7) 43 44#define TD_SIZE_BITS (2) 45#define TD_SOFT2_BITS (9) | 46#define TD_PA_SHIFT (13) 47#define TD_SOFT_SHIFT (7) 48 49#define TD_SIZE_BITS (2) 50#define TD_SOFT2_BITS (9) |
46#define TD_DIAG_SF_BITS (9) 47#define TD_RSVD_CH_BITS (7) 48#define TD_PA_CH_BITS (30) 49#define TD_PA_SF_BITS (28) | 51#define TD_RSVD2_BITS (1) /* US-IV+, SPARC64 VI, VII, VIIIfx */ 52#define TD_SIZE2_BITS (1) /* US-IV+, SPARC64 VI, VII, VIIIfx */ 53#define TD_DIAG_SF_BITS (9) /* US-I, II{,e,i} */ 54#define TD_RSVD_CH_BITS (7) /* US-III{,i,+}, US-IV, SPARC64 V */ 55#define TD_RSVD_OC_BITS (1) /* SPARC64 VI, VII */ 56#define TD_RSVD_PT_BITS (5) /* US-IV+, SPARC64 VI, VII */ 57#define TD_RSVD_VE_BITS (7) /* SPARC64 VIIIfx */ 58#define TD_PA_CH_BITS (30) /* US-III{,i,+}, US-IV{,+}, SPARC64 V */ 59#define TD_PA_OC_BITS (34) /* SPARC64 VI, VII */ 60#define TD_PA_SF_BITS (28) /* US-I, II{,e,i}, SPARC64 VIIIfx */ |
50#define TD_PA_BITS TD_PA_CH_BITS 51#define TD_SOFT_BITS (6) 52 53#define TD_SIZE_MASK ((1UL << TD_SIZE_BITS) - 1) 54#define TD_SOFT2_MASK ((1UL << TD_SOFT2_BITS) - 1) | 61#define TD_PA_BITS TD_PA_CH_BITS 62#define TD_SOFT_BITS (6) 63 64#define TD_SIZE_MASK ((1UL << TD_SIZE_BITS) - 1) 65#define TD_SOFT2_MASK ((1UL << TD_SOFT2_BITS) - 1) |
66#define TD_RSVD2_MASK ((1UL << TD_RSVD2_BITS) - 1) 67#define TD_SIZE2_MASK ((1UL << TD_SIZE2_BITS) - 1) |
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55#define TD_DIAG_SF_MASK ((1UL << TD_DIAG_SF_BITS) - 1) 56#define TD_RSVD_CH_MASK ((1UL << TD_RSVD_CH_BITS) - 1) | 68#define TD_DIAG_SF_MASK ((1UL << TD_DIAG_SF_BITS) - 1) 69#define TD_RSVD_CH_MASK ((1UL << TD_RSVD_CH_BITS) - 1) |
70#define TD_RSVD_OC_MASK ((1UL << TD_RSVD_OC_BITS) - 1) 71#define TD_RSVD_PT_MASK ((1UL << TD_RSVD_PT_BITS) - 1) 72#define TD_RSVD_VE_MASK ((1UL << TD_RSVD_VE_BITS) - 1) |
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57#define TD_PA_CH_MASK ((1UL << TD_PA_CH_BITS) - 1) | 73#define TD_PA_CH_MASK ((1UL << TD_PA_CH_BITS) - 1) |
74#define TD_PA_OC_MASK ((1UL << TD_PA_OC_BITS) - 1) |
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58#define TD_PA_SF_MASK ((1UL << TD_PA_SF_BITS) - 1) 59#define TD_PA_MASK ((1UL << TD_PA_BITS) - 1) 60#define TD_SOFT_MASK ((1UL << TD_SOFT_BITS) - 1) 61 62#define TS_8K (0UL) 63#define TS_64K (1UL) 64#define TS_512K (2UL) 65#define TS_4M (3UL) | 75#define TD_PA_SF_MASK ((1UL << TD_PA_SF_BITS) - 1) 76#define TD_PA_MASK ((1UL << TD_PA_BITS) - 1) 77#define TD_SOFT_MASK ((1UL << TD_SOFT_BITS) - 1) 78 79#define TS_8K (0UL) 80#define TS_64K (1UL) 81#define TS_512K (2UL) 82#define TS_4M (3UL) |
83#define TS_32M (4UL) /* US-IV+, SPARC64 VI, VII only */ 84#define TS_256M (5UL) /* US-IV+, SPARC64 VI, VII only */ 85#define TS_2G (6UL) /* SPARC64 VIIIfx only */ |
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66 67#define TS_MIN TS_8K 68#define TS_MAX TS_4M 69 70#define TD_V (1UL << 63) 71#define TD_8K (TS_8K << TD_SIZE_SHIFT) 72#define TD_64K (TS_64K << TD_SIZE_SHIFT) 73#define TD_512K (TS_512K << TD_SIZE_SHIFT) 74#define TD_4M (TS_4M << TD_SIZE_SHIFT) | 86 87#define TS_MIN TS_8K 88#define TS_MAX TS_4M 89 90#define TD_V (1UL << 63) 91#define TD_8K (TS_8K << TD_SIZE_SHIFT) 92#define TD_64K (TS_64K << TD_SIZE_SHIFT) 93#define TD_512K (TS_512K << TD_SIZE_SHIFT) 94#define TD_4M (TS_4M << TD_SIZE_SHIFT) |
95#define TD_32M \ 96 (((TS_32M & TD_SIZE_MASK) << TD_SIZE_SHIFT) | \ 97 (TD_SIZE2_MASK << TD_SIZE2_SHIFT)) 98#define TD_256M \ 99 (((TS_256M & TD_SIZE_MASK) << TD_SIZE_SHIFT) | \ 100 (TD_SIZE2_MASK << TD_SIZE2_SHIFT)) 101#define TD_2G \ 102 (((TS_2G & TD_SIZE_MASK) << TD_SIZE_SHIFT) | \ 103 (TD_SIZE2_MASK << TD_SIZE2_SHIFT)) |
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75#define TD_NFO (1UL << 60) 76#define TD_IE (1UL << 59) 77#define TD_PA(pa) ((pa) & (TD_PA_MASK << TD_PA_SHIFT)) 78/* NOTE: bit 6 of TD_SOFT will be sign-extended if used as an immediate. */ 79#define TD_FAKE ((1UL << 5) << TD_SOFT_SHIFT) 80#define TD_EXEC ((1UL << 4) << TD_SOFT_SHIFT) 81#define TD_REF ((1UL << 3) << TD_SOFT_SHIFT) 82#define TD_PV ((1UL << 2) << TD_SOFT_SHIFT) --- 6 unchanged lines hidden (view full) --- 89#define TD_P (1UL << 2) 90#define TD_W (1UL << 1) 91#define TD_G (1UL << 0) 92 93#define TV_SIZE_BITS (TD_SIZE_BITS) 94#define TV_VPN(va, sz) ((((va) >> TTE_PAGE_SHIFT(sz)) << TV_SIZE_BITS) | sz) 95 96#define TTE_SIZE_SPREAD (3) | 104#define TD_NFO (1UL << 60) 105#define TD_IE (1UL << 59) 106#define TD_PA(pa) ((pa) & (TD_PA_MASK << TD_PA_SHIFT)) 107/* NOTE: bit 6 of TD_SOFT will be sign-extended if used as an immediate. */ 108#define TD_FAKE ((1UL << 5) << TD_SOFT_SHIFT) 109#define TD_EXEC ((1UL << 4) << TD_SOFT_SHIFT) 110#define TD_REF ((1UL << 3) << TD_SOFT_SHIFT) 111#define TD_PV ((1UL << 2) << TD_SOFT_SHIFT) --- 6 unchanged lines hidden (view full) --- 118#define TD_P (1UL << 2) 119#define TD_W (1UL << 1) 120#define TD_G (1UL << 0) 121 122#define TV_SIZE_BITS (TD_SIZE_BITS) 123#define TV_VPN(va, sz) ((((va) >> TTE_PAGE_SHIFT(sz)) << TV_SIZE_BITS) | sz) 124 125#define TTE_SIZE_SPREAD (3) |
97#define TTE_PAGE_SHIFT(sz) \ | 126#define TTE_PAGE_SHIFT(sz) \ |
98 (PAGE_SHIFT + ((sz) * TTE_SIZE_SPREAD)) 99 | 127 (PAGE_SHIFT + ((sz) * TTE_SIZE_SPREAD)) 128 |
100#define TTE_GET_SIZE(tp) \ | 129#define TTE_GET_SIZE(tp) \ |
101 (((tp)->tte_data >> TD_SIZE_SHIFT) & TD_SIZE_MASK) | 130 (((tp)->tte_data >> TD_SIZE_SHIFT) & TD_SIZE_MASK) |
102#define TTE_GET_PAGE_SHIFT(tp) \ | 131#define TTE_GET_PAGE_SHIFT(tp) \ |
103 TTE_PAGE_SHIFT(TTE_GET_SIZE(tp)) | 132 TTE_PAGE_SHIFT(TTE_GET_SIZE(tp)) |
104#define TTE_GET_PAGE_SIZE(tp) \ | 133#define TTE_GET_PAGE_SIZE(tp) \ |
105 (1 << TTE_GET_PAGE_SHIFT(tp)) | 134 (1 << TTE_GET_PAGE_SHIFT(tp)) |
106#define TTE_GET_PAGE_MASK(tp) \ | 135#define TTE_GET_PAGE_MASK(tp) \ |
107 (TTE_GET_PAGE_SIZE(tp) - 1) 108 | 136 (TTE_GET_PAGE_SIZE(tp) - 1) 137 |
109#define TTE_GET_PA(tp) \ | 138#define TTE_GET_PA(tp) \ |
110 ((tp)->tte_data & (TD_PA_MASK << TD_PA_SHIFT)) | 139 ((tp)->tte_data & (TD_PA_MASK << TD_PA_SHIFT)) |
111#define TTE_GET_VPN(tp) \ | 140#define TTE_GET_VPN(tp) \ |
112 ((tp)->tte_vpn >> TV_SIZE_BITS) | 141 ((tp)->tte_vpn >> TV_SIZE_BITS) |
113#define TTE_GET_VA(tp) \ | 142#define TTE_GET_VA(tp) \ |
114 (TTE_GET_VPN(tp) << TTE_GET_PAGE_SHIFT(tp)) | 143 (TTE_GET_VPN(tp) << TTE_GET_PAGE_SHIFT(tp)) |
115#define TTE_GET_PMAP(tp) \ 116 (((tp)->tte_data & TD_P) != 0 ? \ 117 (kernel_pmap) : \ 118 (PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)(tp)))->md.pmap)) 119#define TTE_ZERO(tp) \ | 144#define TTE_GET_PMAP(tp) \ 145 (((tp)->tte_data & TD_P) != 0 ? (kernel_pmap) : \ 146 (PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)(tp)))->md.pmap)) 147#define TTE_ZERO(tp) \ |
120 memset(tp, 0, sizeof(*tp)) 121 122struct pmap; 123 124struct tte { 125 u_long tte_vpn; 126 u_long tte_data; 127 TAILQ_ENTRY(tte) tte_link; 128}; 129 130static __inline int 131tte_match(struct tte *tp, vm_offset_t va) 132{ | 148 memset(tp, 0, sizeof(*tp)) 149 150struct pmap; 151 152struct tte { 153 u_long tte_vpn; 154 u_long tte_data; 155 TAILQ_ENTRY(tte) tte_link; 156}; 157 158static __inline int 159tte_match(struct tte *tp, vm_offset_t va) 160{ |
161 |
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133 return (((tp->tte_data & TD_V) != 0) && 134 (tp->tte_vpn == TV_VPN(va, TTE_GET_SIZE(tp)))); 135} 136 137#endif /* !_MACHINE_TTE_H_ */ | 162 return (((tp->tte_data & TD_V) != 0) && 163 (tp->tte_vpn == TV_VPN(va, TTE_GET_SIZE(tp)))); 164} 165 166#endif /* !_MACHINE_TTE_H_ */ |