| instr.h (88663) | instr.h (92050) |
|---|---|
| 1/* 2 * Copyright (c) 1994 David S. Miller, davem@nadzieja.rutgers.edu 3 * Copyright (c) 1995 Paul Kranenburg 4 * Copyright (c) 2001 Thomas Moestl <tmm@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 17 unchanged lines hidden (view full) --- 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * from: NetBSD: db_disasm.c,v 1.9 2000/08/16 11:29:42 pk Exp 33 * | 1/* 2 * Copyright (c) 1994 David S. Miller, davem@nadzieja.rutgers.edu 3 * Copyright (c) 1995 Paul Kranenburg 4 * Copyright (c) 2001 Thomas Moestl <tmm@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 17 unchanged lines hidden (view full) --- 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * from: NetBSD: db_disasm.c,v 1.9 2000/08/16 11:29:42 pk Exp 33 * |
| 34 * $FreeBSD: head/sys/sparc64/include/instr.h 88663 2001-12-29 08:55:56Z jake $ | 34 * $FreeBSD: head/sys/sparc64/include/instr.h 92050 2002-03-11 03:03:35Z tmm $ |
| 35 */ 36 37#ifndef _MACHINE_INSTR_H_ 38#define _MACHINE_INSTR_H_ 39 40/* 41 * Definitions for all instruction formats 42 */ --- 13 unchanged lines hidden (view full) --- 56#define IF_F2_RCOND_SHIFT 25 57#define IF_F2_RCOND_BITS 3 58#define IF_F2_OP2_SHIFT 22 59#define IF_F2_OP2_BITS 3 60#define IF_F2_CC1_SHIFT 21 61#define IF_F2_CC1_BITS 1 62#define IF_F2_CC0_SHIFT 20 63#define IF_F2_CC0_BITS 1 | 35 */ 36 37#ifndef _MACHINE_INSTR_H_ 38#define _MACHINE_INSTR_H_ 39 40/* 41 * Definitions for all instruction formats 42 */ --- 13 unchanged lines hidden (view full) --- 56#define IF_F2_RCOND_SHIFT 25 57#define IF_F2_RCOND_BITS 3 58#define IF_F2_OP2_SHIFT 22 59#define IF_F2_OP2_BITS 3 60#define IF_F2_CC1_SHIFT 21 61#define IF_F2_CC1_BITS 1 62#define IF_F2_CC0_SHIFT 20 63#define IF_F2_CC0_BITS 1 |
| 64#define IF_F2_CC_SHIFT 20 /* CC0 and CC1 combined. */ 65#define IF_F2_CC_BITS 2 |
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| 64#define IF_F2_D16HI_SHIFT 20 65#define IF_F2_D16HI_BITS 2 66#define IF_F2_P_SHIFT 19 67#define IF_F2_P_BITS 1 68#define IF_F2_RS1_SHIFT 14 69#define IF_F2_RS1_BITS 5 70 71/* --- 4 unchanged lines hidden (view full) --- 76#define IF_F3_RD_SHIFT IF_F2_RD_SHIFT 77#define IF_F3_RD_BITS IF_F2_RD_BITS 78#define IF_F3_FCN_SHIFT 25 79#define IF_F3_FCN_BITS 5 80#define IF_F3_CC1_SHIFT 26 81#define IF_F3_CC1_BITS 1 82#define IF_F3_CC0_SHIFT 25 83#define IF_F3_CC0_BITS 1 | 66#define IF_F2_D16HI_SHIFT 20 67#define IF_F2_D16HI_BITS 2 68#define IF_F2_P_SHIFT 19 69#define IF_F2_P_BITS 1 70#define IF_F2_RS1_SHIFT 14 71#define IF_F2_RS1_BITS 5 72 73/* --- 4 unchanged lines hidden (view full) --- 78#define IF_F3_RD_SHIFT IF_F2_RD_SHIFT 79#define IF_F3_RD_BITS IF_F2_RD_BITS 80#define IF_F3_FCN_SHIFT 25 81#define IF_F3_FCN_BITS 5 82#define IF_F3_CC1_SHIFT 26 83#define IF_F3_CC1_BITS 1 84#define IF_F3_CC0_SHIFT 25 85#define IF_F3_CC0_BITS 1 |
| 86#define IF_F3_CC_SHIFT 25 /* CC0 and CC1 combined. */ 87#define IF_F3_CC_BITS 2 |
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| 84#define IF_F3_RS1_SHIFT IF_F2_RS1_SHIFT 85#define IF_F3_RS1_BITS IF_F2_RS1_BITS 86#define IF_F3_I_SHIFT 13 87#define IF_F3_I_BITS 1 88#define IF_F3_X_SHIFT 12 89#define IF_F3_X_BITS 1 90#define IF_F3_RCOND_SHIFT 10 91#define IF_F3_RCOND_BITS 3 --- 73 unchanged lines hidden (view full) --- 165/* Instruction format 2 */ 166#define IF_F2_RD(i) IF_DECODE((i), F2_RD) 167#define IF_F2_A(i) IF_DECODE((i), F2_A) 168#define IF_F2_COND(i) IF_DECODE((i), F2_COND) 169#define IF_F2_RCOND(i) IF_DECODE((i), F2_RCOND) 170#define IF_F2_OP2(i) IF_DECODE((i), F2_OP2) 171#define IF_F2_CC1(i) IF_DECODE((i), F2_CC1) 172#define IF_F2_CC0(i) IF_DECODE((i), F2_CC0) | 88#define IF_F3_RS1_SHIFT IF_F2_RS1_SHIFT 89#define IF_F3_RS1_BITS IF_F2_RS1_BITS 90#define IF_F3_I_SHIFT 13 91#define IF_F3_I_BITS 1 92#define IF_F3_X_SHIFT 12 93#define IF_F3_X_BITS 1 94#define IF_F3_RCOND_SHIFT 10 95#define IF_F3_RCOND_BITS 3 --- 73 unchanged lines hidden (view full) --- 169/* Instruction format 2 */ 170#define IF_F2_RD(i) IF_DECODE((i), F2_RD) 171#define IF_F2_A(i) IF_DECODE((i), F2_A) 172#define IF_F2_COND(i) IF_DECODE((i), F2_COND) 173#define IF_F2_RCOND(i) IF_DECODE((i), F2_RCOND) 174#define IF_F2_OP2(i) IF_DECODE((i), F2_OP2) 175#define IF_F2_CC1(i) IF_DECODE((i), F2_CC1) 176#define IF_F2_CC0(i) IF_DECODE((i), F2_CC0) |
| 177#define IF_F2_CC(i) IF_DECODE((i), F2_CC) |
|
| 173#define IF_F2_D16HI(i) IF_DECODE((i), F2_D16HI) 174#define IF_F2_P(i) IF_DECODE((i), F2_P) 175#define IF_F2_RS1(i) IF_DECODE((i), F2_RS1) 176 177/* Instruction format 3 */ 178#define IF_F3_OP3(i) IF_DECODE((i), F3_OP3) 179#define IF_F3_RD(i) IF_F2_RD((i)) 180#define IF_F3_FCN(i) IF_DECODE((i), F3_FCN) 181#define IF_F3_CC1(i) IF_DECODE((i), F3_CC1) 182#define IF_F3_CC0(i) IF_DECODE((i), F3_CC0) | 178#define IF_F2_D16HI(i) IF_DECODE((i), F2_D16HI) 179#define IF_F2_P(i) IF_DECODE((i), F2_P) 180#define IF_F2_RS1(i) IF_DECODE((i), F2_RS1) 181 182/* Instruction format 3 */ 183#define IF_F3_OP3(i) IF_DECODE((i), F3_OP3) 184#define IF_F3_RD(i) IF_F2_RD((i)) 185#define IF_F3_FCN(i) IF_DECODE((i), F3_FCN) 186#define IF_F3_CC1(i) IF_DECODE((i), F3_CC1) 187#define IF_F3_CC0(i) IF_DECODE((i), F3_CC0) |
| 188#define IF_F3_CC(i) IF_DECODE((i), F3_CC) |
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| 183#define IF_F3_RS1(i) IF_F2_RS1((i)) 184#define IF_F3_I(i) IF_DECODE((i), F3_I) 185#define IF_F3_X(i) IF_DECODE((i), F3_X) 186#define IF_F3_RCOND(i) IF_DECODE((i), F3_RCOND) 187#define IF_F3_IMM_ASI(i) IF_DECODE((i), F3_IMM_ASI) 188#define IF_F3_OPF(i) IF_DECODE((i), F3_OPF) 189#define IF_F3_CMASK(i) IF_DECODE((i), F3_CMASK) 190#define IF_F3_RS2(i) IF_DECODE((i), F3_RS2) --- 409 unchanged lines hidden --- | 189#define IF_F3_RS1(i) IF_F2_RS1((i)) 190#define IF_F3_I(i) IF_DECODE((i), F3_I) 191#define IF_F3_X(i) IF_DECODE((i), F3_X) 192#define IF_F3_RCOND(i) IF_DECODE((i), F3_RCOND) 193#define IF_F3_IMM_ASI(i) IF_DECODE((i), F3_IMM_ASI) 194#define IF_F3_OPF(i) IF_DECODE((i), F3_OPF) 195#define IF_F3_CMASK(i) IF_DECODE((i), F3_CMASK) 196#define IF_F3_RS2(i) IF_DECODE((i), F3_RS2) --- 409 unchanged lines hidden --- |