1/*
2 * Copyright (c) 1996
3 * The President and Fellows of Harvard College. All rights reserved.
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This software was developed by the Computer Systems Engineering group
8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 * contributed to Berkeley.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Aaron Brown and
22 * Harvard University.
23 * This product includes software developed by the University of
24 * California, Berkeley and its contributors.
25 * 4. Neither the name of the University nor the names of its contributors
26 * may be used to endorse or promote products derived from this software
27 * without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * SUCH DAMAGE.
40 *
41 * from: @(#)cache.h 8.1 (Berkeley) 6/11/93
42 * from: NetBSD: cache.h,v 1.3 2000/08/01 00:28:02 eeh Exp
43 *
44 * $FreeBSD: head/sys/sparc64/include/cache.h 113238 2003-04-08 06:35:09Z jake $
45 */
46
47#ifndef _MACHINE_CACHE_H_
48#define _MACHINE_CACHE_H_
49
50#include <dev/ofw/openfirm.h>
51
52#define DCACHE_COLOR_BITS (1)
53#define DCACHE_COLORS (1 << DCACHE_COLOR_BITS)
54#define DCACHE_COLOR_MASK (DCACHE_COLORS - 1)
55#define DCACHE_COLOR(va) (((va) >> PAGE_SHIFT) & DCACHE_COLOR_MASK)
56#define DCACHE_OTHER_COLOR(color) \
57 ((color) ^ DCACHE_COLOR_BITS)
58
59#define DC_TAG_SHIFT 2
60#define DC_VALID_SHIFT 0
61
62#define DC_TAG_BITS 28
63#define DC_VALID_BITS 2
64
65#define DC_TAG_MASK ((1 << DC_TAG_BITS) - 1)
66#define DC_VALID_MASK ((1 << DC_VALID_BITS) - 1)
67
68#define IC_TAG_SHIFT 7
69#define IC_VALID_SHIFT 36
70
71#define IC_TAG_BITS 28
72#define IC_VALID_BITS 1
73
74#define IC_TAG_MASK ((1 << IC_TAG_BITS) - 1)
75#define IC_VALID_MASK ((1 << IC_VALID_BITS) - 1)
76
77/*
78 * Cache control information.
79 */
80struct cacheinfo {
81 u_int c_enabled; /* true => cache is enabled */
82 u_int ic_size; /* instruction cache */
83 u_int ic_set;
84 u_int ic_l2set;
85 u_int ic_assoc;
86 u_int ic_linesize;
87 u_int dc_size; /* data cache */
88 u_int dc_l2size;
89 u_int dc_assoc;
90 u_int dc_linesize;
91 u_int ec_size; /* external cache info */
92 u_int ec_assoc;
93 u_int ec_l2set;
94 u_int ec_linesize;
95 u_int ec_l2linesize;
96};
97
98typedef void dcache_page_inval_t(vm_paddr_t pa);
99typedef void icache_page_inval_t(vm_paddr_t pa);
100
101void cache_init(phandle_t node);
102
103dcache_page_inval_t cheetah_dcache_page_inval;
104icache_page_inval_t cheetah_icache_page_inval;
105dcache_page_inval_t spitfire_dcache_page_inval;
106icache_page_inval_t spitfire_icache_page_inval;
107
108extern dcache_page_inval_t *dcache_page_inval;
109extern icache_page_inval_t *icache_page_inval;
110
111extern struct cacheinfo cache;
112
113#endif /* !_MACHINE_CACHE_H_ */
2 * Copyright (c) 1996
3 * The President and Fellows of Harvard College. All rights reserved.
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This software was developed by the Computer Systems Engineering group
8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 * contributed to Berkeley.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Aaron Brown and
22 * Harvard University.
23 * This product includes software developed by the University of
24 * California, Berkeley and its contributors.
25 * 4. Neither the name of the University nor the names of its contributors
26 * may be used to endorse or promote products derived from this software
27 * without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * SUCH DAMAGE.
40 *
41 * from: @(#)cache.h 8.1 (Berkeley) 6/11/93
42 * from: NetBSD: cache.h,v 1.3 2000/08/01 00:28:02 eeh Exp
43 *
44 * $FreeBSD: head/sys/sparc64/include/cache.h 113238 2003-04-08 06:35:09Z jake $
45 */
46
47#ifndef _MACHINE_CACHE_H_
48#define _MACHINE_CACHE_H_
49
50#include <dev/ofw/openfirm.h>
51
52#define DCACHE_COLOR_BITS (1)
53#define DCACHE_COLORS (1 << DCACHE_COLOR_BITS)
54#define DCACHE_COLOR_MASK (DCACHE_COLORS - 1)
55#define DCACHE_COLOR(va) (((va) >> PAGE_SHIFT) & DCACHE_COLOR_MASK)
56#define DCACHE_OTHER_COLOR(color) \
57 ((color) ^ DCACHE_COLOR_BITS)
58
59#define DC_TAG_SHIFT 2
60#define DC_VALID_SHIFT 0
61
62#define DC_TAG_BITS 28
63#define DC_VALID_BITS 2
64
65#define DC_TAG_MASK ((1 << DC_TAG_BITS) - 1)
66#define DC_VALID_MASK ((1 << DC_VALID_BITS) - 1)
67
68#define IC_TAG_SHIFT 7
69#define IC_VALID_SHIFT 36
70
71#define IC_TAG_BITS 28
72#define IC_VALID_BITS 1
73
74#define IC_TAG_MASK ((1 << IC_TAG_BITS) - 1)
75#define IC_VALID_MASK ((1 << IC_VALID_BITS) - 1)
76
77/*
78 * Cache control information.
79 */
80struct cacheinfo {
81 u_int c_enabled; /* true => cache is enabled */
82 u_int ic_size; /* instruction cache */
83 u_int ic_set;
84 u_int ic_l2set;
85 u_int ic_assoc;
86 u_int ic_linesize;
87 u_int dc_size; /* data cache */
88 u_int dc_l2size;
89 u_int dc_assoc;
90 u_int dc_linesize;
91 u_int ec_size; /* external cache info */
92 u_int ec_assoc;
93 u_int ec_l2set;
94 u_int ec_linesize;
95 u_int ec_l2linesize;
96};
97
98typedef void dcache_page_inval_t(vm_paddr_t pa);
99typedef void icache_page_inval_t(vm_paddr_t pa);
100
101void cache_init(phandle_t node);
102
103dcache_page_inval_t cheetah_dcache_page_inval;
104icache_page_inval_t cheetah_icache_page_inval;
105dcache_page_inval_t spitfire_dcache_page_inval;
106icache_page_inval_t spitfire_icache_page_inval;
107
108extern dcache_page_inval_t *dcache_page_inval;
109extern icache_page_inval_t *icache_page_inval;
110
111extern struct cacheinfo cache;
112
113#endif /* !_MACHINE_CACHE_H_ */