| asi.h (182878) | asi.h (203829) |
|---|---|
| 1/*- 2 * Copyright (c) 1997 Berkeley Software Design, Inc. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 12 unchanged lines hidden (view full) --- 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * from: BSDI: asi.h,v 1.3 1997/08/08 14:31:42 torek | 1/*- 2 * Copyright (c) 1997 Berkeley Software Design, Inc. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 12 unchanged lines hidden (view full) --- 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * from: BSDI: asi.h,v 1.3 1997/08/08 14:31:42 torek |
| 29 * $FreeBSD: head/sys/sparc64/include/asi.h 182878 2008-09-08 21:24:25Z marius $ | 29 * $FreeBSD: head/sys/sparc64/include/asi.h 203829 2010-02-13 14:13:39Z marius $ |
| 30 */ 31 32#ifndef _MACHINE_ASI_H_ 33#define _MACHINE_ASI_H_ 34 35/* | 30 */ 31 32#ifndef _MACHINE_ASI_H_ 33#define _MACHINE_ASI_H_ 34 35/* |
| 36 * Standard v9 asis | 36 * Standard v9 ASIs |
| 37 */ 38#define ASI_N 0x4 39#define ASI_NL 0xc 40#define ASI_AIUP 0x10 41#define ASI_AIUS 0x11 42#define ASI_AIUPL 0x18 43#define ASI_AIUSL 0x19 44#define ASI_P 0x80 45#define ASI_S 0x81 46#define ASI_PNF 0x82 47#define ASI_SNF 0x83 48#define ASI_PL 0x88 49#define ASI_SL 0x89 50#define ASI_PNFL 0x8a 51#define ASI_SNFL 0x8b 52 53/* | 37 */ 38#define ASI_N 0x4 39#define ASI_NL 0xc 40#define ASI_AIUP 0x10 41#define ASI_AIUS 0x11 42#define ASI_AIUPL 0x18 43#define ASI_AIUSL 0x19 44#define ASI_P 0x80 45#define ASI_S 0x81 46#define ASI_PNF 0x82 47#define ASI_SNF 0x83 48#define ASI_PL 0x88 49#define ASI_SL 0x89 50#define ASI_PNFL 0x8a 51#define ASI_SNFL 0x8b 52 53/* |
| 54 * UltraSPARC extensions. ASIs limited to a certain family are annotated. | 54 * UltraSPARC extensions - ASIs limited to a certain family are annotated. |
| 55 */ 56#define ASI_PHYS_USE_EC 0x14 57#define ASI_PHYS_BYPASS_EC_WITH_EBIT 0x15 58#define ASI_PHYS_USE_EC_L 0x1c 59#define ASI_PHYS_BYPASS_EC_WITH_EBIT_L 0x1d 60 61#define ASI_NUCLEUS_QUAD_LDD 0x24 62#define ASI_NUCLEUS_QUAD_LDD_L 0x2c --- 23 unchanged lines hidden (view full) --- 86 87#define ASI_DCACHE_DATA 0x46 88#define ASI_DCACHE_TAG 0x47 89 90#define ASI_INTR_DISPATCH_STATUS 0x48 91#define ASI_INTR_RECEIVE 0x49 92#define ASI_UPA_CONFIG_REG 0x4a /* US-I, II */ 93 | 55 */ 56#define ASI_PHYS_USE_EC 0x14 57#define ASI_PHYS_BYPASS_EC_WITH_EBIT 0x15 58#define ASI_PHYS_USE_EC_L 0x1c 59#define ASI_PHYS_BYPASS_EC_WITH_EBIT_L 0x1d 60 61#define ASI_NUCLEUS_QUAD_LDD 0x24 62#define ASI_NUCLEUS_QUAD_LDD_L 0x2c --- 23 unchanged lines hidden (view full) --- 86 87#define ASI_DCACHE_DATA 0x46 88#define ASI_DCACHE_TAG 0x47 89 90#define ASI_INTR_DISPATCH_STATUS 0x48 91#define ASI_INTR_RECEIVE 0x49 92#define ASI_UPA_CONFIG_REG 0x4a /* US-I, II */ 93 |
| 94#define ASI_FIREPLANE_CONFIG_REG 0x4a /* US-III Cu */ 95#define AA_FIREPLANE_CONFIG 0x0 /* US-III Cu */ 96#define AA_FIREPLANE_ADDRESS 0x8 /* US-III Cu */ | 94#define ASI_FIREPLANE_CONFIG_REG 0x4a /* US-III{,+}, IV{,+} */ 95#define AA_FIREPLANE_CONFIG 0x0 /* US-III{,+}, IV{,+} */ 96#define AA_FIREPLANE_ADDRESS 0x8 /* US-III{,+}, IV{,+} */ 97#define AA_FIREPLANE_CONFIG_2 0x10 /* US-IV{,+} */ |
| 97 | 98 |
| 99#define ASI_JBUS_CONFIG_REG 0x4a /* US-IIIi{,+} */ 100 |
|
| 98#define ASI_ESTATE_ERROR_EN_REG 0x4b 99#define AA_ESTATE_CEEN 0x1 100#define AA_ESTATE_NCEEN 0x2 101#define AA_ESTATE_ISAPEN 0x4 102 103#define ASI_AFSR 0x4c 104#define ASI_AFAR 0x4d 105 --- 42 unchanged lines hidden (view full) --- 148#define ASI_DTLB_DATA_IN_REG 0x5c 149/* US-III Cu: also ASI_DTLB_CAM_ADDRESS_REG */ 150#define ASI_DTLB_DATA_ACCESS_REG 0x5d 151#define ASI_DTLB_TAG_READ_REG 0x5e 152#define ASI_DMMU_DEMAP 0x5f 153 154#define ASI_IIU_INST_TRAP 0x60 /* US-III family */ 155 | 101#define ASI_ESTATE_ERROR_EN_REG 0x4b 102#define AA_ESTATE_CEEN 0x1 103#define AA_ESTATE_NCEEN 0x2 104#define AA_ESTATE_ISAPEN 0x4 105 106#define ASI_AFSR 0x4c 107#define ASI_AFAR 0x4d 108 --- 42 unchanged lines hidden (view full) --- 151#define ASI_DTLB_DATA_IN_REG 0x5c 152/* US-III Cu: also ASI_DTLB_CAM_ADDRESS_REG */ 153#define ASI_DTLB_DATA_ACCESS_REG 0x5d 154#define ASI_DTLB_TAG_READ_REG 0x5e 155#define ASI_DMMU_DEMAP 0x5f 156 157#define ASI_IIU_INST_TRAP 0x60 /* US-III family */ 158 |
| 159#define ASI_INTR_ID 0x63 /* US-IV{,+} */ 160#define AA_INTR_ID 0x0 /* US-IV{,+} */ 161#define AA_CORE_ID 0x10 /* US-IV{,+} */ 162#define AA_CESR_ID 0x40 /* US-IV{,+} */ 163 |
|
| 156#define ASI_ICACHE_INSTR 0x66 157#define ASI_ICACHE_TAG 0x67 158#define ASI_ICACHE_SNOOP_TAG 0x68 /* US-III family */ 159#define ASI_ICACHE_PRE_DECODE 0x6e /* US-I, II */ 160#define ASI_ICACHE_PRE_NEXT_FIELD 0x6f /* US-I, II */ 161 162#define ASI_BLK_AUIP 0x70 163#define ASI_BLK_AIUS 0x71 --- 10 unchanged lines hidden (view full) --- 174#define AA_MCU_ADDR_CNTL_REG 0x40 /* US-III Cu */ 175 176#define ASI_ECACHE_DATA 0x74 /* US-III Cu */ 177#define ASI_ECACHE_CONTROL 0x75 /* US-III Cu */ 178#define ASI_ECACHE_W 0x76 179 180/* 181 * With the advent of the US-III, the numbering has changed, as additional | 164#define ASI_ICACHE_INSTR 0x66 165#define ASI_ICACHE_TAG 0x67 166#define ASI_ICACHE_SNOOP_TAG 0x68 /* US-III family */ 167#define ASI_ICACHE_PRE_DECODE 0x6e /* US-I, II */ 168#define ASI_ICACHE_PRE_NEXT_FIELD 0x6f /* US-I, II */ 169 170#define ASI_BLK_AUIP 0x70 171#define ASI_BLK_AIUS 0x71 --- 10 unchanged lines hidden (view full) --- 182#define AA_MCU_ADDR_CNTL_REG 0x40 /* US-III Cu */ 183 184#define ASI_ECACHE_DATA 0x74 /* US-III Cu */ 185#define ASI_ECACHE_CONTROL 0x75 /* US-III Cu */ 186#define ASI_ECACHE_W 0x76 187 188/* 189 * With the advent of the US-III, the numbering has changed, as additional |
| 182 * registers were inserted in between. We retain the original ordering for | 190 * registers were inserted in between. We retain the original ordering for |
| 183 * now, and append an A to the inserted registers. 184 * Exceptions are AA_SDB_INTR_D6 and AA_SDB_INTR_D7, which were appended 185 * at the end. 186 */ 187#define ASI_SDB_ERROR_W 0x77 188#define ASI_SDB_CONTROL_W 0x77 189#define ASI_SDB_INTR_W 0x77 190#define AA_SDB_ERR_HIGH 0x0 --- 57 unchanged lines hidden --- | 191 * now, and append an A to the inserted registers. 192 * Exceptions are AA_SDB_INTR_D6 and AA_SDB_INTR_D7, which were appended 193 * at the end. 194 */ 195#define ASI_SDB_ERROR_W 0x77 196#define ASI_SDB_CONTROL_W 0x77 197#define ASI_SDB_INTR_W 0x77 198#define AA_SDB_ERR_HIGH 0x0 --- 57 unchanged lines hidden --- |