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uninorthpci.c (227843) uninorthpci.c (230993)
1/*-
2 * Copyright (C) 2002 Benno Rice.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 10 unchanged lines hidden (view full) ---

19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
21 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
22 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
23 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25
26#include <sys/cdefs.h>
1/*-
2 * Copyright (C) 2002 Benno Rice.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 10 unchanged lines hidden (view full) ---

19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
21 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
22 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
23 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25
26#include <sys/cdefs.h>
27__FBSDID("$FreeBSD: head/sys/powerpc/powermac/uninorthpci.c 227843 2011-11-22 21:28:20Z marius $");
27__FBSDID("$FreeBSD: head/sys/powerpc/powermac/uninorthpci.c 230993 2012-02-04 19:54:13Z nwhitehorn $");
28
29#include <sys/param.h>
30#include <sys/systm.h>
31#include <sys/module.h>
32#include <sys/bus.h>
33#include <sys/conf.h>
34#include <sys/kernel.h>
35

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44#include <machine/bus.h>
45#include <machine/intr_machdep.h>
46#include <machine/md_var.h>
47#include <machine/pio.h>
48#include <machine/resource.h>
49
50#include <sys/rman.h>
51
28
29#include <sys/param.h>
30#include <sys/systm.h>
31#include <sys/module.h>
32#include <sys/bus.h>
33#include <sys/conf.h>
34#include <sys/kernel.h>
35

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44#include <machine/bus.h>
45#include <machine/intr_machdep.h>
46#include <machine/md_var.h>
47#include <machine/pio.h>
48#include <machine/resource.h>
49
50#include <sys/rman.h>
51
52#include <powerpc/ofw/ofw_pci.h>
52#include <powerpc/powermac/uninorthvar.h>
53
54#include <vm/vm.h>
55#include <vm/pmap.h>
56
57#include "pcib_if.h"
58
59#define UNINORTH_DEBUG 0
60
61/*
62 * Device interface.
63 */
64static int uninorth_probe(device_t);
65static int uninorth_attach(device_t);
66
67/*
53#include <powerpc/powermac/uninorthvar.h>
54
55#include <vm/vm.h>
56#include <vm/pmap.h>
57
58#include "pcib_if.h"
59
60#define UNINORTH_DEBUG 0
61
62/*
63 * Device interface.
64 */
65static int uninorth_probe(device_t);
66static int uninorth_attach(device_t);
67
68/*
68 * Bus interface.
69 */
70static int uninorth_read_ivar(device_t, device_t, int,
71 uintptr_t *);
72static struct resource * uninorth_alloc_resource(device_t bus,
73 device_t child, int type, int *rid, u_long start,
74 u_long end, u_long count, u_int flags);
75static int uninorth_activate_resource(device_t bus, device_t child,
76 int type, int rid, struct resource *res);
77
78/*
79 * pcib interface.
80 */
69 * pcib interface.
70 */
81static int uninorth_maxslots(device_t);
82static u_int32_t uninorth_read_config(device_t, u_int, u_int, u_int,
83 u_int, int);
84static void uninorth_write_config(device_t, u_int, u_int, u_int,
85 u_int, u_int32_t, int);
71static u_int32_t uninorth_read_config(device_t, u_int, u_int, u_int,
72 u_int, int);
73static void uninorth_write_config(device_t, u_int, u_int, u_int,
74 u_int, u_int32_t, int);
86static int uninorth_route_interrupt(device_t, device_t, int);
87
88/*
75
76/*
89 * OFW Bus interface
90 */
91
92static phandle_t uninorth_get_node(device_t bus, device_t dev);
93
94/*
95 * Local routines.
96 */
97static int uninorth_enable_config(struct uninorth_softc *, u_int,
98 u_int, u_int, u_int);
99
100/*
101 * Driver methods.
102 */
103static device_method_t uninorth_methods[] = {
104 /* Device interface */
105 DEVMETHOD(device_probe, uninorth_probe),
106 DEVMETHOD(device_attach, uninorth_attach),
107
77 * Local routines.
78 */
79static int uninorth_enable_config(struct uninorth_softc *, u_int,
80 u_int, u_int, u_int);
81
82/*
83 * Driver methods.
84 */
85static device_method_t uninorth_methods[] = {
86 /* Device interface */
87 DEVMETHOD(device_probe, uninorth_probe),
88 DEVMETHOD(device_attach, uninorth_attach),
89
108 /* Bus interface */
109 DEVMETHOD(bus_read_ivar, uninorth_read_ivar),
110 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
111 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
112 DEVMETHOD(bus_alloc_resource, uninorth_alloc_resource),
113 DEVMETHOD(bus_activate_resource, uninorth_activate_resource),
114
115 /* pcib interface */
90 /* pcib interface */
116 DEVMETHOD(pcib_maxslots, uninorth_maxslots),
117 DEVMETHOD(pcib_read_config, uninorth_read_config),
118 DEVMETHOD(pcib_write_config, uninorth_write_config),
91 DEVMETHOD(pcib_read_config, uninorth_read_config),
92 DEVMETHOD(pcib_write_config, uninorth_write_config),
119 DEVMETHOD(pcib_route_interrupt, uninorth_route_interrupt),
120
93
121 /* ofw_bus interface */
122 DEVMETHOD(ofw_bus_get_node, uninorth_get_node),
123
124 DEVMETHOD_END
125};
126
94 DEVMETHOD_END
95};
96
127static driver_t uninorth_driver = {
128 "pcib",
129 uninorth_methods,
130 sizeof(struct uninorth_softc)
131};
132
133static devclass_t uninorth_devclass;
134
97static devclass_t uninorth_devclass;
98
99DEFINE_CLASS_1(pcib, uninorth_driver, uninorth_methods,
100 sizeof(struct uninorth_softc), ofw_pci_driver);
135DRIVER_MODULE(uninorth, nexus, uninorth_driver, uninorth_devclass, 0, 0);
136
137static int
138uninorth_probe(device_t dev)
139{
140 const char *type, *compatible;
141
142 type = ofw_bus_get_type(dev);

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163}
164
165static int
166uninorth_attach(device_t dev)
167{
168 struct uninorth_softc *sc;
169 const char *compatible;
170 phandle_t node;
101DRIVER_MODULE(uninorth, nexus, uninorth_driver, uninorth_devclass, 0, 0);
102
103static int
104uninorth_probe(device_t dev)
105{
106 const char *type, *compatible;
107
108 type = ofw_bus_get_type(dev);

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129}
130
131static int
132uninorth_attach(device_t dev)
133{
134 struct uninorth_softc *sc;
135 const char *compatible;
136 phandle_t node;
171 u_int32_t reg[3], busrange[2];
172 struct uninorth_range *rp, *io, *mem[2];
173 int nmem, i, error;
137 u_int32_t reg[3];
174
175 node = ofw_bus_get_node(dev);
176 sc = device_get_softc(dev);
177
178 if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8)
179 return (ENXIO);
180
138
139 node = ofw_bus_get_node(dev);
140 sc = device_get_softc(dev);
141
142 if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8)
143 return (ENXIO);
144
181 if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 8)
182 return (ENXIO);
183
184 sc->sc_ver = 0;
185 compatible = ofw_bus_get_compat(dev);
186 if (strcmp(compatible, "u3-agp") == 0)
187 sc->sc_ver = 3;
188 if (strcmp(compatible, "u4-pcie") == 0)
189 sc->sc_ver = 4;
190
145 sc->sc_ver = 0;
146 compatible = ofw_bus_get_compat(dev);
147 if (strcmp(compatible, "u3-agp") == 0)
148 sc->sc_ver = 3;
149 if (strcmp(compatible, "u4-pcie") == 0)
150 sc->sc_ver = 4;
151
191 sc->sc_dev = dev;
192 sc->sc_node = node;
193 if (sc->sc_ver >= 3) {
194 sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[1] + 0x800000, PAGE_SIZE);
195 sc->sc_data = (vm_offset_t)pmap_mapdev(reg[1] + 0xc00000, PAGE_SIZE);
196 } else {
197 sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[0] + 0x800000, PAGE_SIZE);
198 sc->sc_data = (vm_offset_t)pmap_mapdev(reg[0] + 0xc00000, PAGE_SIZE);
199 }
152 if (sc->sc_ver >= 3) {
153 sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[1] + 0x800000, PAGE_SIZE);
154 sc->sc_data = (vm_offset_t)pmap_mapdev(reg[1] + 0xc00000, PAGE_SIZE);
155 } else {
156 sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[0] + 0x800000, PAGE_SIZE);
157 sc->sc_data = (vm_offset_t)pmap_mapdev(reg[0] + 0xc00000, PAGE_SIZE);
158 }
200 sc->sc_bus = busrange[0];
201
159
202 bzero(sc->sc_range, sizeof(sc->sc_range));
203 if (sc->sc_ver >= 3) {
204 /*
205 * On Apple U3 systems, we have an otherwise standard
206 * Uninorth controller driving AGP. The one difference
207 * is that it uses a new PCI ranges format, so do the
208 * translation.
209 */
210
211 struct uninorth_range64 range64[6];
212 bzero(range64, sizeof(range64));
213
214 sc->sc_nrange = OF_getprop(node, "ranges", range64,
215 sizeof(range64));
216 for (i = 0; range64[i].pci_hi != 0; i++) {
217 sc->sc_range[i].pci_hi = range64[i].pci_hi;
218 sc->sc_range[i].pci_mid = range64[i].pci_mid;
219 sc->sc_range[i].pci_lo = range64[i].pci_lo;
220 sc->sc_range[i].host = range64[i].host_lo;
221 sc->sc_range[i].size_hi = range64[i].size_hi;
222 sc->sc_range[i].size_lo = range64[i].size_lo;
223 }
224 } else {
225 sc->sc_nrange = OF_getprop(node, "ranges", sc->sc_range,
226 sizeof(sc->sc_range));
227 }
228
229 if (sc->sc_nrange == -1) {
230 device_printf(dev, "could not get ranges\n");
231 return (ENXIO);
232 }
233
234 sc->sc_nrange /= sizeof(sc->sc_range[0]);
235
236 sc->sc_range[6].pci_hi = 0;
237 io = NULL;
238 nmem = 0;
239
240 for (rp = sc->sc_range; rp < sc->sc_range + sc->sc_nrange &&
241 rp->pci_hi != 0; rp++) {
242 switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
243 case OFW_PCI_PHYS_HI_SPACE_CONFIG:
244 break;
245 case OFW_PCI_PHYS_HI_SPACE_IO:
246 io = rp;
247 break;
248 case OFW_PCI_PHYS_HI_SPACE_MEM32:
249 mem[nmem] = rp;
250 nmem++;
251 break;
252 case OFW_PCI_PHYS_HI_SPACE_MEM64:
253 break;
254 }
255 }
256
257 if (io == NULL) {
258 device_printf(dev, "can't find io range\n");
259 return (ENXIO);
260 }
261 sc->sc_io_rman.rm_type = RMAN_ARRAY;
262 sc->sc_io_rman.rm_descr = "UniNorth PCI I/O Ports";
263 sc->sc_iostart = io->host;
264 if (rman_init(&sc->sc_io_rman) != 0 ||
265 rman_manage_region(&sc->sc_io_rman, io->pci_lo,
266 io->pci_lo + io->size_lo - 1) != 0) {
267 panic("uninorth_attach: failed to set up I/O rman");
268 }
269
270 if (nmem == 0) {
271 device_printf(dev, "can't find mem ranges\n");
272 return (ENXIO);
273 }
274 sc->sc_mem_rman.rm_type = RMAN_ARRAY;
275 sc->sc_mem_rman.rm_descr = "UniNorth PCI Memory";
276 error = rman_init(&sc->sc_mem_rman);
277 if (error) {
278 device_printf(dev, "rman_init() failed. error = %d\n", error);
279 return (error);
280 }
281 for (i = 0; i < nmem; i++) {
282 error = rman_manage_region(&sc->sc_mem_rman, mem[i]->pci_lo,
283 mem[i]->pci_lo + mem[i]->size_lo - 1);
284 if (error) {
285 device_printf(dev,
286 "rman_manage_region() failed. error = %d\n", error);
287 return (error);
288 }
289 }
290
291 ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(cell_t));
292
293 device_add_child(dev, "pci", device_get_unit(dev));
294 return (bus_generic_attach(dev));
160 return (ofw_pci_attach(dev));
295}
296
161}
162
297static int
298uninorth_maxslots(device_t dev)
299{
300
301 return (PCI_SLOTMAX);
302}
303
304static u_int32_t
305uninorth_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
306 int width)
307{
308 struct uninorth_softc *sc;
309 vm_offset_t caoff;
310
311 sc = device_get_softc(dev);

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349 case 4:
350 out32rb(caoff, val);
351 break;
352 }
353 }
354}
355
356static int
163static u_int32_t
164uninorth_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
165 int width)
166{
167 struct uninorth_softc *sc;
168 vm_offset_t caoff;
169
170 sc = device_get_softc(dev);

--- 37 unchanged lines hidden (view full) ---

208 case 4:
209 out32rb(caoff, val);
210 break;
211 }
212 }
213}
214
215static int
357uninorth_route_interrupt(device_t bus, device_t dev, int pin)
358{
359 struct uninorth_softc *sc;
360 struct ofw_pci_register reg;
361 uint32_t pintr, mintr;
362 phandle_t iparent;
363 uint8_t maskbuf[sizeof(reg) + sizeof(pintr)];
364
365 sc = device_get_softc(bus);
366 pintr = pin;
367 if (ofw_bus_lookup_imap(ofw_bus_get_node(dev), &sc->sc_pci_iinfo, &reg,
368 sizeof(reg), &pintr, sizeof(pintr), &mintr, sizeof(mintr),
369 &iparent, maskbuf))
370 return (MAP_IRQ(iparent, mintr));
371
372 /* Maybe it's a real interrupt, not an intpin */
373 if (pin > 4)
374 return (pin);
375
376 device_printf(bus, "could not route pin %d for device %d.%d\n",
377 pin, pci_get_slot(dev), pci_get_function(dev));
378 return (PCI_INVALID_IRQ);
379}
380
381static int
382uninorth_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
383{
384 struct uninorth_softc *sc;
385
386 sc = device_get_softc(dev);
387
388 switch (which) {
389 case PCIB_IVAR_DOMAIN:
390 *result = device_get_unit(dev);
391 return (0);
392 case PCIB_IVAR_BUS:
393 *result = sc->sc_bus;
394 return (0);
395 }
396
397 return (ENOENT);
398}
399
400static struct resource *
401uninorth_alloc_resource(device_t bus, device_t child, int type, int *rid,
402 u_long start, u_long end, u_long count, u_int flags)
403{
404 struct uninorth_softc *sc;
405 struct resource *rv;
406 struct rman *rm;
407 int needactivate;
408
409 needactivate = flags & RF_ACTIVE;
410 flags &= ~RF_ACTIVE;
411
412 sc = device_get_softc(bus);
413
414 switch (type) {
415 case SYS_RES_MEMORY:
416 rm = &sc->sc_mem_rman;
417 break;
418
419 case SYS_RES_IOPORT:
420 rm = &sc->sc_io_rman;
421 break;
422
423 case SYS_RES_IRQ:
424 return (bus_alloc_resource(bus, type, rid, start, end, count,
425 flags));
426
427 default:
428 device_printf(bus, "unknown resource request from %s\n",
429 device_get_nameunit(child));
430 return (NULL);
431 }
432
433 rv = rman_reserve_resource(rm, start, end, count, flags, child);
434 if (rv == NULL) {
435 device_printf(bus, "failed to reserve resource for %s\n",
436 device_get_nameunit(child));
437 return (NULL);
438 }
439
440 rman_set_rid(rv, *rid);
441
442 if (needactivate) {
443 if (bus_activate_resource(child, type, *rid, rv) != 0) {
444 device_printf(bus,
445 "failed to activate resource for %s\n",
446 device_get_nameunit(child));
447 rman_release_resource(rv);
448 return (NULL);
449 }
450 }
451
452 return (rv);
453}
454
455static int
456uninorth_activate_resource(device_t bus, device_t child, int type, int rid,
457 struct resource *res)
458{
459 void *p;
460 struct uninorth_softc *sc;
461
462 sc = device_get_softc(bus);
463
464 if (type == SYS_RES_IRQ)
465 return (bus_activate_resource(bus, type, rid, res));
466
467 if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
468 vm_offset_t start;
469
470 start = (vm_offset_t)rman_get_start(res);
471 /*
472 * For i/o-ports, convert the start address to the
473 * uninorth PCI i/o window
474 */
475 if (type == SYS_RES_IOPORT)
476 start += sc->sc_iostart;
477
478 if (bootverbose)
479 printf("uninorth mapdev: start %zx, len %ld\n", start,
480 rman_get_size(res));
481
482 p = pmap_mapdev(start, (vm_size_t)rman_get_size(res));
483 if (p == NULL)
484 return (ENOMEM);
485 rman_set_virtual(res, p);
486 rman_set_bustag(res, &bs_le_tag);
487 rman_set_bushandle(res, (u_long)p);
488 }
489
490 return (rman_activate_resource(res));
491}
492
493static int
494uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot,
495 u_int func, u_int reg)
496{
497 uint32_t cfgval;
498 uint32_t pass;
499
216uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot,
217 u_int func, u_int reg)
218{
219 uint32_t cfgval;
220 uint32_t pass;
221
500 if (resource_int_value(device_get_name(sc->sc_dev),
501 device_get_unit(sc->sc_dev), "skipslot", &pass) == 0) {
222 if (resource_int_value(device_get_name(sc->pci_sc.sc_dev),
223 device_get_unit(sc->pci_sc.sc_dev), "skipslot", &pass) == 0) {
502 if (pass == slot)
503 return (0);
504 }
505
506 /*
507 * Issue type 0 configuration space accesses for the root bus.
508 *
509 * NOTE: On U4, issue only type 1 accesses. There is a secret
510 * PCI Express <-> PCI Express bridge not present in the device tree,
511 * and we need to route all of our configuration space through it.
512 */
224 if (pass == slot)
225 return (0);
226 }
227
228 /*
229 * Issue type 0 configuration space accesses for the root bus.
230 *
231 * NOTE: On U4, issue only type 1 accesses. There is a secret
232 * PCI Express <-> PCI Express bridge not present in the device tree,
233 * and we need to route all of our configuration space through it.
234 */
513 if (sc->sc_bus == bus && sc->sc_ver < 4) {
235 if (sc->pci_sc.sc_bus == bus && sc->sc_ver < 4) {
514 /*
515 * No slots less than 11 on the primary bus on U3 and lower
516 */
517 if (slot < 11)
518 return (0);
519
520 cfgval = (1 << slot) | (func << 8) | (reg & 0xfc);
521 } else {

--- 7 unchanged lines hidden (view full) ---

529
530 do {
531 out32rb(sc->sc_addr, cfgval);
532 } while (in32rb(sc->sc_addr) != cfgval);
533
534 return (1);
535}
536
236 /*
237 * No slots less than 11 on the primary bus on U3 and lower
238 */
239 if (slot < 11)
240 return (0);
241
242 cfgval = (1 << slot) | (func << 8) | (reg & 0xfc);
243 } else {

--- 7 unchanged lines hidden (view full) ---

251
252 do {
253 out32rb(sc->sc_addr, cfgval);
254 } while (in32rb(sc->sc_addr) != cfgval);
255
256 return (1);
257}
258
537static phandle_t
538uninorth_get_node(device_t bus, device_t dev)
539{
540 struct uninorth_softc *sc;
541
542 sc = device_get_softc(bus);
543 /* We only have one child, the PCI bus, which needs our own node. */
544
545 return sc->sc_node;
546}
547