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ar91xx_chip.c (234906) ar91xx_chip.c (234907)
1/*-
2 * Copyright (c) 2010 Adrian Chadd
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2010 Adrian Chadd
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar91xx_chip.c 234906 2012-05-02 01:21:57Z adrian $");
28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar91xx_chip.c 234907 2012-05-02 04:51:43Z adrian $");
29
30#include "opt_ddb.h"
31
32#include <sys/param.h>
33#include <sys/conf.h>
34#include <sys/kernel.h>
35#include <sys/systm.h>
36#include <sys/bus.h>

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107{
108 uint32_t reg;
109
110 reg = ATH_READ_REG(AR91XX_RESET_REG_RESET_MODULE);
111 return ((reg & mask) == mask);
112}
113
114static void
29
30#include "opt_ddb.h"
31
32#include <sys/param.h>
33#include <sys/conf.h>
34#include <sys/kernel.h>
35#include <sys/systm.h>
36#include <sys/bus.h>

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107{
108 uint32_t reg;
109
110 reg = ATH_READ_REG(AR91XX_RESET_REG_RESET_MODULE);
111 return ((reg & mask) == mask);
112}
113
114static void
115ar91xx_chip_set_pll_ge(int unit, int speed)
115ar91xx_chip_set_pll_ge(int unit, int speed, uint32_t pll)
116{
116{
117 uint32_t pll;
118
117
119 switch(speed) {
120 case 10:
121 pll = AR91XX_PLL_VAL_10;
122 break;
123 case 100:
124 pll = AR91XX_PLL_VAL_100;
125 break;
126 case 1000:
127 pll = AR91XX_PLL_VAL_1000;
128 break;
129 default:
130 printf("%s%d: invalid speed %d\n",
131 __func__, unit, speed);
132 return;
133 }
134 switch (unit) {
135 case 0:
136 ar71xx_write_pll(AR91XX_PLL_REG_ETH_CONFIG,
137 AR91XX_PLL_REG_ETH0_INT_CLOCK, pll,
138 AR91XX_ETH0_PLL_SHIFT);
139 break;
140 case 1:
141 ar71xx_write_pll(AR91XX_PLL_REG_ETH_CONFIG,
142 AR91XX_PLL_REG_ETH1_INT_CLOCK, pll,
143 AR91XX_ETH1_PLL_SHIFT);
144 break;
145 default:
146 printf("%s: invalid PLL set for arge unit: %d\n",
147 __func__, unit);
148 return;
149 }
118 switch (unit) {
119 case 0:
120 ar71xx_write_pll(AR91XX_PLL_REG_ETH_CONFIG,
121 AR91XX_PLL_REG_ETH0_INT_CLOCK, pll,
122 AR91XX_ETH0_PLL_SHIFT);
123 break;
124 case 1:
125 ar71xx_write_pll(AR91XX_PLL_REG_ETH_CONFIG,
126 AR91XX_PLL_REG_ETH1_INT_CLOCK, pll,
127 AR91XX_ETH1_PLL_SHIFT);
128 break;
129 default:
130 printf("%s: invalid PLL set for arge unit: %d\n",
131 __func__, unit);
132 return;
133 }
150 ar71xx_chip_set_mii_speed(unit, speed);
151}
152
153static void
154ar91xx_chip_ddr_flush_ge(int unit)
155{
156
157 switch (unit) {
158 case 0:

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174
175 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_WMAC);
176}
177
178
179static uint32_t
180ar91xx_chip_get_eth_pll(unsigned int mac, int speed)
181{
134}
135
136static void
137ar91xx_chip_ddr_flush_ge(int unit)
138{
139
140 switch (unit) {
141 case 0:

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157
158 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_WMAC);
159}
160
161
162static uint32_t
163ar91xx_chip_get_eth_pll(unsigned int mac, int speed)
164{
165 uint32_t pll;
182
166
183 return 0;
167 switch(speed) {
168 case 10:
169 pll = AR91XX_PLL_VAL_10;
170 break;
171 case 100:
172 pll = AR91XX_PLL_VAL_100;
173 break;
174 case 1000:
175 pll = AR91XX_PLL_VAL_1000;
176 break;
177 default:
178 printf("%s%d: invalid speed %d\n", __func__, mac, speed);
179 pll = 0;
180 }
181
182 return (pll);
184}
185
186static void
187ar91xx_chip_init_usb_peripheral(void)
188{
189
190 ar71xx_device_stop(AR91XX_RST_RESET_MODULE_USBSUS_OVERRIDE);
191 DELAY(100);

--- 29 unchanged lines hidden --- 		183}
184
185static void
186ar91xx_chip_init_usb_peripheral(void)
187{
188
189 ar71xx_device_stop(AR91XX_RST_RESET_MODULE_USBSUS_OVERRIDE);
190 DELAY(100);

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