| ar724xreg.h (211503) | ar724xreg.h (219591) |
|---|---|
| 1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 | 1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 |
| 27/* $FreeBSD: head/sys/mips/atheros/ar724xreg.h 211503 2010-08-19 11:53:55Z adrian $ */ | 27/* $FreeBSD: head/sys/mips/atheros/ar724xreg.h 219591 2011-03-13 08:36:57Z adrian $ */ |
| 28 29#ifndef __AR72XX_REG_H__ 30#define __AR72XX_REG_H__ 31 32#define AR724X_PLL_REG_CPU_CONFIG AR71XX_PLL_CPU_BASE + 0x00 33#define AR724X_PLL_REG_PCIE_CONFIG AR71XX_PLL_CPU_BASE + 0x18 34 35#define AR724X_PLL_DIV_SHIFT 0 --- 6 unchanged lines hidden (view full) --- 42#define AR724X_DDR_DIV_MASK 0x3 43 44#define AR724X_PLL_VAL_1000 0x00110000 45#define AR724X_PLL_VAL_100 0x00001099 46#define AR724X_PLL_VAL_10 0x00991099 47 48#define AR724X_BASE_FREQ 5000000 49 | 28 29#ifndef __AR72XX_REG_H__ 30#define __AR72XX_REG_H__ 31 32#define AR724X_PLL_REG_CPU_CONFIG AR71XX_PLL_CPU_BASE + 0x00 33#define AR724X_PLL_REG_PCIE_CONFIG AR71XX_PLL_CPU_BASE + 0x18 34 35#define AR724X_PLL_DIV_SHIFT 0 --- 6 unchanged lines hidden (view full) --- 42#define AR724X_DDR_DIV_MASK 0x3 43 44#define AR724X_PLL_VAL_1000 0x00110000 45#define AR724X_PLL_VAL_100 0x00001099 46#define AR724X_PLL_VAL_10 0x00991099 47 48#define AR724X_BASE_FREQ 5000000 49 |
| 50#define AR724X_DDR_REG_FLUSH_GE0 (AR71XX_DDR_CONFIG + 0x7c) 51#define AR724X_DDR_REG_FLUSH_GE1 (AR71XX_DDR_CONFIG + 0x80) 52 |
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| 50#define AR724X_RESET_REG_RESET_MODULE AR71XX_RST_BLOCK_BASE + 0x1c 51#define AR724X_RESET_MODULE_USB_OHCI_DLL (1 << 3) 52 53/* XXX so USB requires different init code? -adrian */ 54#define AR7240_OHCI_BASE 0x1b000000 55#define AR7240_OHCI_SIZE 0x01000000 56#define AR724X_DDR_REG_FLUSH_USB (AR71XX_DDR_CONFIG + 0x84) 57 --- 27 unchanged lines hidden --- | 53#define AR724X_RESET_REG_RESET_MODULE AR71XX_RST_BLOCK_BASE + 0x1c 54#define AR724X_RESET_MODULE_USB_OHCI_DLL (1 << 3) 55 56/* XXX so USB requires different init code? -adrian */ 57#define AR7240_OHCI_BASE 0x1b000000 58#define AR7240_OHCI_SIZE 0x01000000 59#define AR724X_DDR_REG_FLUSH_USB (AR71XX_DDR_CONFIG + 0x84) 60 --- 27 unchanged lines hidden --- |