| ar724x_chip.c (233082) | ar724x_chip.c (234906) |
|---|---|
| 1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
| 28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar724x_chip.c 233082 2012-03-17 07:29:11Z adrian $"); | 28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar724x_chip.c 234906 2012-05-02 01:21:57Z adrian $"); |
| 29 30#include "opt_ddb.h" 31 32#include <sys/param.h> 33#include <sys/conf.h> 34#include <sys/kernel.h> 35#include <sys/systm.h> 36#include <sys/bus.h> --- 14 unchanged lines hidden (view full) --- 51#include <machine/trap.h> 52#include <machine/vmparam.h> 53 54#include <mips/atheros/ar71xxreg.h> 55#include <mips/atheros/ar724xreg.h> 56 57#include <mips/atheros/ar71xx_cpudef.h> 58#include <mips/atheros/ar71xx_setup.h> | 29 30#include "opt_ddb.h" 31 32#include <sys/param.h> 33#include <sys/conf.h> 34#include <sys/kernel.h> 35#include <sys/systm.h> 36#include <sys/bus.h> --- 14 unchanged lines hidden (view full) --- 51#include <machine/trap.h> 52#include <machine/vmparam.h> 53 54#include <mips/atheros/ar71xxreg.h> 55#include <mips/atheros/ar724xreg.h> 56 57#include <mips/atheros/ar71xx_cpudef.h> 58#include <mips/atheros/ar71xx_setup.h> |
| 59#include <mips/atheros/ar71xx_chip.h> |
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| 59#include <mips/atheros/ar724x_chip.h> 60 61#include <mips/sentry5/s5reg.h> 62 63static void 64ar724x_chip_detect_mem_size(void) 65{ 66} --- 58 unchanged lines hidden (view full) --- 125static void 126ar724x_chip_set_mii_speed(uint32_t unit, uint32_t speed) 127{ 128 129 /* XXX TODO */ 130 return; 131} 132 | 60#include <mips/atheros/ar724x_chip.h> 61 62#include <mips/sentry5/s5reg.h> 63 64static void 65ar724x_chip_detect_mem_size(void) 66{ 67} --- 58 unchanged lines hidden (view full) --- 126static void 127ar724x_chip_set_mii_speed(uint32_t unit, uint32_t speed) 128{ 129 130 /* XXX TODO */ 131 return; 132} 133 |
| 134/* 135 * XXX TODO: set the PLL for arge0 only on AR7242. 136 * The PLL/clock requirements are different. 137 * 138 * Otherwise, it's a NULL function for AR7240, AR7241 and 139 * AR7242 arge1. 140 */ |
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| 133static void 134ar724x_chip_set_pll_ge(int unit, int speed) 135{ 136 137 switch (unit) { 138 case 0: 139 /* XXX TODO */ 140 break; --- 83 unchanged lines hidden (view full) --- 224struct ar71xx_cpu_def ar724x_chip_def = { 225 &ar724x_chip_detect_mem_size, 226 &ar724x_chip_detect_sys_frequency, 227 &ar724x_chip_device_stop, 228 &ar724x_chip_device_start, 229 &ar724x_chip_device_stopped, 230 &ar724x_chip_set_pll_ge, 231 &ar724x_chip_set_mii_speed, | 141static void 142ar724x_chip_set_pll_ge(int unit, int speed) 143{ 144 145 switch (unit) { 146 case 0: 147 /* XXX TODO */ 148 break; --- 83 unchanged lines hidden (view full) --- 232struct ar71xx_cpu_def ar724x_chip_def = { 233 &ar724x_chip_detect_mem_size, 234 &ar724x_chip_detect_sys_frequency, 235 &ar724x_chip_device_stop, 236 &ar724x_chip_device_start, 237 &ar724x_chip_device_stopped, 238 &ar724x_chip_set_pll_ge, 239 &ar724x_chip_set_mii_speed, |
| 240 &ar71xx_chip_set_mii_if, |
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| 232 &ar724x_chip_ddr_flush_ge, 233 &ar724x_chip_get_eth_pll, 234 &ar724x_chip_ddr_flush_ip2, 235 &ar724x_chip_init_usb_peripheral 236}; | 241 &ar724x_chip_ddr_flush_ge, 242 &ar724x_chip_get_eth_pll, 243 &ar724x_chip_ddr_flush_ip2, 244 &ar724x_chip_init_usb_peripheral 245}; |