ar724x_chip.c (223562) | ar724x_chip.c (228018) |
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1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar724x_chip.c 223562 2011-06-26 10:07:48Z kevlo $"); | 28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar724x_chip.c 228018 2011-11-27 11:15:59Z ray $"); |
29 30#include "opt_ddb.h" 31 32#include <sys/param.h> 33#include <sys/conf.h> 34#include <sys/kernel.h> 35#include <sys/systm.h> 36#include <sys/bus.h> --- 81 unchanged lines hidden (view full) --- 118{ 119 uint32_t reg; 120 121 reg = ATH_READ_REG(AR724X_RESET_REG_RESET_MODULE); 122 return ((reg & mask) == mask); 123} 124 125static void | 29 30#include "opt_ddb.h" 31 32#include <sys/param.h> 33#include <sys/conf.h> 34#include <sys/kernel.h> 35#include <sys/systm.h> 36#include <sys/bus.h> --- 81 unchanged lines hidden (view full) --- 118{ 119 uint32_t reg; 120 121 reg = ATH_READ_REG(AR724X_RESET_REG_RESET_MODULE); 122 return ((reg & mask) == mask); 123} 124 125static void |
126ar724x_chip_set_pll_ge0(int speed) | 126ar724x_chip_set_pll_ge(int unit, int speed) |
127{ | 127{ |
128 switch (unit) { 129 case 0: 130 /* TODO */ 131 break; 132 case 1: 133 /* TODO */ 134 break; 135 default: 136 printf("%s: invalid PLL set for arge unit: %d\n", 137 __func__, unit); 138 return; 139 } |
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128} 129 130static void | 140} 141 142static void |
131ar724x_chip_set_pll_ge1(int speed) | 143ar724x_chip_ddr_flush_ge(int unit) |
132{ | 144{ |
145 switch (unit) { 146 case 0: 147 ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0); 148 break; 149 case 1: 150 ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1); 151 break; 152 default: 153 printf("%s: invalid DDR flush for arge unit: %d\n", 154 __func__, unit); 155 return; 156 } |
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133} 134 135static void | 157} 158 159static void |
136ar724x_chip_ddr_flush_ge0(void) 137{ 138 ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0); 139} 140 141static void 142ar724x_chip_ddr_flush_ge1(void) 143{ 144 ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1); 145} 146 147static void | |
148ar724x_chip_ddr_flush_ip2(void) 149{ 150 ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_PCIE); 151} 152 153 154static uint32_t 155ar724x_chip_get_eth_pll(unsigned int mac, int speed) --- 46 unchanged lines hidden (view full) --- 202} 203 204struct ar71xx_cpu_def ar724x_chip_def = { 205 &ar724x_chip_detect_mem_size, 206 &ar724x_chip_detect_sys_frequency, 207 &ar724x_chip_device_stop, 208 &ar724x_chip_device_start, 209 &ar724x_chip_device_stopped, | 160ar724x_chip_ddr_flush_ip2(void) 161{ 162 ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_PCIE); 163} 164 165 166static uint32_t 167ar724x_chip_get_eth_pll(unsigned int mac, int speed) --- 46 unchanged lines hidden (view full) --- 214} 215 216struct ar71xx_cpu_def ar724x_chip_def = { 217 &ar724x_chip_detect_mem_size, 218 &ar724x_chip_detect_sys_frequency, 219 &ar724x_chip_device_stop, 220 &ar724x_chip_device_start, 221 &ar724x_chip_device_stopped, |
210 &ar724x_chip_set_pll_ge0, 211 &ar724x_chip_set_pll_ge1, 212 &ar724x_chip_ddr_flush_ge0, 213 &ar724x_chip_ddr_flush_ge1, | 222 &ar724x_chip_set_pll_ge, 223 &ar724x_chip_ddr_flush_ge, |
214 &ar724x_chip_get_eth_pll, 215 &ar724x_chip_ddr_flush_ip2, 216 &ar724x_chip_init_usb_peripheral 217}; | 224 &ar724x_chip_get_eth_pll, 225 &ar724x_chip_ddr_flush_ip2, 226 &ar724x_chip_init_usb_peripheral 227}; |