| ar724x_chip.c (219591) | ar724x_chip.c (220180) |
|---|---|
| 1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
| 28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar724x_chip.c 219591 2011-03-13 08:36:57Z adrian $"); | 28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar724x_chip.c 220180 2011-03-31 02:36:22Z adrian $"); |
| 29 30#include <sys/param.h> 31#include <machine/cpuregs.h> 32 33#include <mips/sentry5/s5reg.h> 34 35#include "opt_ddb.h" 36 --- 17 unchanged lines hidden (view full) --- 54#include <machine/md_var.h> 55#include <machine/trap.h> 56#include <machine/vmparam.h> 57 58#include <mips/atheros/ar71xxreg.h> 59#include <mips/atheros/ar724xreg.h> 60 61#include <mips/atheros/ar71xx_cpudef.h> | 29 30#include <sys/param.h> 31#include <machine/cpuregs.h> 32 33#include <mips/sentry5/s5reg.h> 34 35#include "opt_ddb.h" 36 --- 17 unchanged lines hidden (view full) --- 54#include <machine/md_var.h> 55#include <machine/trap.h> 56#include <machine/vmparam.h> 57 58#include <mips/atheros/ar71xxreg.h> 59#include <mips/atheros/ar724xreg.h> 60 61#include <mips/atheros/ar71xx_cpudef.h> |
| 62#include <mips/atheros/ar71xx_setup.h> |
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| 62#include <mips/atheros/ar724x_chip.h> 63 64static void 65ar724x_chip_detect_mem_size(void) 66{ 67} 68 69static void --- 76 unchanged lines hidden (view full) --- 146} 147 148static uint32_t 149ar724x_chip_get_eth_pll(unsigned int mac, int speed) 150{ 151 return 0; 152} 153 | 63#include <mips/atheros/ar724x_chip.h> 64 65static void 66ar724x_chip_detect_mem_size(void) 67{ 68} 69 70static void --- 76 unchanged lines hidden (view full) --- 147} 148 149static uint32_t 150ar724x_chip_get_eth_pll(unsigned int mac, int speed) 151{ 152 return 0; 153} 154 |
| 155static void 156ar724x_chip_init_usb_peripheral(void) 157{ 158 159 switch (ar71xx_soc) { 160 case AR71XX_SOC_AR7240: 161 162 ar71xx_device_stop(AR724X_RESET_MODULE_USB_OHCI_DLL | 163 AR724X_RESET_USB_HOST); 164 DELAY(1000); 165 166 ar71xx_device_start(AR724X_RESET_MODULE_USB_OHCI_DLL | 167 AR724X_RESET_USB_HOST); 168 DELAY(1000); 169 170 /* 171 * WAR for HW bug. Here it adjusts the duration 172 * between two SOFS. 173 */ 174 ATH_WRITE_REG(AR71XX_USB_CTRL_FLADJ, 175 (3 << USB_CTRL_FLADJ_A0_SHIFT)); 176 177 break; 178 179 case AR71XX_SOC_AR7241: 180 case AR71XX_SOC_AR7242: 181 182 ar71xx_device_start(AR724X_RESET_MODULE_USB_OHCI_DLL); 183 DELAY(100); 184 185 ar71xx_device_start(AR724X_RESET_USB_HOST); 186 DELAY(100); 187 188 ar71xx_device_start(AR724X_RESET_USB_PHY); 189 DELAY(100); 190 191 break; 192 193 default: 194 /* fallthrough */ 195 break; 196 } 197} 198 |
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| 154struct ar71xx_cpu_def ar724x_chip_def = { 155 &ar724x_chip_detect_mem_size, 156 &ar724x_chip_detect_sys_frequency, 157 &ar724x_chip_device_stop, 158 &ar724x_chip_device_start, 159 &ar724x_chip_device_stopped, 160 &ar724x_chip_set_pll_ge0, 161 &ar724x_chip_set_pll_ge1, 162 &ar724x_chip_ddr_flush_ge0, 163 &ar724x_chip_ddr_flush_ge1, 164 &ar724x_chip_get_eth_pll, 165 NULL, /* ar71xx_chip_irq_flush_ip2 */ | 199struct ar71xx_cpu_def ar724x_chip_def = { 200 &ar724x_chip_detect_mem_size, 201 &ar724x_chip_detect_sys_frequency, 202 &ar724x_chip_device_stop, 203 &ar724x_chip_device_start, 204 &ar724x_chip_device_stopped, 205 &ar724x_chip_set_pll_ge0, 206 &ar724x_chip_set_pll_ge1, 207 &ar724x_chip_ddr_flush_ge0, 208 &ar724x_chip_ddr_flush_ge1, 209 &ar724x_chip_get_eth_pll, 210 NULL, /* ar71xx_chip_irq_flush_ip2 */ |
| 166 NULL /* ar71xx_chip_init_usb_peripheral */ | 211 &ar724x_chip_init_usb_peripheral |
| 167}; | 212}; |