| ar71xx_cpudef.h (234906) | ar71xx_cpudef.h (234907) |
|---|---|
| 1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 | 1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 |
| 27/* $FreeBSD: head/sys/mips/atheros/ar71xx_cpudef.h 234906 2012-05-02 01:21:57Z adrian $ */ | 27/* $FreeBSD: head/sys/mips/atheros/ar71xx_cpudef.h 234907 2012-05-02 04:51:43Z adrian $ */ |
| 28 29#ifndef __AR71XX_CPUDEF_H__ 30#define __AR71XX_CPUDEF_H__ 31 32struct ar71xx_cpu_def { 33 void (* detect_mem_size) (void); 34 void (* detect_sys_frequency) (void); 35 void (* ar71xx_chip_device_stop) (uint32_t); 36 void (* ar71xx_chip_device_start) (uint32_t); 37 int (* ar71xx_chip_device_stopped) (uint32_t); | 28 29#ifndef __AR71XX_CPUDEF_H__ 30#define __AR71XX_CPUDEF_H__ 31 32struct ar71xx_cpu_def { 33 void (* detect_mem_size) (void); 34 void (* detect_sys_frequency) (void); 35 void (* ar71xx_chip_device_stop) (uint32_t); 36 void (* ar71xx_chip_device_start) (uint32_t); 37 int (* ar71xx_chip_device_stopped) (uint32_t); |
| 38 void (* ar71xx_chip_set_pll_ge) (int, int); | 38 void (* ar71xx_chip_set_pll_ge) (int, int, uint32_t); |
| 39 void (* ar71xx_chip_set_mii_speed) (uint32_t, uint32_t); 40 void (* ar71xx_chip_set_mii_if) (uint32_t, ar71xx_mii_mode); 41 void (* ar71xx_chip_ddr_flush_ge) (int); 42 uint32_t (* ar71xx_chip_get_eth_pll) (unsigned int, int); 43 44 /* 45 * From Linux - Handling this IRQ is a bit special. 46 * AR71xx - AR71XX_DDR_REG_FLUSH_PCI --- 29 unchanged lines hidden (view full) --- 76 ar71xx_cpu_ops->ar71xx_chip_device_start(mask); 77} 78 79static inline int ar71xx_device_stopped(uint32_t mask) 80{ 81 return ar71xx_cpu_ops->ar71xx_chip_device_stopped(mask); 82} 83 | 39 void (* ar71xx_chip_set_mii_speed) (uint32_t, uint32_t); 40 void (* ar71xx_chip_set_mii_if) (uint32_t, ar71xx_mii_mode); 41 void (* ar71xx_chip_ddr_flush_ge) (int); 42 uint32_t (* ar71xx_chip_get_eth_pll) (unsigned int, int); 43 44 /* 45 * From Linux - Handling this IRQ is a bit special. 46 * AR71xx - AR71XX_DDR_REG_FLUSH_PCI --- 29 unchanged lines hidden (view full) --- 76 ar71xx_cpu_ops->ar71xx_chip_device_start(mask); 77} 78 79static inline int ar71xx_device_stopped(uint32_t mask) 80{ 81 return ar71xx_cpu_ops->ar71xx_chip_device_stopped(mask); 82} 83 |
| 84static inline void ar71xx_device_set_pll_ge(int unit, int speed) | 84static inline void ar71xx_device_set_pll_ge(int unit, int speed, uint32_t pll) |
| 85{ | 85{ |
| 86 ar71xx_cpu_ops->ar71xx_chip_set_pll_ge(unit, speed); | 86 ar71xx_cpu_ops->ar71xx_chip_set_pll_ge(unit, speed, pll); |
| 87} 88 89static inline void ar71xx_device_set_mii_speed(int unit, int speed) 90{ 91 ar71xx_cpu_ops->ar71xx_chip_set_mii_speed(unit, speed); 92} 93 94static inline void ar71xx_device_set_mii_if(int unit, ar71xx_mii_mode mii_cfg) 95{ 96 ar71xx_cpu_ops->ar71xx_chip_set_mii_if(unit, mii_cfg); 97} 98 99static inline void ar71xx_device_flush_ddr_ge(int unit) 100{ 101 ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ge(unit); 102} 103 | 87} 88 89static inline void ar71xx_device_set_mii_speed(int unit, int speed) 90{ 91 ar71xx_cpu_ops->ar71xx_chip_set_mii_speed(unit, speed); 92} 93 94static inline void ar71xx_device_set_mii_if(int unit, ar71xx_mii_mode mii_cfg) 95{ 96 ar71xx_cpu_ops->ar71xx_chip_set_mii_if(unit, mii_cfg); 97} 98 99static inline void ar71xx_device_flush_ddr_ge(int unit) 100{ 101 ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ge(unit); 102} 103 |
| 104static inline uint32_t ar71xx_device_get_eth_pll(unsigned int unit, int speed) 105{ 106 return (ar71xx_cpu_ops->ar71xx_chip_get_eth_pll(unit, speed)); 107} 108 |
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| 104static inline void ar71xx_init_usb_peripheral(void) 105{ 106 ar71xx_cpu_ops->ar71xx_chip_init_usb_peripheral(); 107} 108 109static inline void ar71xx_device_ddr_flush_ip2(void) 110{ 111 ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ip2(); --- 12 unchanged lines hidden --- | 109static inline void ar71xx_init_usb_peripheral(void) 110{ 111 ar71xx_cpu_ops->ar71xx_chip_init_usb_peripheral(); 112} 113 114static inline void ar71xx_device_ddr_flush_ip2(void) 115{ 116 ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ip2(); --- 12 unchanged lines hidden --- |