| ar71xx_cpudef.h (211447) | ar71xx_cpudef.h (211509) |
|---|---|
| 1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 | 1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 |
| 27/* $FreeBSD: head/sys/mips/atheros/ar71xx_cpudef.h 211447 2010-08-18 08:22:09Z adrian $ */ | 27/* $FreeBSD: head/sys/mips/atheros/ar71xx_cpudef.h 211509 2010-08-19 16:15:30Z adrian $ */ |
| 28 29#ifndef __AR71XX_CPUDEF_H__ 30#define __AR71XX_CPUDEF_H__ 31 32struct ar71xx_cpu_def { 33 void (* detect_mem_size) (void); 34 void (* detect_sys_frequency) (void); 35 void (* ar71xx_chip_device_stop) (uint32_t); --- 40 unchanged lines hidden (view full) --- 76 ar71xx_cpu_ops->ar71xx_chip_device_start(mask); 77} 78 79static inline int ar71xx_device_stopped(uint32_t mask) 80{ 81 return ar71xx_cpu_ops->ar71xx_chip_device_stopped(mask); 82} 83 | 28 29#ifndef __AR71XX_CPUDEF_H__ 30#define __AR71XX_CPUDEF_H__ 31 32struct ar71xx_cpu_def { 33 void (* detect_mem_size) (void); 34 void (* detect_sys_frequency) (void); 35 void (* ar71xx_chip_device_stop) (uint32_t); --- 40 unchanged lines hidden (view full) --- 76 ar71xx_cpu_ops->ar71xx_chip_device_start(mask); 77} 78 79static inline int ar71xx_device_stopped(uint32_t mask) 80{ 81 return ar71xx_cpu_ops->ar71xx_chip_device_stopped(mask); 82} 83 |
| 84static inline void ar71xx_device_set_pll_ge0(int speed) 85{ 86 ar71xx_cpu_ops->ar71xx_chip_set_pll_ge0(speed); 87} 88 89static inline void ar71xx_device_set_pll_ge1(int speed) 90{ 91 ar71xx_cpu_ops->ar71xx_chip_set_pll_ge1(speed); 92} 93 |
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| 84static inline void ar71xx_device_flush_ddr_ge0(void) 85{ 86 ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ge0(); 87} 88 89static inline void ar71xx_device_flush_ddr_ge1(void) 90{ 91 ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ge1(); --- 17 unchanged lines hidden --- | 94static inline void ar71xx_device_flush_ddr_ge0(void) 95{ 96 ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ge0(); 97} 98 99static inline void ar71xx_device_flush_ddr_ge1(void) 100{ 101 ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ge1(); --- 17 unchanged lines hidden --- |