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ar71xx_chip.c (228450) ar71xx_chip.c (233081)
1/*-
2 * Copyright (c) 2010 Adrian Chadd
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2010 Adrian Chadd
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar71xx_chip.c 228450 2011-12-13 05:13:51Z adrian $");
28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar71xx_chip.c 233081 2012-03-17 07:25:23Z adrian $");
29
30#include "opt_ddb.h"
31
32#include <sys/param.h>
33#include <sys/conf.h>
34#include <sys/kernel.h>
35#include <sys/systm.h>
36#include <sys/bus.h>

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131ar71xx_chip_device_stopped(uint32_t mask)
132{
133 uint32_t reg;
134
135 reg = ATH_READ_REG(AR71XX_RST_RESET);
136 return ((reg & mask) == mask);
137}
138
29
30#include "opt_ddb.h"
31
32#include <sys/param.h>
33#include <sys/conf.h>
34#include <sys/kernel.h>
35#include <sys/systm.h>
36#include <sys/bus.h>

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131ar71xx_chip_device_stopped(uint32_t mask)
132{
133 uint32_t reg;
134
135 reg = ATH_READ_REG(AR71XX_RST_RESET);
136 return ((reg & mask) == mask);
137}
138
139static void
140ar71xx_chip_set_mii_speed(uint32_t unit, uint32_t speed)
141{
142 uint32_t val, reg, ctrl;
143
144 switch (unit) {
145 case 0:
146 reg = AR71XX_MII0_CTRL;
147 break;
148 case 1:
149 reg = AR71XX_MII1_CTRL;
150 break;
151 default:
152 printf("%s: invalid MII unit set for arge unit: %d\n",
153 __func__, unit);
154 return;
155 }
156
157 switch (speed) {
158 case 10:
159 ctrl = MII_CTRL_SPEED_10;
160 break;
161 case 100:
162 ctrl = MII_CTRL_SPEED_100;
163 break;
164 case 1000:
165 ctrl = MII_CTRL_SPEED_1000;
166 break;
167 default:
168 printf("%s: invalid MII speed (%d) set for arge unit: %d\n",
169 __func__, speed, unit);
170 return;
171 }
172
173 val = ATH_READ_REG(reg);
174 val &= ~(MII_CTRL_SPEED_MASK << MII_CTRL_SPEED_SHIFT);
175 val |= (ctrl & MII_CTRL_SPEED_MASK) << MII_CTRL_SPEED_SHIFT;
176 ATH_WRITE_REG(reg, val);
177}
178
139/* Speed is either 10, 100 or 1000 */
140static void
141ar71xx_chip_set_pll_ge(int unit, int speed)
142{
143 uint32_t pll;
144
145 switch (speed) {
146 case 10:

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232
233struct ar71xx_cpu_def ar71xx_chip_def = {
234 &ar71xx_chip_detect_mem_size,
235 &ar71xx_chip_detect_sys_frequency,
236 &ar71xx_chip_device_stop,
237 &ar71xx_chip_device_start,
238 &ar71xx_chip_device_stopped,
239 &ar71xx_chip_set_pll_ge,
179/* Speed is either 10, 100 or 1000 */
180static void
181ar71xx_chip_set_pll_ge(int unit, int speed)
182{
183 uint32_t pll;
184
185 switch (speed) {
186 case 10:

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272
273struct ar71xx_cpu_def ar71xx_chip_def = {
274 &ar71xx_chip_detect_mem_size,
275 &ar71xx_chip_detect_sys_frequency,
276 &ar71xx_chip_device_stop,
277 &ar71xx_chip_device_start,
278 &ar71xx_chip_device_stopped,
279 &ar71xx_chip_set_pll_ge,
280 &ar71xx_chip_set_mii_speed,
240 &ar71xx_chip_ddr_flush_ge,
241 &ar71xx_chip_get_eth_pll,
242 &ar71xx_chip_ddr_flush_ip2,
243 &ar71xx_chip_init_usb_peripheral,
244};
281 &ar71xx_chip_ddr_flush_ge,
282 &ar71xx_chip_get_eth_pll,
283 &ar71xx_chip_ddr_flush_ip2,
284 &ar71xx_chip_init_usb_peripheral,
285};