1/*-
2 * Copyright (c) 1997 Michael Smith
3 * Copyright (c) 1998 Jonathan Lemon
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
| 1/*-
2 * Copyright (c) 1997 Michael Smith
3 * Copyright (c) 1998 Jonathan Lemon
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
|
28 */
29
30#ifndef _MACHINE_PC_BIOS_H_
31#define _MACHINE_PC_BIOS_H_
32
33/*
34 * Signature structure for the BIOS32 Service Directory header
35 */
36struct bios32_SDheader
37{
38 u_int8_t sig[4];
39 u_int32_t entry;
40 u_int8_t revision;
41 u_int8_t len;
42 u_int8_t cksum;
43 u_int8_t pad[5];
44};
45
46/*
47 * BIOS32 Service Directory entry. Caller supplies name, bios32_SDlookup
48 * fills in the rest of the details.
49 */
50struct bios32_SDentry
51{
52 union
53 {
54 u_int8_t name[4]; /* service identifier */
55 u_int32_t id; /* as a 32-bit value */
56 } ident;
57 u_int32_t base; /* base of service */
58 u_int32_t len; /* service length */
59 u_int32_t entry; /* entrypoint offset from base */
60 vm_offset_t ventry; /* entrypoint in kernel virtual segment */
61};
62
63extern int bios32_SDlookup(struct bios32_SDentry *ent);
64extern u_int32_t bios_sigsearch(u_int32_t start, u_char *sig, int siglen,
65 int paralen, int sigofs);
66
67#define BIOS_PADDRTOVADDR(x) ((x) + KERNBASE)
68#define BIOS_VADDRTOPADDR(x) ((x) - KERNBASE)
69
70
71/*
72 * PnP BIOS presence structure
73 */
74struct PnPBIOS_table
75{
76 u_int8_t sig[4]; /* "$PnP */
77 u_int8_t version; /* should be 0x10 */
78 u_int8_t len; /* total structure length */
79 u_int16_t control; /* BIOS feature flags */
80 u_int8_t cksum; /* checksum */
81 u_int32_t evflagaddr; /* address of event notificaton flag */
82 u_int16_t rmentryoffset; /* real-mode entry offset */
83 u_int16_t rmentryseg; /* segment */
84 u_int16_t pmentryoffset; /* protected-mode entry offset */
85 u_int32_t pmentrybase; /* segment base */
86 u_int32_t oemdevid; /* motherboard EISA ID */
87 u_int16_t rmbiosseg; /* real-mode BIOS segment */
88 u_int32_t pmdataseg; /* protected-mode data segment */
89} __packed;
90
91
92/*
93 * Exported lookup results
94 */
95extern struct bios32_SDentry PCIbios;
96
97struct segment_info {
98 u_int base;
99 u_int limit;
100};
101
102#define BIOSCODE_FLAG 0x01
103#define BIOSDATA_FLAG 0x02
104#define BIOSUTIL_FLAG 0x04
105#define BIOSARGS_FLAG 0x08
106
107struct bios_segments {
108 struct segment_info code32; /* 32-bit code (mandatory) */
109 struct segment_info code16; /* 16-bit code */
110 struct segment_info data; /* 16-bit data */
111 struct segment_info util; /* 16-bit utility */
112 struct segment_info args; /* 16-bit args */
113};
114
115struct bios_regs {
116 u_int eax;
117 u_int ebx;
118 u_int ecx;
119 u_int edx;
120 u_int esi;
121 u_int edi;
122};
123
124struct bios_args {
125 u_int entry; /* entry point of routine */
126 struct bios_regs r;
127 struct bios_segments seg;
128};
129
130/*
131 * PnP BIOS return codes
132 */
133#define PNP_SUCCESS 0x00
134#define PNP_NOT_SET_STATICALLY 0x7f
135#define PNP_UNKNOWN_FUNCTION 0x81
136#define PNP_FUNTION_NOT_SUPPORTED 0x82
137#define PNP_INVALID_HANDLE 0x83
138#define PNP_BAD_PARAMETER 0x84
139#define PNP_SET_FAILED 0x85
140#define PNP_EVENTS_NOT_PENDING 0x86
141#define PNP_SYSTEM_NOT_DOCKED 0x87
142#define PNP_NO_ISA_PNP_CARDS 0x88
143#define PNP_UNABLE_TO_DETERMINE_DOCK_CAPABILITIES 0x89
144#define PNP_CONFIG_CHANGE_FAILED_NO_BATTERY 0x8a
145#define PNP_CONFIG_CHANGE_FAILED_RESOURCE_CONFLICT 0x8b
146#define PNP_BUFFER_TOO_SMALL 0x8c
147#define PNP_USE_ESCD_SUPPORT 0x8d
148#define PNP_MESSAGE_NOT_SUPPORTED 0x8e
149#define PNP_HARDWARE_ERROR 0x8f
150
151/*
152 * DMI return codes
153 */
154#define DMI_SUCCESS 0x00
155#define DMI_UNKNOWN_FUNCTION 0x81
156#define DMI_FUNCTION_NOT_SUPPORTED 0x82
157#define DMI_INVALID_HANDLE 0x83
158#define DMI_BAD_PARAMETER 0x84
159#define DMI_INVALID_SUBFUNCTION 0x85
160#define DMI_NO_CHANGE 0x86
161#define DMI_ADD_STRUCTURE_FAILED 0x87
162#define DMI_READ_ONLY 0x8d
163#define DMI_LOCK_NOT_SUPPORTED 0x90
164#define DMI_CURRENTLY_LOCKED 0x91
165#define DMI_INVALID_LOCK 0x92
166
167/*
168 * format specifiers and defines for bios16()
169 * s = short (16 bits)
170 * i = int (32 bits)
171 * p = pointer (converted to seg:offset)
172 * C,D,U = selector (corresponding to code/data/utility segment)
173 */
174#define PNP_COUNT_DEVNODES "sppD", 0x00
175#define PNP_GET_DEVNODE "sppsD", 0x01
176#define PNP_SET_DEVNODE "sspsD", 0x02
177#define PNP_GET_EVENT "spD", 0x03
178#define PNP_SEND_MSG "ssD", 0x04
179#define PNP_GET_DOCK_INFO "spD", 0x05
180
181#define PNP_SEL_PRIBOOT "ssiiisspD", 0x07
182#define PNP_GET_PRIBOOT "sspppppD", 0x08
183#define PNP_SET_RESINFO "spD", 0x09
184#define PNP_GET_RESINFO "spD", 0x0A
185#define PNP_GET_APM_ID "sppD", 0x0B
186
187#define PNP_GET_ISA_INFO "spD", 0x40
188#define PNP_GET_ECSD_INFO "spppD", 0x41
189#define PNP_READ_ESCD "spUD", 0x42
190#define PNP_WRITE_ESCD "spUD", 0x43
191
192#define PNP_GET_DMI_INFO "spppppD", 0x50
193#define PNP_GET_DMI_STRUCTURE "sppUD", 0x51
194#define PNP_SET_DMI_STRUCTURE "sppsUD" 0x52
195#define PNP_GET_DMI_CHANGE "spUD" 0x53
196#define PNP_DMI_CONTROL "sspsUD" 0x54
197#define PNP_GET_GPNV_INFO "sppppD" 0x55
198#define PNP_READ_GPNV_DATA "ssppUD" 0x56
199#define PNP_WRITE_GPNV_DATA "sspsUD" 0x57
200
201#define PNP_BOOT_CHECK "sp", 0x60
202#define PNP_COUNT_IPL "sppp", 0x61
203#define PNP_GET_BOOTPRI "spp", 0x62
204#define PNP_SET_BOOTPRI "sp", 0x63
205#define PNP_GET_LASTBOOT "sp", 0x64
206#define PNP_GET_BOOTFIRST "sp", 0x65
207#define PNP_SET_BOOTFIRST "sp", 0x66
208
209/*
210 * PCI BIOS functions
211 */
212#define PCIBIOS_BIOS_PRESENT 0xb101
213#define PCIBIOS_READ_CONFIG_BYTE 0xb108
214#define PCIBIOS_READ_CONFIG_WORD 0xb109
215#define PCIBIOS_READ_CONFIG_DWORD 0xb10a
216#define PCIBIOS_WRITE_CONFIG_BYTE 0xb10b
217#define PCIBIOS_WRITE_CONFIG_WORD 0xb10c
218#define PCIBIOS_WRITE_CONFIG_DWORD 0xb10d
219#define PCIBIOS_GET_IRQ_ROUTING 0xb10e
220#define PCIBIOS_ROUTE_INTERRUPT 0xb10f
221
222extern int bios16(struct bios_args *, char *, ...);
223extern int bios16_call(struct bios_regs *, char *);
224extern int bios32(struct bios_regs *, u_int, u_short);
225extern void set_bios_selectors(struct bios_segments *, int);
226
227/*
228 * PCI interrupt routing table.
229 *
230 * $PIR in the BIOS segment contains a PIR_table
231 * int 1a:b106 returns PIR_table in buffer at es:(e)di
232 * int 1a:b18e returns PIR_table in buffer at es:(e)di
233 * int 1a:b406 returns es:di pointing to the BIOS PIR_table
234 */
235struct PIR_header
236{
237 int8_t ph_signature[4];
238 u_int16_t ph_version;
239 u_int16_t ph_length;
240 u_int8_t ph_router_bus;
241 u_int8_t ph_router_dev_fn;
242 u_int16_t ph_pci_irqs;
243 u_int16_t ph_router_vendor;
244 u_int16_t ph_router_device;
245 u_int32_t ph_miniport;
246 u_int8_t ph_res[11];
247 u_int8_t ph_checksum;
248} __packed;
249
250struct PIR_intpin
251{
252 u_int8_t link;
253 u_int16_t irqs;
254} __packed;
255
256struct PIR_entry
257{
258 u_int8_t pe_bus;
259 u_int8_t pe_res1:3;
260 u_int8_t pe_device:5;
261 struct PIR_intpin pe_intpin[4];
262 u_int8_t pe_slot;
263 u_int8_t pe_res3;
264} __packed;
265
266struct PIR_table
267{
268 struct PIR_header pt_header;
269 struct PIR_entry pt_entry[0];
270} __packed;
271
272/*
273 * Int 15:E820 'SMAP' structure
274 */
275
276#define SMAP_SIG 0x534D4150 /* 'SMAP' */
277
278#define SMAP_TYPE_MEMORY 1
279#define SMAP_TYPE_RESERVED 2
280#define SMAP_TYPE_ACPI_RECLAIM 3
281#define SMAP_TYPE_ACPI_NVS 4
282#define SMAP_TYPE_ACPI_ERROR 5
283
| 28 */
29
30#ifndef _MACHINE_PC_BIOS_H_
31#define _MACHINE_PC_BIOS_H_
32
33/*
34 * Signature structure for the BIOS32 Service Directory header
35 */
36struct bios32_SDheader
37{
38 u_int8_t sig[4];
39 u_int32_t entry;
40 u_int8_t revision;
41 u_int8_t len;
42 u_int8_t cksum;
43 u_int8_t pad[5];
44};
45
46/*
47 * BIOS32 Service Directory entry. Caller supplies name, bios32_SDlookup
48 * fills in the rest of the details.
49 */
50struct bios32_SDentry
51{
52 union
53 {
54 u_int8_t name[4]; /* service identifier */
55 u_int32_t id; /* as a 32-bit value */
56 } ident;
57 u_int32_t base; /* base of service */
58 u_int32_t len; /* service length */
59 u_int32_t entry; /* entrypoint offset from base */
60 vm_offset_t ventry; /* entrypoint in kernel virtual segment */
61};
62
63extern int bios32_SDlookup(struct bios32_SDentry *ent);
64extern u_int32_t bios_sigsearch(u_int32_t start, u_char *sig, int siglen,
65 int paralen, int sigofs);
66
67#define BIOS_PADDRTOVADDR(x) ((x) + KERNBASE)
68#define BIOS_VADDRTOPADDR(x) ((x) - KERNBASE)
69
70
71/*
72 * PnP BIOS presence structure
73 */
74struct PnPBIOS_table
75{
76 u_int8_t sig[4]; /* "$PnP */
77 u_int8_t version; /* should be 0x10 */
78 u_int8_t len; /* total structure length */
79 u_int16_t control; /* BIOS feature flags */
80 u_int8_t cksum; /* checksum */
81 u_int32_t evflagaddr; /* address of event notificaton flag */
82 u_int16_t rmentryoffset; /* real-mode entry offset */
83 u_int16_t rmentryseg; /* segment */
84 u_int16_t pmentryoffset; /* protected-mode entry offset */
85 u_int32_t pmentrybase; /* segment base */
86 u_int32_t oemdevid; /* motherboard EISA ID */
87 u_int16_t rmbiosseg; /* real-mode BIOS segment */
88 u_int32_t pmdataseg; /* protected-mode data segment */
89} __packed;
90
91
92/*
93 * Exported lookup results
94 */
95extern struct bios32_SDentry PCIbios;
96
97struct segment_info {
98 u_int base;
99 u_int limit;
100};
101
102#define BIOSCODE_FLAG 0x01
103#define BIOSDATA_FLAG 0x02
104#define BIOSUTIL_FLAG 0x04
105#define BIOSARGS_FLAG 0x08
106
107struct bios_segments {
108 struct segment_info code32; /* 32-bit code (mandatory) */
109 struct segment_info code16; /* 16-bit code */
110 struct segment_info data; /* 16-bit data */
111 struct segment_info util; /* 16-bit utility */
112 struct segment_info args; /* 16-bit args */
113};
114
115struct bios_regs {
116 u_int eax;
117 u_int ebx;
118 u_int ecx;
119 u_int edx;
120 u_int esi;
121 u_int edi;
122};
123
124struct bios_args {
125 u_int entry; /* entry point of routine */
126 struct bios_regs r;
127 struct bios_segments seg;
128};
129
130/*
131 * PnP BIOS return codes
132 */
133#define PNP_SUCCESS 0x00
134#define PNP_NOT_SET_STATICALLY 0x7f
135#define PNP_UNKNOWN_FUNCTION 0x81
136#define PNP_FUNTION_NOT_SUPPORTED 0x82
137#define PNP_INVALID_HANDLE 0x83
138#define PNP_BAD_PARAMETER 0x84
139#define PNP_SET_FAILED 0x85
140#define PNP_EVENTS_NOT_PENDING 0x86
141#define PNP_SYSTEM_NOT_DOCKED 0x87
142#define PNP_NO_ISA_PNP_CARDS 0x88
143#define PNP_UNABLE_TO_DETERMINE_DOCK_CAPABILITIES 0x89
144#define PNP_CONFIG_CHANGE_FAILED_NO_BATTERY 0x8a
145#define PNP_CONFIG_CHANGE_FAILED_RESOURCE_CONFLICT 0x8b
146#define PNP_BUFFER_TOO_SMALL 0x8c
147#define PNP_USE_ESCD_SUPPORT 0x8d
148#define PNP_MESSAGE_NOT_SUPPORTED 0x8e
149#define PNP_HARDWARE_ERROR 0x8f
150
151/*
152 * DMI return codes
153 */
154#define DMI_SUCCESS 0x00
155#define DMI_UNKNOWN_FUNCTION 0x81
156#define DMI_FUNCTION_NOT_SUPPORTED 0x82
157#define DMI_INVALID_HANDLE 0x83
158#define DMI_BAD_PARAMETER 0x84
159#define DMI_INVALID_SUBFUNCTION 0x85
160#define DMI_NO_CHANGE 0x86
161#define DMI_ADD_STRUCTURE_FAILED 0x87
162#define DMI_READ_ONLY 0x8d
163#define DMI_LOCK_NOT_SUPPORTED 0x90
164#define DMI_CURRENTLY_LOCKED 0x91
165#define DMI_INVALID_LOCK 0x92
166
167/*
168 * format specifiers and defines for bios16()
169 * s = short (16 bits)
170 * i = int (32 bits)
171 * p = pointer (converted to seg:offset)
172 * C,D,U = selector (corresponding to code/data/utility segment)
173 */
174#define PNP_COUNT_DEVNODES "sppD", 0x00
175#define PNP_GET_DEVNODE "sppsD", 0x01
176#define PNP_SET_DEVNODE "sspsD", 0x02
177#define PNP_GET_EVENT "spD", 0x03
178#define PNP_SEND_MSG "ssD", 0x04
179#define PNP_GET_DOCK_INFO "spD", 0x05
180
181#define PNP_SEL_PRIBOOT "ssiiisspD", 0x07
182#define PNP_GET_PRIBOOT "sspppppD", 0x08
183#define PNP_SET_RESINFO "spD", 0x09
184#define PNP_GET_RESINFO "spD", 0x0A
185#define PNP_GET_APM_ID "sppD", 0x0B
186
187#define PNP_GET_ISA_INFO "spD", 0x40
188#define PNP_GET_ECSD_INFO "spppD", 0x41
189#define PNP_READ_ESCD "spUD", 0x42
190#define PNP_WRITE_ESCD "spUD", 0x43
191
192#define PNP_GET_DMI_INFO "spppppD", 0x50
193#define PNP_GET_DMI_STRUCTURE "sppUD", 0x51
194#define PNP_SET_DMI_STRUCTURE "sppsUD" 0x52
195#define PNP_GET_DMI_CHANGE "spUD" 0x53
196#define PNP_DMI_CONTROL "sspsUD" 0x54
197#define PNP_GET_GPNV_INFO "sppppD" 0x55
198#define PNP_READ_GPNV_DATA "ssppUD" 0x56
199#define PNP_WRITE_GPNV_DATA "sspsUD" 0x57
200
201#define PNP_BOOT_CHECK "sp", 0x60
202#define PNP_COUNT_IPL "sppp", 0x61
203#define PNP_GET_BOOTPRI "spp", 0x62
204#define PNP_SET_BOOTPRI "sp", 0x63
205#define PNP_GET_LASTBOOT "sp", 0x64
206#define PNP_GET_BOOTFIRST "sp", 0x65
207#define PNP_SET_BOOTFIRST "sp", 0x66
208
209/*
210 * PCI BIOS functions
211 */
212#define PCIBIOS_BIOS_PRESENT 0xb101
213#define PCIBIOS_READ_CONFIG_BYTE 0xb108
214#define PCIBIOS_READ_CONFIG_WORD 0xb109
215#define PCIBIOS_READ_CONFIG_DWORD 0xb10a
216#define PCIBIOS_WRITE_CONFIG_BYTE 0xb10b
217#define PCIBIOS_WRITE_CONFIG_WORD 0xb10c
218#define PCIBIOS_WRITE_CONFIG_DWORD 0xb10d
219#define PCIBIOS_GET_IRQ_ROUTING 0xb10e
220#define PCIBIOS_ROUTE_INTERRUPT 0xb10f
221
222extern int bios16(struct bios_args *, char *, ...);
223extern int bios16_call(struct bios_regs *, char *);
224extern int bios32(struct bios_regs *, u_int, u_short);
225extern void set_bios_selectors(struct bios_segments *, int);
226
227/*
228 * PCI interrupt routing table.
229 *
230 * $PIR in the BIOS segment contains a PIR_table
231 * int 1a:b106 returns PIR_table in buffer at es:(e)di
232 * int 1a:b18e returns PIR_table in buffer at es:(e)di
233 * int 1a:b406 returns es:di pointing to the BIOS PIR_table
234 */
235struct PIR_header
236{
237 int8_t ph_signature[4];
238 u_int16_t ph_version;
239 u_int16_t ph_length;
240 u_int8_t ph_router_bus;
241 u_int8_t ph_router_dev_fn;
242 u_int16_t ph_pci_irqs;
243 u_int16_t ph_router_vendor;
244 u_int16_t ph_router_device;
245 u_int32_t ph_miniport;
246 u_int8_t ph_res[11];
247 u_int8_t ph_checksum;
248} __packed;
249
250struct PIR_intpin
251{
252 u_int8_t link;
253 u_int16_t irqs;
254} __packed;
255
256struct PIR_entry
257{
258 u_int8_t pe_bus;
259 u_int8_t pe_res1:3;
260 u_int8_t pe_device:5;
261 struct PIR_intpin pe_intpin[4];
262 u_int8_t pe_slot;
263 u_int8_t pe_res3;
264} __packed;
265
266struct PIR_table
267{
268 struct PIR_header pt_header;
269 struct PIR_entry pt_entry[0];
270} __packed;
271
272/*
273 * Int 15:E820 'SMAP' structure
274 */
275
276#define SMAP_SIG 0x534D4150 /* 'SMAP' */
277
278#define SMAP_TYPE_MEMORY 1
279#define SMAP_TYPE_RESERVED 2
280#define SMAP_TYPE_ACPI_RECLAIM 3
281#define SMAP_TYPE_ACPI_NVS 4
282#define SMAP_TYPE_ACPI_ERROR 5
283
|