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if_stereg.h (200884) if_stereg.h (200910)
1/*-
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
1/*-
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/dev/ste/if_stereg.h 200884 2009-12-22 23:57:10Z yongari $
32 * $FreeBSD: head/sys/dev/ste/if_stereg.h 200910 2009-12-23 19:18:07Z yongari $
33 */
34
35/*
36 * Sundance PCI device/vendor ID for the
37 * ST201 chip.
38 */
39#define ST_VENDORID 0x13F0
40#define ST_DEVICEID_ST201_1 0x0200

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87#define STE_MAX_FRAMELEN 0x5A
88#define STE_RX_MODE 0x5C
89#define STE_TX_RECLAIM_THRESH 0x5D
90#define STE_PHYCTL 0x5E
91#define STE_MAR0 0x60
92#define STE_MAR1 0x62
93#define STE_MAR2 0x64
94#define STE_MAR3 0x66
33 */
34
35/*
36 * Sundance PCI device/vendor ID for the
37 * ST201 chip.
38 */
39#define ST_VENDORID 0x13F0
40#define ST_DEVICEID_ST201_1 0x0200

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87#define STE_MAX_FRAMELEN 0x5A
88#define STE_RX_MODE 0x5C
89#define STE_TX_RECLAIM_THRESH 0x5D
90#define STE_PHYCTL 0x5E
91#define STE_MAR0 0x60
92#define STE_MAR1 0x62
93#define STE_MAR2 0x64
94#define STE_MAR3 0x66
95#define STE_STATS 0x68
96
95
97#define STE_LATE_COLLS 0x75
98#define STE_MULTI_COLLS 0x76
99#define STE_SINGLE_COLLS 0x77
96#define STE_STAT_RX_OCTETS_LO 0x68
97#define STE_STAT_RX_OCTETS_HI 0x6A
98#define STE_STAT_TX_OCTETS_LO 0x6C
99#define STE_STAT_TX_OCTETS_HI 0x6E
100#define STE_STAT_TX_FRAMES 0x70
101#define STE_STAT_RX_FRAMES 0x72
102#define STE_STAT_CARRIER_ERR 0x74
103#define STE_STAT_LATE_COLLS 0x75
104#define STE_STAT_MULTI_COLLS 0x76
105#define STE_STAT_SINGLE_COLLS 0x77
106#define STE_STAT_TX_DEFER 0x78
107#define STE_STAT_RX_LOST 0x79
108#define STE_STAT_TX_EXDEFER 0x7A
109#define STE_STAT_TX_ABORT 0x7B
110#define STE_STAT_TX_BCAST 0x7C
111#define STE_STAT_RX_BCAST 0x7D
112#define STE_STAT_TX_MCAST 0x7E
113#define STE_STAT_RX_MCAST 0x7F
100
101#define STE_DMACTL_RXDMA_STOPPED 0x00000001
102#define STE_DMACTL_TXDMA_CMPREQ 0x00000002
103#define STE_DMACTL_TXDMA_STOPPED 0x00000004
104#define STE_DMACTL_RXDMA_COMPLETE 0x00000008
105#define STE_DMACTL_TXDMA_COMPLETE 0x00000010
106#define STE_DMACTL_RXDMA_STALL 0x00000100
107#define STE_DMACTL_RXDMA_UNSTALL 0x00000200

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383#define STE_PSTATE_MASK 0x0003
384#define STE_PSTATE_D0 0x0000
385#define STE_PSTATE_D1 0x0002
386#define STE_PSTATE_D2 0x0002
387#define STE_PSTATE_D3 0x0003
388#define STE_PME_EN 0x0010
389#define STE_PME_STATUS 0x8000
390
114
115#define STE_DMACTL_RXDMA_STOPPED 0x00000001
116#define STE_DMACTL_TXDMA_CMPREQ 0x00000002
117#define STE_DMACTL_TXDMA_STOPPED 0x00000004
118#define STE_DMACTL_RXDMA_COMPLETE 0x00000008
119#define STE_DMACTL_TXDMA_COMPLETE 0x00000010
120#define STE_DMACTL_RXDMA_STALL 0x00000100
121#define STE_DMACTL_RXDMA_UNSTALL 0x00000200

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397#define STE_PSTATE_MASK 0x0003
398#define STE_PSTATE_D0 0x0000
399#define STE_PSTATE_D1 0x0002
400#define STE_PSTATE_D2 0x0002
401#define STE_PSTATE_D3 0x0003
402#define STE_PME_EN 0x0010
403#define STE_PME_STATUS 0x8000
404
391
392struct ste_stats {
393 uint32_t ste_rx_bytes;
394 uint32_t ste_tx_bytes;
395 uint16_t ste_tx_frames;
396 uint16_t ste_rx_frames;
397 uint8_t ste_carrsense_errs;
398 uint8_t ste_late_colls;
399 uint8_t ste_multi_colls;
400 uint8_t ste_single_colls;
401 uint8_t ste_tx_frames_defered;
402 uint8_t ste_rx_lost_frames;
403 uint8_t ste_tx_excess_defers;
404 uint8_t ste_tx_abort_excess_colls;
405 uint8_t ste_tx_bcast_frames;
406 uint8_t ste_rx_bcast_frames;
407 uint8_t ste_tx_mcast_frames;
408 uint8_t ste_rx_mcast_frames;
405struct ste_hw_stats {
406 uint64_t rx_bytes;
407 uint32_t rx_frames;
408 uint32_t rx_bcast_frames;
409 uint32_t rx_mcast_frames;
410 uint32_t rx_lost_frames;
411 uint64_t tx_bytes;
412 uint32_t tx_frames;
413 uint32_t tx_bcast_frames;
414 uint32_t tx_mcast_frames;
415 uint32_t tx_carrsense_errs;
416 uint32_t tx_single_colls;
417 uint32_t tx_multi_colls;
418 uint32_t tx_late_colls;
419 uint32_t tx_frames_defered;
420 uint32_t tx_excess_defers;
421 uint32_t tx_abort;
409};
410
411struct ste_frag {
412 uint32_t ste_addr;
413 uint32_t ste_len;
414};
415
416#define STE_FRAG_LAST 0x80000000

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561 int ste_flags;
562#define STE_FLAG_ONE_PHY 0x0001
563#define STE_FLAG_LINK 0x8000
564 int ste_if_flags;
565 int ste_timer;
566 struct ste_list_data ste_ldata;
567 struct ste_chain_data ste_cdata;
568 struct callout ste_callout;
422};
423
424struct ste_frag {
425 uint32_t ste_addr;
426 uint32_t ste_len;
427};
428
429#define STE_FRAG_LAST 0x80000000

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574 int ste_flags;
575#define STE_FLAG_ONE_PHY 0x0001
576#define STE_FLAG_LINK 0x8000
577 int ste_if_flags;
578 int ste_timer;
579 struct ste_list_data ste_ldata;
580 struct ste_chain_data ste_cdata;
581 struct callout ste_callout;
582 struct ste_hw_stats ste_stats;
569 struct mtx ste_mtx;
570};
571
572#define STE_LOCK(_sc) mtx_lock(&(_sc)->ste_mtx)
573#define STE_UNLOCK(_sc) mtx_unlock(&(_sc)->ste_mtx)
574#define STE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->ste_mtx, MA_OWNED)
575
576struct ste_mii_frame {

--- 15 unchanged lines hidden --- 		583 struct mtx ste_mtx;
584};
585
586#define STE_LOCK(_sc) mtx_lock(&(_sc)->ste_mtx)
587#define STE_UNLOCK(_sc) mtx_unlock(&(_sc)->ste_mtx)
588#define STE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->ste_mtx, MA_OWNED)
589
590struct ste_mii_frame {

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