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if_ste.c (200908) if_ste.c (200910)
1/*-
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: head/sys/dev/ste/if_ste.c 200908 2009-12-23 18:42:25Z yongari $");
34__FBSDID("$FreeBSD: head/sys/dev/ste/if_ste.c 200910 2009-12-23 19:18:07Z yongari $");
35
36#ifdef HAVE_KERNEL_OPTION_HEADERS
37#include "opt_device_polling.h"
38#endif
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/bus.h>

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120static int ste_newbuf(struct ste_softc *, struct ste_chain_onefrag *);
121static int ste_read_eeprom(struct ste_softc *, caddr_t, int, int, int);
122static void ste_reset(struct ste_softc *);
123static void ste_restart_tx(struct ste_softc *);
124static int ste_rxeof(struct ste_softc *, int);
125static void ste_rxfilter(struct ste_softc *);
126static void ste_start(struct ifnet *);
127static void ste_start_locked(struct ifnet *);
35
36#ifdef HAVE_KERNEL_OPTION_HEADERS
37#include "opt_device_polling.h"
38#endif
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/bus.h>

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120static int ste_newbuf(struct ste_softc *, struct ste_chain_onefrag *);
121static int ste_read_eeprom(struct ste_softc *, caddr_t, int, int, int);
122static void ste_reset(struct ste_softc *);
123static void ste_restart_tx(struct ste_softc *);
124static int ste_rxeof(struct ste_softc *, int);
125static void ste_rxfilter(struct ste_softc *);
126static void ste_start(struct ifnet *);
127static void ste_start_locked(struct ifnet *);
128static void ste_stats_clear(struct ste_softc *);
128static void ste_stats_update(struct ste_softc *);
129static void ste_stop(struct ste_softc *);
129static void ste_stats_update(struct ste_softc *);
130static void ste_stop(struct ste_softc *);
131static void ste_sysctl_node(struct ste_softc *);
130static void ste_tick(void *);
131static void ste_txeoc(struct ste_softc *);
132static void ste_txeof(struct ste_softc *);
133static void ste_wait(struct ste_softc *);
134static void ste_watchdog(struct ste_softc *);
135
136static device_method_t ste_methods[] = {
137 /* Device interface */

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918 }
919
920 sc->ste_cdata.ste_tx_cons = idx;
921 if (sc->ste_cdata.ste_tx_cnt == 0)
922 sc->ste_timer = 0;
923}
924
925static void
132static void ste_tick(void *);
133static void ste_txeoc(struct ste_softc *);
134static void ste_txeof(struct ste_softc *);
135static void ste_wait(struct ste_softc *);
136static void ste_watchdog(struct ste_softc *);
137
138static device_method_t ste_methods[] = {
139 /* Device interface */

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920 }
921
922 sc->ste_cdata.ste_tx_cons = idx;
923 if (sc->ste_cdata.ste_tx_cnt == 0)
924 sc->ste_timer = 0;
925}
926
927static void
928ste_stats_clear(struct ste_softc *sc)
929{
930
931 STE_LOCK_ASSERT(sc);
932
933 /* Rx stats. */
934 CSR_READ_2(sc, STE_STAT_RX_OCTETS_LO);
935 CSR_READ_2(sc, STE_STAT_RX_OCTETS_HI);
936 CSR_READ_2(sc, STE_STAT_RX_FRAMES);
937 CSR_READ_1(sc, STE_STAT_RX_BCAST);
938 CSR_READ_1(sc, STE_STAT_RX_MCAST);
939 CSR_READ_1(sc, STE_STAT_RX_LOST);
940 /* Tx stats. */
941 CSR_READ_2(sc, STE_STAT_TX_OCTETS_LO);
942 CSR_READ_2(sc, STE_STAT_TX_OCTETS_HI);
943 CSR_READ_2(sc, STE_STAT_TX_FRAMES);
944 CSR_READ_1(sc, STE_STAT_TX_BCAST);
945 CSR_READ_1(sc, STE_STAT_TX_MCAST);
946 CSR_READ_1(sc, STE_STAT_CARRIER_ERR);
947 CSR_READ_1(sc, STE_STAT_SINGLE_COLLS);
948 CSR_READ_1(sc, STE_STAT_MULTI_COLLS);
949 CSR_READ_1(sc, STE_STAT_LATE_COLLS);
950 CSR_READ_1(sc, STE_STAT_TX_DEFER);
951 CSR_READ_1(sc, STE_STAT_TX_EXDEFER);
952 CSR_READ_1(sc, STE_STAT_TX_ABORT);
953}
954
955static void
926ste_stats_update(struct ste_softc *sc)
927{
928 struct ifnet *ifp;
956ste_stats_update(struct ste_softc *sc)
957{
958 struct ifnet *ifp;
959 struct ste_hw_stats *stats;
960 uint32_t val;
929
930 STE_LOCK_ASSERT(sc);
931
932 ifp = sc->ste_ifp;
961
962 STE_LOCK_ASSERT(sc);
963
964 ifp = sc->ste_ifp;
933 ifp->if_collisions += CSR_READ_1(sc, STE_LATE_COLLS)
934 + CSR_READ_1(sc, STE_MULTI_COLLS)
935 + CSR_READ_1(sc, STE_SINGLE_COLLS);
965 stats = &sc->ste_stats;
966 /* Rx stats. */
967 val = (uint32_t)CSR_READ_2(sc, STE_STAT_RX_OCTETS_LO) |
968 ((uint32_t)CSR_READ_2(sc, STE_STAT_RX_OCTETS_HI)) << 16;
969 val &= 0x000FFFFF;
970 stats->rx_bytes += val;
971 stats->rx_frames += CSR_READ_2(sc, STE_STAT_RX_FRAMES);
972 stats->rx_bcast_frames += CSR_READ_1(sc, STE_STAT_RX_BCAST);
973 stats->rx_mcast_frames += CSR_READ_1(sc, STE_STAT_RX_MCAST);
974 stats->rx_lost_frames += CSR_READ_1(sc, STE_STAT_RX_LOST);
975 /* Tx stats. */
976 val = (uint32_t)CSR_READ_2(sc, STE_STAT_TX_OCTETS_LO) |
977 ((uint32_t)CSR_READ_2(sc, STE_STAT_TX_OCTETS_HI)) << 16;
978 val &= 0x000FFFFF;
979 stats->tx_bytes += val;
980 stats->tx_frames += CSR_READ_2(sc, STE_STAT_TX_FRAMES);
981 stats->tx_bcast_frames += CSR_READ_1(sc, STE_STAT_TX_BCAST);
982 stats->tx_mcast_frames += CSR_READ_1(sc, STE_STAT_TX_MCAST);
983 stats->tx_carrsense_errs += CSR_READ_1(sc, STE_STAT_CARRIER_ERR);
984 val = CSR_READ_1(sc, STE_STAT_SINGLE_COLLS);
985 stats->tx_single_colls += val;
986 ifp->if_collisions += val;
987 val = CSR_READ_1(sc, STE_STAT_MULTI_COLLS);
988 stats->tx_multi_colls += val;
989 ifp->if_collisions += val;
990 val += CSR_READ_1(sc, STE_STAT_LATE_COLLS);
991 stats->tx_late_colls += val;
992 ifp->if_collisions += val;
993 stats->tx_frames_defered += CSR_READ_1(sc, STE_STAT_TX_DEFER);
994 stats->tx_excess_defers += CSR_READ_1(sc, STE_STAT_TX_EXDEFER);
995 stats->tx_abort += CSR_READ_1(sc, STE_STAT_TX_ABORT);
936}
937
938/*
939 * Probe for a Sundance ST201 chip. Check the PCI vendor and device
940 * IDs against our list and return a device name if we find a match.
941 */
942static int
943ste_probe(device_t dev)

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1027 * Get station address from the EEPROM.
1028 */
1029 if (ste_read_eeprom(sc, eaddr,
1030 STE_EEADDR_NODE0, 3, 0)) {
1031 device_printf(dev, "failed to read station address\n");
1032 error = ENXIO;;
1033 goto fail;
1034 }
996}
997
998/*
999 * Probe for a Sundance ST201 chip. Check the PCI vendor and device
1000 * IDs against our list and return a device name if we find a match.
1001 */
1002static int
1003ste_probe(device_t dev)

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1087 * Get station address from the EEPROM.
1088 */
1089 if (ste_read_eeprom(sc, eaddr,
1090 STE_EEADDR_NODE0, 3, 0)) {
1091 device_printf(dev, "failed to read station address\n");
1092 error = ENXIO;;
1093 goto fail;
1094 }
1095 ste_sysctl_node(sc);
1035
1036 if ((error = ste_dma_alloc(sc)) != 0)
1037 goto fail;
1038
1039 ifp = sc->ste_ifp = if_alloc(IFT_ETHER);
1040 if (ifp == NULL) {
1041 device_printf(dev, "can not if_alloc()\n");
1042 error = ENOSPC;

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1620 /* Enable receiver and transmitter */
1621 CSR_WRITE_2(sc, STE_MACCTL0, 0);
1622 CSR_WRITE_2(sc, STE_MACCTL1, 0);
1623 STE_SETBIT2(sc, STE_MACCTL1, STE_MACCTL1_TX_ENABLE);
1624 STE_SETBIT2(sc, STE_MACCTL1, STE_MACCTL1_RX_ENABLE);
1625
1626 /* Enable stats counters. */
1627 STE_SETBIT2(sc, STE_MACCTL1, STE_MACCTL1_STATS_ENABLE);
1096
1097 if ((error = ste_dma_alloc(sc)) != 0)
1098 goto fail;
1099
1100 ifp = sc->ste_ifp = if_alloc(IFT_ETHER);
1101 if (ifp == NULL) {
1102 device_printf(dev, "can not if_alloc()\n");
1103 error = ENOSPC;

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1681 /* Enable receiver and transmitter */
1682 CSR_WRITE_2(sc, STE_MACCTL0, 0);
1683 CSR_WRITE_2(sc, STE_MACCTL1, 0);
1684 STE_SETBIT2(sc, STE_MACCTL1, STE_MACCTL1_TX_ENABLE);
1685 STE_SETBIT2(sc, STE_MACCTL1, STE_MACCTL1_RX_ENABLE);
1686
1687 /* Enable stats counters. */
1688 STE_SETBIT2(sc, STE_MACCTL1, STE_MACCTL1_STATS_ENABLE);
1689 /* Clear stats counters. */
1690 ste_stats_clear(sc);
1628
1629 CSR_WRITE_2(sc, STE_ISR, 0xFFFF);
1630#ifdef DEVICE_POLLING
1631 /* Disable interrupts if we are polling. */
1632 if (ifp->if_capenable & IFCAP_POLLING)
1633 CSR_WRITE_2(sc, STE_IMR, 0);
1634 else
1635#endif

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2008 sc = device_get_softc(dev);
2009
2010 STE_LOCK(sc);
2011 ste_stop(sc);
2012 STE_UNLOCK(sc);
2013
2014 return (0);
2015}
1691
1692 CSR_WRITE_2(sc, STE_ISR, 0xFFFF);
1693#ifdef DEVICE_POLLING
1694 /* Disable interrupts if we are polling. */
1695 if (ifp->if_capenable & IFCAP_POLLING)
1696 CSR_WRITE_2(sc, STE_IMR, 0);
1697 else
1698#endif

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2071 sc = device_get_softc(dev);
2072
2073 STE_LOCK(sc);
2074 ste_stop(sc);
2075 STE_UNLOCK(sc);
2076
2077 return (0);
2078}
2079
2080#define STE_SYSCTL_STAT_ADD32(c, h, n, p, d) \
2081 SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d)
2082#define STE_SYSCTL_STAT_ADD64(c, h, n, p, d) \
2083 SYSCTL_ADD_QUAD(c, h, OID_AUTO, n, CTLFLAG_RD, p, d)
2084
2085static void
2086ste_sysctl_node(struct ste_softc *sc)
2087{
2088 struct sysctl_ctx_list *ctx;
2089 struct sysctl_oid_list *child, *parent;
2090 struct sysctl_oid *tree;
2091 struct ste_hw_stats *stats;
2092
2093 stats = &sc->ste_stats;
2094 ctx = device_get_sysctl_ctx(sc->ste_dev);
2095 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->ste_dev));
2096
2097 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD,
2098 NULL, "STE statistics");
2099 parent = SYSCTL_CHILDREN(tree);
2100
2101 /* Rx statistics. */
2102 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "rx", CTLFLAG_RD,
2103 NULL, "Rx MAC statistics");
2104 child = SYSCTL_CHILDREN(tree);
2105 STE_SYSCTL_STAT_ADD64(ctx, child, "good_octets",
2106 &stats->rx_bytes, "Good octets");
2107 STE_SYSCTL_STAT_ADD32(ctx, child, "good_frames",
2108 &stats->rx_frames, "Good frames");
2109 STE_SYSCTL_STAT_ADD32(ctx, child, "good_bcast_frames",
2110 &stats->rx_bcast_frames, "Good broadcast frames");
2111 STE_SYSCTL_STAT_ADD32(ctx, child, "good_mcast_frames",
2112 &stats->rx_mcast_frames, "Good multicast frames");
2113 STE_SYSCTL_STAT_ADD32(ctx, child, "lost_frames",
2114 &stats->rx_lost_frames, "Lost frames");
2115
2116 /* Tx statistics. */
2117 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx", CTLFLAG_RD,
2118 NULL, "Tx MAC statistics");
2119 child = SYSCTL_CHILDREN(tree);
2120 STE_SYSCTL_STAT_ADD64(ctx, child, "good_octets",
2121 &stats->tx_bytes, "Good octets");
2122 STE_SYSCTL_STAT_ADD32(ctx, child, "good_frames",
2123 &stats->tx_frames, "Good frames");
2124 STE_SYSCTL_STAT_ADD32(ctx, child, "good_bcast_frames",
2125 &stats->tx_bcast_frames, "Good broadcast frames");
2126 STE_SYSCTL_STAT_ADD32(ctx, child, "good_mcast_frames",
2127 &stats->tx_mcast_frames, "Good multicast frames");
2128 STE_SYSCTL_STAT_ADD32(ctx, child, "carrier_errs",
2129 &stats->tx_carrsense_errs, "Carrier sense errors");
2130 STE_SYSCTL_STAT_ADD32(ctx, child, "single_colls",
2131 &stats->tx_single_colls, "Single collisions");
2132 STE_SYSCTL_STAT_ADD32(ctx, child, "multi_colls",
2133 &stats->tx_multi_colls, "Multiple collisions");
2134 STE_SYSCTL_STAT_ADD32(ctx, child, "late_colls",
2135 &stats->tx_late_colls, "Late collisions");
2136 STE_SYSCTL_STAT_ADD32(ctx, child, "defers",
2137 &stats->tx_frames_defered, "Frames with deferrals");
2138 STE_SYSCTL_STAT_ADD32(ctx, child, "excess_defers",
2139 &stats->tx_excess_defers, "Frames with excessive derferrals");
2140 STE_SYSCTL_STAT_ADD32(ctx, child, "abort",
2141 &stats->tx_abort, "Aborted frames due to Excessive collisions");
2142}
2143
2144#undef STE_SYSCTL_STAT_ADD32
2145#undef STE_SYSCTL_STAT_ADD64