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mss.c (53512) mss.c (53553)
1/*
2 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
3 * Copyright Luigi Rizzo, 1997,1998
4 * Copyright by Hannu Savolainen 1994, 1995
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 11 unchanged lines hidden (view full) ---

20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
1/*
2 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
3 * Copyright Luigi Rizzo, 1997,1998
4 * Copyright by Hannu Savolainen 1994, 1995
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 11 unchanged lines hidden (view full) ---

20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/sound/isa/mss.c 53512 1999-11-21 17:15:12Z cg $
28 * $FreeBSD: head/sys/dev/sound/isa/mss.c 53553 1999-11-22 06:07:49Z tanimura $
29 */
30
31#include <dev/sound/pcm/sound.h>
32
33#if NPCM > 0
34
35/* board-specific include files */
36#include <dev/sound/isa/mss.h>
29 */
30
31#include <dev/sound/pcm/sound.h>
32
33#if NPCM > 0
34
35/* board-specific include files */
36#include <dev/sound/isa/mss.h>
37#include <dev/sound/chip.h>
37
38
39#include "gusc.h"
40#if notyet
41#include "midi.h"
42#endif /* notyet */
43
38#define abs(x) (((x) < 0) ? -(x) : (x))
39
40struct mss_info;
41
42struct mss_chinfo {
43 struct mss_info *parent;
44 pcm_channel *channel;
45 snd_dbuf *buffer;

--- 121 unchanged lines hidden (view full) ---

167#define MD_CS4231A 0xA3
168#define MD_CS4232 0xA4
169#define MD_CS4232A 0xA5
170#define MD_CS4236 0xA6
171#define MD_CS4237 0xA7
172#define MD_OPTI931 0xB1
173#define MD_OPTI925 0xB2
174#define MD_GUSPNP 0xB8
44#define abs(x) (((x) < 0) ? -(x) : (x))
45
46struct mss_info;
47
48struct mss_chinfo {
49 struct mss_info *parent;
50 pcm_channel *channel;
51 snd_dbuf *buffer;

--- 121 unchanged lines hidden (view full) ---

173#define MD_CS4231A 0xA3
174#define MD_CS4232 0xA4
175#define MD_CS4232A 0xA5
176#define MD_CS4236 0xA6
177#define MD_CS4237 0xA7
178#define MD_OPTI931 0xB1
179#define MD_OPTI925 0xB2
180#define MD_GUSPNP 0xB8
181#define MD_GUSMAX 0xB9
175#define MD_YM0020 0xC1
176#define MD_VIVO 0xD1
177
178#define DV_F_TRUE_MSS 0x00010000 /* mss _with_ base regs */
179
180#define FULL_DUPLEX(x) ((x)->bd_flags & BD_F_DUPLEX)
181
182static int

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236
237static u_char
238opti_rd(struct mss_info *mss, u_char reg)
239{
240 port_wr(mss->conf_base, mss->opti_offset + 0, reg);
241 return port_rd(mss->conf_base, mss->opti_offset + 1);
242}
243
182#define MD_YM0020 0xC1
183#define MD_VIVO 0xD1
184
185#define DV_F_TRUE_MSS 0x00010000 /* mss _with_ base regs */
186
187#define FULL_DUPLEX(x) ((x)->bd_flags & BD_F_DUPLEX)
188
189static int

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243
244static u_char
245opti_rd(struct mss_info *mss, u_char reg)
246{
247 port_wr(mss->conf_base, mss->opti_offset + 0, reg);
248 return port_rd(mss->conf_base, mss->opti_offset + 1);
249}
250
244#if NPNP > 0
251#if NPNP > 0 || NGUSC > 0
245static void
246gus_wr(struct mss_info *mss, u_char reg, u_char value)
247{
248 port_wr(mss->conf_base, 3, reg);
249 port_wr(mss->conf_base, 5, value);
250}
251
252static u_char
253gus_rd(struct mss_info *mss, u_char reg)
254{
255 port_wr(mss->conf_base, 3, reg);
256 return port_rd(mss->conf_base, 5);
257}
252static void
253gus_wr(struct mss_info *mss, u_char reg, u_char value)
254{
255 port_wr(mss->conf_base, 3, reg);
256 port_wr(mss->conf_base, 5, value);
257}
258
259static u_char
260gus_rd(struct mss_info *mss, u_char reg)
261{
262 port_wr(mss->conf_base, 3, reg);
263 return port_rd(mss->conf_base, 5);
264}
258#endif
265#endif /* NPNP > 0 || NGUSC > 0 */
259
260static void
261mss_release_resources(struct mss_info *mss, device_t dev)
262{
263 if (mss->irq) {
264 bus_release_resource(dev, SYS_RES_IRQ, mss->irq_rid,
265 mss->irq);
266 mss->irq = 0;

--- 57 unchanged lines hidden (view full) ---

324 isa_dma_acquire(mss->rdma);
325 isa_dmainit(mss->rdma, DSP_BUFFSIZE);
326 mss->bd_flags |= BD_F_DUPLEX;
327 } else mss->rdma = mss->pdma;
328 }
329 return ok;
330}
331
266
267static void
268mss_release_resources(struct mss_info *mss, device_t dev)
269{
270 if (mss->irq) {
271 bus_release_resource(dev, SYS_RES_IRQ, mss->irq_rid,
272 mss->irq);
273 mss->irq = 0;

--- 57 unchanged lines hidden (view full) ---

331 isa_dma_acquire(mss->rdma);
332 isa_dmainit(mss->rdma, DSP_BUFFSIZE);
333 mss->bd_flags |= BD_F_DUPLEX;
334 } else mss->rdma = mss->pdma;
335 }
336 return ok;
337}
338
339#if NGUSC > 0
340/*
341 * XXX This might be better off in the gusc driver.
342 */
343static void
344gusmax_setup(struct mss_info *mss, device_t dev, struct resource *alt)
345{
346 static const unsigned char irq_bits[16] = {
347 0, 0, 0, 3, 0, 2, 0, 4, 0, 1, 0, 5, 6, 0, 0, 7
348 };
349 static const unsigned char dma_bits[8] = {
350 0, 1, 0, 2, 0, 3, 4, 5
351 };
352 device_t parent = device_get_parent(dev);
353 unsigned char irqctl, dmactl;
354 int s;
355
356 s = splhigh();
357
358 port_wr(alt, 0x0f, 0x05);
359 port_wr(alt, 0x00, 0x0c);
360 port_wr(alt, 0x0b, 0x00);
361
362 port_wr(alt, 0x0f, 0x00);
363
364 irqctl = irq_bits[isa_get_irq(parent)];
365#if notyet
366#if NMIDI > 0
367 /* Share the IRQ with the MIDI driver. */
368 irqctl |= 0x40;
369#endif /* NMIDI > 0 */
370#endif /* notyet */
371 dmactl = dma_bits[isa_get_drq(parent)];
372 if (device_get_flags(parent) & DV_F_DUAL_DMA)
373 dmactl |= dma_bits[device_get_flags(parent) & DV_F_DRQ_MASK]
374 << 3;
375
376 /*
377 * Set the DMA and IRQ control latches.
378 */
379 port_wr(alt, 0x00, 0x0c);
380 port_wr(alt, 0x0b, dmactl | 0x80);
381 port_wr(alt, 0x00, 0x4c);
382 port_wr(alt, 0x0b, irqctl);
383
384 port_wr(alt, 0x00, 0x0c);
385 port_wr(alt, 0x0b, dmactl);
386 port_wr(alt, 0x00, 0x4c);
387 port_wr(alt, 0x0b, irqctl);
388
389 port_wr(mss->conf_base, 2, 0);
390 port_wr(alt, 0x00, 0x0c);
391 port_wr(mss->conf_base, 2, 0);
392
393 splx(s);
394}
395#endif /* NGUSC > 0 */
396
332static int
333mss_init(struct mss_info *mss, device_t dev)
334{
335 u_char r6, r9;
336 struct resource *alt;
337 int rid, tmp;
338
339 mss->bd_flags |= BD_F_MCE_BIT;

--- 11 unchanged lines hidden (view full) ---

351 (rman_get_start(mss->conf_base) & ~3) + 2
352 - rman_get_start(mss->conf_base);
353 printf("mss_init: opti_offset=%d\n", mss->opti_offset);
354 opti_wr(mss, 4, 0xd6); /* fifo empty, OPL3, audio enable, SB3.2 */
355 ad_write(mss, 10, 2); /* enable interrupts */
356 opti_wr(mss, 6, 2); /* MCIR6: mss enable, sb disable */
357 opti_wr(mss, 5, 0x28); /* MCIR5: codec in exp. mode,fifo */
358 break;
397static int
398mss_init(struct mss_info *mss, device_t dev)
399{
400 u_char r6, r9;
401 struct resource *alt;
402 int rid, tmp;
403
404 mss->bd_flags |= BD_F_MCE_BIT;

--- 11 unchanged lines hidden (view full) ---

416 (rman_get_start(mss->conf_base) & ~3) + 2
417 - rman_get_start(mss->conf_base);
418 printf("mss_init: opti_offset=%d\n", mss->opti_offset);
419 opti_wr(mss, 4, 0xd6); /* fifo empty, OPL3, audio enable, SB3.2 */
420 ad_write(mss, 10, 2); /* enable interrupts */
421 opti_wr(mss, 6, 2); /* MCIR6: mss enable, sb disable */
422 opti_wr(mss, 5, 0x28); /* MCIR5: codec in exp. mode,fifo */
423 break;
424#endif /* NPNP > 0 */
359
425
426#if NPNP > 0 || NGUSC > 0
360 case MD_GUSPNP:
427 case MD_GUSPNP:
428 case MD_GUSMAX:
361 gus_wr(mss, 0x4c /* _URSTI */, 0);/* Pull reset */
362 DELAY(1000 * 30);
363 /* release reset and enable DAC */
364 gus_wr(mss, 0x4c /* _URSTI */, 3);
365 DELAY(1000 * 30);
366 /* end of reset */
367
368 rid = 0;
369 alt = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
370 0, ~0, 1, RF_ACTIVE);
429 gus_wr(mss, 0x4c /* _URSTI */, 0);/* Pull reset */
430 DELAY(1000 * 30);
431 /* release reset and enable DAC */
432 gus_wr(mss, 0x4c /* _URSTI */, 3);
433 DELAY(1000 * 30);
434 /* end of reset */
435
436 rid = 0;
437 alt = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
438 0, ~0, 1, RF_ACTIVE);
439 if (alt == NULL) {
440 printf("XXX couldn't init GUS PnP/MAX\n");
441 break;
442 }
371 port_wr(alt, 0, 0xC); /* enable int and dma */
443 port_wr(alt, 0, 0xC); /* enable int and dma */
444#if NGUSC > 0
445 if (mss->bd_id == MD_GUSMAX)
446 gusmax_setup(mss, dev, alt);
447#endif
372 bus_release_resource(dev, SYS_RES_IOPORT, rid, alt);
373
374 /*
375 * unmute left & right line. Need to go in mode3, unmute,
376 * and back to mode 2
377 */
378 tmp = ad_read(mss, 0x0c);
379 ad_write(mss, 0x0c, 0x6c); /* special value to enter mode 3 */

--- 4 unchanged lines hidden (view full) ---

384 /* send codec interrupts on irq1 and only use that one */
385 gus_wr(mss, 0x5a, 0x4f);
386
387 /* enable access to hidden regs */
388 tmp = gus_rd(mss, 0x5b /* IVERI */);
389 gus_wr(mss, 0x5b, tmp | 1);
390 BVDDB(printf("GUS: silicon rev %c\n", 'A' + ((tmp & 0xf) >> 4)));
391 break;
448 bus_release_resource(dev, SYS_RES_IOPORT, rid, alt);
449
450 /*
451 * unmute left & right line. Need to go in mode3, unmute,
452 * and back to mode 2
453 */
454 tmp = ad_read(mss, 0x0c);
455 ad_write(mss, 0x0c, 0x6c); /* special value to enter mode 3 */

--- 4 unchanged lines hidden (view full) ---

460 /* send codec interrupts on irq1 and only use that one */
461 gus_wr(mss, 0x5a, 0x4f);
462
463 /* enable access to hidden regs */
464 tmp = gus_rd(mss, 0x5b /* IVERI */);
465 gus_wr(mss, 0x5b, tmp | 1);
466 BVDDB(printf("GUS: silicon rev %c\n", 'A' + ((tmp & 0xf) >> 4)));
467 break;
392#endif
468#endif /* NPNP > 0 || NGUSC > 0 */
469
393 case MD_YM0020:
394 conf_wr(mss, OPL3SAx_DMACONF, 0xa9); /* dma-b rec, dma-a play */
395 r6 = conf_rd(mss, OPL3SAx_DMACONF);
396 r9 = conf_rd(mss, OPL3SAx_MISC); /* version */
397 BVDDB(printf("Yamaha: ver 0x%x DMA config 0x%x\n", r6, r9);)
398 /* yamaha - set volume to max */
399 conf_wr(mss, OPL3SAx_VOLUMEL, 0);
400 conf_wr(mss, OPL3SAx_VOLUMER, 0);

--- 609 unchanged lines hidden (view full) ---

1010 * 1) Wait until the chip becomes ready (reads don't return 0x80).
1011 * 2) Wait until the ACI bit of I11 gets on
1012 * 3) Wait until the ACI bit of I11 gets off
1013 */
1014
1015 n = ad_wait_init(mss, 1000);
1016 if (n & MSS_IDXBUSY) printf("mss: Auto calibration timed out(1).\n");
1017
470 case MD_YM0020:
471 conf_wr(mss, OPL3SAx_DMACONF, 0xa9); /* dma-b rec, dma-a play */
472 r6 = conf_rd(mss, OPL3SAx_DMACONF);
473 r9 = conf_rd(mss, OPL3SAx_MISC); /* version */
474 BVDDB(printf("Yamaha: ver 0x%x DMA config 0x%x\n", r6, r9);)
475 /* yamaha - set volume to max */
476 conf_wr(mss, OPL3SAx_VOLUMEL, 0);
477 conf_wr(mss, OPL3SAx_VOLUMER, 0);

--- 609 unchanged lines hidden (view full) ---

1087 * 1) Wait until the chip becomes ready (reads don't return 0x80).
1088 * 2) Wait until the ACI bit of I11 gets on
1089 * 3) Wait until the ACI bit of I11 gets off
1090 */
1091
1092 n = ad_wait_init(mss, 1000);
1093 if (n & MSS_IDXBUSY) printf("mss: Auto calibration timed out(1).\n");
1094
1018 for (t = 100; t > 0 && (ad_read(mss, 11) & 0x20) == 0; t--) DELAY(100);
1095 /*
1096 * There is no guarantee that we'll ever see ACI go on,
1097 * calibration may finish before we get here.
1098 *
1099 * XXX Are there docs that even state that it might ever be
1100 * visible off before calibration starts using any chip?
1101 */
1102 if (mss->bd_id == MD_GUSMAX) {
1103 /* 10 ms of busy-waiting is not reasonable normal behavior */
1104 for (t = 100; t > 0 && (ad_read(mss, 11) & 0x20) == 0; t--)
1105 ;
1106 if (t > 0 && t != 100)
1107 printf("debug: ACI turned on: t = %d\n", t);
1108 } else {
1109 for (t = 100; t > 0 && (ad_read(mss, 11) & 0x20) == 0; t--) DELAY(100);
1110 }
1019 for (t = 100; t > 0 && ad_read(mss, 11) & 0x20; t--) DELAY(100);
1020}
1021
1022static void
1023ad_unmute(struct mss_info *mss)
1024{
1025 ad_write(mss, 6, ad_read(mss, 6) & ~I6_MUTE);
1026 ad_write(mss, 7, ad_read(mss, 7) & ~I6_MUTE);

--- 258 unchanged lines hidden (view full) ---

1285 case 0x1093143e: /* OPT9310 */
1286 s = "OPTi931";
1287 break;
1288
1289 case 0x5092143e: /* OPT9250 XXX guessing */
1290 s = "OPTi925";
1291 break;
1292
1111 for (t = 100; t > 0 && ad_read(mss, 11) & 0x20; t--) DELAY(100);
1112}
1113
1114static void
1115ad_unmute(struct mss_info *mss)
1116{
1117 ad_write(mss, 6, ad_read(mss, 6) & ~I6_MUTE);
1118 ad_write(mss, 7, ad_read(mss, 7) & ~I6_MUTE);

--- 258 unchanged lines hidden (view full) ---

1377 case 0x1093143e: /* OPT9310 */
1378 s = "OPTi931";
1379 break;
1380
1381 case 0x5092143e: /* OPT9250 XXX guessing */
1382 s = "OPTi925";
1383 break;
1384
1385#if 0
1293 case 0x0000561e:
1294 s = "GusPnP";
1295 break;
1386 case 0x0000561e:
1387 s = "GusPnP";
1388 break;
1389#endif
1296
1297 case 0x01000000:
1298 if (vend_id == 0x0100a90d) s = "CMI8330";
1299 break;
1300 }
1301
1302 if (s) {
1303 device_set_desc(dev, s);

--- 52 unchanged lines hidden (view full) ---

1356 break;
1357
1358 case 0x2500143e: /* opti925 */
1359 mss->io_rid = 1;
1360 mss->conf_rid = 3;
1361 mss->bd_id = MD_OPTI925;
1362 break;
1363
1390
1391 case 0x01000000:
1392 if (vend_id == 0x0100a90d) s = "CMI8330";
1393 break;
1394 }
1395
1396 if (s) {
1397 device_set_desc(dev, s);

--- 52 unchanged lines hidden (view full) ---

1450 break;
1451
1452 case 0x2500143e: /* opti925 */
1453 mss->io_rid = 1;
1454 mss->conf_rid = 3;
1455 mss->bd_id = MD_OPTI925;
1456 break;
1457
1458#if 0
1364 case 0x0100561e: /* guspnp */
1365 mss->bd_flags |= BD_F_MSS_OFFSET;
1366 mss->io_rid = 2;
1367 mss->conf_rid = 1;
1368 mss->drq1_rid = 1;
1369 mss->drq2_rid = 0;
1370 mss->bd_id = MD_GUSPNP;
1371 break;
1459 case 0x0100561e: /* guspnp */
1460 mss->bd_flags |= BD_F_MSS_OFFSET;
1461 mss->io_rid = 2;
1462 mss->conf_rid = 1;
1463 mss->drq1_rid = 1;
1464 mss->drq2_rid = 0;
1465 mss->bd_id = MD_GUSPNP;
1466 break;
1467#endif
1372
1373 default:
1374 mss->bd_flags |= BD_F_MSS_OFFSET;
1375 mss->bd_id = MD_CS4232;
1376 break;
1377 }
1378 return mss_doattach(dev, mss);
1379}

--- 68 unchanged lines hidden (view full) ---

1448 if (mss->pch.buffer->dl && (mc11 & 4)) chn_intr(mss->pch.channel);
1449 opti_wr(mss, 11, ~mc11); /* ack */
1450 if (--loops) goto again;
1451 DEB(printf("xxx too many loops\n");)
1452}
1453
1454#endif /* NPNP > 0 */
1455
1468
1469 default:
1470 mss->bd_flags |= BD_F_MSS_OFFSET;
1471 mss->bd_id = MD_CS4232;
1472 break;
1473 }
1474 return mss_doattach(dev, mss);
1475}

--- 68 unchanged lines hidden (view full) ---

1544 if (mss->pch.buffer->dl && (mc11 & 4)) chn_intr(mss->pch.channel);
1545 opti_wr(mss, 11, ~mc11); /* ack */
1546 if (--loops) goto again;
1547 DEB(printf("xxx too many loops\n");)
1548}
1549
1550#endif /* NPNP > 0 */
1551
1552#if NGUSC > 0
1553
1456static int
1554static int
1555guspcm_probe(device_t dev)
1556{
1557 struct sndcard_func *func;
1558
1559 func = device_get_ivars(dev);
1560 if (func == NULL || func->func != SCF_PCM)
1561 return ENXIO;
1562
1563 device_set_desc(dev, "GUS CS4231");
1564 return 0;
1565}
1566
1567static int
1568guspcm_attach(device_t dev)
1569{
1570 device_t parent = device_get_parent(dev);
1571 struct mss_info *mss;
1572 int base, flags;
1573 unsigned char ctl;
1574
1575 mss = (struct mss_info *)malloc(sizeof *mss, M_DEVBUF, M_NOWAIT);
1576 if (mss == NULL)
1577 return ENOMEM;
1578 bzero(mss, sizeof *mss);
1579
1580 mss->bd_flags = BD_F_MSS_OFFSET;
1581 mss->io_rid = 2;
1582 mss->conf_rid = 1;
1583 mss->irq_rid = 0;
1584 mss->drq1_rid = 1;
1585 mss->drq2_rid = -1;
1586
1587 if (isa_get_vendorid(parent) == 0)
1588 mss->bd_id = MD_GUSMAX;
1589 else {
1590 mss->bd_id = MD_GUSPNP;
1591 mss->drq2_rid = 0;
1592 goto skip_setup;
1593 }
1594
1595 flags = device_get_flags(parent);
1596 if (flags & DV_F_DUAL_DMA)
1597 mss->drq2_rid = 0;
1598
1599 mss->conf_base = bus_alloc_resource(dev, SYS_RES_IOPORT, &mss->conf_rid,
1600 0, ~0, 8, RF_ACTIVE);
1601
1602 if (mss->conf_base == NULL) {
1603 mss_release_resources(mss, dev);
1604 return ENXIO;
1605 }
1606
1607 base = isa_get_port(parent);
1608
1609 ctl = 0x40; /* CS4231 enable */
1610 if (isa_get_drq(dev) > 3)
1611 ctl |= 0x10; /* 16-bit dma channel 1 */
1612 if ((flags & DV_F_DUAL_DMA) != 0 && (flags & DV_F_DRQ_MASK) > 3)
1613 ctl |= 0x20; /* 16-bit dma channel 2 */
1614 ctl |= (base >> 4) & 0x0f; /* 2X0 -> 3XC */
1615 port_wr(mss->conf_base, 6, ctl);
1616
1617skip_setup:
1618 return mss_doattach(dev, mss);
1619}
1620
1621static device_method_t guspcm_methods[] = {
1622 DEVMETHOD(device_probe, guspcm_probe),
1623 DEVMETHOD(device_attach, guspcm_attach),
1624
1625 { 0, 0 }
1626};
1627
1628static driver_t guspcm_driver = {
1629 "pcm",
1630 guspcm_methods,
1631 sizeof(snddev_info),
1632};
1633
1634DRIVER_MODULE(guspcm, gusc, guspcm_driver, pcm_devclass, 0, 0);
1635#endif /* NGUSC > 0 */
1636
1637static int
1457mssmix_init(snd_mixer *m)
1458{
1459 struct mss_info *mss = mix_getdevinfo(m);
1460
1461 mix_setdevs(m, MODE2_MIXER_DEVICES);
1462 mix_setrecdevs(m, MSS_REC_DEVICES);
1463 switch(mss->bd_id) {
1464 case MD_OPTI931:
1465 mix_setdevs(m, OPTI931_MIXER_DEVICES);
1466 ad_write(mss, 20, 0x88);
1467 ad_write(mss, 21, 0x88);
1468 break;
1469
1470 case MD_AD1848:
1471 mix_setdevs(m, MODE1_MIXER_DEVICES);
1472 break;
1473
1474 case MD_GUSPNP:
1638mssmix_init(snd_mixer *m)
1639{
1640 struct mss_info *mss = mix_getdevinfo(m);
1641
1642 mix_setdevs(m, MODE2_MIXER_DEVICES);
1643 mix_setrecdevs(m, MSS_REC_DEVICES);
1644 switch(mss->bd_id) {
1645 case MD_OPTI931:
1646 mix_setdevs(m, OPTI931_MIXER_DEVICES);
1647 ad_write(mss, 20, 0x88);
1648 ad_write(mss, 21, 0x88);
1649 break;
1650
1651 case MD_AD1848:
1652 mix_setdevs(m, MODE1_MIXER_DEVICES);
1653 break;
1654
1655 case MD_GUSPNP:
1656 case MD_GUSMAX:
1475 /* this is only necessary in mode 3 ... */
1476 ad_write(mss, 22, 0x88);
1477 ad_write(mss, 23, 0x88);
1478 break;
1479 }
1480 return 0;
1481}
1482

--- 143 unchanged lines hidden (view full) ---

1626 struct mss_chinfo *ch = data;
1627
1628 switch(ch->parent->bd_id) {
1629 case MD_OPTI931:
1630 return &opti931_caps;
1631 break;
1632
1633 case MD_GUSPNP:
1657 /* this is only necessary in mode 3 ... */
1658 ad_write(mss, 22, 0x88);
1659 ad_write(mss, 23, 0x88);
1660 break;
1661 }
1662 return 0;
1663}
1664

--- 143 unchanged lines hidden (view full) ---

1808 struct mss_chinfo *ch = data;
1809
1810 switch(ch->parent->bd_id) {
1811 case MD_OPTI931:
1812 return &opti931_caps;
1813 break;
1814
1815 case MD_GUSPNP:
1816 case MD_GUSMAX:
1634 return &guspnp_caps;
1635 break;
1636
1637 default:
1638 return &mss_caps;
1639 break;
1640 }
1641}
1642
1643#endif /* NPCM > 0 */
1817 return &guspnp_caps;
1818 break;
1819
1820 default:
1821 return &mss_caps;
1822 break;
1823 }
1824}
1825
1826#endif /* NPCM > 0 */