1/*
2 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
3 * Copyright Luigi Rizzo, 1997,1998
4 * Copyright by Hannu Savolainen 1994, 1995
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/sound/isa/mss.c 53512 1999-11-21 17:15:12Z cg $
29 */
30
31#include <dev/sound/pcm/sound.h>
32
33#if NPCM > 0
34
35/* board-specific include files */
36#include <dev/sound/isa/mss.h>
37
38#define abs(x) (((x) < 0) ? -(x) : (x))
39
40struct mss_info;
41
42struct mss_chinfo {
43 struct mss_info *parent;
44 pcm_channel *channel;
45 snd_dbuf *buffer;

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167#define MD_CS4231A 0xA3
168#define MD_CS4232 0xA4
169#define MD_CS4232A 0xA5
170#define MD_CS4236 0xA6
171#define MD_CS4237 0xA7
172#define MD_OPTI931 0xB1
173#define MD_OPTI925 0xB2
174#define MD_GUSPNP 0xB8
175#define MD_YM0020 0xC1
176#define MD_VIVO 0xD1
177
178#define DV_F_TRUE_MSS 0x00010000 /* mss _with_ base regs */
179
180#define FULL_DUPLEX(x) ((x)->bd_flags & BD_F_DUPLEX)
181
182static int

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236
237static u_char
238opti_rd(struct mss_info *mss, u_char reg)
239{
240 port_wr(mss->conf_base, mss->opti_offset + 0, reg);
241 return port_rd(mss->conf_base, mss->opti_offset + 1);
242}
243
244#if NPNP > 0
245static void
246gus_wr(struct mss_info *mss, u_char reg, u_char value)
247{
248 port_wr(mss->conf_base, 3, reg);
249 port_wr(mss->conf_base, 5, value);
250}
251
252static u_char
253gus_rd(struct mss_info *mss, u_char reg)
254{
255 port_wr(mss->conf_base, 3, reg);
256 return port_rd(mss->conf_base, 5);
257}
258#endif
259
260static void
261mss_release_resources(struct mss_info *mss, device_t dev)
262{
263 if (mss->irq) {
264 bus_release_resource(dev, SYS_RES_IRQ, mss->irq_rid,
265 mss->irq);
266 mss->irq = 0;

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324 isa_dma_acquire(mss->rdma);
325 isa_dmainit(mss->rdma, DSP_BUFFSIZE);
326 mss->bd_flags |= BD_F_DUPLEX;
327 } else mss->rdma = mss->pdma;
328 }
329 return ok;
330}
331
332static int
333mss_init(struct mss_info *mss, device_t dev)
334{
335 u_char r6, r9;
336 struct resource *alt;
337 int rid, tmp;
338
339 mss->bd_flags |= BD_F_MCE_BIT;

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351 (rman_get_start(mss->conf_base) & ~3) + 2
352 - rman_get_start(mss->conf_base);
353 printf("mss_init: opti_offset=%d\n", mss->opti_offset);
354 opti_wr(mss, 4, 0xd6); /* fifo empty, OPL3, audio enable, SB3.2 */
355 ad_write(mss, 10, 2); /* enable interrupts */
356 opti_wr(mss, 6, 2); /* MCIR6: mss enable, sb disable */
357 opti_wr(mss, 5, 0x28); /* MCIR5: codec in exp. mode,fifo */
358 break;
359
360 case MD_GUSPNP:
361 gus_wr(mss, 0x4c /* _URSTI */, 0);/* Pull reset */
362 DELAY(1000 * 30);
363 /* release reset and enable DAC */
364 gus_wr(mss, 0x4c /* _URSTI */, 3);
365 DELAY(1000 * 30);
366 /* end of reset */
367
368 rid = 0;
369 alt = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
370 0, ~0, 1, RF_ACTIVE);
371 port_wr(alt, 0, 0xC); /* enable int and dma */
372 bus_release_resource(dev, SYS_RES_IOPORT, rid, alt);
373
374 /*
375 * unmute left & right line. Need to go in mode3, unmute,
376 * and back to mode 2
377 */
378 tmp = ad_read(mss, 0x0c);
379 ad_write(mss, 0x0c, 0x6c); /* special value to enter mode 3 */

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384 /* send codec interrupts on irq1 and only use that one */
385 gus_wr(mss, 0x5a, 0x4f);
386
387 /* enable access to hidden regs */
388 tmp = gus_rd(mss, 0x5b /* IVERI */);
389 gus_wr(mss, 0x5b, tmp | 1);
390 BVDDB(printf("GUS: silicon rev %c\n", 'A' + ((tmp & 0xf) >> 4)));
391 break;
392#endif
393 case MD_YM0020:
394 conf_wr(mss, OPL3SAx_DMACONF, 0xa9); /* dma-b rec, dma-a play */
395 r6 = conf_rd(mss, OPL3SAx_DMACONF);
396 r9 = conf_rd(mss, OPL3SAx_MISC); /* version */
397 BVDDB(printf("Yamaha: ver 0x%x DMA config 0x%x\n", r6, r9);)
398 /* yamaha - set volume to max */
399 conf_wr(mss, OPL3SAx_VOLUMEL, 0);
400 conf_wr(mss, OPL3SAx_VOLUMER, 0);

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1010 * 1) Wait until the chip becomes ready (reads don't return 0x80).
1011 * 2) Wait until the ACI bit of I11 gets on
1012 * 3) Wait until the ACI bit of I11 gets off
1013 */
1014
1015 n = ad_wait_init(mss, 1000);
1016 if (n & MSS_IDXBUSY) printf("mss: Auto calibration timed out(1).\n");
1017
1018 for (t = 100; t > 0 && (ad_read(mss, 11) & 0x20) == 0; t--) DELAY(100);
1019 for (t = 100; t > 0 && ad_read(mss, 11) & 0x20; t--) DELAY(100);
1020}
1021
1022static void
1023ad_unmute(struct mss_info *mss)
1024{
1025 ad_write(mss, 6, ad_read(mss, 6) & ~I6_MUTE);
1026 ad_write(mss, 7, ad_read(mss, 7) & ~I6_MUTE);

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1285 case 0x1093143e: /* OPT9310 */
1286 s = "OPTi931";
1287 break;
1288
1289 case 0x5092143e: /* OPT9250 XXX guessing */
1290 s = "OPTi925";
1291 break;
1292
1293 case 0x0000561e:
1294 s = "GusPnP";
1295 break;
1296
1297 case 0x01000000:
1298 if (vend_id == 0x0100a90d) s = "CMI8330";
1299 break;
1300 }
1301
1302 if (s) {
1303 device_set_desc(dev, s);

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1356 break;
1357
1358 case 0x2500143e: /* opti925 */
1359 mss->io_rid = 1;
1360 mss->conf_rid = 3;
1361 mss->bd_id = MD_OPTI925;
1362 break;
1363
1364 case 0x0100561e: /* guspnp */
1365 mss->bd_flags |= BD_F_MSS_OFFSET;
1366 mss->io_rid = 2;
1367 mss->conf_rid = 1;
1368 mss->drq1_rid = 1;
1369 mss->drq2_rid = 0;
1370 mss->bd_id = MD_GUSPNP;
1371 break;
1372
1373 default:
1374 mss->bd_flags |= BD_F_MSS_OFFSET;
1375 mss->bd_id = MD_CS4232;
1376 break;
1377 }
1378 return mss_doattach(dev, mss);
1379}

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1448 if (mss->pch.buffer->dl && (mc11 & 4)) chn_intr(mss->pch.channel);
1449 opti_wr(mss, 11, ~mc11); /* ack */
1450 if (--loops) goto again;
1451 DEB(printf("xxx too many loops\n");)
1452}
1453
1454#endif /* NPNP > 0 */
1455
1456static int
1457mssmix_init(snd_mixer *m)
1458{
1459 struct mss_info *mss = mix_getdevinfo(m);
1460
1461 mix_setdevs(m, MODE2_MIXER_DEVICES);
1462 mix_setrecdevs(m, MSS_REC_DEVICES);
1463 switch(mss->bd_id) {
1464 case MD_OPTI931:
1465 mix_setdevs(m, OPTI931_MIXER_DEVICES);
1466 ad_write(mss, 20, 0x88);
1467 ad_write(mss, 21, 0x88);
1468 break;
1469
1470 case MD_AD1848:
1471 mix_setdevs(m, MODE1_MIXER_DEVICES);
1472 break;
1473
1474 case MD_GUSPNP:
1475 /* this is only necessary in mode 3 ... */
1476 ad_write(mss, 22, 0x88);
1477 ad_write(mss, 23, 0x88);
1478 break;
1479 }
1480 return 0;
1481}
1482

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1626 struct mss_chinfo *ch = data;
1627
1628 switch(ch->parent->bd_id) {
1629 case MD_OPTI931:
1630 return &opti931_caps;
1631 break;
1632
1633 case MD_GUSPNP:
1634 return &guspnp_caps;
1635 break;
1636
1637 default:
1638 return &mss_caps;
1639 break;
1640 }
1641}
1642
1643#endif /* NPCM > 0 */