1/*-
2 * Copyright (C) 2012 Emulex
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
--- 23 unchanged lines hidden (view full) ---
32 * freebsd-drivers@emulex.com
33 *
34 * Emulex
35 * 3333 Susan Street
36 * Costa Mesa, CA 92626
37 */
38
39
40/* $FreeBSD: head/sys/dev/oce/oce_mbox.c 231879 2012-02-17 13:55:17Z luigi $ */
41
42#include "oce_if.h"
43
44
45/**
46 * @brief Reset (firmware) common function
47 * @param sc software handle to the device
48 * @returns 0 on success, ETIMEDOUT on failure
49 */
50int
51oce_reset_fun(POCE_SOFTC sc)
52{
--- 218 unchanged lines hidden (view full) ---
271 sizeof(struct mbx_get_common_fw_version),
272 OCE_MBX_VER_V0);
273
274 mbx.u0.s.embedded = 1;
275 mbx.payload_length = sizeof(struct mbx_get_common_fw_version);
276 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
277
278 ret = oce_mbox_post(sc, &mbx, NULL);
279 if (ret)
280 return ret;
281
282 bcopy(fwcmd->params.rsp.fw_ver_str, sc->fw_version, 32);
283
284 return 0;
285}
286
287
288/**
289 * @brief Firmware will send gracious notifications during
290 * attach only after sending first mcc commnad. We
291 * use MCC queue only for getting async and mailbox
292 * for sending cmds. So to get gracious notifications
--- 130 unchanged lines hidden (view full) ---
423
424 fwcmd->params.req.type = type;
425
426 mbx.u0.s.embedded = 1;
427 mbx.payload_length = sizeof(struct mbx_query_common_iface_mac);
428 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
429
430 ret = oce_mbox_post(sc, &mbx, NULL);
431 if (ret)
432 return ret;
433
434 /* copy the mac addres in the output parameter */
435 mac->size_of_struct = fwcmd->params.rsp.mac.size_of_struct;
436 bcopy(&fwcmd->params.rsp.mac.mac_addr[0], &mac->mac_addr[0],
437 mac->size_of_struct);
438
439 return 0;
440}
441
442/**
443 * @brief Function to query the fw attributes from the hw
444 * @param sc software handle to the device
445 * @returns 0 on success, EIO on failure
446 */
447int
--- 13 unchanged lines hidden (view full) ---
461 sizeof(struct mbx_common_query_fw_config),
462 OCE_MBX_VER_V0);
463
464 mbx.u0.s.embedded = 1;
465 mbx.payload_length = sizeof(struct mbx_common_query_fw_config);
466 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
467
468 ret = oce_mbox_post(sc, &mbx, NULL);
469 if (ret)
470 return ret;
471
472 DW_SWAP(u32ptr(fwcmd), sizeof(struct mbx_common_query_fw_config));
473
474 sc->config_number = fwcmd->params.rsp.config_number;
475 sc->asic_revision = fwcmd->params.rsp.asic_revision;
476 sc->port_id = fwcmd->params.rsp.port_id;
477 sc->function_mode = fwcmd->params.rsp.function_mode;
478 sc->function_caps = fwcmd->params.rsp.function_caps;
479
480 if (fwcmd->params.rsp.ulp[0].ulp_mode & ULP_NIC_MODE) {
481 sc->max_tx_rings = fwcmd->params.rsp.ulp[0].nic_wq_tot;
482 sc->max_rx_rings = fwcmd->params.rsp.ulp[0].lro_rqid_tot;
483 } else {
484 sc->max_tx_rings = fwcmd->params.rsp.ulp[1].nic_wq_tot;
485 sc->max_rx_rings = fwcmd->params.rsp.ulp[1].lro_rqid_tot;
486 }
487
488 return 0;
489
490}
491
492/**
493 *
494 * @brief function to create a device interface
495 * @param sc software handle to the device
496 * @param cap_flags capability flags
--- 38 unchanged lines hidden (view full) ---
535 fwcmd->params.req.mac_invalid = 1;
536 }
537
538 mbx.u0.s.embedded = 1;
539 mbx.payload_length = sizeof(struct mbx_create_common_iface);
540 DW_SWAP(u32ptr(&mbx), OCE_BMBX_RHDR_SZ);
541
542 rc = oce_mbox_post(sc, &mbx, NULL);
543 if (rc)
544 return rc;
545
546 *if_id = LE_32(fwcmd->params.rsp.if_id);
547
548 if (mac_addr != NULL)
549 sc->pmac_id = LE_32(fwcmd->params.rsp.pmac_id);
550
551 return 0;
552}
553
554/**
555 * @brief Function to delete an interface
556 * @param sc software handle to the device
557 * @param if_id ID of the interface to delete
558 * @returns 0 on success, EIO on failure
559 */
--- 16 unchanged lines hidden (view full) ---
576
577 fwcmd->params.req.if_id = if_id;
578
579 mbx.u0.s.embedded = 1;
580 mbx.payload_length = sizeof(struct mbx_destroy_common_iface);
581 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
582
583 rc = oce_mbox_post(sc, &mbx, NULL);
584 return rc;
585}
586
587/**
588 * @brief Function to send the mbx command to configure vlan
589 * @param sc software handle to the device
590 * @param if_id interface identifier index
591 * @param vtag_arr array of vlan tags
--- 31 unchanged lines hidden (view full) ---
623 bcopy(vtag_arr, fwcmd->params.req.tags.normal_vlans,
624 vtag_cnt * sizeof(struct normal_vlan));
625 }
626 mbx.u0.s.embedded = 1;
627 mbx.payload_length = sizeof(struct mbx_common_config_vlan);
628 DW_SWAP(u32ptr(&mbx), (OCE_BMBX_RHDR_SZ + mbx.payload_length));
629
630 rc = oce_mbox_post(sc, &mbx, NULL);
631
632 return rc;
633
634}
635
636/**
637 * @brief Function to set flow control capability in the hardware
638 * @param sc software handle to the device
639 * @param flow_control flow control flags to set
640 * @returns 0 on success, EIO on failure
641 */
--- 20 unchanged lines hidden (view full) ---
662 if (flow_control & OCE_FC_RX)
663 fwcmd->rx_flow_control = 1;
664
665 mbx.u0.s.embedded = 1;
666 mbx.payload_length = sizeof(struct mbx_common_get_set_flow_control);
667 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
668
669 rc = oce_mbox_post(sc, &mbx, NULL);
670
671 return rc;
672}
673
674/**
675 * @brief Initialize the RSS CPU indirection table
676 *
677 * The table is used to choose the queue to place the incomming packets.
678 * Incomming packets are hashed. The lowest bits in the hash result
--- 42 unchanged lines hidden (view full) ---
721 */
722int
723oce_config_nic_rss(POCE_SOFTC sc, uint32_t if_id, uint16_t enable_rss)
724{
725 int rc;
726 struct oce_mbx mbx;
727 struct mbx_config_nic_rss *fwcmd =
728 (struct mbx_config_nic_rss *)&mbx.payload;
729
730 bzero(&mbx, sizeof(struct oce_mbx));
731
732 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
733 MBX_SUBSYSTEM_NIC,
734 NIC_CONFIG_RSS,
735 MBX_TIMEOUT_SEC,
736 sizeof(struct mbx_config_nic_rss),
737 OCE_MBX_VER_V0);
738 if (enable_rss)
739 fwcmd->params.req.enable_rss = (RSS_ENABLE_IPV4 |
740 RSS_ENABLE_TCP_IPV4 |
741 RSS_ENABLE_IPV6 |
742 RSS_ENABLE_TCP_IPV6);
743 fwcmd->params.req.flush = OCE_FLUSH;
744 fwcmd->params.req.if_id = LE_32(if_id);
745
746 srandom(arc4random()); /* random entropy seed */
747 read_random(fwcmd->params.req.hash, sizeof(fwcmd->params.req.hash));
748
749 rc = oce_rss_itbl_init(sc, fwcmd);
750 if (rc == 0) {
751 mbx.u0.s.embedded = 1;
752 mbx.payload_length = sizeof(struct mbx_config_nic_rss);
753 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
754
755 rc = oce_mbox_post(sc, &mbx, NULL);
756
757 }
758
759 return rc;
760}
761
762/**
763 * @brief RXF function to enable/disable device promiscuous mode
764 * @param sc software handle to the device
765 * @param enable enable/disable flag
766 * @returns 0 on success, EIO on failure
--- 62 unchanged lines hidden (view full) ---
829 mbx.u0.s.sge_count = 1;
830 mbx.payload.u0.u1.sgl[0].pa_lo = ADDR_LO(sgl->paddr);
831 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(sgl->paddr);
832 mbx.payload.u0.u1.sgl[0].length = mbx_sz;
833 mbx.payload_length = mbx_sz;
834 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
835
836 rc = oce_mbox_post(sc, &mbx, NULL);
837 return rc;
838}
839
840/**
841 * @brief Function to query the link status from the hardware
842 * @param sc software handle to the device
843 * @param[out] link pointer to the structure returning link attributes
844 * @returns 0 on success, EIO on failure
845 */
846int
847oce_get_link_status(POCE_SOFTC sc, struct link_status *link)
848{
849 struct oce_mbx mbx;
850 struct mbx_query_common_link_config *fwcmd;
851 int rc = 0;
852
853 bzero(&mbx, sizeof(struct oce_mbx));
854
855 fwcmd = (struct mbx_query_common_link_config *)&mbx.payload;
856 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
857 MBX_SUBSYSTEM_COMMON,
858 OPCODE_COMMON_QUERY_LINK_CONFIG,
859 MBX_TIMEOUT_SEC,
860 sizeof(struct mbx_query_common_link_config),
861 OCE_MBX_VER_V0);
862
863 mbx.u0.s.embedded = 1;
864 mbx.payload_length = sizeof(struct mbx_query_common_link_config);
865 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
866
867 rc = oce_mbox_post(sc, &mbx, NULL);
868
869 if (rc) {
870 device_printf(sc->dev, "Could not get link speed: %d\n", rc);
871 } else {
872 /* interpret response */
873 bcopy(&fwcmd->params.rsp, link, sizeof(struct link_status));
874 link->logical_link_status = LE_32(link->logical_link_status);
875 link->qos_link_speed = LE_16(link->qos_link_speed);
876 }
877
878 return rc;
879}
880
881
882
883int
884oce_mbox_get_nic_stats_v0(POCE_SOFTC sc, POCE_DMA_MEM pstats_dma_mem)
885{
--- 25 unchanged lines hidden (view full) ---
911 mbx.payload_length = sizeof(struct mbx_get_nic_stats_v0);
912
913 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
914
915 rc = oce_mbox_post(sc, &mbx, NULL);
916
917 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
918
919 if (rc) {
920 device_printf(sc->dev,
921 "Could not get nic statistics: %d\n", rc);
922 }
923
924 return rc;
925}
926
927
928
929/**
930 * @brief Function to get NIC statistics
931 * @param sc software handle to the device
--- 29 unchanged lines hidden (view full) ---
961 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(pstats_dma_mem->paddr);
962 mbx.payload.u0.u1.sgl[0].length = sizeof(struct mbx_get_nic_stats);
963
964 mbx.payload_length = sizeof(struct mbx_get_nic_stats);
965 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
966
967 rc = oce_mbox_post(sc, &mbx, NULL);
968 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
969 if (rc) {
970 device_printf(sc->dev,
971 "Could not get nic statistics: %d\n", rc);
972 }
973 return rc;
974}
975
976
977/**
978 * @brief Function to get pport (physical port) statistics
979 * @param sc software handle to the device
980 * @param *stats pointer to where to store statistics
--- 15 unchanged lines hidden (view full) ---
996 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
997 MBX_SUBSYSTEM_NIC,
998 NIC_GET_PPORT_STATS,
999 MBX_TIMEOUT_SEC,
1000 sizeof(struct mbx_get_pport_stats),
1001 OCE_MBX_VER_V0);
1002
1003 fwcmd->params.req.reset_stats = reset_stats;
1004 fwcmd->params.req.port_number = sc->if_id;
1005
1006 mbx.u0.s.embedded = 0; /* stats too large for embedded mbx rsp */
1007 mbx.u0.s.sge_count = 1; /* using scatter gather instead */
1008
1009 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_PREWRITE);
1010 mbx.payload.u0.u1.sgl[0].pa_lo = ADDR_LO(pstats_dma_mem->paddr);
1011 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(pstats_dma_mem->paddr);
1012 mbx.payload.u0.u1.sgl[0].length = sizeof(struct mbx_get_pport_stats);
1013
1014 mbx.payload_length = sizeof(struct mbx_get_pport_stats);
1015 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1016
1017 rc = oce_mbox_post(sc, &mbx, NULL);
1018 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
1019
1020 if (rc != 0) {
1021 device_printf(sc->dev,
1022 "Could not get physical port statistics: %d\n", rc);
1023 }
1024
1025 return rc;
1026}
1027
1028
1029/**
1030 * @brief Function to get vport (virtual port) statistics
1031 * @param sc software handle to the device
1032 * @param *stats pointer to where to store statistics
--- 32 unchanged lines hidden (view full) ---
1065 mbx.payload.u0.u1.sgl[0].length = sizeof(struct mbx_get_vport_stats);
1066
1067 mbx.payload_length = sizeof(struct mbx_get_vport_stats);
1068 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1069
1070 rc = oce_mbox_post(sc, &mbx, NULL);
1071 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
1072
1073 if (rc != 0) {
1074 device_printf(sc->dev,
1075 "Could not get physical port statistics: %d\n", rc);
1076 }
1077
1078 return rc;
1079}
1080
1081
1082/**
1083 * @brief Function to update the muticast filter with
1084 * values in dma_mem
1085 * @param sc software handle to the device
--- 24 unchanged lines hidden (view full) ---
1110 sgl = &mbx.payload.u0.u1.sgl[0];
1111 sgl->pa_hi = htole32(upper_32_bits(pdma_mem->paddr));
1112 sgl->pa_lo = htole32((pdma_mem->paddr) & 0xFFFFFFFF);
1113 sgl->length = htole32(mbx.payload_length);
1114
1115 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1116
1117 rc = oce_mbox_post(sc, &mbx, NULL);
1118
1119 return rc;
1120}
1121
1122
1123/**
1124 * @brief Function to send passthrough Ioctls
1125 * @param sc software handle to the device
1126 * @param dma_mem pointer to dma memory region
--- 44 unchanged lines hidden (view full) ---
1171
1172 fwcmd->params.req.if_id = (uint16_t) if_id;
1173 bcopy(mac_addr, fwcmd->params.req.mac_address, 6);
1174
1175 mbx.u0.s.embedded = 1;
1176 mbx.payload_length = sizeof(struct mbx_add_common_iface_mac);
1177 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1178 rc = oce_mbox_post(sc, &mbx, NULL);
1179 if (rc)
1180 return rc;
1181
1182 *pmac_id = fwcmd->params.rsp.pmac_id;
1183
1184 return rc;
1185}
1186
1187
1188int
1189oce_mbox_macaddr_del(POCE_SOFTC sc, uint32_t if_id, uint32_t pmac_id)
1190{
1191 struct oce_mbx mbx;
--- 13 unchanged lines hidden (view full) ---
1205 fwcmd->params.req.if_id = (uint16_t)if_id;
1206 fwcmd->params.req.pmac_id = pmac_id;
1207
1208 mbx.u0.s.embedded = 1;
1209 mbx.payload_length = sizeof(struct mbx_del_common_iface_mac);
1210 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1211
1212 rc = oce_mbox_post(sc, &mbx, NULL);
1213 return rc;
1214}
1215
1216
1217
1218int
1219oce_mbox_check_native_mode(POCE_SOFTC sc)
1220{
--- 16 unchanged lines hidden (view full) ---
1237
1238 fwcmd->params.req.capability_flags = CAP_BE3_NATIVE_ERX_API;
1239
1240 mbx.u0.s.embedded = 1;
1241 mbx.payload_length = sizeof(struct mbx_common_set_function_cap);
1242 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1243
1244 rc = oce_mbox_post(sc, &mbx, NULL);
1245 //if (rc != 0) This can fail in legacy mode. So skip
1246 // FN_LEAVE(rc);
1247
1248 sc->be3_native = fwcmd->params.rsp.capability_flags
1249 & CAP_BE3_NATIVE_ERX_API;
1250
1251 return 0;
1252}
1253
1254
1255
1256int
1257oce_mbox_cmd_set_loopback(POCE_SOFTC sc, uint8_t port_num,
1258 uint8_t loopback_type, uint8_t enable)
--- 18 unchanged lines hidden (view full) ---
1277 fwcmd->params.req.loopback_type = loopback_type;
1278 fwcmd->params.req.loopback_state = enable;
1279
1280 mbx.u0.s.embedded = 1;
1281 mbx.payload_length = sizeof(struct mbx_lowlevel_set_loopback_mode);
1282 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1283
1284 rc = oce_mbox_post(sc, &mbx, NULL);
1285
1286 return rc;
1287
1288}
1289
1290int
1291oce_mbox_cmd_test_loopback(POCE_SOFTC sc, uint32_t port_num,
1292 uint32_t loopback_type, uint32_t pkt_size, uint32_t num_pkts,
--- 22 unchanged lines hidden (view full) ---
1315 fwcmd->params.req.num_pkts = num_pkts;
1316 fwcmd->params.req.loopback_type = loopback_type;
1317
1318 mbx.u0.s.embedded = 1;
1319 mbx.payload_length = sizeof(struct mbx_lowlevel_test_loopback_mode);
1320 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1321
1322 rc = oce_mbox_post(sc, &mbx, NULL);
1323 if (rc)
1324 return rc;
1325
1326 return(fwcmd->params.rsp.status);
1327}
1328
1329int
1330oce_mbox_write_flashrom(POCE_SOFTC sc, uint32_t optype,uint32_t opcode,
1331 POCE_DMA_MEM pdma_mem, uint32_t num_bytes)
1332{
1333
1334 struct oce_mbx mbx;
--- 22 unchanged lines hidden (view full) ---
1357
1358 sgl = &mbx.payload.u0.u1.sgl[0];
1359 sgl->pa_hi = upper_32_bits(pdma_mem->paddr);
1360 sgl->pa_lo = pdma_mem->paddr & 0xFFFFFFFF;
1361 sgl->length = payload_len;
1362
1363 /* post the command */
1364 rc = oce_mbox_post(sc, &mbx, NULL);
1365 if (rc) {
1366 device_printf(sc->dev, "Write FlashROM mbox post failed\n");
1367 } else {
1368 rc = fwcmd->hdr.u0.rsp.status;
1369 }
1370
1371 return rc;
1372
1373}
1374
1375int
1376oce_mbox_get_flashrom_crc(POCE_SOFTC sc, uint8_t *flash_crc,
1377 uint32_t offset, uint32_t optype)
--- 25 unchanged lines hidden (view full) ---
1403 fwcmd->data_offset = offset;
1404 fwcmd->data_buffer_size = 0x4;
1405
1406 mbx.u0.s.embedded = 1;
1407 mbx.payload_length = payload_len;
1408
1409 /* post the command */
1410 rc = oce_mbox_post(sc, &mbx, NULL);
1411 if (rc) {
1412 device_printf(sc->dev, "Read FlashROM CRC mbox post failed\n");
1413 } else {
1414 bcopy(fwcmd->data_buffer, flash_crc, 4);
1415 rc = fwcmd->hdr.u0.rsp.status;
1416 }
1417 return rc;
1418}
1419
1420int
1421oce_mbox_get_phy_info(POCE_SOFTC sc, struct oce_phy_info *phy_info)
1422{
1423
1424 struct oce_mbx mbx;
--- 10 unchanged lines hidden (view full) ---
1435 sizeof(struct mbx_common_phy_info),
1436 OCE_MBX_VER_V0);
1437
1438 mbx.u0.s.embedded = 1;
1439 mbx.payload_length = sizeof(struct mbx_common_phy_info);
1440
1441 /* now post the command */
1442 rc = oce_mbox_post(sc, &mbx, NULL);
1443 if (rc) {
1444 device_printf(sc->dev, "Read PHY info mbox post failed\n");
1445 } else {
1446 rc = fwcmd->hdr.u0.rsp.status;
1447 phy_info->phy_type = fwcmd->params.rsp.phy_info.phy_type;
1448 phy_info->interface_type =
1449 fwcmd->params.rsp.phy_info.interface_type;
1450 phy_info->auto_speeds_supported =
1451 fwcmd->params.rsp.phy_info.auto_speeds_supported;
1452 phy_info->fixed_speeds_supported =
1453 fwcmd->params.rsp.phy_info.fixed_speeds_supported;
1454 phy_info->misc_params =fwcmd->params.rsp.phy_info.misc_params;
1455
1456 }
1457 return rc;
1458
1459}
1460
1461
1462int
1463oce_mbox_lancer_write_flashrom(POCE_SOFTC sc, uint32_t data_size,
1464 uint32_t data_offset, POCE_DMA_MEM pdma_mem,
--- 29 unchanged lines hidden (view full) ---
1494 fwcmd->params.req.descriptor_count = 1;
1495 fwcmd->params.req.write_offset = data_offset;
1496 fwcmd->params.req.buffer_length = data_size;
1497 fwcmd->params.req.address_lower = pdma_mem->paddr & 0xFFFFFFFF;
1498 fwcmd->params.req.address_upper = upper_32_bits(pdma_mem->paddr);
1499
1500 /* post the command */
1501 rc = oce_mbox_post(sc, &mbx, NULL);
1502 if (rc) {
1503 device_printf(sc->dev,
1504 "Write Lancer FlashROM mbox post failed\n");
1505 } else {
1506 *written_data = fwcmd->params.rsp.actual_write_length;
1507 *additional_status = fwcmd->params.rsp.additional_status;
1508 rc = fwcmd->params.rsp.status;
1509 }
1510 return rc;
1511
1512}
1513
1514
1515
1516int
1517oce_mbox_create_rq(struct oce_rq *rq)
--- 30 unchanged lines hidden (view full) ---
1548 fwcmd->params.req.if_id = sc->if_id;
1549 fwcmd->params.req.max_frame_size = rq->cfg.mtu;
1550 fwcmd->params.req.is_rss_queue = rq->cfg.is_rss_queue;
1551
1552 mbx.u0.s.embedded = 1;
1553 mbx.payload_length = sizeof(struct mbx_create_nic_rq);
1554
1555 rc = oce_mbox_post(sc, &mbx, NULL);
1556 if (rc)
1557 goto error;
1558
1559 rq->rq_id = fwcmd->params.rsp.rq_id;
1560 rq->rss_cpuid = fwcmd->params.rsp.rss_cpuid;
1561
1562 return 0;
1563error:
1564 device_printf(sc->dev, "Mbox Create RQ failed\n");
1565 return rc;
1566
1567}
1568
1569
1570
1571int
1572oce_mbox_create_wq(struct oce_wq *wq)
--- 25 unchanged lines hidden (view full) ---
1598 fwcmd->params.req.wq_size = OCE_LOG2(wq->cfg.q_len) + 1;
1599 fwcmd->params.req.cq_id = wq->cq->cq_id;
1600 fwcmd->params.req.ulp_num = 1;
1601
1602 mbx.u0.s.embedded = 1;
1603 mbx.payload_length = sizeof(struct mbx_create_nic_wq);
1604
1605 rc = oce_mbox_post(sc, &mbx, NULL);
1606 if (rc)
1607 goto error;
1608
1609 wq->wq_id = LE_16(fwcmd->params.rsp.wq_id);
1610
1611 return 0;
1612error:
1613 device_printf(sc->dev, "Mbox Create WQ failed\n");
1614 return rc;
1615
1616}
1617
1618
1619
1620int
1621oce_mbox_create_eq(struct oce_eq *eq)
--- 22 unchanged lines hidden (view full) ---
1644 fwcmd->params.req.ctx.armed = 0;
1645 fwcmd->params.req.ctx.delay_mult = eq->eq_cfg.cur_eqd;
1646
1647
1648 mbx.u0.s.embedded = 1;
1649 mbx.payload_length = sizeof(struct mbx_create_common_eq);
1650
1651 rc = oce_mbox_post(sc, &mbx, NULL);
1652 if (rc)
1653 goto error;
1654
1655 eq->eq_id = LE_16(fwcmd->params.rsp.eq_id);
1656
1657 return 0;
1658error:
1659 device_printf(sc->dev, "Mbox Create EQ failed\n");
1660 return rc;
1661}
1662
1663
1664
1665int
1666oce_mbox_cq_create(struct oce_cq *cq, uint32_t ncoalesce, uint32_t is_eventable)
1667{
--- 53 unchanged lines hidden (view full) ---
1721 ctx->v0.armed = 0;
1722 ctx->v0.eq_id = cq->eq->eq_id;
1723 }
1724
1725 mbx.u0.s.embedded = 1;
1726 mbx.payload_length = sizeof(struct mbx_create_common_cq);
1727
1728 rc = oce_mbox_post(sc, &mbx, NULL);
1729 if (rc)
1730 goto error;
1731
1732 cq->cq_id = LE_16(fwcmd->params.rsp.cq_id);
1733
1734 return 0;
1735error:
1736 device_printf(sc->dev, "Mbox Create CQ failed\n");
1737 return rc;
1738
1739}
2 * Copyright (C) 2012 Emulex
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
--- 23 unchanged lines hidden (view full) ---
32 * freebsd-drivers@emulex.com
33 *
34 * Emulex
35 * 3333 Susan Street
36 * Costa Mesa, CA 92626
37 */
38
39
40/* $FreeBSD: head/sys/dev/oce/oce_mbox.c 231879 2012-02-17 13:55:17Z luigi $ */
41
42#include "oce_if.h"
43
44
45/**
46 * @brief Reset (firmware) common function
47 * @param sc software handle to the device
48 * @returns 0 on success, ETIMEDOUT on failure
49 */
50int
51oce_reset_fun(POCE_SOFTC sc)
52{
--- 218 unchanged lines hidden (view full) ---
271 sizeof(struct mbx_get_common_fw_version),
272 OCE_MBX_VER_V0);
273
274 mbx.u0.s.embedded = 1;
275 mbx.payload_length = sizeof(struct mbx_get_common_fw_version);
276 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
277
278 ret = oce_mbox_post(sc, &mbx, NULL);
279 if (ret)
280 return ret;
281
282 bcopy(fwcmd->params.rsp.fw_ver_str, sc->fw_version, 32);
283
284 return 0;
285}
286
287
288/**
289 * @brief Firmware will send gracious notifications during
290 * attach only after sending first mcc commnad. We
291 * use MCC queue only for getting async and mailbox
292 * for sending cmds. So to get gracious notifications
--- 130 unchanged lines hidden (view full) ---
423
424 fwcmd->params.req.type = type;
425
426 mbx.u0.s.embedded = 1;
427 mbx.payload_length = sizeof(struct mbx_query_common_iface_mac);
428 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
429
430 ret = oce_mbox_post(sc, &mbx, NULL);
431 if (ret)
432 return ret;
433
434 /* copy the mac addres in the output parameter */
435 mac->size_of_struct = fwcmd->params.rsp.mac.size_of_struct;
436 bcopy(&fwcmd->params.rsp.mac.mac_addr[0], &mac->mac_addr[0],
437 mac->size_of_struct);
438
439 return 0;
440}
441
442/**
443 * @brief Function to query the fw attributes from the hw
444 * @param sc software handle to the device
445 * @returns 0 on success, EIO on failure
446 */
447int
--- 13 unchanged lines hidden (view full) ---
461 sizeof(struct mbx_common_query_fw_config),
462 OCE_MBX_VER_V0);
463
464 mbx.u0.s.embedded = 1;
465 mbx.payload_length = sizeof(struct mbx_common_query_fw_config);
466 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
467
468 ret = oce_mbox_post(sc, &mbx, NULL);
469 if (ret)
470 return ret;
471
472 DW_SWAP(u32ptr(fwcmd), sizeof(struct mbx_common_query_fw_config));
473
474 sc->config_number = fwcmd->params.rsp.config_number;
475 sc->asic_revision = fwcmd->params.rsp.asic_revision;
476 sc->port_id = fwcmd->params.rsp.port_id;
477 sc->function_mode = fwcmd->params.rsp.function_mode;
478 sc->function_caps = fwcmd->params.rsp.function_caps;
479
480 if (fwcmd->params.rsp.ulp[0].ulp_mode & ULP_NIC_MODE) {
481 sc->max_tx_rings = fwcmd->params.rsp.ulp[0].nic_wq_tot;
482 sc->max_rx_rings = fwcmd->params.rsp.ulp[0].lro_rqid_tot;
483 } else {
484 sc->max_tx_rings = fwcmd->params.rsp.ulp[1].nic_wq_tot;
485 sc->max_rx_rings = fwcmd->params.rsp.ulp[1].lro_rqid_tot;
486 }
487
488 return 0;
489
490}
491
492/**
493 *
494 * @brief function to create a device interface
495 * @param sc software handle to the device
496 * @param cap_flags capability flags
--- 38 unchanged lines hidden (view full) ---
535 fwcmd->params.req.mac_invalid = 1;
536 }
537
538 mbx.u0.s.embedded = 1;
539 mbx.payload_length = sizeof(struct mbx_create_common_iface);
540 DW_SWAP(u32ptr(&mbx), OCE_BMBX_RHDR_SZ);
541
542 rc = oce_mbox_post(sc, &mbx, NULL);
543 if (rc)
544 return rc;
545
546 *if_id = LE_32(fwcmd->params.rsp.if_id);
547
548 if (mac_addr != NULL)
549 sc->pmac_id = LE_32(fwcmd->params.rsp.pmac_id);
550
551 return 0;
552}
553
554/**
555 * @brief Function to delete an interface
556 * @param sc software handle to the device
557 * @param if_id ID of the interface to delete
558 * @returns 0 on success, EIO on failure
559 */
--- 16 unchanged lines hidden (view full) ---
576
577 fwcmd->params.req.if_id = if_id;
578
579 mbx.u0.s.embedded = 1;
580 mbx.payload_length = sizeof(struct mbx_destroy_common_iface);
581 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
582
583 rc = oce_mbox_post(sc, &mbx, NULL);
584 return rc;
585}
586
587/**
588 * @brief Function to send the mbx command to configure vlan
589 * @param sc software handle to the device
590 * @param if_id interface identifier index
591 * @param vtag_arr array of vlan tags
--- 31 unchanged lines hidden (view full) ---
623 bcopy(vtag_arr, fwcmd->params.req.tags.normal_vlans,
624 vtag_cnt * sizeof(struct normal_vlan));
625 }
626 mbx.u0.s.embedded = 1;
627 mbx.payload_length = sizeof(struct mbx_common_config_vlan);
628 DW_SWAP(u32ptr(&mbx), (OCE_BMBX_RHDR_SZ + mbx.payload_length));
629
630 rc = oce_mbox_post(sc, &mbx, NULL);
631
632 return rc;
633
634}
635
636/**
637 * @brief Function to set flow control capability in the hardware
638 * @param sc software handle to the device
639 * @param flow_control flow control flags to set
640 * @returns 0 on success, EIO on failure
641 */
--- 20 unchanged lines hidden (view full) ---
662 if (flow_control & OCE_FC_RX)
663 fwcmd->rx_flow_control = 1;
664
665 mbx.u0.s.embedded = 1;
666 mbx.payload_length = sizeof(struct mbx_common_get_set_flow_control);
667 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
668
669 rc = oce_mbox_post(sc, &mbx, NULL);
670
671 return rc;
672}
673
674/**
675 * @brief Initialize the RSS CPU indirection table
676 *
677 * The table is used to choose the queue to place the incomming packets.
678 * Incomming packets are hashed. The lowest bits in the hash result
--- 42 unchanged lines hidden (view full) ---
721 */
722int
723oce_config_nic_rss(POCE_SOFTC sc, uint32_t if_id, uint16_t enable_rss)
724{
725 int rc;
726 struct oce_mbx mbx;
727 struct mbx_config_nic_rss *fwcmd =
728 (struct mbx_config_nic_rss *)&mbx.payload;
729
730 bzero(&mbx, sizeof(struct oce_mbx));
731
732 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
733 MBX_SUBSYSTEM_NIC,
734 NIC_CONFIG_RSS,
735 MBX_TIMEOUT_SEC,
736 sizeof(struct mbx_config_nic_rss),
737 OCE_MBX_VER_V0);
738 if (enable_rss)
739 fwcmd->params.req.enable_rss = (RSS_ENABLE_IPV4 |
740 RSS_ENABLE_TCP_IPV4 |
741 RSS_ENABLE_IPV6 |
742 RSS_ENABLE_TCP_IPV6);
743 fwcmd->params.req.flush = OCE_FLUSH;
744 fwcmd->params.req.if_id = LE_32(if_id);
745
746 srandom(arc4random()); /* random entropy seed */
747 read_random(fwcmd->params.req.hash, sizeof(fwcmd->params.req.hash));
748
749 rc = oce_rss_itbl_init(sc, fwcmd);
750 if (rc == 0) {
751 mbx.u0.s.embedded = 1;
752 mbx.payload_length = sizeof(struct mbx_config_nic_rss);
753 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
754
755 rc = oce_mbox_post(sc, &mbx, NULL);
756
757 }
758
759 return rc;
760}
761
762/**
763 * @brief RXF function to enable/disable device promiscuous mode
764 * @param sc software handle to the device
765 * @param enable enable/disable flag
766 * @returns 0 on success, EIO on failure
--- 62 unchanged lines hidden (view full) ---
829 mbx.u0.s.sge_count = 1;
830 mbx.payload.u0.u1.sgl[0].pa_lo = ADDR_LO(sgl->paddr);
831 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(sgl->paddr);
832 mbx.payload.u0.u1.sgl[0].length = mbx_sz;
833 mbx.payload_length = mbx_sz;
834 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
835
836 rc = oce_mbox_post(sc, &mbx, NULL);
837 return rc;
838}
839
840/**
841 * @brief Function to query the link status from the hardware
842 * @param sc software handle to the device
843 * @param[out] link pointer to the structure returning link attributes
844 * @returns 0 on success, EIO on failure
845 */
846int
847oce_get_link_status(POCE_SOFTC sc, struct link_status *link)
848{
849 struct oce_mbx mbx;
850 struct mbx_query_common_link_config *fwcmd;
851 int rc = 0;
852
853 bzero(&mbx, sizeof(struct oce_mbx));
854
855 fwcmd = (struct mbx_query_common_link_config *)&mbx.payload;
856 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
857 MBX_SUBSYSTEM_COMMON,
858 OPCODE_COMMON_QUERY_LINK_CONFIG,
859 MBX_TIMEOUT_SEC,
860 sizeof(struct mbx_query_common_link_config),
861 OCE_MBX_VER_V0);
862
863 mbx.u0.s.embedded = 1;
864 mbx.payload_length = sizeof(struct mbx_query_common_link_config);
865 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
866
867 rc = oce_mbox_post(sc, &mbx, NULL);
868
869 if (rc) {
870 device_printf(sc->dev, "Could not get link speed: %d\n", rc);
871 } else {
872 /* interpret response */
873 bcopy(&fwcmd->params.rsp, link, sizeof(struct link_status));
874 link->logical_link_status = LE_32(link->logical_link_status);
875 link->qos_link_speed = LE_16(link->qos_link_speed);
876 }
877
878 return rc;
879}
880
881
882
883int
884oce_mbox_get_nic_stats_v0(POCE_SOFTC sc, POCE_DMA_MEM pstats_dma_mem)
885{
--- 25 unchanged lines hidden (view full) ---
911 mbx.payload_length = sizeof(struct mbx_get_nic_stats_v0);
912
913 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
914
915 rc = oce_mbox_post(sc, &mbx, NULL);
916
917 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
918
919 if (rc) {
920 device_printf(sc->dev,
921 "Could not get nic statistics: %d\n", rc);
922 }
923
924 return rc;
925}
926
927
928
929/**
930 * @brief Function to get NIC statistics
931 * @param sc software handle to the device
--- 29 unchanged lines hidden (view full) ---
961 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(pstats_dma_mem->paddr);
962 mbx.payload.u0.u1.sgl[0].length = sizeof(struct mbx_get_nic_stats);
963
964 mbx.payload_length = sizeof(struct mbx_get_nic_stats);
965 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
966
967 rc = oce_mbox_post(sc, &mbx, NULL);
968 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
969 if (rc) {
970 device_printf(sc->dev,
971 "Could not get nic statistics: %d\n", rc);
972 }
973 return rc;
974}
975
976
977/**
978 * @brief Function to get pport (physical port) statistics
979 * @param sc software handle to the device
980 * @param *stats pointer to where to store statistics
--- 15 unchanged lines hidden (view full) ---
996 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
997 MBX_SUBSYSTEM_NIC,
998 NIC_GET_PPORT_STATS,
999 MBX_TIMEOUT_SEC,
1000 sizeof(struct mbx_get_pport_stats),
1001 OCE_MBX_VER_V0);
1002
1003 fwcmd->params.req.reset_stats = reset_stats;
1004 fwcmd->params.req.port_number = sc->if_id;
1005
1006 mbx.u0.s.embedded = 0; /* stats too large for embedded mbx rsp */
1007 mbx.u0.s.sge_count = 1; /* using scatter gather instead */
1008
1009 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_PREWRITE);
1010 mbx.payload.u0.u1.sgl[0].pa_lo = ADDR_LO(pstats_dma_mem->paddr);
1011 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(pstats_dma_mem->paddr);
1012 mbx.payload.u0.u1.sgl[0].length = sizeof(struct mbx_get_pport_stats);
1013
1014 mbx.payload_length = sizeof(struct mbx_get_pport_stats);
1015 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1016
1017 rc = oce_mbox_post(sc, &mbx, NULL);
1018 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
1019
1020 if (rc != 0) {
1021 device_printf(sc->dev,
1022 "Could not get physical port statistics: %d\n", rc);
1023 }
1024
1025 return rc;
1026}
1027
1028
1029/**
1030 * @brief Function to get vport (virtual port) statistics
1031 * @param sc software handle to the device
1032 * @param *stats pointer to where to store statistics
--- 32 unchanged lines hidden (view full) ---
1065 mbx.payload.u0.u1.sgl[0].length = sizeof(struct mbx_get_vport_stats);
1066
1067 mbx.payload_length = sizeof(struct mbx_get_vport_stats);
1068 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1069
1070 rc = oce_mbox_post(sc, &mbx, NULL);
1071 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
1072
1073 if (rc != 0) {
1074 device_printf(sc->dev,
1075 "Could not get physical port statistics: %d\n", rc);
1076 }
1077
1078 return rc;
1079}
1080
1081
1082/**
1083 * @brief Function to update the muticast filter with
1084 * values in dma_mem
1085 * @param sc software handle to the device
--- 24 unchanged lines hidden (view full) ---
1110 sgl = &mbx.payload.u0.u1.sgl[0];
1111 sgl->pa_hi = htole32(upper_32_bits(pdma_mem->paddr));
1112 sgl->pa_lo = htole32((pdma_mem->paddr) & 0xFFFFFFFF);
1113 sgl->length = htole32(mbx.payload_length);
1114
1115 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1116
1117 rc = oce_mbox_post(sc, &mbx, NULL);
1118
1119 return rc;
1120}
1121
1122
1123/**
1124 * @brief Function to send passthrough Ioctls
1125 * @param sc software handle to the device
1126 * @param dma_mem pointer to dma memory region
--- 44 unchanged lines hidden (view full) ---
1171
1172 fwcmd->params.req.if_id = (uint16_t) if_id;
1173 bcopy(mac_addr, fwcmd->params.req.mac_address, 6);
1174
1175 mbx.u0.s.embedded = 1;
1176 mbx.payload_length = sizeof(struct mbx_add_common_iface_mac);
1177 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1178 rc = oce_mbox_post(sc, &mbx, NULL);
1179 if (rc)
1180 return rc;
1181
1182 *pmac_id = fwcmd->params.rsp.pmac_id;
1183
1184 return rc;
1185}
1186
1187
1188int
1189oce_mbox_macaddr_del(POCE_SOFTC sc, uint32_t if_id, uint32_t pmac_id)
1190{
1191 struct oce_mbx mbx;
--- 13 unchanged lines hidden (view full) ---
1205 fwcmd->params.req.if_id = (uint16_t)if_id;
1206 fwcmd->params.req.pmac_id = pmac_id;
1207
1208 mbx.u0.s.embedded = 1;
1209 mbx.payload_length = sizeof(struct mbx_del_common_iface_mac);
1210 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1211
1212 rc = oce_mbox_post(sc, &mbx, NULL);
1213 return rc;
1214}
1215
1216
1217
1218int
1219oce_mbox_check_native_mode(POCE_SOFTC sc)
1220{
--- 16 unchanged lines hidden (view full) ---
1237
1238 fwcmd->params.req.capability_flags = CAP_BE3_NATIVE_ERX_API;
1239
1240 mbx.u0.s.embedded = 1;
1241 mbx.payload_length = sizeof(struct mbx_common_set_function_cap);
1242 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1243
1244 rc = oce_mbox_post(sc, &mbx, NULL);
1245 //if (rc != 0) This can fail in legacy mode. So skip
1246 // FN_LEAVE(rc);
1247
1248 sc->be3_native = fwcmd->params.rsp.capability_flags
1249 & CAP_BE3_NATIVE_ERX_API;
1250
1251 return 0;
1252}
1253
1254
1255
1256int
1257oce_mbox_cmd_set_loopback(POCE_SOFTC sc, uint8_t port_num,
1258 uint8_t loopback_type, uint8_t enable)
--- 18 unchanged lines hidden (view full) ---
1277 fwcmd->params.req.loopback_type = loopback_type;
1278 fwcmd->params.req.loopback_state = enable;
1279
1280 mbx.u0.s.embedded = 1;
1281 mbx.payload_length = sizeof(struct mbx_lowlevel_set_loopback_mode);
1282 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1283
1284 rc = oce_mbox_post(sc, &mbx, NULL);
1285
1286 return rc;
1287
1288}
1289
1290int
1291oce_mbox_cmd_test_loopback(POCE_SOFTC sc, uint32_t port_num,
1292 uint32_t loopback_type, uint32_t pkt_size, uint32_t num_pkts,
--- 22 unchanged lines hidden (view full) ---
1315 fwcmd->params.req.num_pkts = num_pkts;
1316 fwcmd->params.req.loopback_type = loopback_type;
1317
1318 mbx.u0.s.embedded = 1;
1319 mbx.payload_length = sizeof(struct mbx_lowlevel_test_loopback_mode);
1320 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1321
1322 rc = oce_mbox_post(sc, &mbx, NULL);
1323 if (rc)
1324 return rc;
1325
1326 return(fwcmd->params.rsp.status);
1327}
1328
1329int
1330oce_mbox_write_flashrom(POCE_SOFTC sc, uint32_t optype,uint32_t opcode,
1331 POCE_DMA_MEM pdma_mem, uint32_t num_bytes)
1332{
1333
1334 struct oce_mbx mbx;
--- 22 unchanged lines hidden (view full) ---
1357
1358 sgl = &mbx.payload.u0.u1.sgl[0];
1359 sgl->pa_hi = upper_32_bits(pdma_mem->paddr);
1360 sgl->pa_lo = pdma_mem->paddr & 0xFFFFFFFF;
1361 sgl->length = payload_len;
1362
1363 /* post the command */
1364 rc = oce_mbox_post(sc, &mbx, NULL);
1365 if (rc) {
1366 device_printf(sc->dev, "Write FlashROM mbox post failed\n");
1367 } else {
1368 rc = fwcmd->hdr.u0.rsp.status;
1369 }
1370
1371 return rc;
1372
1373}
1374
1375int
1376oce_mbox_get_flashrom_crc(POCE_SOFTC sc, uint8_t *flash_crc,
1377 uint32_t offset, uint32_t optype)
--- 25 unchanged lines hidden (view full) ---
1403 fwcmd->data_offset = offset;
1404 fwcmd->data_buffer_size = 0x4;
1405
1406 mbx.u0.s.embedded = 1;
1407 mbx.payload_length = payload_len;
1408
1409 /* post the command */
1410 rc = oce_mbox_post(sc, &mbx, NULL);
1411 if (rc) {
1412 device_printf(sc->dev, "Read FlashROM CRC mbox post failed\n");
1413 } else {
1414 bcopy(fwcmd->data_buffer, flash_crc, 4);
1415 rc = fwcmd->hdr.u0.rsp.status;
1416 }
1417 return rc;
1418}
1419
1420int
1421oce_mbox_get_phy_info(POCE_SOFTC sc, struct oce_phy_info *phy_info)
1422{
1423
1424 struct oce_mbx mbx;
--- 10 unchanged lines hidden (view full) ---
1435 sizeof(struct mbx_common_phy_info),
1436 OCE_MBX_VER_V0);
1437
1438 mbx.u0.s.embedded = 1;
1439 mbx.payload_length = sizeof(struct mbx_common_phy_info);
1440
1441 /* now post the command */
1442 rc = oce_mbox_post(sc, &mbx, NULL);
1443 if (rc) {
1444 device_printf(sc->dev, "Read PHY info mbox post failed\n");
1445 } else {
1446 rc = fwcmd->hdr.u0.rsp.status;
1447 phy_info->phy_type = fwcmd->params.rsp.phy_info.phy_type;
1448 phy_info->interface_type =
1449 fwcmd->params.rsp.phy_info.interface_type;
1450 phy_info->auto_speeds_supported =
1451 fwcmd->params.rsp.phy_info.auto_speeds_supported;
1452 phy_info->fixed_speeds_supported =
1453 fwcmd->params.rsp.phy_info.fixed_speeds_supported;
1454 phy_info->misc_params =fwcmd->params.rsp.phy_info.misc_params;
1455
1456 }
1457 return rc;
1458
1459}
1460
1461
1462int
1463oce_mbox_lancer_write_flashrom(POCE_SOFTC sc, uint32_t data_size,
1464 uint32_t data_offset, POCE_DMA_MEM pdma_mem,
--- 29 unchanged lines hidden (view full) ---
1494 fwcmd->params.req.descriptor_count = 1;
1495 fwcmd->params.req.write_offset = data_offset;
1496 fwcmd->params.req.buffer_length = data_size;
1497 fwcmd->params.req.address_lower = pdma_mem->paddr & 0xFFFFFFFF;
1498 fwcmd->params.req.address_upper = upper_32_bits(pdma_mem->paddr);
1499
1500 /* post the command */
1501 rc = oce_mbox_post(sc, &mbx, NULL);
1502 if (rc) {
1503 device_printf(sc->dev,
1504 "Write Lancer FlashROM mbox post failed\n");
1505 } else {
1506 *written_data = fwcmd->params.rsp.actual_write_length;
1507 *additional_status = fwcmd->params.rsp.additional_status;
1508 rc = fwcmd->params.rsp.status;
1509 }
1510 return rc;
1511
1512}
1513
1514
1515
1516int
1517oce_mbox_create_rq(struct oce_rq *rq)
--- 30 unchanged lines hidden (view full) ---
1548 fwcmd->params.req.if_id = sc->if_id;
1549 fwcmd->params.req.max_frame_size = rq->cfg.mtu;
1550 fwcmd->params.req.is_rss_queue = rq->cfg.is_rss_queue;
1551
1552 mbx.u0.s.embedded = 1;
1553 mbx.payload_length = sizeof(struct mbx_create_nic_rq);
1554
1555 rc = oce_mbox_post(sc, &mbx, NULL);
1556 if (rc)
1557 goto error;
1558
1559 rq->rq_id = fwcmd->params.rsp.rq_id;
1560 rq->rss_cpuid = fwcmd->params.rsp.rss_cpuid;
1561
1562 return 0;
1563error:
1564 device_printf(sc->dev, "Mbox Create RQ failed\n");
1565 return rc;
1566
1567}
1568
1569
1570
1571int
1572oce_mbox_create_wq(struct oce_wq *wq)
--- 25 unchanged lines hidden (view full) ---
1598 fwcmd->params.req.wq_size = OCE_LOG2(wq->cfg.q_len) + 1;
1599 fwcmd->params.req.cq_id = wq->cq->cq_id;
1600 fwcmd->params.req.ulp_num = 1;
1601
1602 mbx.u0.s.embedded = 1;
1603 mbx.payload_length = sizeof(struct mbx_create_nic_wq);
1604
1605 rc = oce_mbox_post(sc, &mbx, NULL);
1606 if (rc)
1607 goto error;
1608
1609 wq->wq_id = LE_16(fwcmd->params.rsp.wq_id);
1610
1611 return 0;
1612error:
1613 device_printf(sc->dev, "Mbox Create WQ failed\n");
1614 return rc;
1615
1616}
1617
1618
1619
1620int
1621oce_mbox_create_eq(struct oce_eq *eq)
--- 22 unchanged lines hidden (view full) ---
1644 fwcmd->params.req.ctx.armed = 0;
1645 fwcmd->params.req.ctx.delay_mult = eq->eq_cfg.cur_eqd;
1646
1647
1648 mbx.u0.s.embedded = 1;
1649 mbx.payload_length = sizeof(struct mbx_create_common_eq);
1650
1651 rc = oce_mbox_post(sc, &mbx, NULL);
1652 if (rc)
1653 goto error;
1654
1655 eq->eq_id = LE_16(fwcmd->params.rsp.eq_id);
1656
1657 return 0;
1658error:
1659 device_printf(sc->dev, "Mbox Create EQ failed\n");
1660 return rc;
1661}
1662
1663
1664
1665int
1666oce_mbox_cq_create(struct oce_cq *cq, uint32_t ncoalesce, uint32_t is_eventable)
1667{
--- 53 unchanged lines hidden (view full) ---
1721 ctx->v0.armed = 0;
1722 ctx->v0.eq_id = cq->eq->eq_id;
1723 }
1724
1725 mbx.u0.s.embedded = 1;
1726 mbx.payload_length = sizeof(struct mbx_create_common_cq);
1727
1728 rc = oce_mbox_post(sc, &mbx, NULL);
1729 if (rc)
1730 goto error;
1731
1732 cq->cq_id = LE_16(fwcmd->params.rsp.cq_id);
1733
1734 return 0;
1735error:
1736 device_printf(sc->dev, "Mbox Create CQ failed\n");
1737 return rc;
1738
1739}