1/*-
2 * Copyright (C) 2012 Emulex
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
--- 23 unchanged lines hidden (view full) ---
32 * freebsd-drivers@emulex.com
33 *
34 * Emulex
35 * 3333 Susan Street
36 * Costa Mesa, CA 92626
37 */
38
39
40
41/* $FreeBSD: head/sys/dev/oce/oce_mbox.c 247880 2013-03-06 09:53:38Z delphij $ */
42
43
44#include "oce_if.h"
45extern uint32_t sfp_vpd_dump_buffer[TRANSCEIVER_DATA_NUM_ELE];
46
47/**
48 * @brief Reset (firmware) common function
49 * @param sc software handle to the device
50 * @returns 0 on success, ETIMEDOUT on failure
51 */
52int
53oce_reset_fun(POCE_SOFTC sc)
54{
--- 218 unchanged lines hidden (view full) ---
273 sizeof(struct mbx_get_common_fw_version),
274 OCE_MBX_VER_V0);
275
276 mbx.u0.s.embedded = 1;
277 mbx.payload_length = sizeof(struct mbx_get_common_fw_version);
278 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
279
280 ret = oce_mbox_post(sc, &mbx, NULL);
281 if (!ret)
282 ret = fwcmd->hdr.u0.rsp.status;
283 if (ret) {
284 device_printf(sc->dev,"%s failed - cmd status: %d\n",
285 __FUNCTION__, ret);
286 goto error;
287 }
288
289 bcopy(fwcmd->params.rsp.fw_ver_str, sc->fw_version, 32);
290error:
291 return ret;
292}
293
294
295/**
296 * @brief Firmware will send gracious notifications during
297 * attach only after sending first mcc commnad. We
298 * use MCC queue only for getting async and mailbox
299 * for sending cmds. So to get gracious notifications
--- 130 unchanged lines hidden (view full) ---
430
431 fwcmd->params.req.type = type;
432
433 mbx.u0.s.embedded = 1;
434 mbx.payload_length = sizeof(struct mbx_query_common_iface_mac);
435 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
436
437 ret = oce_mbox_post(sc, &mbx, NULL);
438 if (!ret)
439 ret = fwcmd->hdr.u0.rsp.status;
440 if (ret) {
441 device_printf(sc->dev,"%s failed - cmd status: %d\n",
442 __FUNCTION__, ret);
443 goto error;
444 }
445
446 /* copy the mac addres in the output parameter */
447 mac->size_of_struct = fwcmd->params.rsp.mac.size_of_struct;
448 bcopy(&fwcmd->params.rsp.mac.mac_addr[0], &mac->mac_addr[0],
449 mac->size_of_struct);
450error:
451 return ret;
452}
453
454/**
455 * @brief Function to query the fw attributes from the hw
456 * @param sc software handle to the device
457 * @returns 0 on success, EIO on failure
458 */
459int
--- 13 unchanged lines hidden (view full) ---
473 sizeof(struct mbx_common_query_fw_config),
474 OCE_MBX_VER_V0);
475
476 mbx.u0.s.embedded = 1;
477 mbx.payload_length = sizeof(struct mbx_common_query_fw_config);
478 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
479
480 ret = oce_mbox_post(sc, &mbx, NULL);
481 if (!ret)
482 ret = fwcmd->hdr.u0.rsp.status;
483 if (ret) {
484 device_printf(sc->dev,"%s failed - cmd status: %d\n",
485 __FUNCTION__, ret);
486 goto error;
487 }
488
489 DW_SWAP(u32ptr(fwcmd), sizeof(struct mbx_common_query_fw_config));
490
491 sc->config_number = fwcmd->params.rsp.config_number;
492 sc->asic_revision = fwcmd->params.rsp.asic_revision;
493 sc->port_id = fwcmd->params.rsp.port_id;
494 sc->function_mode = fwcmd->params.rsp.function_mode;
495 sc->function_caps = fwcmd->params.rsp.function_caps;
496
497 if (fwcmd->params.rsp.ulp[0].ulp_mode & ULP_NIC_MODE) {
498 sc->max_tx_rings = fwcmd->params.rsp.ulp[0].nic_wq_tot;
499 sc->max_rx_rings = fwcmd->params.rsp.ulp[0].lro_rqid_tot;
500 } else {
501 sc->max_tx_rings = fwcmd->params.rsp.ulp[1].nic_wq_tot;
502 sc->max_rx_rings = fwcmd->params.rsp.ulp[1].lro_rqid_tot;
503 }
504
505error:
506 return ret;
507
508}
509
510/**
511 *
512 * @brief function to create a device interface
513 * @param sc software handle to the device
514 * @param cap_flags capability flags
--- 38 unchanged lines hidden (view full) ---
553 fwcmd->params.req.mac_invalid = 1;
554 }
555
556 mbx.u0.s.embedded = 1;
557 mbx.payload_length = sizeof(struct mbx_create_common_iface);
558 DW_SWAP(u32ptr(&mbx), OCE_BMBX_RHDR_SZ);
559
560 rc = oce_mbox_post(sc, &mbx, NULL);
561 if (!rc)
562 rc = fwcmd->hdr.u0.rsp.status;
563 if (rc) {
564 device_printf(sc->dev,"%s failed - cmd status: %d\n",
565 __FUNCTION__, rc);
566 goto error;
567 }
568
569 *if_id = LE_32(fwcmd->params.rsp.if_id);
570
571 if (mac_addr != NULL)
572 sc->pmac_id = LE_32(fwcmd->params.rsp.pmac_id);
573error:
574 return rc;
575}
576
577/**
578 * @brief Function to delete an interface
579 * @param sc software handle to the device
580 * @param if_id ID of the interface to delete
581 * @returns 0 on success, EIO on failure
582 */
--- 16 unchanged lines hidden (view full) ---
599
600 fwcmd->params.req.if_id = if_id;
601
602 mbx.u0.s.embedded = 1;
603 mbx.payload_length = sizeof(struct mbx_destroy_common_iface);
604 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
605
606 rc = oce_mbox_post(sc, &mbx, NULL);
607 if (!rc)
608 rc = fwcmd->hdr.u0.rsp.status;
609 if (rc)
610 device_printf(sc->dev,"%s failed - cmd status: %d\n",
611 __FUNCTION__, rc);
612 return rc;
613}
614
615/**
616 * @brief Function to send the mbx command to configure vlan
617 * @param sc software handle to the device
618 * @param if_id interface identifier index
619 * @param vtag_arr array of vlan tags
--- 31 unchanged lines hidden (view full) ---
651 bcopy(vtag_arr, fwcmd->params.req.tags.normal_vlans,
652 vtag_cnt * sizeof(struct normal_vlan));
653 }
654 mbx.u0.s.embedded = 1;
655 mbx.payload_length = sizeof(struct mbx_common_config_vlan);
656 DW_SWAP(u32ptr(&mbx), (OCE_BMBX_RHDR_SZ + mbx.payload_length));
657
658 rc = oce_mbox_post(sc, &mbx, NULL);
659 if (!rc)
660 rc = fwcmd->hdr.u0.rsp.status;
661 if (rc)
662 device_printf(sc->dev,"%s failed - cmd status: %d\n",
663 __FUNCTION__, rc);
664 return 0;
665
666}
667
668/**
669 * @brief Function to set flow control capability in the hardware
670 * @param sc software handle to the device
671 * @param flow_control flow control flags to set
672 * @returns 0 on success, EIO on failure
673 */
--- 20 unchanged lines hidden (view full) ---
694 if (flow_control & OCE_FC_RX)
695 fwcmd->rx_flow_control = 1;
696
697 mbx.u0.s.embedded = 1;
698 mbx.payload_length = sizeof(struct mbx_common_get_set_flow_control);
699 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
700
701 rc = oce_mbox_post(sc, &mbx, NULL);
702 if (!rc)
703 rc = fwcmd->hdr.u0.rsp.status;
704 if (rc)
705 device_printf(sc->dev,"%s failed - cmd status: %d\n",
706 __FUNCTION__, rc);
707 return rc;
708}
709
710/**
711 * @brief Initialize the RSS CPU indirection table
712 *
713 * The table is used to choose the queue to place the incomming packets.
714 * Incomming packets are hashed. The lowest bits in the hash result
--- 42 unchanged lines hidden (view full) ---
757 */
758int
759oce_config_nic_rss(POCE_SOFTC sc, uint32_t if_id, uint16_t enable_rss)
760{
761 int rc;
762 struct oce_mbx mbx;
763 struct mbx_config_nic_rss *fwcmd =
764 (struct mbx_config_nic_rss *)&mbx.payload;
765 int version;
766
767 bzero(&mbx, sizeof(struct oce_mbx));
768
769 if (IS_XE201(sc)) {
770 version = OCE_MBX_VER_V1;
771 fwcmd->params.req.enable_rss = RSS_ENABLE_UDP_IPV4 |
772 RSS_ENABLE_UDP_IPV6;
773 } else
774 version = OCE_MBX_VER_V0;
775
776 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
777 MBX_SUBSYSTEM_NIC,
778 NIC_CONFIG_RSS,
779 MBX_TIMEOUT_SEC,
780 sizeof(struct mbx_config_nic_rss),
781 version);
782 if (enable_rss)
783 fwcmd->params.req.enable_rss |= (RSS_ENABLE_IPV4 |
784 RSS_ENABLE_TCP_IPV4 |
785 RSS_ENABLE_IPV6 |
786 RSS_ENABLE_TCP_IPV6);
787 fwcmd->params.req.flush = OCE_FLUSH;
788 fwcmd->params.req.if_id = LE_32(if_id);
789
790 srandom(arc4random()); /* random entropy seed */
791 read_random(fwcmd->params.req.hash, sizeof(fwcmd->params.req.hash));
792
793 rc = oce_rss_itbl_init(sc, fwcmd);
794 if (rc == 0) {
795 mbx.u0.s.embedded = 1;
796 mbx.payload_length = sizeof(struct mbx_config_nic_rss);
797 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
798
799 rc = oce_mbox_post(sc, &mbx, NULL);
800 if (!rc)
801 rc = fwcmd->hdr.u0.rsp.status;
802 if (rc)
803 device_printf(sc->dev,"%s failed - cmd status: %d\n",
804 __FUNCTION__, rc);
805 }
806 return rc;
807}
808
809/**
810 * @brief RXF function to enable/disable device promiscuous mode
811 * @param sc software handle to the device
812 * @param enable enable/disable flag
813 * @returns 0 on success, EIO on failure
--- 62 unchanged lines hidden (view full) ---
876 mbx.u0.s.sge_count = 1;
877 mbx.payload.u0.u1.sgl[0].pa_lo = ADDR_LO(sgl->paddr);
878 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(sgl->paddr);
879 mbx.payload.u0.u1.sgl[0].length = mbx_sz;
880 mbx.payload_length = mbx_sz;
881 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
882
883 rc = oce_mbox_post(sc, &mbx, NULL);
884 if (!rc)
885 rc = fwcmd->hdr.u0.rsp.status;
886 if (rc)
887 device_printf(sc->dev,"%s failed - cmd status: %d\n",
888 __FUNCTION__, rc);
889 return 0;
890}
891
892/**
893 * @brief Function to query the link status from the hardware
894 * @param sc software handle to the device
895 * @param[out] link pointer to the structure returning link attributes
896 * @returns 0 on success, EIO on failure
897 */
898int
899oce_get_link_status(POCE_SOFTC sc, struct link_status *link)
900{
901 struct oce_mbx mbx;
902 struct mbx_query_common_link_config *fwcmd;
903 int rc = 0, version;
904
905 bzero(&mbx, sizeof(struct oce_mbx));
906
907 IS_XE201(sc) ? (version = OCE_MBX_VER_V1) : (version = OCE_MBX_VER_V0);
908
909 fwcmd = (struct mbx_query_common_link_config *)&mbx.payload;
910 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
911 MBX_SUBSYSTEM_COMMON,
912 OPCODE_COMMON_QUERY_LINK_CONFIG,
913 MBX_TIMEOUT_SEC,
914 sizeof(struct mbx_query_common_link_config),
915 version);
916
917 mbx.u0.s.embedded = 1;
918 mbx.payload_length = sizeof(struct mbx_query_common_link_config);
919 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
920
921 rc = oce_mbox_post(sc, &mbx, NULL);
922
923 if (!rc)
924 rc = fwcmd->hdr.u0.rsp.status;
925 if (rc) {
926 device_printf(sc->dev,"%s failed - cmd status: %d\n",
927 __FUNCTION__, rc);
928 goto error;
929 }
930 /* interpret response */
931 bcopy(&fwcmd->params.rsp, link, sizeof(struct link_status));
932 link->logical_link_status = LE_32(link->logical_link_status);
933 link->qos_link_speed = LE_16(link->qos_link_speed);
934error:
935 return rc;
936}
937
938
939
940int
941oce_mbox_get_nic_stats_v0(POCE_SOFTC sc, POCE_DMA_MEM pstats_dma_mem)
942{
--- 25 unchanged lines hidden (view full) ---
968 mbx.payload_length = sizeof(struct mbx_get_nic_stats_v0);
969
970 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
971
972 rc = oce_mbox_post(sc, &mbx, NULL);
973
974 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
975
976 if (!rc)
977 rc = fwcmd->hdr.u0.rsp.status;
978 if (rc)
979 device_printf(sc->dev,"%s failed - cmd status: %d\n",
980 __FUNCTION__, rc);
981 return rc;
982}
983
984
985
986/**
987 * @brief Function to get NIC statistics
988 * @param sc software handle to the device
--- 29 unchanged lines hidden (view full) ---
1018 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(pstats_dma_mem->paddr);
1019 mbx.payload.u0.u1.sgl[0].length = sizeof(struct mbx_get_nic_stats);
1020
1021 mbx.payload_length = sizeof(struct mbx_get_nic_stats);
1022 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1023
1024 rc = oce_mbox_post(sc, &mbx, NULL);
1025 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
1026 if (!rc)
1027 rc = fwcmd->hdr.u0.rsp.status;
1028 if (rc)
1029 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1030 __FUNCTION__, rc);
1031 return rc;
1032}
1033
1034
1035/**
1036 * @brief Function to get pport (physical port) statistics
1037 * @param sc software handle to the device
1038 * @param *stats pointer to where to store statistics
--- 15 unchanged lines hidden (view full) ---
1054 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
1055 MBX_SUBSYSTEM_NIC,
1056 NIC_GET_PPORT_STATS,
1057 MBX_TIMEOUT_SEC,
1058 sizeof(struct mbx_get_pport_stats),
1059 OCE_MBX_VER_V0);
1060
1061 fwcmd->params.req.reset_stats = reset_stats;
1062 fwcmd->params.req.port_number = sc->port_id;
1063
1064 mbx.u0.s.embedded = 0; /* stats too large for embedded mbx rsp */
1065 mbx.u0.s.sge_count = 1; /* using scatter gather instead */
1066
1067 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_PREWRITE);
1068 mbx.payload.u0.u1.sgl[0].pa_lo = ADDR_LO(pstats_dma_mem->paddr);
1069 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(pstats_dma_mem->paddr);
1070 mbx.payload.u0.u1.sgl[0].length = sizeof(struct mbx_get_pport_stats);
1071
1072 mbx.payload_length = sizeof(struct mbx_get_pport_stats);
1073 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1074
1075 rc = oce_mbox_post(sc, &mbx, NULL);
1076 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
1077
1078 if (!rc)
1079 rc = fwcmd->hdr.u0.rsp.status;
1080 if (rc)
1081 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1082 __FUNCTION__, rc);
1083 return rc;
1084}
1085
1086
1087/**
1088 * @brief Function to get vport (virtual port) statistics
1089 * @param sc software handle to the device
1090 * @param *stats pointer to where to store statistics
--- 32 unchanged lines hidden (view full) ---
1123 mbx.payload.u0.u1.sgl[0].length = sizeof(struct mbx_get_vport_stats);
1124
1125 mbx.payload_length = sizeof(struct mbx_get_vport_stats);
1126 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1127
1128 rc = oce_mbox_post(sc, &mbx, NULL);
1129 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
1130
1131 if (!rc)
1132 rc = fwcmd->hdr.u0.rsp.status;
1133 if (rc)
1134 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1135 __FUNCTION__, rc);
1136 return rc;
1137}
1138
1139
1140/**
1141 * @brief Function to update the muticast filter with
1142 * values in dma_mem
1143 * @param sc software handle to the device
--- 24 unchanged lines hidden (view full) ---
1168 sgl = &mbx.payload.u0.u1.sgl[0];
1169 sgl->pa_hi = htole32(upper_32_bits(pdma_mem->paddr));
1170 sgl->pa_lo = htole32((pdma_mem->paddr) & 0xFFFFFFFF);
1171 sgl->length = htole32(mbx.payload_length);
1172
1173 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1174
1175 rc = oce_mbox_post(sc, &mbx, NULL);
1176 if (!rc)
1177 rc = req->hdr.u0.rsp.status;
1178 if (rc)
1179 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1180 __FUNCTION__, rc);
1181 return rc;
1182}
1183
1184
1185/**
1186 * @brief Function to send passthrough Ioctls
1187 * @param sc software handle to the device
1188 * @param dma_mem pointer to dma memory region
--- 44 unchanged lines hidden (view full) ---
1233
1234 fwcmd->params.req.if_id = (uint16_t) if_id;
1235 bcopy(mac_addr, fwcmd->params.req.mac_address, 6);
1236
1237 mbx.u0.s.embedded = 1;
1238 mbx.payload_length = sizeof(struct mbx_add_common_iface_mac);
1239 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1240 rc = oce_mbox_post(sc, &mbx, NULL);
1241 if (!rc)
1242 rc = fwcmd->hdr.u0.rsp.status;
1243 if (rc) {
1244 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1245 __FUNCTION__, rc);
1246 goto error;
1247 }
1248 *pmac_id = fwcmd->params.rsp.pmac_id;
1249error:
1250 return rc;
1251}
1252
1253
1254int
1255oce_mbox_macaddr_del(POCE_SOFTC sc, uint32_t if_id, uint32_t pmac_id)
1256{
1257 struct oce_mbx mbx;
--- 13 unchanged lines hidden (view full) ---
1271 fwcmd->params.req.if_id = (uint16_t)if_id;
1272 fwcmd->params.req.pmac_id = pmac_id;
1273
1274 mbx.u0.s.embedded = 1;
1275 mbx.payload_length = sizeof(struct mbx_del_common_iface_mac);
1276 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1277
1278 rc = oce_mbox_post(sc, &mbx, NULL);
1279 if (!rc)
1280 rc = fwcmd->hdr.u0.rsp.status;
1281 if (rc)
1282 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1283 __FUNCTION__, rc);
1284 return rc;
1285}
1286
1287
1288
1289int
1290oce_mbox_check_native_mode(POCE_SOFTC sc)
1291{
--- 16 unchanged lines hidden (view full) ---
1308
1309 fwcmd->params.req.capability_flags = CAP_BE3_NATIVE_ERX_API;
1310
1311 mbx.u0.s.embedded = 1;
1312 mbx.payload_length = sizeof(struct mbx_common_set_function_cap);
1313 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1314
1315 rc = oce_mbox_post(sc, &mbx, NULL);
1316 if (!rc)
1317 rc = fwcmd->hdr.u0.rsp.status;
1318 if (rc) {
1319 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1320 __FUNCTION__, rc);
1321 goto error;
1322 }
1323 sc->be3_native = fwcmd->params.rsp.capability_flags
1324 & CAP_BE3_NATIVE_ERX_API;
1325
1326error:
1327 return 0;
1328}
1329
1330
1331
1332int
1333oce_mbox_cmd_set_loopback(POCE_SOFTC sc, uint8_t port_num,
1334 uint8_t loopback_type, uint8_t enable)
--- 18 unchanged lines hidden (view full) ---
1353 fwcmd->params.req.loopback_type = loopback_type;
1354 fwcmd->params.req.loopback_state = enable;
1355
1356 mbx.u0.s.embedded = 1;
1357 mbx.payload_length = sizeof(struct mbx_lowlevel_set_loopback_mode);
1358 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1359
1360 rc = oce_mbox_post(sc, &mbx, NULL);
1361 if (!rc)
1362 rc = fwcmd->hdr.u0.rsp.status;
1363 if (rc)
1364 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1365 __FUNCTION__, rc);
1366
1367 return rc;
1368
1369}
1370
1371int
1372oce_mbox_cmd_test_loopback(POCE_SOFTC sc, uint32_t port_num,
1373 uint32_t loopback_type, uint32_t pkt_size, uint32_t num_pkts,
--- 22 unchanged lines hidden (view full) ---
1396 fwcmd->params.req.num_pkts = num_pkts;
1397 fwcmd->params.req.loopback_type = loopback_type;
1398
1399 mbx.u0.s.embedded = 1;
1400 mbx.payload_length = sizeof(struct mbx_lowlevel_test_loopback_mode);
1401 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1402
1403 rc = oce_mbox_post(sc, &mbx, NULL);
1404 if (!rc)
1405 rc = fwcmd->hdr.u0.rsp.status;
1406 if (rc)
1407 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1408 __FUNCTION__, rc);
1409
1410 return rc;
1411}
1412
1413int
1414oce_mbox_write_flashrom(POCE_SOFTC sc, uint32_t optype,uint32_t opcode,
1415 POCE_DMA_MEM pdma_mem, uint32_t num_bytes)
1416{
1417
1418 struct oce_mbx mbx;
--- 22 unchanged lines hidden (view full) ---
1441
1442 sgl = &mbx.payload.u0.u1.sgl[0];
1443 sgl->pa_hi = upper_32_bits(pdma_mem->paddr);
1444 sgl->pa_lo = pdma_mem->paddr & 0xFFFFFFFF;
1445 sgl->length = payload_len;
1446
1447 /* post the command */
1448 rc = oce_mbox_post(sc, &mbx, NULL);
1449 if (!rc)
1450 rc = fwcmd->hdr.u0.rsp.status;
1451 if (rc)
1452 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1453 __FUNCTION__, rc);
1454
1455 return rc;
1456
1457}
1458
1459int
1460oce_mbox_get_flashrom_crc(POCE_SOFTC sc, uint8_t *flash_crc,
1461 uint32_t offset, uint32_t optype)
--- 25 unchanged lines hidden (view full) ---
1487 fwcmd->data_offset = offset;
1488 fwcmd->data_buffer_size = 0x4;
1489
1490 mbx.u0.s.embedded = 1;
1491 mbx.payload_length = payload_len;
1492
1493 /* post the command */
1494 rc = oce_mbox_post(sc, &mbx, NULL);
1495 if (!rc)
1496 rc = fwcmd->hdr.u0.rsp.status;
1497 if (rc) {
1498 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1499 __FUNCTION__, rc);
1500 goto error;
1501 }
1502 bcopy(fwcmd->data_buffer, flash_crc, 4);
1503error:
1504 return rc;
1505}
1506
1507int
1508oce_mbox_get_phy_info(POCE_SOFTC sc, struct oce_phy_info *phy_info)
1509{
1510
1511 struct oce_mbx mbx;
--- 10 unchanged lines hidden (view full) ---
1522 sizeof(struct mbx_common_phy_info),
1523 OCE_MBX_VER_V0);
1524
1525 mbx.u0.s.embedded = 1;
1526 mbx.payload_length = sizeof(struct mbx_common_phy_info);
1527
1528 /* now post the command */
1529 rc = oce_mbox_post(sc, &mbx, NULL);
1530 if (!rc)
1531 rc = fwcmd->hdr.u0.rsp.status;
1532 if (rc) {
1533 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1534 __FUNCTION__, rc);
1535 goto error;
1536 }
1537 phy_info->phy_type = fwcmd->params.rsp.phy_info.phy_type;
1538 phy_info->interface_type =
1539 fwcmd->params.rsp.phy_info.interface_type;
1540 phy_info->auto_speeds_supported =
1541 fwcmd->params.rsp.phy_info.auto_speeds_supported;
1542 phy_info->fixed_speeds_supported =
1543 fwcmd->params.rsp.phy_info.fixed_speeds_supported;
1544 phy_info->misc_params =fwcmd->params.rsp.phy_info.misc_params;
1545error:
1546 return rc;
1547
1548}
1549
1550
1551int
1552oce_mbox_lancer_write_flashrom(POCE_SOFTC sc, uint32_t data_size,
1553 uint32_t data_offset, POCE_DMA_MEM pdma_mem,
--- 29 unchanged lines hidden (view full) ---
1583 fwcmd->params.req.descriptor_count = 1;
1584 fwcmd->params.req.write_offset = data_offset;
1585 fwcmd->params.req.buffer_length = data_size;
1586 fwcmd->params.req.address_lower = pdma_mem->paddr & 0xFFFFFFFF;
1587 fwcmd->params.req.address_upper = upper_32_bits(pdma_mem->paddr);
1588
1589 /* post the command */
1590 rc = oce_mbox_post(sc, &mbx, NULL);
1591 if (!rc)
1592 rc = fwcmd->params.rsp.status;
1593 if (rc) {
1594 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1595 __FUNCTION__, rc);
1596 goto error;
1597 }
1598 *written_data = fwcmd->params.rsp.actual_write_length;
1599 *additional_status = fwcmd->params.rsp.additional_status;
1600error:
1601 return rc;
1602
1603}
1604
1605
1606
1607int
1608oce_mbox_create_rq(struct oce_rq *rq)
--- 30 unchanged lines hidden (view full) ---
1639 fwcmd->params.req.if_id = sc->if_id;
1640 fwcmd->params.req.max_frame_size = rq->cfg.mtu;
1641 fwcmd->params.req.is_rss_queue = rq->cfg.is_rss_queue;
1642
1643 mbx.u0.s.embedded = 1;
1644 mbx.payload_length = sizeof(struct mbx_create_nic_rq);
1645
1646 rc = oce_mbox_post(sc, &mbx, NULL);
1647 if (!rc)
1648 rc = fwcmd->hdr.u0.rsp.status;
1649 if (rc) {
1650 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1651 __FUNCTION__, rc);
1652 goto error;
1653 }
1654 rq->rq_id = fwcmd->params.rsp.rq_id;
1655 rq->rss_cpuid = fwcmd->params.rsp.rss_cpuid;
1656error:
1657 return rc;
1658
1659}
1660
1661
1662
1663int
1664oce_mbox_create_wq(struct oce_wq *wq)
--- 25 unchanged lines hidden (view full) ---
1690 fwcmd->params.req.wq_size = OCE_LOG2(wq->cfg.q_len) + 1;
1691 fwcmd->params.req.cq_id = wq->cq->cq_id;
1692 fwcmd->params.req.ulp_num = 1;
1693
1694 mbx.u0.s.embedded = 1;
1695 mbx.payload_length = sizeof(struct mbx_create_nic_wq);
1696
1697 rc = oce_mbox_post(sc, &mbx, NULL);
1698 if (!rc)
1699 rc = fwcmd->hdr.u0.rsp.status;
1700 if (rc) {
1701 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1702 __FUNCTION__, rc);
1703 goto error;
1704 }
1705 wq->wq_id = LE_16(fwcmd->params.rsp.wq_id);
1706error:
1707 return rc;
1708
1709}
1710
1711
1712
1713int
1714oce_mbox_create_eq(struct oce_eq *eq)
--- 22 unchanged lines hidden (view full) ---
1737 fwcmd->params.req.ctx.armed = 0;
1738 fwcmd->params.req.ctx.delay_mult = eq->eq_cfg.cur_eqd;
1739
1740
1741 mbx.u0.s.embedded = 1;
1742 mbx.payload_length = sizeof(struct mbx_create_common_eq);
1743
1744 rc = oce_mbox_post(sc, &mbx, NULL);
1745 if (!rc)
1746 rc = fwcmd->hdr.u0.rsp.status;
1747 if (rc) {
1748 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1749 __FUNCTION__, rc);
1750 goto error;
1751 }
1752 eq->eq_id = LE_16(fwcmd->params.rsp.eq_id);
1753error:
1754 return rc;
1755}
1756
1757
1758
1759int
1760oce_mbox_cq_create(struct oce_cq *cq, uint32_t ncoalesce, uint32_t is_eventable)
1761{
--- 53 unchanged lines hidden (view full) ---
1815 ctx->v0.armed = 0;
1816 ctx->v0.eq_id = cq->eq->eq_id;
1817 }
1818
1819 mbx.u0.s.embedded = 1;
1820 mbx.payload_length = sizeof(struct mbx_create_common_cq);
1821
1822 rc = oce_mbox_post(sc, &mbx, NULL);
1823 if (!rc)
1824 rc = fwcmd->hdr.u0.rsp.status;
1825 if (rc) {
1826 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1827 __FUNCTION__, rc);
1828 goto error;
1829 }
1830 cq->cq_id = LE_16(fwcmd->params.rsp.cq_id);
1831error:
1832 return rc;
1833
1834}
1835
1836int
1837oce_mbox_read_transrecv_data(POCE_SOFTC sc, uint32_t page_num)
1838{
1839 int rc = 0;
1840 struct oce_mbx mbx;
1841 struct mbx_read_common_transrecv_data *fwcmd;
1842 struct oce_mq_sge *sgl;
1843 OCE_DMA_MEM dma;
1844
1845 /* Allocate DMA mem*/
1846 if (oce_dma_alloc(sc, sizeof(struct mbx_read_common_transrecv_data),
1847 &dma, 0))
1848 return ENOMEM;
1849
1850 fwcmd = OCE_DMAPTR(&dma, struct mbx_read_common_transrecv_data);
1851 bzero(fwcmd, sizeof(struct mbx_read_common_transrecv_data));
1852
1853 bzero(&mbx, sizeof(struct oce_mbx));
1854 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
1855 MBX_SUBSYSTEM_COMMON,
1856 OPCODE_COMMON_READ_TRANSRECEIVER_DATA,
1857 MBX_TIMEOUT_SEC,
1858 sizeof(struct mbx_read_common_transrecv_data),
1859 OCE_MBX_VER_V0);
1860
1861 /* fill rest of mbx */
1862 mbx.u0.s.embedded = 0;
1863 mbx.payload_length = sizeof(struct mbx_read_common_transrecv_data);
1864 mbx.u0.s.sge_count = 1;
1865 sgl = &mbx.payload.u0.u1.sgl[0];
1866 sgl->pa_hi = htole32(upper_32_bits(dma.paddr));
1867 sgl->pa_lo = htole32((dma.paddr) & 0xFFFFFFFF);
1868 sgl->length = htole32(mbx.payload_length);
1869 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1870
1871 fwcmd->params.req.port = LE_32(sc->port_id);
1872 fwcmd->params.req.page_num = LE_32(page_num);
1873
1874 /* command post */
1875 rc = oce_mbox_post(sc, &mbx, NULL);
1876 if (!rc)
1877 rc = fwcmd->hdr.u0.rsp.status;
1878 if (rc) {
1879 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1880 __FUNCTION__, rc);
1881 goto error;
1882 }
1883 if(fwcmd->params.rsp.page_num == PAGE_NUM_A0)
1884 {
1885 bcopy((char *)fwcmd->params.rsp.page_data,
1886 (char *)&sfp_vpd_dump_buffer[0],
1887 TRANSCEIVER_A0_SIZE);
1888 }
1889
1890 if(fwcmd->params.rsp.page_num == PAGE_NUM_A2)
1891 {
1892 bcopy((char *)fwcmd->params.rsp.page_data,
1893 (char *)&sfp_vpd_dump_buffer[32],
1894 TRANSCEIVER_A2_SIZE);
1895 }
1896error:
1897 return rc;
1898}
1899
1900void
1901oce_mbox_eqd_modify_periodic(POCE_SOFTC sc, struct oce_set_eqd *set_eqd,
1902 int num)
1903{
1904 struct oce_mbx mbx;
1905 struct mbx_modify_common_eq_delay *fwcmd;
1906 int rc = 0;
1907 int i = 0;
1908
1909 bzero(&mbx, sizeof(struct oce_mbx));
1910
1911 /* Initialize MODIFY_EQ_DELAY ioctl header */
1912 fwcmd = (struct mbx_modify_common_eq_delay *)&mbx.payload;
1913 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
1914 MBX_SUBSYSTEM_COMMON,
1915 OPCODE_COMMON_MODIFY_EQ_DELAY,
1916 MBX_TIMEOUT_SEC,
1917 sizeof(struct mbx_modify_common_eq_delay),
1918 OCE_MBX_VER_V0);
1919 /* fill rest of mbx */
1920 mbx.u0.s.embedded = 1;
1921 mbx.payload_length = sizeof(struct mbx_modify_common_eq_delay);
1922 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1923
1924 fwcmd->params.req.num_eq = num;
1925 for (i = 0; i < num; i++) {
1926 fwcmd->params.req.delay[i].eq_id =
1927 htole32(set_eqd[i].eq_id);
1928 fwcmd->params.req.delay[i].phase = 0;
1929 fwcmd->params.req.delay[i].dm =
1930 htole32(set_eqd[i].delay_multiplier);
1931 }
1932
1933
1934 /* command post */
1935 rc = oce_mbox_post(sc, &mbx, NULL);
1936
1937 if (!rc)
1938 rc = fwcmd->hdr.u0.rsp.status;
1939 if (rc)
1940 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1941 __FUNCTION__, rc);
1942}
1943
1944
2 * Copyright (C) 2012 Emulex
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
--- 23 unchanged lines hidden (view full) ---
32 * freebsd-drivers@emulex.com
33 *
34 * Emulex
35 * 3333 Susan Street
36 * Costa Mesa, CA 92626
37 */
38
39
40
41/* $FreeBSD: head/sys/dev/oce/oce_mbox.c 247880 2013-03-06 09:53:38Z delphij $ */
42
43
44#include "oce_if.h"
45extern uint32_t sfp_vpd_dump_buffer[TRANSCEIVER_DATA_NUM_ELE];
46
47/**
48 * @brief Reset (firmware) common function
49 * @param sc software handle to the device
50 * @returns 0 on success, ETIMEDOUT on failure
51 */
52int
53oce_reset_fun(POCE_SOFTC sc)
54{
--- 218 unchanged lines hidden (view full) ---
273 sizeof(struct mbx_get_common_fw_version),
274 OCE_MBX_VER_V0);
275
276 mbx.u0.s.embedded = 1;
277 mbx.payload_length = sizeof(struct mbx_get_common_fw_version);
278 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
279
280 ret = oce_mbox_post(sc, &mbx, NULL);
281 if (!ret)
282 ret = fwcmd->hdr.u0.rsp.status;
283 if (ret) {
284 device_printf(sc->dev,"%s failed - cmd status: %d\n",
285 __FUNCTION__, ret);
286 goto error;
287 }
288
289 bcopy(fwcmd->params.rsp.fw_ver_str, sc->fw_version, 32);
290error:
291 return ret;
292}
293
294
295/**
296 * @brief Firmware will send gracious notifications during
297 * attach only after sending first mcc commnad. We
298 * use MCC queue only for getting async and mailbox
299 * for sending cmds. So to get gracious notifications
--- 130 unchanged lines hidden (view full) ---
430
431 fwcmd->params.req.type = type;
432
433 mbx.u0.s.embedded = 1;
434 mbx.payload_length = sizeof(struct mbx_query_common_iface_mac);
435 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
436
437 ret = oce_mbox_post(sc, &mbx, NULL);
438 if (!ret)
439 ret = fwcmd->hdr.u0.rsp.status;
440 if (ret) {
441 device_printf(sc->dev,"%s failed - cmd status: %d\n",
442 __FUNCTION__, ret);
443 goto error;
444 }
445
446 /* copy the mac addres in the output parameter */
447 mac->size_of_struct = fwcmd->params.rsp.mac.size_of_struct;
448 bcopy(&fwcmd->params.rsp.mac.mac_addr[0], &mac->mac_addr[0],
449 mac->size_of_struct);
450error:
451 return ret;
452}
453
454/**
455 * @brief Function to query the fw attributes from the hw
456 * @param sc software handle to the device
457 * @returns 0 on success, EIO on failure
458 */
459int
--- 13 unchanged lines hidden (view full) ---
473 sizeof(struct mbx_common_query_fw_config),
474 OCE_MBX_VER_V0);
475
476 mbx.u0.s.embedded = 1;
477 mbx.payload_length = sizeof(struct mbx_common_query_fw_config);
478 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
479
480 ret = oce_mbox_post(sc, &mbx, NULL);
481 if (!ret)
482 ret = fwcmd->hdr.u0.rsp.status;
483 if (ret) {
484 device_printf(sc->dev,"%s failed - cmd status: %d\n",
485 __FUNCTION__, ret);
486 goto error;
487 }
488
489 DW_SWAP(u32ptr(fwcmd), sizeof(struct mbx_common_query_fw_config));
490
491 sc->config_number = fwcmd->params.rsp.config_number;
492 sc->asic_revision = fwcmd->params.rsp.asic_revision;
493 sc->port_id = fwcmd->params.rsp.port_id;
494 sc->function_mode = fwcmd->params.rsp.function_mode;
495 sc->function_caps = fwcmd->params.rsp.function_caps;
496
497 if (fwcmd->params.rsp.ulp[0].ulp_mode & ULP_NIC_MODE) {
498 sc->max_tx_rings = fwcmd->params.rsp.ulp[0].nic_wq_tot;
499 sc->max_rx_rings = fwcmd->params.rsp.ulp[0].lro_rqid_tot;
500 } else {
501 sc->max_tx_rings = fwcmd->params.rsp.ulp[1].nic_wq_tot;
502 sc->max_rx_rings = fwcmd->params.rsp.ulp[1].lro_rqid_tot;
503 }
504
505error:
506 return ret;
507
508}
509
510/**
511 *
512 * @brief function to create a device interface
513 * @param sc software handle to the device
514 * @param cap_flags capability flags
--- 38 unchanged lines hidden (view full) ---
553 fwcmd->params.req.mac_invalid = 1;
554 }
555
556 mbx.u0.s.embedded = 1;
557 mbx.payload_length = sizeof(struct mbx_create_common_iface);
558 DW_SWAP(u32ptr(&mbx), OCE_BMBX_RHDR_SZ);
559
560 rc = oce_mbox_post(sc, &mbx, NULL);
561 if (!rc)
562 rc = fwcmd->hdr.u0.rsp.status;
563 if (rc) {
564 device_printf(sc->dev,"%s failed - cmd status: %d\n",
565 __FUNCTION__, rc);
566 goto error;
567 }
568
569 *if_id = LE_32(fwcmd->params.rsp.if_id);
570
571 if (mac_addr != NULL)
572 sc->pmac_id = LE_32(fwcmd->params.rsp.pmac_id);
573error:
574 return rc;
575}
576
577/**
578 * @brief Function to delete an interface
579 * @param sc software handle to the device
580 * @param if_id ID of the interface to delete
581 * @returns 0 on success, EIO on failure
582 */
--- 16 unchanged lines hidden (view full) ---
599
600 fwcmd->params.req.if_id = if_id;
601
602 mbx.u0.s.embedded = 1;
603 mbx.payload_length = sizeof(struct mbx_destroy_common_iface);
604 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
605
606 rc = oce_mbox_post(sc, &mbx, NULL);
607 if (!rc)
608 rc = fwcmd->hdr.u0.rsp.status;
609 if (rc)
610 device_printf(sc->dev,"%s failed - cmd status: %d\n",
611 __FUNCTION__, rc);
612 return rc;
613}
614
615/**
616 * @brief Function to send the mbx command to configure vlan
617 * @param sc software handle to the device
618 * @param if_id interface identifier index
619 * @param vtag_arr array of vlan tags
--- 31 unchanged lines hidden (view full) ---
651 bcopy(vtag_arr, fwcmd->params.req.tags.normal_vlans,
652 vtag_cnt * sizeof(struct normal_vlan));
653 }
654 mbx.u0.s.embedded = 1;
655 mbx.payload_length = sizeof(struct mbx_common_config_vlan);
656 DW_SWAP(u32ptr(&mbx), (OCE_BMBX_RHDR_SZ + mbx.payload_length));
657
658 rc = oce_mbox_post(sc, &mbx, NULL);
659 if (!rc)
660 rc = fwcmd->hdr.u0.rsp.status;
661 if (rc)
662 device_printf(sc->dev,"%s failed - cmd status: %d\n",
663 __FUNCTION__, rc);
664 return 0;
665
666}
667
668/**
669 * @brief Function to set flow control capability in the hardware
670 * @param sc software handle to the device
671 * @param flow_control flow control flags to set
672 * @returns 0 on success, EIO on failure
673 */
--- 20 unchanged lines hidden (view full) ---
694 if (flow_control & OCE_FC_RX)
695 fwcmd->rx_flow_control = 1;
696
697 mbx.u0.s.embedded = 1;
698 mbx.payload_length = sizeof(struct mbx_common_get_set_flow_control);
699 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
700
701 rc = oce_mbox_post(sc, &mbx, NULL);
702 if (!rc)
703 rc = fwcmd->hdr.u0.rsp.status;
704 if (rc)
705 device_printf(sc->dev,"%s failed - cmd status: %d\n",
706 __FUNCTION__, rc);
707 return rc;
708}
709
710/**
711 * @brief Initialize the RSS CPU indirection table
712 *
713 * The table is used to choose the queue to place the incomming packets.
714 * Incomming packets are hashed. The lowest bits in the hash result
--- 42 unchanged lines hidden (view full) ---
757 */
758int
759oce_config_nic_rss(POCE_SOFTC sc, uint32_t if_id, uint16_t enable_rss)
760{
761 int rc;
762 struct oce_mbx mbx;
763 struct mbx_config_nic_rss *fwcmd =
764 (struct mbx_config_nic_rss *)&mbx.payload;
765 int version;
766
767 bzero(&mbx, sizeof(struct oce_mbx));
768
769 if (IS_XE201(sc)) {
770 version = OCE_MBX_VER_V1;
771 fwcmd->params.req.enable_rss = RSS_ENABLE_UDP_IPV4 |
772 RSS_ENABLE_UDP_IPV6;
773 } else
774 version = OCE_MBX_VER_V0;
775
776 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
777 MBX_SUBSYSTEM_NIC,
778 NIC_CONFIG_RSS,
779 MBX_TIMEOUT_SEC,
780 sizeof(struct mbx_config_nic_rss),
781 version);
782 if (enable_rss)
783 fwcmd->params.req.enable_rss |= (RSS_ENABLE_IPV4 |
784 RSS_ENABLE_TCP_IPV4 |
785 RSS_ENABLE_IPV6 |
786 RSS_ENABLE_TCP_IPV6);
787 fwcmd->params.req.flush = OCE_FLUSH;
788 fwcmd->params.req.if_id = LE_32(if_id);
789
790 srandom(arc4random()); /* random entropy seed */
791 read_random(fwcmd->params.req.hash, sizeof(fwcmd->params.req.hash));
792
793 rc = oce_rss_itbl_init(sc, fwcmd);
794 if (rc == 0) {
795 mbx.u0.s.embedded = 1;
796 mbx.payload_length = sizeof(struct mbx_config_nic_rss);
797 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
798
799 rc = oce_mbox_post(sc, &mbx, NULL);
800 if (!rc)
801 rc = fwcmd->hdr.u0.rsp.status;
802 if (rc)
803 device_printf(sc->dev,"%s failed - cmd status: %d\n",
804 __FUNCTION__, rc);
805 }
806 return rc;
807}
808
809/**
810 * @brief RXF function to enable/disable device promiscuous mode
811 * @param sc software handle to the device
812 * @param enable enable/disable flag
813 * @returns 0 on success, EIO on failure
--- 62 unchanged lines hidden (view full) ---
876 mbx.u0.s.sge_count = 1;
877 mbx.payload.u0.u1.sgl[0].pa_lo = ADDR_LO(sgl->paddr);
878 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(sgl->paddr);
879 mbx.payload.u0.u1.sgl[0].length = mbx_sz;
880 mbx.payload_length = mbx_sz;
881 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
882
883 rc = oce_mbox_post(sc, &mbx, NULL);
884 if (!rc)
885 rc = fwcmd->hdr.u0.rsp.status;
886 if (rc)
887 device_printf(sc->dev,"%s failed - cmd status: %d\n",
888 __FUNCTION__, rc);
889 return 0;
890}
891
892/**
893 * @brief Function to query the link status from the hardware
894 * @param sc software handle to the device
895 * @param[out] link pointer to the structure returning link attributes
896 * @returns 0 on success, EIO on failure
897 */
898int
899oce_get_link_status(POCE_SOFTC sc, struct link_status *link)
900{
901 struct oce_mbx mbx;
902 struct mbx_query_common_link_config *fwcmd;
903 int rc = 0, version;
904
905 bzero(&mbx, sizeof(struct oce_mbx));
906
907 IS_XE201(sc) ? (version = OCE_MBX_VER_V1) : (version = OCE_MBX_VER_V0);
908
909 fwcmd = (struct mbx_query_common_link_config *)&mbx.payload;
910 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
911 MBX_SUBSYSTEM_COMMON,
912 OPCODE_COMMON_QUERY_LINK_CONFIG,
913 MBX_TIMEOUT_SEC,
914 sizeof(struct mbx_query_common_link_config),
915 version);
916
917 mbx.u0.s.embedded = 1;
918 mbx.payload_length = sizeof(struct mbx_query_common_link_config);
919 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
920
921 rc = oce_mbox_post(sc, &mbx, NULL);
922
923 if (!rc)
924 rc = fwcmd->hdr.u0.rsp.status;
925 if (rc) {
926 device_printf(sc->dev,"%s failed - cmd status: %d\n",
927 __FUNCTION__, rc);
928 goto error;
929 }
930 /* interpret response */
931 bcopy(&fwcmd->params.rsp, link, sizeof(struct link_status));
932 link->logical_link_status = LE_32(link->logical_link_status);
933 link->qos_link_speed = LE_16(link->qos_link_speed);
934error:
935 return rc;
936}
937
938
939
940int
941oce_mbox_get_nic_stats_v0(POCE_SOFTC sc, POCE_DMA_MEM pstats_dma_mem)
942{
--- 25 unchanged lines hidden (view full) ---
968 mbx.payload_length = sizeof(struct mbx_get_nic_stats_v0);
969
970 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
971
972 rc = oce_mbox_post(sc, &mbx, NULL);
973
974 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
975
976 if (!rc)
977 rc = fwcmd->hdr.u0.rsp.status;
978 if (rc)
979 device_printf(sc->dev,"%s failed - cmd status: %d\n",
980 __FUNCTION__, rc);
981 return rc;
982}
983
984
985
986/**
987 * @brief Function to get NIC statistics
988 * @param sc software handle to the device
--- 29 unchanged lines hidden (view full) ---
1018 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(pstats_dma_mem->paddr);
1019 mbx.payload.u0.u1.sgl[0].length = sizeof(struct mbx_get_nic_stats);
1020
1021 mbx.payload_length = sizeof(struct mbx_get_nic_stats);
1022 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1023
1024 rc = oce_mbox_post(sc, &mbx, NULL);
1025 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
1026 if (!rc)
1027 rc = fwcmd->hdr.u0.rsp.status;
1028 if (rc)
1029 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1030 __FUNCTION__, rc);
1031 return rc;
1032}
1033
1034
1035/**
1036 * @brief Function to get pport (physical port) statistics
1037 * @param sc software handle to the device
1038 * @param *stats pointer to where to store statistics
--- 15 unchanged lines hidden (view full) ---
1054 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
1055 MBX_SUBSYSTEM_NIC,
1056 NIC_GET_PPORT_STATS,
1057 MBX_TIMEOUT_SEC,
1058 sizeof(struct mbx_get_pport_stats),
1059 OCE_MBX_VER_V0);
1060
1061 fwcmd->params.req.reset_stats = reset_stats;
1062 fwcmd->params.req.port_number = sc->port_id;
1063
1064 mbx.u0.s.embedded = 0; /* stats too large for embedded mbx rsp */
1065 mbx.u0.s.sge_count = 1; /* using scatter gather instead */
1066
1067 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_PREWRITE);
1068 mbx.payload.u0.u1.sgl[0].pa_lo = ADDR_LO(pstats_dma_mem->paddr);
1069 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(pstats_dma_mem->paddr);
1070 mbx.payload.u0.u1.sgl[0].length = sizeof(struct mbx_get_pport_stats);
1071
1072 mbx.payload_length = sizeof(struct mbx_get_pport_stats);
1073 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1074
1075 rc = oce_mbox_post(sc, &mbx, NULL);
1076 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
1077
1078 if (!rc)
1079 rc = fwcmd->hdr.u0.rsp.status;
1080 if (rc)
1081 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1082 __FUNCTION__, rc);
1083 return rc;
1084}
1085
1086
1087/**
1088 * @brief Function to get vport (virtual port) statistics
1089 * @param sc software handle to the device
1090 * @param *stats pointer to where to store statistics
--- 32 unchanged lines hidden (view full) ---
1123 mbx.payload.u0.u1.sgl[0].length = sizeof(struct mbx_get_vport_stats);
1124
1125 mbx.payload_length = sizeof(struct mbx_get_vport_stats);
1126 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1127
1128 rc = oce_mbox_post(sc, &mbx, NULL);
1129 oce_dma_sync(pstats_dma_mem, BUS_DMASYNC_POSTWRITE);
1130
1131 if (!rc)
1132 rc = fwcmd->hdr.u0.rsp.status;
1133 if (rc)
1134 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1135 __FUNCTION__, rc);
1136 return rc;
1137}
1138
1139
1140/**
1141 * @brief Function to update the muticast filter with
1142 * values in dma_mem
1143 * @param sc software handle to the device
--- 24 unchanged lines hidden (view full) ---
1168 sgl = &mbx.payload.u0.u1.sgl[0];
1169 sgl->pa_hi = htole32(upper_32_bits(pdma_mem->paddr));
1170 sgl->pa_lo = htole32((pdma_mem->paddr) & 0xFFFFFFFF);
1171 sgl->length = htole32(mbx.payload_length);
1172
1173 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1174
1175 rc = oce_mbox_post(sc, &mbx, NULL);
1176 if (!rc)
1177 rc = req->hdr.u0.rsp.status;
1178 if (rc)
1179 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1180 __FUNCTION__, rc);
1181 return rc;
1182}
1183
1184
1185/**
1186 * @brief Function to send passthrough Ioctls
1187 * @param sc software handle to the device
1188 * @param dma_mem pointer to dma memory region
--- 44 unchanged lines hidden (view full) ---
1233
1234 fwcmd->params.req.if_id = (uint16_t) if_id;
1235 bcopy(mac_addr, fwcmd->params.req.mac_address, 6);
1236
1237 mbx.u0.s.embedded = 1;
1238 mbx.payload_length = sizeof(struct mbx_add_common_iface_mac);
1239 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1240 rc = oce_mbox_post(sc, &mbx, NULL);
1241 if (!rc)
1242 rc = fwcmd->hdr.u0.rsp.status;
1243 if (rc) {
1244 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1245 __FUNCTION__, rc);
1246 goto error;
1247 }
1248 *pmac_id = fwcmd->params.rsp.pmac_id;
1249error:
1250 return rc;
1251}
1252
1253
1254int
1255oce_mbox_macaddr_del(POCE_SOFTC sc, uint32_t if_id, uint32_t pmac_id)
1256{
1257 struct oce_mbx mbx;
--- 13 unchanged lines hidden (view full) ---
1271 fwcmd->params.req.if_id = (uint16_t)if_id;
1272 fwcmd->params.req.pmac_id = pmac_id;
1273
1274 mbx.u0.s.embedded = 1;
1275 mbx.payload_length = sizeof(struct mbx_del_common_iface_mac);
1276 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1277
1278 rc = oce_mbox_post(sc, &mbx, NULL);
1279 if (!rc)
1280 rc = fwcmd->hdr.u0.rsp.status;
1281 if (rc)
1282 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1283 __FUNCTION__, rc);
1284 return rc;
1285}
1286
1287
1288
1289int
1290oce_mbox_check_native_mode(POCE_SOFTC sc)
1291{
--- 16 unchanged lines hidden (view full) ---
1308
1309 fwcmd->params.req.capability_flags = CAP_BE3_NATIVE_ERX_API;
1310
1311 mbx.u0.s.embedded = 1;
1312 mbx.payload_length = sizeof(struct mbx_common_set_function_cap);
1313 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1314
1315 rc = oce_mbox_post(sc, &mbx, NULL);
1316 if (!rc)
1317 rc = fwcmd->hdr.u0.rsp.status;
1318 if (rc) {
1319 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1320 __FUNCTION__, rc);
1321 goto error;
1322 }
1323 sc->be3_native = fwcmd->params.rsp.capability_flags
1324 & CAP_BE3_NATIVE_ERX_API;
1325
1326error:
1327 return 0;
1328}
1329
1330
1331
1332int
1333oce_mbox_cmd_set_loopback(POCE_SOFTC sc, uint8_t port_num,
1334 uint8_t loopback_type, uint8_t enable)
--- 18 unchanged lines hidden (view full) ---
1353 fwcmd->params.req.loopback_type = loopback_type;
1354 fwcmd->params.req.loopback_state = enable;
1355
1356 mbx.u0.s.embedded = 1;
1357 mbx.payload_length = sizeof(struct mbx_lowlevel_set_loopback_mode);
1358 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1359
1360 rc = oce_mbox_post(sc, &mbx, NULL);
1361 if (!rc)
1362 rc = fwcmd->hdr.u0.rsp.status;
1363 if (rc)
1364 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1365 __FUNCTION__, rc);
1366
1367 return rc;
1368
1369}
1370
1371int
1372oce_mbox_cmd_test_loopback(POCE_SOFTC sc, uint32_t port_num,
1373 uint32_t loopback_type, uint32_t pkt_size, uint32_t num_pkts,
--- 22 unchanged lines hidden (view full) ---
1396 fwcmd->params.req.num_pkts = num_pkts;
1397 fwcmd->params.req.loopback_type = loopback_type;
1398
1399 mbx.u0.s.embedded = 1;
1400 mbx.payload_length = sizeof(struct mbx_lowlevel_test_loopback_mode);
1401 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1402
1403 rc = oce_mbox_post(sc, &mbx, NULL);
1404 if (!rc)
1405 rc = fwcmd->hdr.u0.rsp.status;
1406 if (rc)
1407 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1408 __FUNCTION__, rc);
1409
1410 return rc;
1411}
1412
1413int
1414oce_mbox_write_flashrom(POCE_SOFTC sc, uint32_t optype,uint32_t opcode,
1415 POCE_DMA_MEM pdma_mem, uint32_t num_bytes)
1416{
1417
1418 struct oce_mbx mbx;
--- 22 unchanged lines hidden (view full) ---
1441
1442 sgl = &mbx.payload.u0.u1.sgl[0];
1443 sgl->pa_hi = upper_32_bits(pdma_mem->paddr);
1444 sgl->pa_lo = pdma_mem->paddr & 0xFFFFFFFF;
1445 sgl->length = payload_len;
1446
1447 /* post the command */
1448 rc = oce_mbox_post(sc, &mbx, NULL);
1449 if (!rc)
1450 rc = fwcmd->hdr.u0.rsp.status;
1451 if (rc)
1452 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1453 __FUNCTION__, rc);
1454
1455 return rc;
1456
1457}
1458
1459int
1460oce_mbox_get_flashrom_crc(POCE_SOFTC sc, uint8_t *flash_crc,
1461 uint32_t offset, uint32_t optype)
--- 25 unchanged lines hidden (view full) ---
1487 fwcmd->data_offset = offset;
1488 fwcmd->data_buffer_size = 0x4;
1489
1490 mbx.u0.s.embedded = 1;
1491 mbx.payload_length = payload_len;
1492
1493 /* post the command */
1494 rc = oce_mbox_post(sc, &mbx, NULL);
1495 if (!rc)
1496 rc = fwcmd->hdr.u0.rsp.status;
1497 if (rc) {
1498 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1499 __FUNCTION__, rc);
1500 goto error;
1501 }
1502 bcopy(fwcmd->data_buffer, flash_crc, 4);
1503error:
1504 return rc;
1505}
1506
1507int
1508oce_mbox_get_phy_info(POCE_SOFTC sc, struct oce_phy_info *phy_info)
1509{
1510
1511 struct oce_mbx mbx;
--- 10 unchanged lines hidden (view full) ---
1522 sizeof(struct mbx_common_phy_info),
1523 OCE_MBX_VER_V0);
1524
1525 mbx.u0.s.embedded = 1;
1526 mbx.payload_length = sizeof(struct mbx_common_phy_info);
1527
1528 /* now post the command */
1529 rc = oce_mbox_post(sc, &mbx, NULL);
1530 if (!rc)
1531 rc = fwcmd->hdr.u0.rsp.status;
1532 if (rc) {
1533 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1534 __FUNCTION__, rc);
1535 goto error;
1536 }
1537 phy_info->phy_type = fwcmd->params.rsp.phy_info.phy_type;
1538 phy_info->interface_type =
1539 fwcmd->params.rsp.phy_info.interface_type;
1540 phy_info->auto_speeds_supported =
1541 fwcmd->params.rsp.phy_info.auto_speeds_supported;
1542 phy_info->fixed_speeds_supported =
1543 fwcmd->params.rsp.phy_info.fixed_speeds_supported;
1544 phy_info->misc_params =fwcmd->params.rsp.phy_info.misc_params;
1545error:
1546 return rc;
1547
1548}
1549
1550
1551int
1552oce_mbox_lancer_write_flashrom(POCE_SOFTC sc, uint32_t data_size,
1553 uint32_t data_offset, POCE_DMA_MEM pdma_mem,
--- 29 unchanged lines hidden (view full) ---
1583 fwcmd->params.req.descriptor_count = 1;
1584 fwcmd->params.req.write_offset = data_offset;
1585 fwcmd->params.req.buffer_length = data_size;
1586 fwcmd->params.req.address_lower = pdma_mem->paddr & 0xFFFFFFFF;
1587 fwcmd->params.req.address_upper = upper_32_bits(pdma_mem->paddr);
1588
1589 /* post the command */
1590 rc = oce_mbox_post(sc, &mbx, NULL);
1591 if (!rc)
1592 rc = fwcmd->params.rsp.status;
1593 if (rc) {
1594 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1595 __FUNCTION__, rc);
1596 goto error;
1597 }
1598 *written_data = fwcmd->params.rsp.actual_write_length;
1599 *additional_status = fwcmd->params.rsp.additional_status;
1600error:
1601 return rc;
1602
1603}
1604
1605
1606
1607int
1608oce_mbox_create_rq(struct oce_rq *rq)
--- 30 unchanged lines hidden (view full) ---
1639 fwcmd->params.req.if_id = sc->if_id;
1640 fwcmd->params.req.max_frame_size = rq->cfg.mtu;
1641 fwcmd->params.req.is_rss_queue = rq->cfg.is_rss_queue;
1642
1643 mbx.u0.s.embedded = 1;
1644 mbx.payload_length = sizeof(struct mbx_create_nic_rq);
1645
1646 rc = oce_mbox_post(sc, &mbx, NULL);
1647 if (!rc)
1648 rc = fwcmd->hdr.u0.rsp.status;
1649 if (rc) {
1650 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1651 __FUNCTION__, rc);
1652 goto error;
1653 }
1654 rq->rq_id = fwcmd->params.rsp.rq_id;
1655 rq->rss_cpuid = fwcmd->params.rsp.rss_cpuid;
1656error:
1657 return rc;
1658
1659}
1660
1661
1662
1663int
1664oce_mbox_create_wq(struct oce_wq *wq)
--- 25 unchanged lines hidden (view full) ---
1690 fwcmd->params.req.wq_size = OCE_LOG2(wq->cfg.q_len) + 1;
1691 fwcmd->params.req.cq_id = wq->cq->cq_id;
1692 fwcmd->params.req.ulp_num = 1;
1693
1694 mbx.u0.s.embedded = 1;
1695 mbx.payload_length = sizeof(struct mbx_create_nic_wq);
1696
1697 rc = oce_mbox_post(sc, &mbx, NULL);
1698 if (!rc)
1699 rc = fwcmd->hdr.u0.rsp.status;
1700 if (rc) {
1701 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1702 __FUNCTION__, rc);
1703 goto error;
1704 }
1705 wq->wq_id = LE_16(fwcmd->params.rsp.wq_id);
1706error:
1707 return rc;
1708
1709}
1710
1711
1712
1713int
1714oce_mbox_create_eq(struct oce_eq *eq)
--- 22 unchanged lines hidden (view full) ---
1737 fwcmd->params.req.ctx.armed = 0;
1738 fwcmd->params.req.ctx.delay_mult = eq->eq_cfg.cur_eqd;
1739
1740
1741 mbx.u0.s.embedded = 1;
1742 mbx.payload_length = sizeof(struct mbx_create_common_eq);
1743
1744 rc = oce_mbox_post(sc, &mbx, NULL);
1745 if (!rc)
1746 rc = fwcmd->hdr.u0.rsp.status;
1747 if (rc) {
1748 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1749 __FUNCTION__, rc);
1750 goto error;
1751 }
1752 eq->eq_id = LE_16(fwcmd->params.rsp.eq_id);
1753error:
1754 return rc;
1755}
1756
1757
1758
1759int
1760oce_mbox_cq_create(struct oce_cq *cq, uint32_t ncoalesce, uint32_t is_eventable)
1761{
--- 53 unchanged lines hidden (view full) ---
1815 ctx->v0.armed = 0;
1816 ctx->v0.eq_id = cq->eq->eq_id;
1817 }
1818
1819 mbx.u0.s.embedded = 1;
1820 mbx.payload_length = sizeof(struct mbx_create_common_cq);
1821
1822 rc = oce_mbox_post(sc, &mbx, NULL);
1823 if (!rc)
1824 rc = fwcmd->hdr.u0.rsp.status;
1825 if (rc) {
1826 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1827 __FUNCTION__, rc);
1828 goto error;
1829 }
1830 cq->cq_id = LE_16(fwcmd->params.rsp.cq_id);
1831error:
1832 return rc;
1833
1834}
1835
1836int
1837oce_mbox_read_transrecv_data(POCE_SOFTC sc, uint32_t page_num)
1838{
1839 int rc = 0;
1840 struct oce_mbx mbx;
1841 struct mbx_read_common_transrecv_data *fwcmd;
1842 struct oce_mq_sge *sgl;
1843 OCE_DMA_MEM dma;
1844
1845 /* Allocate DMA mem*/
1846 if (oce_dma_alloc(sc, sizeof(struct mbx_read_common_transrecv_data),
1847 &dma, 0))
1848 return ENOMEM;
1849
1850 fwcmd = OCE_DMAPTR(&dma, struct mbx_read_common_transrecv_data);
1851 bzero(fwcmd, sizeof(struct mbx_read_common_transrecv_data));
1852
1853 bzero(&mbx, sizeof(struct oce_mbx));
1854 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
1855 MBX_SUBSYSTEM_COMMON,
1856 OPCODE_COMMON_READ_TRANSRECEIVER_DATA,
1857 MBX_TIMEOUT_SEC,
1858 sizeof(struct mbx_read_common_transrecv_data),
1859 OCE_MBX_VER_V0);
1860
1861 /* fill rest of mbx */
1862 mbx.u0.s.embedded = 0;
1863 mbx.payload_length = sizeof(struct mbx_read_common_transrecv_data);
1864 mbx.u0.s.sge_count = 1;
1865 sgl = &mbx.payload.u0.u1.sgl[0];
1866 sgl->pa_hi = htole32(upper_32_bits(dma.paddr));
1867 sgl->pa_lo = htole32((dma.paddr) & 0xFFFFFFFF);
1868 sgl->length = htole32(mbx.payload_length);
1869 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1870
1871 fwcmd->params.req.port = LE_32(sc->port_id);
1872 fwcmd->params.req.page_num = LE_32(page_num);
1873
1874 /* command post */
1875 rc = oce_mbox_post(sc, &mbx, NULL);
1876 if (!rc)
1877 rc = fwcmd->hdr.u0.rsp.status;
1878 if (rc) {
1879 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1880 __FUNCTION__, rc);
1881 goto error;
1882 }
1883 if(fwcmd->params.rsp.page_num == PAGE_NUM_A0)
1884 {
1885 bcopy((char *)fwcmd->params.rsp.page_data,
1886 (char *)&sfp_vpd_dump_buffer[0],
1887 TRANSCEIVER_A0_SIZE);
1888 }
1889
1890 if(fwcmd->params.rsp.page_num == PAGE_NUM_A2)
1891 {
1892 bcopy((char *)fwcmd->params.rsp.page_data,
1893 (char *)&sfp_vpd_dump_buffer[32],
1894 TRANSCEIVER_A2_SIZE);
1895 }
1896error:
1897 return rc;
1898}
1899
1900void
1901oce_mbox_eqd_modify_periodic(POCE_SOFTC sc, struct oce_set_eqd *set_eqd,
1902 int num)
1903{
1904 struct oce_mbx mbx;
1905 struct mbx_modify_common_eq_delay *fwcmd;
1906 int rc = 0;
1907 int i = 0;
1908
1909 bzero(&mbx, sizeof(struct oce_mbx));
1910
1911 /* Initialize MODIFY_EQ_DELAY ioctl header */
1912 fwcmd = (struct mbx_modify_common_eq_delay *)&mbx.payload;
1913 mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
1914 MBX_SUBSYSTEM_COMMON,
1915 OPCODE_COMMON_MODIFY_EQ_DELAY,
1916 MBX_TIMEOUT_SEC,
1917 sizeof(struct mbx_modify_common_eq_delay),
1918 OCE_MBX_VER_V0);
1919 /* fill rest of mbx */
1920 mbx.u0.s.embedded = 1;
1921 mbx.payload_length = sizeof(struct mbx_modify_common_eq_delay);
1922 DW_SWAP(u32ptr(&mbx), mbx.payload_length + OCE_BMBX_RHDR_SZ);
1923
1924 fwcmd->params.req.num_eq = num;
1925 for (i = 0; i < num; i++) {
1926 fwcmd->params.req.delay[i].eq_id =
1927 htole32(set_eqd[i].eq_id);
1928 fwcmd->params.req.delay[i].phase = 0;
1929 fwcmd->params.req.delay[i].dm =
1930 htole32(set_eqd[i].delay_multiplier);
1931 }
1932
1933
1934 /* command post */
1935 rc = oce_mbox_post(sc, &mbx, NULL);
1936
1937 if (!rc)
1938 rc = fwcmd->hdr.u0.rsp.status;
1939 if (rc)
1940 device_printf(sc->dev,"%s failed - cmd status: %d\n",
1941 __FUNCTION__, rc);
1942}
1943
1944