39c39
< /* $FreeBSD: head/sys/dev/oce/oce_hw.h 231879 2012-02-17 13:55:17Z luigi $ */
---
> /* $FreeBSD: head/sys/dev/oce/oce_hw.h 247880 2013-03-06 09:53:38Z delphij $ */
40a41,42
> /* $FreeBSD: head/sys/dev/oce/oce_hw.h 247880 2013-03-06 09:53:38Z delphij $ */
>
157a160
> #define ASYNC_EVENT_CODE_DEBUG 0x6
158a162,163
> #define ASYNC_EVENT_DEBUG_QNQ 0x1
> #define ASYNC_EVENT_CODE_SLIPORT 0x11
709a715,725
> /* async event indicating outer VLAN tag in QnQ */
> struct oce_async_event_qnq {
> uint8_t valid; /* Indicates if outer VLAN is valid */
> uint8_t rsvd0;
> uint16_t vlan_tag;
> uint32_t event_tag;
> uint8_t rsvd1[4];
> uint32_t code;
> } ;
>
>
752a769,806
> struct {
> #ifdef _BIG_ENDIAN
> /* dw0 */
> uint32_t cq_id:16;
> uint32_t num_pages:16;
> /* dw1 */
> uint32_t async_evt_bitmap;
> /* dw2 */
> uint32_t dw5rsvd2:12;
> uint32_t ring_size:4;
> uint32_t async_cq_id:16;
> /* dw3 */
> uint32_t valid:1;
> uint32_t dw6rsvd1:31;
> /* dw4 */
> uint32_t dw7rsvd1:31;
> uint32_t async_cq_valid:1;
> #else
> /* dw0 */
> uint32_t num_pages:16;
> uint32_t cq_id:16;
> /* dw1 */
> uint32_t async_evt_bitmap;
> /* dw2 */
> uint32_t async_cq_id:16;
> uint32_t ring_size:4;
> uint32_t dw5rsvd2:12;
> /* dw3 */
> uint32_t dw6rsvd1:31;
> uint32_t valid:1;
> /* dw4 */
> uint32_t async_cq_valid:1;
> uint32_t dw7rsvd1:31;
> #endif
> /* dw5 */
> uint32_t dw8rsvd1;
> } v1;
>
828a883
> OPCODE_COMMON_READ_TRANSRECEIVER_DATA = 73,
1726a1782,1787
> struct be_set_eqd {
> uint32_t eq_id;
> uint32_t phase;
> uint32_t dm;
> };
>
1745a1807,1876
> /* [32] OPCODE_COMMON_GET_CNTL_ATTRIBUTES */
>
> struct mgmt_hba_attr {
> int8_t flashrom_ver_str[32];
> int8_t manufac_name[32];
> uint32_t supp_modes;
> int8_t seeprom_ver_lo;
> int8_t seeprom_ver_hi;
> int8_t rsvd0[2];
> uint32_t ioctl_data_struct_ver;
> uint32_t ep_fw_data_struct_ver;
> uint8_t ncsi_ver_str[12];
> uint32_t def_ext_to;
> int8_t cntl_mod_num[32];
> int8_t cntl_desc[64];
> int8_t cntl_ser_num[32];
> int8_t ip_ver_str[32];
> int8_t fw_ver_str[32];
> int8_t bios_ver_str[32];
> int8_t redboot_ver_str[32];
> int8_t drv_ver_str[32];
> int8_t fw_on_flash_ver_str[32];
> uint32_t funcs_supp;
> uint16_t max_cdblen;
> uint8_t asic_rev;
> uint8_t gen_guid[16];
> uint8_t hba_port_count;
> uint16_t default_link_down_timeout;
> uint8_t iscsi_ver_min_max;
> uint8_t multifunc_dev;
> uint8_t cache_valid;
> uint8_t hba_status;
> uint8_t max_domains_supp;
> uint8_t phy_port;
> uint32_t fw_post_status;
> uint32_t hba_mtu[8];
> uint8_t iSCSI_feat;
> uint8_t asic_gen;
> uint8_t future_u8[2];
> uint32_t future_u32[3];
> };
>
> struct mgmt_cntl_attr {
> struct mgmt_hba_attr hba_attr;
> uint16_t pci_vendor_id;
> uint16_t pci_device_id;
> uint16_t pci_sub_vendor_id;
> uint16_t pci_sub_system_id;
> uint8_t pci_bus_num;
> uint8_t pci_dev_num;
> uint8_t pci_func_num;
> uint8_t interface_type;
> uint64_t unique_id;
> uint8_t netfilters;
> uint8_t rsvd0[3];
> uint32_t future_u32[4];
> };
>
> struct mbx_common_get_cntl_attr {
> struct mbx_hdr hdr;
> union {
> struct {
> uint32_t rsvd0;
> } req;
> struct {
> struct mgmt_cntl_attr cntl_attr_info;
> } rsp;
> } params;
> };
>
1787a1919,1935
> /* [73] OPCODE_COMMON_READ_TRANSRECEIVER_DATA */
> struct mbx_read_common_transrecv_data {
> struct mbx_hdr hdr;
> union {
> struct {
> uint32_t page_num;
> uint32_t port;
> } req;
> struct {
> uint32_t page_num;
> uint32_t port;
> uint32_t page_data[32];
> } rsp;
> } params;
>
> };
>
2113c2261,2263
< RSS_ENABLE_TCP_IPV6 = 0x8 /* (TCP IPV6 HASH */
---
> RSS_ENABLE_TCP_IPV6 = 0x8, /* (TCP IPV6 HASH */
> RSS_ENABLE_UDP_IPV4 = 0x10, /* UDP IPV4 HASH */
> RSS_ENABLE_UDP_IPV6 = 0x20 /* UDP IPV6 HASH */