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if_nxge.h (171095) if_nxge.h (173139)
1/*-
2 * Copyright (c) 2002-2007 Neterion, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
1/*-
2 * Copyright (c) 2002-2007 Neterion, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/dev/nxge/if_nxge.h 171095 2007-06-29 22:47:18Z sam $
26 * $FreeBSD: head/sys/dev/nxge/if_nxge.h 173139 2007-10-29 14:19:32Z rwatson $
27 */
28
27 */
28
29/*
30 * if_xge.h
31 */
32
33#ifndef _IF_XGE_H
34#define _IF_XGE_H
35
36#include <dev/nxge/include/xgehal.h>
37#include <dev/nxge/xge-osdep.h>
38
29#ifndef _IF_XGE_H
30#define _IF_XGE_H
31
32#include <dev/nxge/include/xgehal.h>
33#include <dev/nxge/xge-osdep.h>
34
39#if defined(XGE_FEATURE_TSO) && (__FreeBSD_version < 700026)
40#undef XGE_FEATURE_TSO
41#endif
42
43#if defined(XGE_FEATURE_LRO)
44#if __FreeBSD_version < 700047
45#undef XGE_FEATURE_LRO
46#undef XGE_HAL_CONFIG_LRO
47#else
48#define XGE_HAL_CONFIG_LRO
49#endif
50#endif
51
52#ifdef FUNC_PRINT
53#define ENTER_FUNCTION xge_os_printf("Enter\t==>[%s]\n", __FUNCTION__);
54#define LEAVE_FUNCTION xge_os_printf("Leave\t<==[%s]\n", __FUNCTION__);
55#else
56#define ENTER_FUNCTION
57#define LEAVE_FUNCTION
58#endif
59
60/* Printing description, Copyright */
35/* Printing description, Copyright */
61#define DRIVER_VERSION XGELL_VERSION_MAJOR"." \
62 XGELL_VERSION_MINOR"." \
63 XGELL_VERSION_FIX"." \
64 XGELL_VERSION_BUILD
65#define COPYRIGHT_STRING "Copyright(c) 2002-2007 Neterion Inc."
66#define PRINT_COPYRIGHT xge_os_printf("%s", COPYRIGHT_STRING)
36#define XGE_DRIVER_VERSION \
37 XGELL_VERSION_MAJOR"."XGELL_VERSION_MINOR"." \
38 XGELL_VERSION_FIX"."XGELL_VERSION_BUILD
39#define XGE_COPYRIGHT "Copyright(c) 2002-2007 Neterion Inc."
67
68/* Printing */
69#define xge_trace(trace, fmt, args...) xge_debug_ll(trace, fmt, ## args);
40
41/* Printing */
42#define xge_trace(trace, fmt, args...) xge_debug_ll(trace, fmt, ## args);
70#define xge_ctrace(trace, fmt...) xge_debug_ll(trace, fmt);
71
43
72#define BUFALIGN(buffer_length) \
73 if((buffer_length % 128) != 0) { \
74 buffer_length += (128 - (buffer_length % 128)); \
75 }
44#define XGE_ALIGN_TO(buffer_length, to) { \
45 if((buffer_length % to) != 0) { \
46 buffer_length += (to - (buffer_length % to)); \
47 } \
48}
76
49
77static inline void *
78xge_malloc(unsigned long size) {
79 void *vaddr = malloc(size, M_DEVBUF, M_NOWAIT);
80 bzero(vaddr, size);
81 return vaddr;
50#define XGE_EXIT_ON_ERR(text, label, return_value) { \
51 xge_trace(XGE_ERR, "%s (Status: %d)", text, return_value); \
52 status = return_value; \
53 goto label; \
82}
83
54}
55
84#define SINGLE_ALLOC 0
85#define MULTI_ALLOC 1
86#define SAVE 0
87#define RESTORE 1
88#define UP 1
89#define DOWN 0
56#define XGE_SET_BUFFER_MODE_IN_RINGS(mode) { \
57 for(index = 0; index < XGE_RING_COUNT; index++) \
58 ring_config->queue[index].buffer_mode = mode; \
59}
60
90#define XGE_DEFAULT_USER_HARDCODED -1
61#define XGE_DEFAULT_USER_HARDCODED -1
91#define MAX_MBUF_FRAGS 20 /* Maximum number of fragments */
92#define MAX_SEGS 100 /* Maximum number of segments */
93#define XGELL_TX_LEVEL_LOW 16
62#define XGE_MAX_SEGS 100 /* Maximum number of segments */
63#define XGE_TX_LEVEL_LOW 16
64#define XGE_FIFO_COUNT XGE_HAL_MIN_FIFO_NUM
94#define XGE_RING_COUNT XGE_HAL_MIN_RING_NUM
65#define XGE_RING_COUNT XGE_HAL_MIN_RING_NUM
95#define BUFFER_SIZE 20
66#define XGE_BUFFER_SIZE 20
67#define XGE_LRO_DEFAULT_ENTRIES 12
68#define XGE_BAUDRATE 1000000000
96
97/* Default values to configuration parameters */
69
70/* Default values to configuration parameters */
71#define XGE_DEFAULT_ENABLED_TSO 1
72#define XGE_DEFAULT_ENABLED_LRO 1
73#define XGE_DEFAULT_ENABLED_MSI 1
74#define XGE_DEFAULT_BUFFER_MODE 1
98#define XGE_DEFAULT_INITIAL_MTU 1500
99#define XGE_DEFAULT_LATENCY_TIMER -1
100#define XGE_DEFAULT_MAX_SPLITS_TRANS -1
101#define XGE_DEFAULT_MMRB_COUNT -1
102#define XGE_DEFAULT_SHARED_SPLITS 0
103#define XGE_DEFAULT_ISR_POLLING_CNT 8
104#define XGE_DEFAULT_STATS_REFRESH_TIME_SEC 4
105#define XGE_DEFAULT_MAC_RMAC_BCAST_EN 1

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139#define XGE_DEFAULT_RING_QUEUE_RTI_URANGE_C 50
140#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_A 1
141#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_B 8
142#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_C 16
143#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_D 32
144#define XGE_DEFAULT_RING_QUEUE_RTI_TIMER_AC_EN 1
145#define XGE_DEFAULT_RING_QUEUE_RTI_TIMER_VAL_US 250
146
75#define XGE_DEFAULT_INITIAL_MTU 1500
76#define XGE_DEFAULT_LATENCY_TIMER -1
77#define XGE_DEFAULT_MAX_SPLITS_TRANS -1
78#define XGE_DEFAULT_MMRB_COUNT -1
79#define XGE_DEFAULT_SHARED_SPLITS 0
80#define XGE_DEFAULT_ISR_POLLING_CNT 8
81#define XGE_DEFAULT_STATS_REFRESH_TIME_SEC 4
82#define XGE_DEFAULT_MAC_RMAC_BCAST_EN 1

--- 33 unchanged lines hidden (view full) ---

116#define XGE_DEFAULT_RING_QUEUE_RTI_URANGE_C 50
117#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_A 1
118#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_B 8
119#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_C 16
120#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_D 32
121#define XGE_DEFAULT_RING_QUEUE_RTI_TIMER_AC_EN 1
122#define XGE_DEFAULT_RING_QUEUE_RTI_TIMER_VAL_US 250
123
124#define XGE_DRV_STATS(param) (lldev->driver_stats.param++)
125
126#define XGE_SAVE_PARAM(to, what, value) to.what = value;
127
128#define XGE_GET_PARAM(str_kenv, to, param, hardcode) { \
129 static int param##__LINE__; \
130 if(testenv(str_kenv) == 1) { \
131 getenv_int(str_kenv, &param##__LINE__); \
132 } \
133 else { \
134 param##__LINE__ = hardcode; \
135 } \
136 XGE_SAVE_PARAM(to, param, param##__LINE__); \
137}
138
139#define XGE_GET_PARAM_MAC(str_kenv, param, hardcode) \
140 XGE_GET_PARAM(str_kenv, ((*dconfig).mac), param, hardcode);
141
142#define XGE_GET_PARAM_FIFO(str_kenv, param, hardcode) \
143 XGE_GET_PARAM(str_kenv, ((*dconfig).fifo), param, hardcode);
144
145#define XGE_GET_PARAM_FIFO_QUEUE(str_kenv, param, qindex, hardcode) \
146 XGE_GET_PARAM(str_kenv, ((*dconfig).fifo.queue[qindex]), param, \
147 hardcode);
148
149#define XGE_GET_PARAM_FIFO_QUEUE_TTI(str_kenv, param, qindex, tindex, hardcode)\
150 XGE_GET_PARAM(str_kenv, ((*dconfig).fifo.queue[qindex].tti[tindex]), \
151 param, hardcode);
152
153#define XGE_GET_PARAM_RING(str_kenv, param, hardcode) \
154 XGE_GET_PARAM(str_kenv, ((*dconfig).ring), param, hardcode);
155
156#define XGE_GET_PARAM_RING_QUEUE(str_kenv, param, qindex, hardcode) \
157 XGE_GET_PARAM(str_kenv, ((*dconfig).ring.queue[qindex]), param, \
158 hardcode);
159
160#define XGE_GET_PARAM_RING_QUEUE_RTI(str_kenv, param, qindex, hardcode) \
161 XGE_GET_PARAM(str_kenv, ((*dconfig).ring.queue[qindex].rti), param, \
162 hardcode);
163
147/* Values to identify the requests from getinfo tool in ioctl */
148#define XGE_QUERY_STATS 1
149#define XGE_QUERY_PCICONF 2
164/* Values to identify the requests from getinfo tool in ioctl */
165#define XGE_QUERY_STATS 1
166#define XGE_QUERY_PCICONF 2
150#define XGE_QUERY_INTRSTATS 3
167#define XGE_QUERY_DEVSTATS 3
151#define XGE_QUERY_DEVCONF 4
152#define XGE_READ_VERSION 5
168#define XGE_QUERY_DEVCONF 4
169#define XGE_READ_VERSION 5
153#define XGE_QUERY_TCODE 6
154#define XGE_SET_BUFFER_MODE_1 7
155#define XGE_SET_BUFFER_MODE_2 8
156#define XGE_SET_BUFFER_MODE_3 9
170#define XGE_QUERY_SWSTATS 6
171#define XGE_QUERY_DRIVERSTATS 7
172#define XGE_SET_BUFFER_MODE_1 8
173#define XGE_SET_BUFFER_MODE_2 9
157#define XGE_SET_BUFFER_MODE_5 10
158#define XGE_QUERY_BUFFER_MODE 11
159
160#define XGE_OFFSET_OF_LAST_REG 0x3180
161
162#define VENDOR_ID_AMD 0x1022
163#define DEVICE_ID_8131_PCI_BRIDGE 0x7450
164
165typedef struct mbuf *mbuf_t;
166
174#define XGE_SET_BUFFER_MODE_5 10
175#define XGE_QUERY_BUFFER_MODE 11
176
177#define XGE_OFFSET_OF_LAST_REG 0x3180
178
179#define VENDOR_ID_AMD 0x1022
180#define DEVICE_ID_8131_PCI_BRIDGE 0x7450
181
182typedef struct mbuf *mbuf_t;
183
167typedef enum xgell_event_e {
184typedef enum xge_lables {
185 xge_free_all = 0,
186 xge_free_mutex = 1,
187 xge_free_terminate_hal_driver = 2,
188 xge_free_hal_device = 3,
189 xge_free_pci_info = 4,
190 xge_free_bar0 = 5,
191 xge_free_bar0_resource = 6,
192 xge_free_bar1 = 7,
193 xge_free_bar1_resource = 8,
194 xge_free_irq_resource = 9,
195 xge_free_terminate_hal_device = 10,
196 xge_free_media_interface = 11,
197} xge_lables_e;
198
199typedef enum xge_option {
200 XGE_CHANGE_LRO = 0,
201 XGE_SET_MTU = 1
202} xge_option_e;
203
204typedef enum xge_event_e {
168 XGE_LL_EVENT_TRY_XMIT_AGAIN = XGE_LL_EVENT_BASE + 1,
205 XGE_LL_EVENT_TRY_XMIT_AGAIN = XGE_LL_EVENT_BASE + 1,
169 XGE_LL_EVENT_DEVICE_RESETTING = XGE_LL_EVENT_BASE + 2,
170} xgell_event_e;
206 XGE_LL_EVENT_DEVICE_RESETTING = XGE_LL_EVENT_BASE + 2
207} xge_event_e;
171
208
209typedef struct xge_msi_info {
210 u16 msi_control; /* MSI control 0x42 */
211 u32 msi_lower_address; /* MSI lower address 0x44 */
212 u32 msi_higher_address; /* MSI higher address 0x48 */
213 u16 msi_data; /* MSI data */
214} xge_msi_info_t;
215
216typedef struct xge_driver_stats_t {
217 /* ISR statistics */
218 u64 isr_filter;
219 u64 isr_line;
220 u64 isr_msi;
221
222 /* Tx statistics */
223 u64 tx_calls;
224 u64 tx_completions;
225 u64 tx_desc_compl;
226 u64 tx_tcode;
227 u64 tx_defrag;
228 u64 tx_no_txd;
229 u64 tx_map_fail;
230 u64 tx_max_frags;
231 u64 tx_tso;
232 u64 tx_posted;
233 u64 tx_again;
234 u64 tx_lock_fail;
235
236 /* Rx statistics */
237 u64 rx_completions;
238 u64 rx_desc_compl;
239 u64 rx_tcode;
240 u64 rx_no_buf;
241 u64 rx_map_fail;
242
243 /* LRO statistics */
244 u64 lro_uncapable;
245 u64 lro_begin;
246 u64 lro_end1;
247 u64 lro_end2;
248 u64 lro_end3;
249 u64 lro_append;
250 u64 lro_session_exceeded;
251 u64 lro_close;
252} xge_driver_stats_t;
253
254typedef struct xge_lro_entry_t {
255 SLIST_ENTRY(xge_lro_entry_t) next;
256 struct mbuf *m_head;
257 struct mbuf *m_tail;
258 struct ip *lro_header_ip;
259 int timestamp;
260 u32 tsval;
261 u32 tsecr;
262 u32 source_ip;
263 u32 dest_ip;
264 u32 next_seq;
265 u32 ack_seq;
266 u32 len;
267 u32 data_csum;
268 u16 window;
269 u16 source_port;
270 u16 dest_port;
271 u16 append_cnt;
272 u16 mss;
273} xge_lro_entry_t;
274
275SLIST_HEAD(lro_head, xge_lro_entry_t);
276
172/* Adapter structure */
277/* Adapter structure */
173typedef struct xgelldev {
278typedef struct xge_lldev_t {
174 device_t device; /* Device */
175 struct ifnet *ifnetp; /* Interface ifnet structure */
176 struct resource *irq; /* Resource structure for IRQ */
177 void *irqhandle; /* IRQ handle */
279 device_t device; /* Device */
280 struct ifnet *ifnetp; /* Interface ifnet structure */
281 struct resource *irq; /* Resource structure for IRQ */
282 void *irqhandle; /* IRQ handle */
178 pci_info_t *pdev;
179 struct ifmedia xge_media; /* In-kernel representation of a */
180 /* single supported media type */
283 xge_pci_info_t *pdev; /* PCI info */
181 xge_hal_device_t *devh; /* HAL: Device Handle */
284 xge_hal_device_t *devh; /* HAL: Device Handle */
182 xge_hal_channel_h ring_channel[XGE_HAL_MAX_FIFO_NUM];
183 /* Ring channel */
184 xge_hal_channel_h fifo_channel_0; /* FIFO channel */
185 struct mtx xge_lock; /* Mutex - Default */
285 struct mtx mtx_drv; /* Mutex - Driver */
286 struct mtx mtx_tx[XGE_FIFO_COUNT];
287 /* Mutex - Tx */
288 char mtx_name_drv[16];/*Mutex Name - Driver */
289 char mtx_name_tx[16][XGE_FIFO_COUNT];
290 /* Mutex Name - Tx */
186 struct callout timer; /* Timer for polling */
291 struct callout timer; /* Timer for polling */
187 struct xge_hal_stats_hw_info_t *hwstats; /* Hardware Statistics */
188 int saved_regs[16]; /* To save register space */
189 int xge_mtu; /* MTU */
190 int initialized; /* Flag: Initialized or not */
292 struct ifmedia media; /* In-kernel representation of a */
293 /* single supported media type */
294 xge_hal_channel_h fifo_channel[XGE_FIFO_COUNT];
295 /* FIFO channels */
296 xge_hal_channel_h ring_channel[XGE_RING_COUNT];
297 /* Ring channels */
191 bus_dma_tag_t dma_tag_tx; /* Tag for dtr dma mapping (Tx) */
192 bus_dma_tag_t dma_tag_rx; /* Tag for dtr dma mapping (Rx) */
298 bus_dma_tag_t dma_tag_tx; /* Tag for dtr dma mapping (Tx) */
299 bus_dma_tag_t dma_tag_rx; /* Tag for dtr dma mapping (Rx) */
300 bus_dmamap_t extra_dma_map; /* Extra DMA map for Rx */
301 xge_msi_info_t msi_info; /* MSI info */
302 xge_driver_stats_t driver_stats; /* Driver statistics */
303 int initialized; /* Flag: Initialized or not */
193 int all_multicast; /* All multicast flag */
194 int macaddr_count; /* Multicast address count */
195 int in_detach; /* To avoid ioctl during detach */
196 int buffer_mode; /* Buffer Mode */
197 int rxd_mbuf_cnt; /* Number of buffers used */
198 int rxd_mbuf_len[5];/* Buffer lengths */
304 int all_multicast; /* All multicast flag */
305 int macaddr_count; /* Multicast address count */
306 int in_detach; /* To avoid ioctl during detach */
307 int buffer_mode; /* Buffer Mode */
308 int rxd_mbuf_cnt; /* Number of buffers used */
309 int rxd_mbuf_len[5];/* Buffer lengths */
199} xgelldev_t;
310 int enabled_tso; /* Flag: TSO Enabled */
311 int enabled_lro; /* Flag: LRO Enabled */
312 int enabled_msi; /* Flag: MSI Enabled */
313 int mtu; /* Interface MTU */
314 int lro_num; /* Number of LRO sessions */
315 struct lro_head lro_active; /* Active LRO sessions */
316 struct lro_head lro_free; /* Free LRO sessions */
317} xge_lldev_t;
200
201/* Rx descriptor private structure */
318
319/* Rx descriptor private structure */
202typedef struct {
203 mbuf_t *bufferArray;
204 struct xge_dma_mbuf dmainfo[5];
205} xgell_rx_priv_t;
320typedef struct xge_rx_priv_t {
321 mbuf_t *bufferArray;
322 xge_dma_mbuf_t dmainfo[5];
323} xge_rx_priv_t;
206
207/* Tx descriptor private structure */
324
325/* Tx descriptor private structure */
208typedef struct {
326typedef struct xge_tx_priv_t {
209 mbuf_t buffer;
210 bus_dmamap_t dma_map;
327 mbuf_t buffer;
328 bus_dmamap_t dma_map;
211} xgell_tx_priv_t;
329} xge_tx_priv_t;
212
213/* BAR0 Register */
330
331/* BAR0 Register */
214typedef struct barregister {
215 char option[2];
332typedef struct xge_register_t {
333 char option[2];
216 u64 offset;
217 u64 value;
334 u64 offset;
335 u64 value;
218}bar0reg_t;
336}xge_register_t;
219
337
220void xge_init_params(xge_hal_device_config_t *dconfig, device_t dev);
338void xge_init_params(xge_hal_device_config_t *, device_t);
221void xge_init(void *);
339void xge_init(void *);
222void xge_init_locked(void *);
223void xge_stop(xgelldev_t *);
224void freeResources(device_t, int);
225void xgell_callback_link_up(void *);
226void xgell_callback_link_down(void *);
227void xgell_callback_crit_err(void *, xge_hal_event_e, u64);
228void xgell_callback_event(xge_queue_item_t *);
340void xge_device_init(xge_lldev_t *, xge_hal_channel_reopen_e);
341void xge_device_stop(xge_lldev_t *, xge_hal_channel_reopen_e);
342void xge_stop(xge_lldev_t *);
343void xge_resources_free(device_t, xge_lables_e);
344void xge_callback_link_up(void *);
345void xge_callback_link_down(void *);
346void xge_callback_crit_err(void *, xge_hal_event_e, u64);
347void xge_callback_event(xge_queue_item_t *);
229int xge_ifmedia_change(struct ifnet *);
230void xge_ifmedia_status(struct ifnet *, struct ifmediareq *);
231int xge_ioctl(struct ifnet *, unsigned long, caddr_t);
348int xge_ifmedia_change(struct ifnet *);
349void xge_ifmedia_status(struct ifnet *, struct ifmediareq *);
350int xge_ioctl(struct ifnet *, unsigned long, caddr_t);
351int xge_ioctl_stats(xge_lldev_t *, struct ifreq *);
352int xge_ioctl_registers(xge_lldev_t *, struct ifreq *);
232void xge_timer(void *);
353void xge_timer(void *);
233int xge_intr_filter(void *);
234void xge_intr(void *);
235int xgell_rx_open(int, xgelldev_t *, xge_hal_channel_reopen_e);
236int xgell_tx_open(xgelldev_t *, xge_hal_channel_reopen_e);
237int xgell_channel_close(xgelldev_t *, xge_hal_channel_reopen_e);
238int xgell_channel_open(xgelldev_t *, xge_hal_channel_reopen_e);
239xge_hal_status_e xgell_rx_compl(xge_hal_channel_h, xge_hal_dtr_h, u8, void *);
240xge_hal_status_e xgell_tx_compl(xge_hal_channel_h, xge_hal_dtr_h, u8, void *);
241xge_hal_status_e xgell_tx_initial_replenish(xge_hal_channel_h, xge_hal_dtr_h,
242 int, void *, xge_hal_channel_reopen_e);
243xge_hal_status_e xgell_rx_initial_replenish(xge_hal_channel_h, xge_hal_dtr_h,
244 int, void *, xge_hal_channel_reopen_e);
245void xgell_rx_term(xge_hal_channel_h, xge_hal_dtr_h, xge_hal_dtr_state_e,
246 void *, xge_hal_channel_reopen_e);
247void xgell_tx_term(xge_hal_channel_h, xge_hal_dtr_h, xge_hal_dtr_state_e,
248 void *, xge_hal_channel_reopen_e);
249void xgell_set_mbuf_cflags(mbuf_t);
354int xge_isr_filter(void *);
355void xge_isr_line(void *);
356void xge_isr_msi(void *);
357void xge_enable_msi(xge_lldev_t *);
358int xge_rx_open(int, xge_lldev_t *, xge_hal_channel_reopen_e);
359int xge_tx_open(xge_lldev_t *, xge_hal_channel_reopen_e);
360void xge_channel_close(xge_lldev_t *, xge_hal_channel_reopen_e);
361int xge_channel_open(xge_lldev_t *, xge_hal_channel_reopen_e);
362xge_hal_status_e xge_rx_compl(xge_hal_channel_h, xge_hal_dtr_h, u8, void *);
363xge_hal_status_e xge_tx_compl(xge_hal_channel_h, xge_hal_dtr_h, u8, void *);
364xge_hal_status_e xge_tx_initial_replenish(xge_hal_channel_h, xge_hal_dtr_h,
365 int, void *, xge_hal_channel_reopen_e);
366xge_hal_status_e xge_rx_initial_replenish(xge_hal_channel_h, xge_hal_dtr_h,
367 int, void *, xge_hal_channel_reopen_e);
368void xge_rx_term(xge_hal_channel_h, xge_hal_dtr_h, xge_hal_dtr_state_e,
369 void *, xge_hal_channel_reopen_e);
370void xge_tx_term(xge_hal_channel_h, xge_hal_dtr_h, xge_hal_dtr_state_e,
371 void *, xge_hal_channel_reopen_e);
372void xge_set_mbuf_cflags(mbuf_t);
250void xge_send(struct ifnet *);
373void xge_send(struct ifnet *);
251void xge_send_locked(struct ifnet *);
252int xgell_get_multimode_normalbuf(xge_hal_dtr_h dtrh, xgell_rx_priv_t *rxd_priv,
253 xgelldev_t *lldev);
254int xgell_get_multimode_jumbobuf(xge_hal_dtr_h dtrh, xgell_rx_priv_t *rxd_priv,
255 xgelldev_t *lldev, int lock);
256int xgell_get_second_buffer(xgell_rx_priv_t *rxd_priv, xgelldev_t *lldev);
257int xgell_get_buf(xge_hal_dtr_h dtrh, xgell_rx_priv_t *rxd_priv,
258 xgelldev_t *lldev, int index);
259int xge_ring_dtr_get(mbuf_t mbuf_up, xge_hal_channel_h channelh, xge_hal_dtr_h dtr,
260 xgelldev_t *lldev, xgell_rx_priv_t *rxd_priv);
261int xgell_get_buf_3b_5b(xge_hal_dtr_h dtrh, xgell_rx_priv_t *rxd_priv,
262 xgelldev_t *lldev);
374static void inline xge_send_locked(struct ifnet *, int);
375int xge_get_buf(xge_hal_dtr_h, xge_rx_priv_t *, xge_lldev_t *, int);
376int xge_ring_dtr_get(mbuf_t, xge_hal_channel_h, xge_hal_dtr_h, xge_lldev_t *,
377 xge_rx_priv_t *);
378int xge_get_buf_3b_5b(xge_hal_dtr_h, xge_rx_priv_t *, xge_lldev_t *);
263void dmamap_cb(void *, bus_dma_segment_t *, int, int);
379void dmamap_cb(void *, bus_dma_segment_t *, int, int);
264void xgell_reset(xgelldev_t *);
265void xge_setmulti(xgelldev_t *);
266void xge_enable_promisc(xgelldev_t *);
267void xge_disable_promisc(xgelldev_t *);
268int changeMtu(xgelldev_t *, int);
269int changeBufmode(xgelldev_t *, int);
380void xge_reset(xge_lldev_t *);
381void xge_setmulti(xge_lldev_t *);
382void xge_enable_promisc(xge_lldev_t *);
383void xge_disable_promisc(xge_lldev_t *);
384int xge_change_mtu(xge_lldev_t *, int);
385void xge_buffer_mode_init(xge_lldev_t *, int);
270void xge_initialize(device_t, xge_hal_channel_reopen_e);
271void xge_terminate(device_t, xge_hal_channel_reopen_e);
386void xge_initialize(device_t, xge_hal_channel_reopen_e);
387void xge_terminate(device_t, xge_hal_channel_reopen_e);
272void if_up_locked(xgelldev_t *);
273void if_down_locked(xgelldev_t *);
274int xge_probe(device_t);
275int xge_driver_initialize(void);
276void xge_media_init(device_t);
277void xge_pci_space_save(device_t);
278void xge_pci_space_restore(device_t);
388int xge_probe(device_t);
389int xge_driver_initialize(void);
390void xge_media_init(device_t);
391void xge_pci_space_save(device_t);
392void xge_pci_space_restore(device_t);
393void xge_msi_info_save(xge_lldev_t *);
394void xge_msi_info_restore(xge_lldev_t *);
279int xge_attach(device_t);
280int xge_interface_setup(device_t);
281int xge_detach(device_t);
282int xge_shutdown(device_t);
395int xge_attach(device_t);
396int xge_interface_setup(device_t);
397int xge_detach(device_t);
398int xge_shutdown(device_t);
283int xge_suspend(device_t);
284int xge_resume(device_t);
399void xge_mutex_init(xge_lldev_t *);
400void xge_mutex_destroy(xge_lldev_t *);
401void xge_print_info(xge_lldev_t *);
402void xge_lro_flush_sessions(xge_lldev_t *);
403void xge_rx_buffer_sizes_set(xge_lldev_t *, int, int);
404void xge_accumulate_large_rx(xge_lldev_t *, struct mbuf *, int,
405 xge_rx_priv_t *);
406xge_hal_status_e xge_create_dma_tags(device_t);
407void xge_add_sysctl_handlers(xge_lldev_t *);
408void xge_confirm_changes(xge_lldev_t *, xge_option_e);
409static int xge_lro_accumulate(xge_lldev_t *, struct mbuf *);
410static void xge_lro_flush(xge_lldev_t *, xge_lro_entry_t *);
285
286#endif // _IF_XGE_H
287
411
412#endif // _IF_XGE_H
413