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if_msk.c (171509) if_msk.c (173769)
1/******************************************************************************
2 *
3 * Name : sky2.c
4 * Project: Gigabit Ethernet Driver for FreeBSD 5.x/6.x
5 * Version: $Revision: 1.23 $
6 * Date : $Date: 2005/12/22 09:04:11 $
7 * Purpose: Main driver source file
8 *

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94
95/*
96 * Device driver for the Marvell Yukon II Ethernet controller.
97 * Due to lack of documentation, this driver is based on the code from
98 * sk(4) and Marvell's myk(4) driver for FreeBSD 5.x.
99 */
100
101#include <sys/cdefs.h>
1/******************************************************************************
2 *
3 * Name : sky2.c
4 * Project: Gigabit Ethernet Driver for FreeBSD 5.x/6.x
5 * Version: $Revision: 1.23 $
6 * Date : $Date: 2005/12/22 09:04:11 $
7 * Purpose: Main driver source file
8 *

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94
95/*
96 * Device driver for the Marvell Yukon II Ethernet controller.
97 * Due to lack of documentation, this driver is based on the code from
98 * sk(4) and Marvell's myk(4) driver for FreeBSD 5.x.
99 */
100
101#include <sys/cdefs.h>
102__FBSDID("$FreeBSD: head/sys/dev/msk/if_msk.c 171509 2007-07-20 00:25:20Z yongari $");
102__FBSDID("$FreeBSD: head/sys/dev/msk/if_msk.c 173769 2007-11-20 06:20:02Z yongari $");
103
104#include <sys/param.h>
105#include <sys/systm.h>
106#include <sys/bus.h>
107#include <sys/endian.h>
108#include <sys/mbuf.h>
109#include <sys/malloc.h>
110#include <sys/kernel.h>

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911 error = 0;
912
913 switch(command) {
914 case SIOCSIFMTU:
915 if (ifr->ifr_mtu > MSK_JUMBO_MTU || ifr->ifr_mtu < ETHERMIN) {
916 error = EINVAL;
917 break;
918 }
103
104#include <sys/param.h>
105#include <sys/systm.h>
106#include <sys/bus.h>
107#include <sys/endian.h>
108#include <sys/mbuf.h>
109#include <sys/malloc.h>
110#include <sys/kernel.h>

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911 error = 0;
912
913 switch(command) {
914 case SIOCSIFMTU:
915 if (ifr->ifr_mtu > MSK_JUMBO_MTU || ifr->ifr_mtu < ETHERMIN) {
916 error = EINVAL;
917 break;
918 }
919 if (sc_if->msk_softc->msk_hw_id == CHIP_ID_YUKON_EC_U &&
919 if (sc_if->msk_softc->msk_hw_id == CHIP_ID_YUKON_FE &&
920 ifr->ifr_mtu > MSK_MAX_FRAMELEN) {
921 error = EINVAL;
922 break;
923 }
924 MSK_IF_LOCK(sc_if);
925 ifp->if_mtu = ifr->ifr_mtu;
926 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
927 msk_init_locked(sc_if);

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978 if ((mask & IFCAP_TSO4) != 0) {
979 ifp->if_capenable ^= IFCAP_TSO4;
980 if ((IFCAP_TSO4 & ifp->if_capenable) != 0 &&
981 (IFCAP_TSO4 & ifp->if_capabilities) != 0)
982 ifp->if_hwassist |= CSUM_TSO;
983 else
984 ifp->if_hwassist &= ~CSUM_TSO;
985 }
920 ifr->ifr_mtu > MSK_MAX_FRAMELEN) {
921 error = EINVAL;
922 break;
923 }
924 MSK_IF_LOCK(sc_if);
925 ifp->if_mtu = ifr->ifr_mtu;
926 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
927 msk_init_locked(sc_if);

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978 if ((mask & IFCAP_TSO4) != 0) {
979 ifp->if_capenable ^= IFCAP_TSO4;
980 if ((IFCAP_TSO4 & ifp->if_capenable) != 0 &&
981 (IFCAP_TSO4 & ifp->if_capabilities) != 0)
982 ifp->if_hwassist |= CSUM_TSO;
983 else
984 ifp->if_hwassist &= ~CSUM_TSO;
985 }
986 if (sc_if->msk_framesize > MSK_MAX_FRAMELEN &&
987 sc_if->msk_softc->msk_hw_id == CHIP_ID_YUKON_EC_U) {
988 /*
989 * In Yukon EC Ultra, TSO & checksum offload is not
990 * supported for jumbo frame.
991 */
992 ifp->if_hwassist &= ~(MSK_CSUM_FEATURES | CSUM_TSO);
993 ifp->if_capenable &= ~(IFCAP_TSO4 | IFCAP_TXCSUM);
994 }
995
986 VLAN_CAPABILITIES(ifp);
987 MSK_IF_UNLOCK(sc_if);
988 break;
989 default:
990 error = ether_ioctl(ifp, command, data);
991 break;
992 }
993

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1448 * However, the workaround also have to check OP code sequences to
1449 * verify whether the OP code is correct. Sometimes it should compute
1450 * IP/TCP/UDP checksum in driver in order to verify correctness of
1451 * checksum computed by hardware. If you have to compute checksum
1452 * with software to verify the hardware's checksum why have hardware
1453 * compute the checksum? I think there is no reason to spend time to
1454 * make Rx checksum offload work on Yukon II hardware.
1455 */
996 VLAN_CAPABILITIES(ifp);
997 MSK_IF_UNLOCK(sc_if);
998 break;
999 default:
1000 error = ether_ioctl(ifp, command, data);
1001 break;
1002 }
1003

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1458 * However, the workaround also have to check OP code sequences to
1459 * verify whether the OP code is correct. Sometimes it should compute
1460 * IP/TCP/UDP checksum in driver in order to verify correctness of
1461 * checksum computed by hardware. If you have to compute checksum
1462 * with software to verify the hardware's checksum why have hardware
1463 * compute the checksum? I think there is no reason to spend time to
1464 * make Rx checksum offload work on Yukon II hardware.
1465 */
1456 ifp->if_capabilities = IFCAP_TXCSUM;
1457 ifp->if_hwassist = MSK_CSUM_FEATURES;
1458 if (sc->msk_hw_id != CHIP_ID_YUKON_EC_U) {
1459 /* It seems Yukon EC Ultra doesn't support TSO. */
1460 ifp->if_capabilities |= IFCAP_TSO4;
1461 ifp->if_hwassist |= CSUM_TSO;
1462 }
1466 ifp->if_capabilities = IFCAP_TXCSUM | IFCAP_TSO4;
1467 ifp->if_hwassist = MSK_CSUM_FEATURES | CSUM_TSO;
1463 ifp->if_capenable = ifp->if_capabilities;
1464 ifp->if_ioctl = msk_ioctl;
1465 ifp->if_start = msk_start;
1466 ifp->if_timer = 0;
1467 ifp->if_watchdog = NULL;
1468 ifp->if_init = msk_init;
1469 IFQ_SET_MAXLEN(&ifp->if_snd, MSK_TX_RING_CNT - 1);
1470 ifp->if_snd.ifq_drv_maxlen = MSK_TX_RING_CNT - 1;

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1500
1501 /*
1502 * Tell the upper layer(s) we support long frames.
1503 * Must appear after the call to ether_ifattach() because
1504 * ether_ifattach() sets ifi_hdrlen to the default value.
1505 */
1506 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
1507
1468 ifp->if_capenable = ifp->if_capabilities;
1469 ifp->if_ioctl = msk_ioctl;
1470 ifp->if_start = msk_start;
1471 ifp->if_timer = 0;
1472 ifp->if_watchdog = NULL;
1473 ifp->if_init = msk_init;
1474 IFQ_SET_MAXLEN(&ifp->if_snd, MSK_TX_RING_CNT - 1);
1475 ifp->if_snd.ifq_drv_maxlen = MSK_TX_RING_CNT - 1;

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1505
1506 /*
1507 * Tell the upper layer(s) we support long frames.
1508 * Must appear after the call to ether_ifattach() because
1509 * ether_ifattach() sets ifi_hdrlen to the default value.
1510 */
1511 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
1512
1513 sc_if->msk_framesize = ifp->if_mtu + ETHER_HDR_LEN +
1514 ETHER_VLAN_ENCAP_LEN;
1515
1508 /*
1509 * Do miibus setup.
1510 */
1511 MSK_IF_UNLOCK(sc_if);
1512 error = mii_phy_probe(dev, &sc_if->msk_miibus, msk_mediachange,
1513 msk_mediastatus);
1514 if (error != 0) {
1515 device_printf(sc_if->msk_if_dev, "no PHY found!\n");

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3701 mii = device_get_softc(sc_if->msk_miibus);
3702
3703 error = 0;
3704 /* Cancel pending I/O and free all Rx/Tx buffers. */
3705 msk_stop(sc_if);
3706
3707 sc_if->msk_framesize = ifp->if_mtu + ETHER_HDR_LEN +
3708 ETHER_VLAN_ENCAP_LEN;
1516 /*
1517 * Do miibus setup.
1518 */
1519 MSK_IF_UNLOCK(sc_if);
1520 error = mii_phy_probe(dev, &sc_if->msk_miibus, msk_mediachange,
1521 msk_mediastatus);
1522 if (error != 0) {
1523 device_printf(sc_if->msk_if_dev, "no PHY found!\n");

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3709 mii = device_get_softc(sc_if->msk_miibus);
3710
3711 error = 0;
3712 /* Cancel pending I/O and free all Rx/Tx buffers. */
3713 msk_stop(sc_if);
3714
3715 sc_if->msk_framesize = ifp->if_mtu + ETHER_HDR_LEN +
3716 ETHER_VLAN_ENCAP_LEN;
3717 if (sc_if->msk_framesize > MSK_MAX_FRAMELEN &&
3718 sc_if->msk_softc->msk_hw_id == CHIP_ID_YUKON_EC_U) {
3719 /*
3720 * In Yukon EC Ultra, TSO & checksum offload is not
3721 * supported for jumbo frame.
3722 */
3723 ifp->if_hwassist &= ~(MSK_CSUM_FEATURES | CSUM_TSO);
3724 ifp->if_capenable &= ~(IFCAP_TSO4 | IFCAP_TXCSUM);
3725 }
3709
3710 /*
3711 * Initialize GMAC first.
3712 * Without this initialization, Rx MAC did not work as expected
3713 * and Rx MAC garbled status LEs and it resulted in out-of-order
3714 * or duplicated frame delivery which in turn showed very poor
3715 * Rx performance.(I had to write a packet analysis code that
3716 * could be embeded in driver to diagnose this issue.)

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3791 /* Configure Tx MAC FIFO. */
3792 CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, TX_GMF_CTRL_T), GMF_RST_SET);
3793 CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, TX_GMF_CTRL_T), GMF_RST_CLR);
3794 CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, TX_GMF_CTRL_T), GMF_OPER_ON);
3795
3796 /* Configure hardware VLAN tag insertion/stripping. */
3797 msk_setvlan(sc_if, ifp);
3798
3726
3727 /*
3728 * Initialize GMAC first.
3729 * Without this initialization, Rx MAC did not work as expected
3730 * and Rx MAC garbled status LEs and it resulted in out-of-order
3731 * or duplicated frame delivery which in turn showed very poor
3732 * Rx performance.(I had to write a packet analysis code that
3733 * could be embeded in driver to diagnose this issue.)

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3808 /* Configure Tx MAC FIFO. */
3809 CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, TX_GMF_CTRL_T), GMF_RST_SET);
3810 CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, TX_GMF_CTRL_T), GMF_RST_CLR);
3811 CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, TX_GMF_CTRL_T), GMF_OPER_ON);
3812
3813 /* Configure hardware VLAN tag insertion/stripping. */
3814 msk_setvlan(sc_if, ifp);
3815
3799 /* XXX It seems STFW is requried for all cases. */
3800 CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, TX_GMF_CTRL_T), TX_STFW_ENA);
3801
3802 if (sc->msk_hw_id == CHIP_ID_YUKON_EC_U) {
3803 /* Set Rx Pause threshould. */
3804 CSR_WRITE_1(sc, MR_ADDR(sc_if->msk_port, RX_GMF_LP_THR),
3805 MSK_ECU_LLPP);
3806 CSR_WRITE_1(sc, MR_ADDR(sc_if->msk_port, RX_GMF_UP_THR),
3807 MSK_ECU_ULPP);
3808 if (sc_if->msk_framesize > MSK_MAX_FRAMELEN) {
3809 /*
3816 if (sc->msk_hw_id == CHIP_ID_YUKON_EC_U) {
3817 /* Set Rx Pause threshould. */
3818 CSR_WRITE_1(sc, MR_ADDR(sc_if->msk_port, RX_GMF_LP_THR),
3819 MSK_ECU_LLPP);
3820 CSR_WRITE_1(sc, MR_ADDR(sc_if->msk_port, RX_GMF_UP_THR),
3821 MSK_ECU_ULPP);
3822 if (sc_if->msk_framesize > MSK_MAX_FRAMELEN) {
3823 /*
3810 * Can't sure the following code is needed as Yukon
3811 * Yukon EC Ultra may not support jumbo frames.
3812 *
3813 * Set Tx GMAC FIFO Almost Empty Threshold.
3814 */
3815 CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, TX_GMF_AE_THR),
3824 * Set Tx GMAC FIFO Almost Empty Threshold.
3825 */
3826 CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, TX_GMF_AE_THR),
3816 MSK_ECU_AE_THR);
3827 MSK_ECU_JUMBO_WM << 16 | MSK_ECU_AE_THR);
3817 /* Disable Store & Forward mode for Tx. */
3818 CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, TX_GMF_CTRL_T),
3828 /* Disable Store & Forward mode for Tx. */
3829 CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, TX_GMF_CTRL_T),
3819 TX_STFW_DIS);
3830 TX_JUMBO_ENA | TX_STFW_DIS);
3831 } else {
3832 /* Enable Store & Forward mode for Tx. */
3833 CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, TX_GMF_CTRL_T),
3834 TX_JUMBO_DIS | TX_STFW_ENA);
3820 }
3821 }
3822
3823 /*
3824 * Disable Force Sync bit and Alloc bit in Tx RAM interface
3825 * arbiter as we don't use Sync Tx queue.
3826 */
3827 CSR_WRITE_1(sc, MR_ADDR(sc_if->msk_port, TXA_CTRL),

--- 330 unchanged lines hidden --- 		3835 }
3836 }
3837
3838 /*
3839 * Disable Force Sync bit and Alloc bit in Tx RAM interface
3840 * arbiter as we don't use Sync Tx queue.
3841 */
3842 CSR_WRITE_1(sc, MR_ADDR(sc_if->msk_port, TXA_CTRL),

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