Deleted Added
full compact
if_mn.c (166920) if_mn.c (177599)
1/*-
2 * ----------------------------------------------------------------------------
3 * "THE BEER-WARE LICENSE" (Revision 42):
4 * <phk@FreeBSD.org> wrote this file. As long as you retain this notice you
5 * can do whatever you want with this stuff. If we meet some day, and you think
6 * this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
7 * ----------------------------------------------------------------------------
8 */

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18 *
19 * The FALC54 and MUNICH32X have far too many registers and weird modes for
20 * comfort, so I have not bothered typing it all into a "fooreg.h" file,
21 * you will (badly!) need the documentation anyway if you want to mess with
22 * this gadget.
23 */
24
25#include <sys/cdefs.h>
1/*-
2 * ----------------------------------------------------------------------------
3 * "THE BEER-WARE LICENSE" (Revision 42):
4 * <phk@FreeBSD.org> wrote this file. As long as you retain this notice you
5 * can do whatever you want with this stuff. If we meet some day, and you think
6 * this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
7 * ----------------------------------------------------------------------------
8 */

--- 9 unchanged lines hidden (view full) ---

18 *
19 * The FALC54 and MUNICH32X have far too many registers and weird modes for
20 * comfort, so I have not bothered typing it all into a "fooreg.h" file,
21 * you will (badly!) need the documentation anyway if you want to mess with
22 * this gadget.
23 */
24
25#include <sys/cdefs.h>
26__FBSDID("$FreeBSD: head/sys/pci/if_mn.c 166920 2007-02-23 19:41:34Z imp $");
26__FBSDID("$FreeBSD: head/sys/pci/if_mn.c 177599 2008-03-25 09:39:02Z ru $");
27
28/*
29 * Stuff to describe the MUNIC32X and FALC54 chips.
30 */
31
32#define M32_CHAN 32 /* We have 32 channels */
33#define M32_TS 32 /* We have 32 timeslots */
34

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688 if (nts == 32)
689 sc->m32_mem.cs[chan].itbs = 63;
690 else
691 sc->m32_mem.cs[chan].itbs = nts * 2;
692
693 /* Setup a transmit chain with one descriptor */
694 /* XXX: we actually send a 1 byte packet */
695 dp = mn_alloc_desc();
27
28/*
29 * Stuff to describe the MUNIC32X and FALC54 chips.
30 */
31
32#define M32_CHAN 32 /* We have 32 channels */
33#define M32_TS 32 /* We have 32 timeslots */
34

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688 if (nts == 32)
689 sc->m32_mem.cs[chan].itbs = 63;
690 else
691 sc->m32_mem.cs[chan].itbs = nts * 2;
692
693 /* Setup a transmit chain with one descriptor */
694 /* XXX: we actually send a 1 byte packet */
695 dp = mn_alloc_desc();
696 MGETHDR(m, M_TRYWAIT, MT_DATA);
697 if (m == NULL)
698 return ENOBUFS;
696 MGETHDR(m, M_WAIT, MT_DATA);
699 m->m_pkthdr.len = 0;
700 dp->m = m;
701 dp->flags = 0xc0000000 + (1 << 16);
702 dp->next = vtophys(dp);
703 dp->vnext = 0;
704 dp->data = vtophys(sc->name);
705 sc->m32_mem.cs[chan].tdesc = vtophys(dp);
706 sc->ch[chan]->x1 = dp;
707 sc->ch[chan]->xl = dp;
708
709 /* Setup a receive chain with 5 + NTS descriptors */
710
711 dp = mn_alloc_desc();
712 m = NULL;
697 m->m_pkthdr.len = 0;
698 dp->m = m;
699 dp->flags = 0xc0000000 + (1 << 16);
700 dp->next = vtophys(dp);
701 dp->vnext = 0;
702 dp->data = vtophys(sc->name);
703 sc->m32_mem.cs[chan].tdesc = vtophys(dp);
704 sc->ch[chan]->x1 = dp;
705 sc->ch[chan]->xl = dp;
706
707 /* Setup a receive chain with 5 + NTS descriptors */
708
709 dp = mn_alloc_desc();
710 m = NULL;
713 MGETHDR(m, M_TRYWAIT, MT_DATA);
714 if (m == NULL) {
715 mn_free_desc(dp);
716 return (ENOBUFS);
717 }
718 MCLGET(m, M_TRYWAIT);
719 if ((m->m_flags & M_EXT) == 0) {
720 mn_free_desc(dp);
721 m_freem(m);
722 return (ENOBUFS);
723 }
711 MGETHDR(m, M_WAIT, MT_DATA);
712 MCLGET(m, M_WAIT);
724 dp->m = m;
725 dp->data = vtophys(m->m_data);
726 dp->flags = 0x40000000;
727 dp->flags += 1600 << 16;
728 dp->next = vtophys(dp);
729 dp->vnext = 0;
730 sc->ch[chan]->rl = dp;
731
732 for (i = 0; i < (nts + 10); i++) {
733 dp2 = dp;
734 dp = mn_alloc_desc();
735 m = NULL;
713 dp->m = m;
714 dp->data = vtophys(m->m_data);
715 dp->flags = 0x40000000;
716 dp->flags += 1600 << 16;
717 dp->next = vtophys(dp);
718 dp->vnext = 0;
719 sc->ch[chan]->rl = dp;
720
721 for (i = 0; i < (nts + 10); i++) {
722 dp2 = dp;
723 dp = mn_alloc_desc();
724 m = NULL;
736 MGETHDR(m, M_TRYWAIT, MT_DATA);
737 if (m == NULL) {
738 mn_free_desc(dp);
739 m_freem(m);
740 return (ENOBUFS);
741 }
742 MCLGET(m, M_TRYWAIT);
743 if ((m->m_flags & M_EXT) == 0) {
744 mn_free_desc(dp);
745 m_freem(m);
746 return (ENOBUFS);
747 }
725 MGETHDR(m, M_WAIT, MT_DATA);
726 MCLGET(m, M_WAIT);
748 dp->m = m;
749 dp->data = vtophys(m->m_data);
750 dp->flags = 0x00000000;
751 dp->flags += 1600 << 16;
752 dp->next = vtophys(dp2);
753 dp->vnext = dp2;
754 }
755 sc->m32_mem.cs[chan].rdesc = vtophys(dp);

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727 dp->m = m;
728 dp->data = vtophys(m->m_data);
729 dp->flags = 0x00000000;
730 dp->flags += 1600 << 16;
731 dp->next = vtophys(dp2);
732 dp->vnext = dp2;
733 }
734 sc->m32_mem.cs[chan].rdesc = vtophys(dp);

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