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upd7210.c (202898) upd7210.c (203360)
1/*-
2 * Copyright (c) 2005 Poul-Henning Kamp <phk@FreeBSD.org>
3 * Copyright (c) 2010 Joerg Wunsch <joerg@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * High-level driver for �PD7210 based GPIB cards.
28 *
29 */
30
31#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2005 Poul-Henning Kamp <phk@FreeBSD.org>
3 * Copyright (c) 2010 Joerg Wunsch <joerg@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * High-level driver for �PD7210 based GPIB cards.
28 *
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: head/sys/dev/ieee488/upd7210.c 202898 2010-01-23 21:33:33Z joerg $");
32__FBSDID("$FreeBSD: head/sys/dev/ieee488/upd7210.c 203360 2010-02-01 21:21:10Z joerg $");
33
34# define GPIB_DEBUG
35# undef GPIB_DEBUG
36
37#include <sys/param.h>
38#include <sys/systm.h>
39#include <sys/conf.h>
40#include <sys/malloc.h>

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49#include <sys/time.h>
50#include <machine/bus.h>
51#include <machine/resource.h>
52#include <isa/isavar.h>
53
54#define UPD7210_HW_DRIVER
55#define UPD7210_SW_DRIVER
56#include <dev/ieee488/upd7210.h>
33
34# define GPIB_DEBUG
35# undef GPIB_DEBUG
36
37#include <sys/param.h>
38#include <sys/systm.h>
39#include <sys/conf.h>
40#include <sys/malloc.h>

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49#include <sys/time.h>
50#include <machine/bus.h>
51#include <machine/resource.h>
52#include <isa/isavar.h>
53
54#define UPD7210_HW_DRIVER
55#define UPD7210_SW_DRIVER
56#include <dev/ieee488/upd7210.h>
57#include <dev/ieee488/tnt4882.h>
57
58static MALLOC_DEFINE(M_GPIB, "GPIB", "GPIB");
59
60/* upd7210 generic stuff */
61
62void
63upd7210_print_isr(u_int isr1, u_int isr2)
64{

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85 u->wreg[reg] = val;
86 if (reg == AUXMR)
87 u->wreg[8 + (val >> 5)] = val & 0x1f;
88}
89
90void
91upd7210intr(void *arg)
92{
58
59static MALLOC_DEFINE(M_GPIB, "GPIB", "GPIB");
60
61/* upd7210 generic stuff */
62
63void
64upd7210_print_isr(u_int isr1, u_int isr2)
65{

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86 u->wreg[reg] = val;
87 if (reg == AUXMR)
88 u->wreg[8 + (val >> 5)] = val & 0x1f;
89}
90
91void
92upd7210intr(void *arg)
93{
93 u_int isr1, isr2;
94 u_int isr_1, isr_2, isr_3;
94 struct upd7210 *u;
95
96 u = arg;
97 mtx_lock(&u->mutex);
95 struct upd7210 *u;
96
97 u = arg;
98 mtx_lock(&u->mutex);
98 isr1 = upd7210_rd(u, ISR1);
99 isr2 = upd7210_rd(u, ISR2);
100 if (isr1 != 0 || isr2 != 0) {
101 if (u->busy == 0 || u->irq == NULL || !u->irq(u, 1)) {
99 isr_1 = upd7210_rd(u, ISR1);
100 isr_2 = upd7210_rd(u, ISR2);
101 if (u->use_fifo) {
102 isr_3 = bus_read_1(u->reg_res[0], isr3);
103 } else {
104 isr_3 = 0;
105 }
106 if (isr_1 != 0 || isr_2 != 0 || isr_3 != 0) {
107 if (u->busy == 0 || u->irq == NULL || !u->irq(u, isr_3)) {
102#if 0
103 printf("upd7210intr [%02x %02x %02x",
104 upd7210_rd(u, DIR), isr1, isr2);
105 printf(" %02x %02x %02x %02x %02x] ",
106 upd7210_rd(u, SPSR),
107 upd7210_rd(u, ADSR),
108 upd7210_rd(u, CPTR),
109 upd7210_rd(u, ADR0),

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163 return (0);
164 }
165 return (1);
166}
167
168/* Unaddressed Listen Only mode */
169
170static int
108#if 0
109 printf("upd7210intr [%02x %02x %02x",
110 upd7210_rd(u, DIR), isr1, isr2);
111 printf(" %02x %02x %02x %02x %02x] ",
112 upd7210_rd(u, SPSR),
113 upd7210_rd(u, ADSR),
114 upd7210_rd(u, CPTR),
115 upd7210_rd(u, ADR0),

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169 return (0);
170 }
171 return (1);
172}
173
174/* Unaddressed Listen Only mode */
175
176static int
171gpib_l_irq(struct upd7210 *u, int intr __unused)
177gpib_l_irq(struct upd7210 *u, int isr_3)
172{
173 int i;
178{
179 int i;
180 int have_data = 0;
174
181
175 if (u->rreg[ISR1] & 1) {
182 if (u->use_fifo) {
183 /* TNT5004 or TNT4882 in FIFO mode */
184 if (isr_3 & 0x04) {
185 /* FIFO not empty */
186 i = bus_read_1(u->reg_res[0], fifob);
187 have_data = 1;
188 bus_write_1(u->reg_res[0], cnt0, -1);
189 bus_write_1(u->reg_res[0], cnt1, (-1) >> 8);
190 bus_write_1(u->reg_res[0], cnt2, (-1) >> 16);
191 bus_write_1(u->reg_res[0], cnt3, (-1) >> 24);
192 bus_write_1(u->reg_res[0], cmdr, 0x04); /* GO */
193 }
194 } else if (u->rreg[ISR1] & 1) {
176 i = upd7210_rd(u, DIR);
195 i = upd7210_rd(u, DIR);
196 have_data = 1;
197 }
198
199 if (have_data) {
177 u->buf[u->buf_wp++] = i;
178 u->buf_wp &= (u->bufsize - 1);
179 i = (u->buf_rp + u->bufsize - u->buf_wp) & (u->bufsize - 1);
200 u->buf[u->buf_wp++] = i;
201 u->buf_wp &= (u->bufsize - 1);
202 i = (u->buf_rp + u->bufsize - u->buf_wp) & (u->bufsize - 1);
180 if (i < 8)
181 upd7210_wr(u, IMR1, 0);
203 if (i < 8) {
204 if (u->use_fifo)
205 bus_write_1(u->reg_res[0], imr3, 0x00);
206 else
207 upd7210_wr(u, IMR1, 0);
208 }
182 wakeup(u->buf);
183 return (1);
184 }
185 return (0);
186}
187
188static int
189gpib_l_open(struct cdev *dev, int oflags, int devtype, struct thread *td)

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201 u->irq = gpib_l_irq;
202 mtx_unlock(&u->mutex);
203
204 u->buf = malloc(PAGE_SIZE, M_GPIB, M_WAITOK);
205 u->bufsize = PAGE_SIZE;
206 u->buf_wp = 0;
207 u->buf_rp = 0;
208
209 wakeup(u->buf);
210 return (1);
211 }
212 return (0);
213}
214
215static int
216gpib_l_open(struct cdev *dev, int oflags, int devtype, struct thread *td)

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228 u->irq = gpib_l_irq;
229 mtx_unlock(&u->mutex);
230
231 u->buf = malloc(PAGE_SIZE, M_GPIB, M_WAITOK);
232 u->bufsize = PAGE_SIZE;
233 u->buf_wp = 0;
234 u->buf_rp = 0;
235
209 upd7210_wr(u, AUXMR, AUXMR_CRST);
236 upd7210_wr(u, AUXMR, AUXMR_CRST); /* chip reset */
210 DELAY(10000);
237 DELAY(10000);
211 upd7210_wr(u, AUXMR, C_ICR | 8);
238 upd7210_wr(u, AUXMR, C_ICR | 8); /* 8 MHz clock */
212 DELAY(1000);
239 DELAY(1000);
213 upd7210_wr(u, ADR, 0x60);
214 upd7210_wr(u, ADR, 0xe0);
215 upd7210_wr(u, ADMR, 0x70);
216 upd7210_wr(u, AUXMR, AUXMR_PON);
217 upd7210_wr(u, IMR1, 0x01);
240 upd7210_wr(u, ADR, 0x60); /* ADR0: disable listener and talker 0 */
241 upd7210_wr(u, ADR, 0xe0); /* ADR1: disable listener and talker 1 */
242 upd7210_wr(u, ADMR, 0x70); /* listen-only (lon) */
243 upd7210_wr(u, AUXMR, AUXMR_PON); /* immediate execute power-on (pon) */
244 if (u->use_fifo) {
245 /* TNT5004 or TNT4882 in FIFO mode */
246 bus_write_1(u->reg_res[0], cmdr, 0x10); /* reset FIFO */
247 bus_write_1(u->reg_res[0], cfg, 0x20); /* xfer IN, 8-bit FIFO */
248 bus_write_1(u->reg_res[0], cnt0, -1);
249 bus_write_1(u->reg_res[0], cnt1, (-1) >> 8);
250 bus_write_1(u->reg_res[0], cnt2, (-1) >> 16);
251 bus_write_1(u->reg_res[0], cnt3, (-1) >> 24);
252 bus_write_1(u->reg_res[0], cmdr, 0x04); /* GO */
253 bus_write_1(u->reg_res[0], imr3, 0x04); /* NEF IE */
254 } else {
255 /* �PD7210/NAT7210, or TNT4882 in non-FIFO mode */
256 upd7210_wr(u, IMR1, 0x01); /* data in interrupt enable */
257 }
218 return (0);
219}
220
221static int
222gpib_l_close(struct cdev *dev, int oflags, int devtype, struct thread *td)
223{
224 struct upd7210 *u;
225
226 u = dev->si_drv1;
227
228 mtx_lock(&u->mutex);
229 u->busy = 0;
258 return (0);
259}
260
261static int
262gpib_l_close(struct cdev *dev, int oflags, int devtype, struct thread *td)
263{
264 struct upd7210 *u;
265
266 u = dev->si_drv1;
267
268 mtx_lock(&u->mutex);
269 u->busy = 0;
270 if (u->use_fifo) {
271 /* TNT5004 or TNT4882 in FIFO mode */
272 bus_write_1(u->reg_res[0], cmdr, 0x22); /* soft RESET */
273 bus_write_1(u->reg_res[0], imr3, 0x00);
274 }
230 upd7210_wr(u, AUXMR, AUXMR_CRST);
231 DELAY(10000);
232 upd7210_wr(u, IMR1, 0x00);
233 upd7210_wr(u, IMR2, 0x00);
234 free(u->buf, M_GPIB);
235 u->buf = NULL;
236 mtx_unlock(&u->mutex);
237 return (0);

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266 mtx_unlock(&u->mutex);
267 error = uiomove(u->buf + u->buf_rp, z, uio);
268 mtx_lock(&u->mutex);
269 if (error)
270 break;
271 u->buf_rp += z;
272 u->buf_rp &= (u->bufsize - 1);
273 }
275 upd7210_wr(u, AUXMR, AUXMR_CRST);
276 DELAY(10000);
277 upd7210_wr(u, IMR1, 0x00);
278 upd7210_wr(u, IMR2, 0x00);
279 free(u->buf, M_GPIB);
280 u->buf = NULL;
281 mtx_unlock(&u->mutex);
282 return (0);

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311 mtx_unlock(&u->mutex);
312 error = uiomove(u->buf + u->buf_rp, z, uio);
313 mtx_lock(&u->mutex);
314 if (error)
315 break;
316 u->buf_rp += z;
317 u->buf_rp &= (u->bufsize - 1);
318 }
274 if (u->wreg[IMR1] == 0)
275 upd7210_wr(u, IMR1, 0x01);
319 if (u->use_fifo) {
320 bus_write_1(u->reg_res[0], imr3, 0x04); /* NFF IE */
321 } else {
322 if (u->wreg[IMR1] == 0)
323 upd7210_wr(u, IMR1, 0x01);
324 }
276 mtx_unlock(&u->mutex);
277 return (error);
278}
279
280static struct cdevsw gpib_l_cdevsw = {
281 .d_version = D_VERSION,
282 .d_name = "gpib_l",
283 .d_open = gpib_l_open,

--- 37 unchanged lines hidden --- 		325 mtx_unlock(&u->mutex);
326 return (error);
327}
328
329static struct cdevsw gpib_l_cdevsw = {
330 .d_version = D_VERSION,
331 .d_name = "gpib_l",
332 .d_open = gpib_l_open,

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