71#include <sys/param.h>
72#include <sys/systm.h>
73#include <sys/socket.h>
74#include <sys/sockio.h>
75#include <sys/mbuf.h>
76
77#include <sys/bus.h>
78#include <machine/bus.h>
79#include <sys/rman.h>
80#include <machine/resource.h>
81
82#include <net/ethernet.h>
83#include <net/if.h>
84#include <net/if_dl.h>
85#include <net/if_mib.h>
86#include <net/if_media.h>
87
88#include <netinet/in.h>
89#include <netinet/if_ether.h>
90
91#include <net/bpf.h>
92
93#include <i386/isa/ic/mb86960.h>
94#include <dev/fe/if_fereg.h>
95#include <dev/fe/if_fevar.h>
96
97/*
98 * Transmit just one packet per a "send" command to 86960.
99 * This option is intended for performance test. An EXPERIMENTAL option.
100 */
101#ifndef FE_SINGLE_TRANSMISSION
102#define FE_SINGLE_TRANSMISSION 0
103#endif
104
105/*
106 * Maximum loops when interrupt.
107 * This option prevents an infinite loop due to hardware failure.
108 * (Some laptops make an infinite loop after PC-Card is ejected.)
109 */
110#ifndef FE_MAX_LOOP
111#define FE_MAX_LOOP 0x800
112#endif
113
114/*
115 * If you define this option, 8-bit cards are also supported.
116 */
117/*#define FE_8BIT_SUPPORT*/
118
119/*
120 * Device configuration flags.
121 */
122
123/* DLCR6 settings. */
124#define FE_FLAGS_DLCR6_VALUE 0x007F
125
126/* Force DLCR6 override. */
127#define FE_FLAGS_OVERRIDE_DLCR6 0x0080
128
129
130devclass_t fe_devclass;
131
132/*
133 * Special filter values.
134 */
135static struct fe_filter const fe_filter_nothing = { FE_FILTER_NOTHING };
136static struct fe_filter const fe_filter_all = { FE_FILTER_ALL };
137
138/* Standard driver entry points. These can be static. */
139static void fe_init (void *);
140static driver_intr_t fe_intr;
141static int fe_ioctl (struct ifnet *, u_long, caddr_t);
142static void fe_start (struct ifnet *);
143static void fe_watchdog (struct ifnet *);
144static int fe_medchange (struct ifnet *);
145static void fe_medstat (struct ifnet *, struct ifmediareq *);
146
147/* Local functions. Order of declaration is confused. FIXME. */
148static int fe_get_packet ( struct fe_softc *, u_short );
149static void fe_tint ( struct fe_softc *, u_char );
150static void fe_rint ( struct fe_softc *, u_char );
151static void fe_xmit ( struct fe_softc * );
152static void fe_write_mbufs ( struct fe_softc *, struct mbuf * );
153static void fe_setmode ( struct fe_softc * );
154static void fe_loadmar ( struct fe_softc * );
155
156#ifdef DIAGNOSTIC
157static void fe_emptybuffer ( struct fe_softc * );
158#endif
159
160/*
161 * Fe driver specific constants which relate to 86960/86965.
162 */
163
164/* Interrupt masks */
165#define FE_TMASK ( FE_D2_COLL16 | FE_D2_TXDONE )
166#define FE_RMASK ( FE_D3_OVRFLO | FE_D3_CRCERR \
167 | FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY )
168
169/* Maximum number of iterations for a receive interrupt. */
170#define FE_MAX_RECV_COUNT ( ( 65536 - 2048 * 2 ) / 64 )
171 /*
172 * Maximum size of SRAM is 65536,
173 * minimum size of transmission buffer in fe is 2x2KB,
174 * and minimum amount of received packet including headers
175 * added by the chip is 64 bytes.
176 * Hence FE_MAX_RECV_COUNT is the upper limit for number
177 * of packets in the receive buffer.
178 */
179
180/*
181 * Miscellaneous definitions not directly related to hardware.
182 */
183
184/* The following line must be delete when "net/if_media.h" support it. */
185#ifndef IFM_10_FL
186#define IFM_10_FL /* 13 */ IFM_10_5
187#endif
188
189#if 0
190/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
191static int const bit2media [] = {
192 IFM_HDX | IFM_ETHER | IFM_AUTO,
193 IFM_HDX | IFM_ETHER | IFM_MANUAL,
194 IFM_HDX | IFM_ETHER | IFM_10_T,
195 IFM_HDX | IFM_ETHER | IFM_10_2,
196 IFM_HDX | IFM_ETHER | IFM_10_5,
197 IFM_HDX | IFM_ETHER | IFM_10_FL,
198 IFM_FDX | IFM_ETHER | IFM_10_T,
199 /* More can be come here... */
200 0
201};
202#else
203/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
204static int const bit2media [] = {
205 IFM_ETHER | IFM_AUTO,
206 IFM_ETHER | IFM_MANUAL,
207 IFM_ETHER | IFM_10_T,
208 IFM_ETHER | IFM_10_2,
209 IFM_ETHER | IFM_10_5,
210 IFM_ETHER | IFM_10_FL,
211 IFM_ETHER | IFM_10_T,
212 /* More can be come here... */
213 0
214};
215#endif
216
217/*
218 * Check for specific bits in specific registers have specific values.
219 * A common utility function called from various sub-probe routines.
220 */
221int
222fe_simple_probe (struct fe_softc const * sc,
223 struct fe_simple_probe_struct const * sp)
224{
225 struct fe_simple_probe_struct const *p;
226
227 for (p = sp; p->mask != 0; p++) {
228 if ((fe_inb(sc, p->port) & p->mask) != p->bits)
229 return 0;
230 }
231 return 1;
232}
233
234/* Test if a given 6 byte value is a valid Ethernet station (MAC)
235 address. "Vendor" is an expected vendor code (first three bytes,)
236 or a zero when nothing expected. */
237int
238valid_Ether_p (u_char const * addr, unsigned vendor)
239{
240#ifdef FE_DEBUG
241 printf("fe?: validating %6D against %06x\n", addr, ":", vendor);
242#endif
243
244 /* All zero is not allowed as a vendor code. */
245 if (addr[0] == 0 && addr[1] == 0 && addr[2] == 0) return 0;
246
247 switch (vendor) {
248 case 0x000000:
249 /* Legal Ethernet address (stored in ROM) must have
250 its Group and Local bits cleared. */
251 if ((addr[0] & 0x03) != 0) return 0;
252 break;
253 case 0x020000:
254 /* Same as above, but a local address is allowed in
255 this context. */
256 if ((addr[0] & 0x01) != 0) return 0;
257 break;
258 default:
259 /* Make sure the vendor part matches if one is given. */
260 if ( addr[0] != ((vendor >> 16) & 0xFF)
261 || addr[1] != ((vendor >> 8) & 0xFF)
262 || addr[2] != ((vendor ) & 0xFF)) return 0;
263 break;
264 }
265
266 /* Host part must not be all-zeros nor all-ones. */
267 if (addr[3] == 0xFF && addr[4] == 0xFF && addr[5] == 0xFF) return 0;
268 if (addr[3] == 0x00 && addr[4] == 0x00 && addr[5] == 0x00) return 0;
269
270 /* Given addr looks like an Ethernet address. */
271 return 1;
272}
273
274/* Fill our softc struct with default value. */
275void
276fe_softc_defaults (struct fe_softc *sc)
277{
278 /* Prepare for typical register prototypes. We assume a
279 "typical" board has <32KB> of <fast> SRAM connected with a
280 <byte-wide> data lines. */
281 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
282 sc->proto_dlcr5 = 0;
283 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
284 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
285 sc->proto_dlcr7 = FE_D7_BYTSWP_LH;
286 sc->proto_bmpr13 = 0;
287
288 /* Assume the probe process (to be done later) is stable. */
289 sc->stability = 0;
290
291 /* A typical board needs no hooks. */
292 sc->init = NULL;
293 sc->stop = NULL;
294
295 /* Assume the board has no software-controllable media selection. */
296 sc->mbitmap = MB_HM;
297 sc->defmedia = MB_HM;
298 sc->msel = NULL;
299}
300
301/* Common error reporting routine used in probe routines for
302 "soft configured IRQ"-type boards. */
303void
304fe_irq_failure (char const *name, int unit, int irq, char const *list)
305{
306 printf("fe%d: %s board is detected, but %s IRQ was given\n",
307 unit, name, (irq == NO_IRQ ? "no" : "invalid"));
308 if (list != NULL) {
309 printf("fe%d: specify an IRQ from %s in kernel config\n",
310 unit, list);
311 }
312}
313
314/*
315 * Hardware (vendor) specific hooks.
316 */
317
318/*
319 * Generic media selection scheme for MB86965 based boards.
320 */
321void
322fe_msel_965 (struct fe_softc *sc)
323{
324 u_char b13;
325
326 /* Find the appropriate bits for BMPR13 tranceiver control. */
327 switch (IFM_SUBTYPE(sc->media.ifm_media)) {
328 case IFM_AUTO: b13 = FE_B13_PORT_AUTO | FE_B13_TPTYPE_UTP; break;
329 case IFM_10_T: b13 = FE_B13_PORT_TP | FE_B13_TPTYPE_UTP; break;
330 default: b13 = FE_B13_PORT_AUI; break;
331 }
332
333 /* Write it into the register. It takes effect immediately. */
334 fe_outb(sc, FE_BMPR13, sc->proto_bmpr13 | b13);
335}
336
337
338/*
339 * Fujitsu MB86965 JLI mode support routines.
340 */
341
342/*
343 * Routines to read all bytes from the config EEPROM through MB86965A.
344 * It is a MicroWire (3-wire) serial EEPROM with 6-bit address.
345 * (93C06 or 93C46.)
346 */
347static void
348fe_strobe_eeprom_jli (struct fe_softc *sc, u_short bmpr16)
349{
350 /*
351 * We must guarantee 1us (or more) interval to access slow
352 * EEPROMs. The following redundant code provides enough
353 * delay with ISA timing. (Even if the bus clock is "tuned.")
354 * Some modification will be needed on faster busses.
355 */
356 fe_outb(sc, bmpr16, FE_B16_SELECT);
357 fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
358 fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
359 fe_outb(sc, bmpr16, FE_B16_SELECT);
360}
361
362void
363fe_read_eeprom_jli (struct fe_softc * sc, u_char * data)
364{
365 u_char n, val, bit;
366 u_char save16, save17;
367
368 /* Save the current value of the EEPROM interface registers. */
369 save16 = fe_inb(sc, FE_BMPR16);
370 save17 = fe_inb(sc, FE_BMPR17);
371
372 /* Read bytes from EEPROM; two bytes per an iteration. */
373 for (n = 0; n < JLI_EEPROM_SIZE / 2; n++) {
374
375 /* Reset the EEPROM interface. */
376 fe_outb(sc, FE_BMPR16, 0x00);
377 fe_outb(sc, FE_BMPR17, 0x00);
378
379 /* Start EEPROM access. */
380 fe_outb(sc, FE_BMPR16, FE_B16_SELECT);
381 fe_outb(sc, FE_BMPR17, FE_B17_DATA);
382 fe_strobe_eeprom_jli(sc, FE_BMPR16);
383
384 /* Pass the iteration count as well as a READ command. */
385 val = 0x80 | n;
386 for (bit = 0x80; bit != 0x00; bit >>= 1) {
387 fe_outb(sc, FE_BMPR17, (val & bit) ? FE_B17_DATA : 0);
388 fe_strobe_eeprom_jli(sc, FE_BMPR16);
389 }
390 fe_outb(sc, FE_BMPR17, 0x00);
391
392 /* Read a byte. */
393 val = 0;
394 for (bit = 0x80; bit != 0x00; bit >>= 1) {
395 fe_strobe_eeprom_jli(sc, FE_BMPR16);
396 if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA)
397 val |= bit;
398 }
399 *data++ = val;
400
401 /* Read one more byte. */
402 val = 0;
403 for (bit = 0x80; bit != 0x00; bit >>= 1) {
404 fe_strobe_eeprom_jli(sc, FE_BMPR16);
405 if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA)
406 val |= bit;
407 }
408 *data++ = val;
409 }
410
411#if 0
412 /* Reset the EEPROM interface, again. */
413 fe_outb(sc, FE_BMPR16, 0x00);
414 fe_outb(sc, FE_BMPR17, 0x00);
415#else
416 /* Make sure to restore the original value of EEPROM interface
417 registers, since we are not yet sure we have MB86965A on
418 the address. */
419 fe_outb(sc, FE_BMPR17, save17);
420 fe_outb(sc, FE_BMPR16, save16);
421#endif
422
423#if 1
424 /* Report what we got. */
425 if (bootverbose) {
426 int i;
427 data -= JLI_EEPROM_SIZE;
428 for (i = 0; i < JLI_EEPROM_SIZE; i += 16) {
429 printf("fe%d: EEPROM(JLI):%3x: %16D\n",
430 sc->sc_unit, i, data + i, " ");
431 }
432 }
433#endif
434}
435
436void
437fe_init_jli (struct fe_softc * sc)
438{
439 /* "Reset" by writing into a magic location. */
440 DELAY(200);
441 fe_outb(sc, 0x1E, fe_inb(sc, 0x1E));
442 DELAY(300);
443}
444
445
446/*
447 * SSi 78Q8377A support routines.
448 */
449
450/*
451 * Routines to read all bytes from the config EEPROM through 78Q8377A.
452 * It is a MicroWire (3-wire) serial EEPROM with 8-bit address. (I.e.,
453 * 93C56 or 93C66.)
454 *
455 * As I don't have SSi manuals, (hmm, an old song again!) I'm not exactly
456 * sure the following code is correct... It is just stolen from the
457 * C-NET(98)P2 support routine in FreeBSD(98).
458 */
459
460void
461fe_read_eeprom_ssi (struct fe_softc *sc, u_char *data)
462{
463 u_char val, bit;
464 int n;
465 u_char save6, save7, save12;
466
467 /* Save the current value for the DLCR registers we are about
468 to destroy. */
469 save6 = fe_inb(sc, FE_DLCR6);
470 save7 = fe_inb(sc, FE_DLCR7);
471
472 /* Put the 78Q8377A into a state that we can access the EEPROM. */
473 fe_outb(sc, FE_DLCR6,
474 FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_DLC_DISABLE);
475 fe_outb(sc, FE_DLCR7,
476 FE_D7_BYTSWP_LH | FE_D7_RBS_BMPR | FE_D7_RDYPNS | FE_D7_POWER_UP);
477
478 /* Save the current value for the BMPR12 register, too. */
479 save12 = fe_inb(sc, FE_DLCR12);
480
481 /* Read bytes from EEPROM; two bytes per an iteration. */
482 for (n = 0; n < SSI_EEPROM_SIZE / 2; n++) {
483
484 /* Start EEPROM access */
485 fe_outb(sc, FE_DLCR12, SSI_EEP);
486 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
487
488 /* Send the following four bits to the EEPROM in the
489 specified order: a dummy bit, a start bit, and
490 command bits (10) for READ. */
491 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL );
492 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
493 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT);
494 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
495 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT);
496 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
497 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL );
498 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
499
500 /* Pass the iteration count to the chip. */
501 for (bit = 0x80; bit != 0x00; bit >>= 1) {
502 val = ( n & bit ) ? SSI_DAT : 0;
503 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | val);
504 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | val);
505 }
506
507 /* Read a byte. */
508 val = 0;
509 for (bit = 0x80; bit != 0x00; bit >>= 1) {
510 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
511 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK);
512 if (fe_inb(sc, FE_DLCR12) & SSI_DIN)
513 val |= bit;
514 }
515 *data++ = val;
516
517 /* Read one more byte. */
518 val = 0;
519 for (bit = 0x80; bit != 0x00; bit >>= 1) {
520 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
521 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK);
522 if (fe_inb(sc, FE_DLCR12) & SSI_DIN)
523 val |= bit;
524 }
525 *data++ = val;
526
527 fe_outb(sc, FE_DLCR12, SSI_EEP);
528 }
529
530 /* Reset the EEPROM interface. (For now.) */
531 fe_outb(sc, FE_DLCR12, 0x00);
532
533 /* Restore the saved register values, for the case that we
534 didn't have 78Q8377A at the given address. */
535 fe_outb(sc, FE_DLCR12, save12);
536 fe_outb(sc, FE_DLCR7, save7);
537 fe_outb(sc, FE_DLCR6, save6);
538
539#if 1
540 /* Report what we got. */
541 if (bootverbose) {
542 int i;
543 data -= SSI_EEPROM_SIZE;
544 for (i = 0; i < SSI_EEPROM_SIZE; i += 16) {
545 printf("fe%d: EEPROM(SSI):%3x: %16D\n",
546 sc->sc_unit, i, data + i, " ");
547 }
548 }
549#endif
550}
551
552/*
553 * TDK/LANX boards support routines.
554 */
555
556/* It is assumed that the CLK line is low and SDA is high (float) upon entry. */
557#define LNX_PH(D,K,N) \
558 ((LNX_SDA_##D | LNX_CLK_##K) << N)
559#define LNX_CYCLE(D1,D2,D3,D4,K1,K2,K3,K4) \
560 (LNX_PH(D1,K1,0)|LNX_PH(D2,K2,8)|LNX_PH(D3,K3,16)|LNX_PH(D4,K4,24))
561
562#define LNX_CYCLE_START LNX_CYCLE(HI,LO,LO,HI, HI,HI,LO,LO)
563#define LNX_CYCLE_STOP LNX_CYCLE(LO,LO,HI,HI, LO,HI,HI,LO)
564#define LNX_CYCLE_HI LNX_CYCLE(HI,HI,HI,HI, LO,HI,LO,LO)
565#define LNX_CYCLE_LO LNX_CYCLE(LO,LO,LO,HI, LO,HI,LO,LO)
566#define LNX_CYCLE_INIT LNX_CYCLE(LO,HI,HI,HI, LO,LO,LO,LO)
567
568static void
569fe_eeprom_cycle_lnx (struct fe_softc *sc, u_short reg20, u_long cycle)
570{
571 fe_outb(sc, reg20, (cycle ) & 0xFF);
572 DELAY(15);
573 fe_outb(sc, reg20, (cycle >> 8) & 0xFF);
574 DELAY(15);
575 fe_outb(sc, reg20, (cycle >> 16) & 0xFF);
576 DELAY(15);
577 fe_outb(sc, reg20, (cycle >> 24) & 0xFF);
578 DELAY(15);
579}
580
581static u_char
582fe_eeprom_receive_lnx (struct fe_softc *sc, u_short reg20)
583{
584 u_char dat;
585
586 fe_outb(sc, reg20, LNX_CLK_HI | LNX_SDA_FL);
587 DELAY(15);
588 dat = fe_inb(sc, reg20);
589 fe_outb(sc, reg20, LNX_CLK_LO | LNX_SDA_FL);
590 DELAY(15);
591 return (dat & LNX_SDA_IN);
592}
593
594void
595fe_read_eeprom_lnx (struct fe_softc *sc, u_char *data)
596{
597 int i;
598 u_char n, bit, val;
599 u_char save20;
600 u_short reg20 = 0x14;
601
602 save20 = fe_inb(sc, reg20);
603
604 /* NOTE: DELAY() timing constants are approximately three
605 times longer (slower) than the required minimum. This is
606 to guarantee a reliable operation under some tough
607 conditions... Fortunately, this routine is only called
608 during the boot phase, so the speed is less important than
609 stability. */
610
611#if 1
612 /* Reset the X24C01's internal state machine and put it into
613 the IDLE state. We usually don't need this, but *if*
614 someone (e.g., probe routine of other driver) write some
615 garbage into the register at 0x14, synchronization will be
616 lost, and the normal EEPROM access protocol won't work.
617 Moreover, as there are no easy way to reset, we need a
618 _manoeuvre_ here. (It even lacks a reset pin, so pushing
619 the RESET button on the PC doesn't help!) */
620 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_INIT);
621 for (i = 0; i < 10; i++)
622 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START);
623 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP);
624 DELAY(10000);
625#endif
626
627 /* Issue a start condition. */
628 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START);
629
630 /* Send seven bits of the starting address (zero, in this
631 case) and a command bit for READ. */
632 val = 0x01;
633 for (bit = 0x80; bit != 0x00; bit >>= 1) {
634 if (val & bit) {
635 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_HI);
636 } else {
637 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO);
638 }
639 }
640
641 /* Receive an ACK bit. */
642 if (fe_eeprom_receive_lnx(sc, reg20)) {
643 /* ACK was not received. EEPROM is not present (i.e.,
644 this board was not a TDK/LANX) or not working
645 properly. */
646 if (bootverbose) {
647 printf("fe%d: no ACK received from EEPROM(LNX)\n",
648 sc->sc_unit);
649 }
650 /* Clear the given buffer to indicate we could not get
651 any info. and return. */
652 bzero(data, LNX_EEPROM_SIZE);
653 goto RET;
654 }
655
656 /* Read bytes from EEPROM. */
657 for (n = 0; n < LNX_EEPROM_SIZE; n++) {
658
659 /* Read a byte and store it into the buffer. */
660 val = 0x00;
661 for (bit = 0x80; bit != 0x00; bit >>= 1) {
662 if (fe_eeprom_receive_lnx(sc, reg20))
663 val |= bit;
664 }
665 *data++ = val;
666
667 /* Acknowledge if we have to read more. */
668 if (n < LNX_EEPROM_SIZE - 1) {
669 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO);
670 }
671 }
672
673 /* Issue a STOP condition, de-activating the clock line.
674 It will be safer to keep the clock line low than to leave
675 it high. */
676 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP);
677
678 RET:
679 fe_outb(sc, reg20, save20);
680
681#if 1
682 /* Report what we got. */
683 if (bootverbose) {
684 data -= LNX_EEPROM_SIZE;
685 for (i = 0; i < LNX_EEPROM_SIZE; i += 16) {
686 printf("fe%d: EEPROM(LNX):%3x: %16D\n",
687 sc->sc_unit, i, data + i, " ");
688 }
689 }
690#endif
691}
692
693void
694fe_init_lnx (struct fe_softc * sc)
695{
696 /* Reset the 86960. Do we need this? FIXME. */
697 fe_outb(sc, 0x12, 0x06);
698 DELAY(100);
699 fe_outb(sc, 0x12, 0x07);
700 DELAY(100);
701
702 /* Setup IRQ control register on the ASIC. */
703 fe_outb(sc, 0x14, sc->priv_info);
704}
705
706
707/*
708 * Ungermann-Bass boards support routine.
709 */
710void
711fe_init_ubn (struct fe_softc * sc)
712{
713 /* Do we need this? FIXME. */
714 fe_outb(sc, FE_DLCR7,
715 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
716 fe_outb(sc, 0x18, 0x00);
717 DELAY(200);
718
719 /* Setup IRQ control register on the ASIC. */
720 fe_outb(sc, 0x14, sc->priv_info);
721}
722
723
724/*
725 * Install interface into kernel networking data structures
726 */
727int
728fe_attach (device_t dev)
729{
730 struct fe_softc *sc = device_get_softc(dev);
731 int flags = device_get_flags(dev);
732 int b, error;
733
734 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET,
735 fe_intr, sc, &sc->irq_handle);
736 if (error) {
737 fe_release_resource(dev);
738 return ENXIO;
739 }
740
741 /*
742 * Initialize ifnet structure
743 */
744 sc->sc_if.if_softc = sc;
745 sc->sc_if.if_unit = sc->sc_unit;
746 sc->sc_if.if_name = "fe";
747 sc->sc_if.if_output = ether_output;
748 sc->sc_if.if_start = fe_start;
749 sc->sc_if.if_ioctl = fe_ioctl;
750 sc->sc_if.if_watchdog = fe_watchdog;
751 sc->sc_if.if_init = fe_init;
752 sc->sc_if.if_linkmib = &sc->mibdata;
753 sc->sc_if.if_linkmiblen = sizeof (sc->mibdata);
754
755#if 0 /* I'm not sure... */
756 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
757#endif
758
759 /*
760 * Set fixed interface flags.
761 */
762 sc->sc_if.if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
763
764#if 1
765 /*
766 * Set maximum size of output queue, if it has not been set.
767 * It is done here as this driver may be started after the
768 * system initialization (i.e., the interface is PCMCIA.)
769 *
770 * I'm not sure this is really necessary, but, even if it is,
771 * it should be done somewhere else, e.g., in if_attach(),
772 * since it must be a common workaround for all network drivers.
773 * FIXME.
774 */
775 if (sc->sc_if.if_snd.ifq_maxlen == 0)
776 sc->sc_if.if_snd.ifq_maxlen = ifqmaxlen;
777#endif
778
779#if FE_SINGLE_TRANSMISSION
780 /* Override txb config to allocate minimum. */
781 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
782 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
783#endif
784
785 /* Modify hardware config if it is requested. */
786 if (flags & FE_FLAGS_OVERRIDE_DLCR6)
787 sc->proto_dlcr6 = flags & FE_FLAGS_DLCR6_VALUE;
788
789 /* Find TX buffer size, based on the hardware dependent proto. */
790 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
791 case FE_D6_TXBSIZ_2x2KB: sc->txb_size = 2048; break;
792 case FE_D6_TXBSIZ_2x4KB: sc->txb_size = 4096; break;
793 case FE_D6_TXBSIZ_2x8KB: sc->txb_size = 8192; break;
794 default:
795 /* Oops, we can't work with single buffer configuration. */
796 if (bootverbose) {
797 printf("fe%d: strange TXBSIZ config; fixing\n",
798 sc->sc_unit);
799 }
800 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
801 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
802 sc->txb_size = 2048;
803 break;
804 }
805
806 /* Initialize the if_media interface. */
807 ifmedia_init(&sc->media, 0, fe_medchange, fe_medstat);
808 for (b = 0; bit2media[b] != 0; b++) {
809 if (sc->mbitmap & (1 << b)) {
810 ifmedia_add(&sc->media, bit2media[b], 0, NULL);
811 }
812 }
813 for (b = 0; bit2media[b] != 0; b++) {
814 if (sc->defmedia & (1 << b)) {
815 ifmedia_set(&sc->media, bit2media[b]);
816 break;
817 }
818 }
819#if 0 /* Turned off; this is called later, when the interface UPs. */
820 fe_medchange(sc);
821#endif
822
823 /* Attach and stop the interface. */
824 ether_ifattach(&sc->sc_if, ETHER_BPF_SUPPORTED);
825 fe_stop(sc);
826
827 /* Print additional info when attached. */
828 device_printf(dev, "address %6D, type %s%s\n",
829 sc->sc_enaddr, ":" , sc->typestr,
830 (sc->proto_dlcr4 & FE_D4_DSC) ? ", full duplex" : "");
831 if (bootverbose) {
832 int buf, txb, bbw, sbw, ram;
833
834 buf = txb = bbw = sbw = ram = -1;
835 switch ( sc->proto_dlcr6 & FE_D6_BUFSIZ ) {
836 case FE_D6_BUFSIZ_8KB: buf = 8; break;
837 case FE_D6_BUFSIZ_16KB: buf = 16; break;
838 case FE_D6_BUFSIZ_32KB: buf = 32; break;
839 case FE_D6_BUFSIZ_64KB: buf = 64; break;
840 }
841 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) {
842 case FE_D6_TXBSIZ_2x2KB: txb = 2; break;
843 case FE_D6_TXBSIZ_2x4KB: txb = 4; break;
844 case FE_D6_TXBSIZ_2x8KB: txb = 8; break;
845 }
846 switch ( sc->proto_dlcr6 & FE_D6_BBW ) {
847 case FE_D6_BBW_BYTE: bbw = 8; break;
848 case FE_D6_BBW_WORD: bbw = 16; break;
849 }
850 switch ( sc->proto_dlcr6 & FE_D6_SBW ) {
851 case FE_D6_SBW_BYTE: sbw = 8; break;
852 case FE_D6_SBW_WORD: sbw = 16; break;
853 }
854 switch ( sc->proto_dlcr6 & FE_D6_SRAM ) {
855 case FE_D6_SRAM_100ns: ram = 100; break;
856 case FE_D6_SRAM_150ns: ram = 150; break;
857 }
858 device_printf(dev, "SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
859 buf, bbw, ram, txb, sbw);
860 }
861 if (sc->stability & UNSTABLE_IRQ)
862 device_printf(dev, "warning: IRQ number may be incorrect\n");
863 if (sc->stability & UNSTABLE_MAC)
864 device_printf(dev, "warning: above MAC address may be incorrect\n");
865 if (sc->stability & UNSTABLE_TYPE)
866 device_printf(dev, "warning: hardware type was not validated\n");
867
868 return 0;
869}
870
871int
872fe_alloc_port(device_t dev, int size)
873{
874 struct fe_softc *sc = device_get_softc(dev);
875 struct resource *res;
876 int rid;
877
878 rid = 0;
879 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
880 0ul, ~0ul, size, RF_ACTIVE);
881 if (res) {
882 sc->port_used = size;
883 sc->port_res = res;
884 sc->iot = rman_get_bustag(res);
885 sc->ioh = rman_get_bushandle(res);
886 return (0);
887 }
888
889 return (ENOENT);
890}
891
892int
893fe_alloc_irq(device_t dev, int flags)
894{
895 struct fe_softc *sc = device_get_softc(dev);
896 struct resource *res;
897 int rid;
898
899 rid = 0;
900 res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
901 0ul, ~0ul, 1, RF_ACTIVE | flags);
902 if (res) {
903 sc->irq_res = res;
904 return (0);
905 }
906
907 return (ENOENT);
908}
909
910void
911fe_release_resource(device_t dev)
912{
913 struct fe_softc *sc = device_get_softc(dev);
914
915 if (sc->port_res) {
916 bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->port_res);
917 sc->port_res = NULL;
918 }
919 if (sc->irq_res) {
920 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
921 sc->irq_res = NULL;
922 }
923}
924
925/*
926 * Reset interface, after some (hardware) trouble is deteced.
927 */
928static void
929fe_reset (struct fe_softc *sc)
930{
931 /* Record how many packets are lost by this accident. */
932 sc->sc_if.if_oerrors += sc->txb_sched + sc->txb_count;
933 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
934
935 /* Put the interface into known initial state. */
936 fe_stop(sc);
937 if (sc->sc_if.if_flags & IFF_UP)
938 fe_init(sc);
939}
940
941/*
942 * Stop everything on the interface.
943 *
944 * All buffered packets, both transmitting and receiving,
945 * if any, will be lost by stopping the interface.
946 */
947void
948fe_stop (struct fe_softc *sc)
949{
950 int s;
951
952 s = splimp();
953
954 /* Disable interrupts. */
955 fe_outb(sc, FE_DLCR2, 0x00);
956 fe_outb(sc, FE_DLCR3, 0x00);
957
958 /* Stop interface hardware. */
959 DELAY(200);
960 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
961 DELAY(200);
962
963 /* Clear all interrupt status. */
964 fe_outb(sc, FE_DLCR0, 0xFF);
965 fe_outb(sc, FE_DLCR1, 0xFF);
966
967 /* Put the chip in stand-by mode. */
968 DELAY(200);
969 fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN);
970 DELAY(200);
971
972 /* Reset transmitter variables and interface flags. */
973 sc->sc_if.if_flags &= ~(IFF_OACTIVE | IFF_RUNNING);
974 sc->sc_if.if_timer = 0;
975 sc->txb_free = sc->txb_size;
976 sc->txb_count = 0;
977 sc->txb_sched = 0;
978
979 /* MAR loading can be delayed. */
980 sc->filter_change = 0;
981
982 /* Call a device-specific hook. */
983 if (sc->stop)
984 sc->stop(sc);
985
986 (void) splx(s);
987}
988
989/*
990 * Device timeout/watchdog routine. Entered if the device neglects to
991 * generate an interrupt after a transmit has been started on it.
992 */
993static void
994fe_watchdog ( struct ifnet *ifp )
995{
996 struct fe_softc *sc = (struct fe_softc *)ifp;
997
998 /* A "debug" message. */
999 printf("fe%d: transmission timeout (%d+%d)%s\n",
1000 ifp->if_unit, sc->txb_sched, sc->txb_count,
1001 (ifp->if_flags & IFF_UP) ? "" : " when down");
1002 if (sc->sc_if.if_opackets == 0 && sc->sc_if.if_ipackets == 0)
1003 printf("fe%d: wrong IRQ setting in config?\n", ifp->if_unit);
1004 fe_reset(sc);
1005}
1006
1007/*
1008 * Initialize device.
1009 */
1010static void
1011fe_init (void * xsc)
1012{
1013 struct fe_softc *sc = xsc;
1014 int s;
1015
1016 /* We need an address. */
1017 if (TAILQ_EMPTY(&sc->sc_if.if_addrhead)) { /* XXX unlikely */
1018#ifdef DIAGNOSTIC
1019 printf("fe%d: init() without any address\n", sc->sc_unit);
1020#endif
1021 return;
1022 }
1023
1024 /* Start initializing 86960. */
1025 s = splimp();
1026
1027 /* Call a hook before we start initializing the chip. */
1028 if (sc->init)
1029 sc->init(sc);
1030
1031 /*
1032 * Make sure to disable the chip, also.
1033 * This may also help re-programming the chip after
1034 * hot insertion of PCMCIAs.
1035 */
1036 DELAY(200);
1037 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1038 DELAY(200);
1039
1040 /* Power up the chip and select register bank for DLCRs. */
1041 DELAY(200);
1042 fe_outb(sc, FE_DLCR7,
1043 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
1044 DELAY(200);
1045
1046 /* Feed the station address. */
1047 fe_outblk(sc, FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN);
1048
1049 /* Clear multicast address filter to receive nothing. */
1050 fe_outb(sc, FE_DLCR7,
1051 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
1052 fe_outblk(sc, FE_MAR8, fe_filter_nothing.data, FE_FILTER_LEN);
1053
1054 /* Select the BMPR bank for runtime register access. */
1055 fe_outb(sc, FE_DLCR7,
1056 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1057
1058 /* Initialize registers. */
1059 fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */
1060 fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */
1061 fe_outb(sc, FE_DLCR2, 0x00);
1062 fe_outb(sc, FE_DLCR3, 0x00);
1063 fe_outb(sc, FE_DLCR4, sc->proto_dlcr4);
1064 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5);
1065 fe_outb(sc, FE_BMPR10, 0x00);
1066 fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1);
1067 fe_outb(sc, FE_BMPR12, 0x00);
1068 fe_outb(sc, FE_BMPR13, sc->proto_bmpr13);
1069 fe_outb(sc, FE_BMPR14, 0x00);
1070 fe_outb(sc, FE_BMPR15, 0x00);
1071
1072 /* Enable interrupts. */
1073 fe_outb(sc, FE_DLCR2, FE_TMASK);
1074 fe_outb(sc, FE_DLCR3, FE_RMASK);
1075
1076 /* Select requested media, just before enabling DLC. */
1077 if (sc->msel)
1078 sc->msel(sc);
1079
1080 /* Enable transmitter and receiver. */
1081 DELAY(200);
1082 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
1083 DELAY(200);
1084
1085#ifdef DIAGNOSTIC
1086 /*
1087 * Make sure to empty the receive buffer.
1088 *
1089 * This may be redundant, but *if* the receive buffer were full
1090 * at this point, then the driver would hang. I have experienced
1091 * some strange hang-up just after UP. I hope the following
1092 * code solve the problem.
1093 *
1094 * I have changed the order of hardware initialization.
1095 * I think the receive buffer cannot have any packets at this
1096 * point in this version. The following code *must* be
1097 * redundant now. FIXME.
1098 *
1099 * I've heard a rumore that on some PC card implementation of
1100 * 8696x, the receive buffer can have some data at this point.
1101 * The following message helps discovering the fact. FIXME.
1102 */
1103 if (!(fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)) {
1104 printf("fe%d: receive buffer has some data after reset\n",
1105 sc->sc_unit);
1106 fe_emptybuffer(sc);
1107 }
1108
1109 /* Do we need this here? Actually, no. I must be paranoia. */
1110 fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */
1111 fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */
1112#endif
1113
1114 /* Set 'running' flag, because we are now running. */
1115 sc->sc_if.if_flags |= IFF_RUNNING;
1116
1117 /*
1118 * At this point, the interface is running properly,
1119 * except that it receives *no* packets. we then call
1120 * fe_setmode() to tell the chip what packets to be
1121 * received, based on the if_flags and multicast group
1122 * list. It completes the initialization process.
1123 */
1124 fe_setmode(sc);
1125
1126#if 0
1127 /* ...and attempt to start output queued packets. */
1128 /* TURNED OFF, because the semi-auto media prober wants to UP
1129 the interface keeping it idle. The upper layer will soon
1130 start the interface anyway, and there are no significant
1131 delay. */
1132 fe_start(&sc->sc_if);
1133#endif
1134
1135 (void) splx(s);
1136}
1137
1138/*
1139 * This routine actually starts the transmission on the interface
1140 */
1141static void
1142fe_xmit (struct fe_softc *sc)
1143{
1144 /*
1145 * Set a timer just in case we never hear from the board again.
1146 * We use longer timeout for multiple packet transmission.
1147 * I'm not sure this timer value is appropriate. FIXME.
1148 */
1149 sc->sc_if.if_timer = 1 + sc->txb_count;
1150
1151 /* Update txb variables. */
1152 sc->txb_sched = sc->txb_count;
1153 sc->txb_count = 0;
1154 sc->txb_free = sc->txb_size;
1155 sc->tx_excolls = 0;
1156
1157 /* Start transmitter, passing packets in TX buffer. */
1158 fe_outb(sc, FE_BMPR10, sc->txb_sched | FE_B10_START);
1159}
1160
1161/*
1162 * Start output on interface.
1163 * We make two assumptions here:
1164 * 1) that the current priority is set to splimp _before_ this code
1165 * is called *and* is returned to the appropriate priority after
1166 * return
1167 * 2) that the IFF_OACTIVE flag is checked before this code is called
1168 * (i.e. that the output part of the interface is idle)
1169 */
1170void
1171fe_start (struct ifnet *ifp)
1172{
1173 struct fe_softc *sc = ifp->if_softc;
1174 struct mbuf *m;
1175
1176#ifdef DIAGNOSTIC
1177 /* Just a sanity check. */
1178 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
1179 /*
1180 * Txb_count and txb_free co-works to manage the
1181 * transmission buffer. Txb_count keeps track of the
1182 * used potion of the buffer, while txb_free does unused
1183 * potion. So, as long as the driver runs properly,
1184 * txb_count is zero if and only if txb_free is same
1185 * as txb_size (which represents whole buffer.)
1186 */
1187 printf("fe%d: inconsistent txb variables (%d, %d)\n",
1188 sc->sc_unit, sc->txb_count, sc->txb_free);
1189 /*
1190 * So, what should I do, then?
1191 *
1192 * We now know txb_count and txb_free contradicts. We
1193 * cannot, however, tell which is wrong. More
1194 * over, we cannot peek 86960 transmission buffer or
1195 * reset the transmission buffer. (In fact, we can
1196 * reset the entire interface. I don't want to do it.)
1197 *
1198 * If txb_count is incorrect, leaving it as-is will cause
1199 * sending of garbage after next interrupt. We have to
1200 * avoid it. Hence, we reset the txb_count here. If
1201 * txb_free was incorrect, resetting txb_count just loose
1202 * some packets. We can live with it.
1203 */
1204 sc->txb_count = 0;
1205 }
1206#endif
1207
1208 /*
1209 * First, see if there are buffered packets and an idle
1210 * transmitter - should never happen at this point.
1211 */
1212 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
1213 printf("fe%d: transmitter idle with %d buffered packets\n",
1214 sc->sc_unit, sc->txb_count);
1215 fe_xmit(sc);
1216 }
1217
1218 /*
1219 * Stop accepting more transmission packets temporarily, when
1220 * a filter change request is delayed. Updating the MARs on
1221 * 86960 flushes the transmission buffer, so it is delayed
1222 * until all buffered transmission packets have been sent
1223 * out.
1224 */
1225 if (sc->filter_change) {
1226 /*
1227 * Filter change request is delayed only when the DLC is
1228 * working. DLC soon raise an interrupt after finishing
1229 * the work.
1230 */
1231 goto indicate_active;
1232 }
1233
1234 for (;;) {
1235
1236 /*
1237 * See if there is room to put another packet in the buffer.
1238 * We *could* do better job by peeking the send queue to
1239 * know the length of the next packet. Current version just
1240 * tests against the worst case (i.e., longest packet). FIXME.
1241 *
1242 * When adding the packet-peek feature, don't forget adding a
1243 * test on txb_count against QUEUEING_MAX.
1244 * There is a little chance the packet count exceeds
1245 * the limit. Assume transmission buffer is 8KB (2x8KB
1246 * configuration) and an application sends a bunch of small
1247 * (i.e., minimum packet sized) packets rapidly. An 8KB
1248 * buffer can hold 130 blocks of 62 bytes long...
1249 */
1250 if (sc->txb_free
1251 < ETHER_MAX_LEN - ETHER_CRC_LEN + FE_DATA_LEN_LEN) {
1252 /* No room. */
1253 goto indicate_active;
1254 }
1255
1256#if FE_SINGLE_TRANSMISSION
1257 if (sc->txb_count > 0) {
1258 /* Just one packet per a transmission buffer. */
1259 goto indicate_active;
1260 }
1261#endif
1262
1263 /*
1264 * Get the next mbuf chain for a packet to send.
1265 */
1266 IF_DEQUEUE(&sc->sc_if.if_snd, m);
1267 if (m == NULL) {
1268 /* No more packets to send. */
1269 goto indicate_inactive;
1270 }
1271
1272 /*
1273 * Copy the mbuf chain into the transmission buffer.
1274 * txb_* variables are updated as necessary.
1275 */
1276 fe_write_mbufs(sc, m);
1277
1278 /* Start transmitter if it's idle. */
1279 if ((sc->txb_count > 0) && (sc->txb_sched == 0))
1280 fe_xmit(sc);
1281
1282 /*
1283 * Tap off here if there is a bpf listener,
1284 * and the device is *not* in promiscuous mode.
1285 * (86960 receives self-generated packets if
1286 * and only if it is in "receive everything"
1287 * mode.)
1288 */
1289 if (sc->sc_if.if_bpf &&
1290 !(sc->sc_if.if_flags & IFF_PROMISC))
1291 bpf_mtap(&sc->sc_if, m);
1292
1293 m_freem(m);
1294 }
1295
1296 indicate_inactive:
1297 /*
1298 * We are using the !OACTIVE flag to indicate to
1299 * the outside world that we can accept an
1300 * additional packet rather than that the
1301 * transmitter is _actually_ active. Indeed, the
1302 * transmitter may be active, but if we haven't
1303 * filled all the buffers with data then we still
1304 * want to accept more.
1305 */
1306 sc->sc_if.if_flags &= ~IFF_OACTIVE;
1307 return;
1308
1309 indicate_active:
1310 /*
1311 * The transmitter is active, and there are no room for
1312 * more outgoing packets in the transmission buffer.
1313 */
1314 sc->sc_if.if_flags |= IFF_OACTIVE;
1315 return;
1316}
1317
1318/*
1319 * Drop (skip) a packet from receive buffer in 86960 memory.
1320 */
1321static void
1322fe_droppacket (struct fe_softc * sc, int len)
1323{
1324 int i;
1325
1326 /*
1327 * 86960 manual says that we have to read 8 bytes from the buffer
1328 * before skip the packets and that there must be more than 8 bytes
1329 * remaining in the buffer when issue a skip command.
1330 * Remember, we have already read 4 bytes before come here.
1331 */
1332 if (len > 12) {
1333 /* Read 4 more bytes, and skip the rest of the packet. */
1334#ifdef FE_8BIT_SUPPORT
1335 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1336 {
1337 (void) fe_inb(sc, FE_BMPR8);
1338 (void) fe_inb(sc, FE_BMPR8);
1339 (void) fe_inb(sc, FE_BMPR8);
1340 (void) fe_inb(sc, FE_BMPR8);
1341 }
1342 else
1343#endif
1344 {
1345 (void) fe_inw(sc, FE_BMPR8);
1346 (void) fe_inw(sc, FE_BMPR8);
1347 }
1348 fe_outb(sc, FE_BMPR14, FE_B14_SKIP);
1349 } else {
1350 /* We should not come here unless receiving RUNTs. */
1351#ifdef FE_8BIT_SUPPORT
1352 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1353 {
1354 for (i = 0; i < len; i++)
1355 (void) fe_inb(sc, FE_BMPR8);
1356 }
1357 else
1358#endif
1359 {
1360 for (i = 0; i < len; i += 2)
1361 (void) fe_inw(sc, FE_BMPR8);
1362 }
1363 }
1364}
1365
1366#ifdef DIAGNOSTIC
1367/*
1368 * Empty receiving buffer.
1369 */
1370static void
1371fe_emptybuffer (struct fe_softc * sc)
1372{
1373 int i;
1374 u_char saved_dlcr5;
1375
1376#ifdef FE_DEBUG
1377 printf("fe%d: emptying receive buffer\n", sc->sc_unit);
1378#endif
1379
1380 /*
1381 * Stop receiving packets, temporarily.
1382 */
1383 saved_dlcr5 = fe_inb(sc, FE_DLCR5);
1384 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5);
1385 DELAY(1300);
1386
1387 /*
1388 * When we come here, the receive buffer management may
1389 * have been broken. So, we cannot use skip operation.
1390 * Just discard everything in the buffer.
1391 */
1392#ifdef FE_8BIT_SUPPORT
1393 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1394 {
1395 for (i = 0; i < 65536; i++) {
1396 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1397 break;
1398 (void) fe_inb(sc, FE_BMPR8);
1399 }
1400 }
1401 else
1402#endif
1403 {
1404 for (i = 0; i < 65536; i += 2) {
1405 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1406 break;
1407 (void) fe_inw(sc, FE_BMPR8);
1408 }
1409 }
1410
1411 /*
1412 * Double check.
1413 */
1414 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP) {
1415 printf("fe%d: could not empty receive buffer\n", sc->sc_unit);
1416 /* Hmm. What should I do if this happens? FIXME. */
1417 }
1418
1419 /*
1420 * Restart receiving packets.
1421 */
1422 fe_outb(sc, FE_DLCR5, saved_dlcr5);
1423}
1424#endif
1425
1426/*
1427 * Transmission interrupt handler
1428 * The control flow of this function looks silly. FIXME.
1429 */
1430static void
1431fe_tint (struct fe_softc * sc, u_char tstat)
1432{
1433 int left;
1434 int col;
1435
1436 /*
1437 * Handle "excessive collision" interrupt.
1438 */
1439 if (tstat & FE_D0_COLL16) {
1440
1441 /*
1442 * Find how many packets (including this collided one)
1443 * are left unsent in transmission buffer.
1444 */
1445 left = fe_inb(sc, FE_BMPR10);
1446 printf("fe%d: excessive collision (%d/%d)\n",
1447 sc->sc_unit, left, sc->txb_sched);
1448
1449 /*
1450 * Clear the collision flag (in 86960) here
1451 * to avoid confusing statistics.
1452 */
1453 fe_outb(sc, FE_DLCR0, FE_D0_COLLID);
1454
1455 /*
1456 * Restart transmitter, skipping the
1457 * collided packet.
1458 *
1459 * We *must* skip the packet to keep network running
1460 * properly. Excessive collision error is an
1461 * indication of the network overload. If we
1462 * tried sending the same packet after excessive
1463 * collision, the network would be filled with
1464 * out-of-time packets. Packets belonging
1465 * to reliable transport (such as TCP) are resent
1466 * by some upper layer.
1467 */
1468 fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1);
1469
1470 /* Update statistics. */
1471 sc->tx_excolls++;
1472 }
1473
1474 /*
1475 * Handle "transmission complete" interrupt.
1476 */
1477 if (tstat & FE_D0_TXDONE) {
1478
1479 /*
1480 * Add in total number of collisions on last
1481 * transmission. We also clear "collision occurred" flag
1482 * here.
1483 *
1484 * 86960 has a design flaw on collision count on multiple
1485 * packet transmission. When we send two or more packets
1486 * with one start command (that's what we do when the
1487 * transmission queue is crowded), 86960 informs us number
1488 * of collisions occurred on the last packet on the
1489 * transmission only. Number of collisions on previous
1490 * packets are lost. I have told that the fact is clearly
1491 * stated in the Fujitsu document.
1492 *
1493 * I considered not to mind it seriously. Collision
1494 * count is not so important, anyway. Any comments? FIXME.
1495 */
1496
1497 if (fe_inb(sc, FE_DLCR0) & FE_D0_COLLID) {
1498
1499 /* Clear collision flag. */
1500 fe_outb(sc, FE_DLCR0, FE_D0_COLLID);
1501
1502 /* Extract collision count from 86960. */
1503 col = fe_inb(sc, FE_DLCR4);
1504 col = (col & FE_D4_COL) >> FE_D4_COL_SHIFT;
1505 if (col == 0) {
1506 /*
1507 * Status register indicates collisions,
1508 * while the collision count is zero.
1509 * This can happen after multiple packet
1510 * transmission, indicating that one or more
1511 * previous packet(s) had been collided.
1512 *
1513 * Since the accurate number of collisions
1514 * has been lost, we just guess it as 1;
1515 * Am I too optimistic? FIXME.
1516 */
1517 col = 1;
1518 }
1519 sc->sc_if.if_collisions += col;
1520 if (col == 1)
1521 sc->mibdata.dot3StatsSingleCollisionFrames++;
1522 else
1523 sc->mibdata.dot3StatsMultipleCollisionFrames++;
1524 sc->mibdata.dot3StatsCollFrequencies[col-1]++;
1525 }
1526
1527 /*
1528 * Update transmission statistics.
1529 * Be sure to reflect number of excessive collisions.
1530 */
1531 col = sc->tx_excolls;
1532 sc->sc_if.if_opackets += sc->txb_sched - col;
1533 sc->sc_if.if_oerrors += col;
1534 sc->sc_if.if_collisions += col * 16;
1535 sc->mibdata.dot3StatsExcessiveCollisions += col;
1536 sc->mibdata.dot3StatsCollFrequencies[15] += col;
1537 sc->txb_sched = 0;
1538
1539 /*
1540 * The transmitter is no more active.
1541 * Reset output active flag and watchdog timer.
1542 */
1543 sc->sc_if.if_flags &= ~IFF_OACTIVE;
1544 sc->sc_if.if_timer = 0;
1545
1546 /*
1547 * If more data is ready to transmit in the buffer, start
1548 * transmitting them. Otherwise keep transmitter idle,
1549 * even if more data is queued. This gives receive
1550 * process a slight priority.
1551 */
1552 if (sc->txb_count > 0)
1553 fe_xmit(sc);
1554 }
1555}
1556
1557/*
1558 * Ethernet interface receiver interrupt.
1559 */
1560static void
1561fe_rint (struct fe_softc * sc, u_char rstat)
1562{
1563 u_short len;
1564 u_char status;
1565 int i;
1566
1567 /*
1568 * Update statistics if this interrupt is caused by an error.
1569 * Note that, when the system was not sufficiently fast, the
1570 * receive interrupt might not be acknowledged immediately. If
1571 * one or more errornous frames were received before this routine
1572 * was scheduled, they are ignored, and the following error stats
1573 * give less than real values.
1574 */
1575 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | FE_D1_ALGERR | FE_D1_SRTPKT)) {
1576 if (rstat & FE_D1_OVRFLO)
1577 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1578 if (rstat & FE_D1_CRCERR)
1579 sc->mibdata.dot3StatsFCSErrors++;
1580 if (rstat & FE_D1_ALGERR)
1581 sc->mibdata.dot3StatsAlignmentErrors++;
1582#if 0
1583 /* The reference MAC receiver defined in 802.3
1584 silently ignores short frames (RUNTs) without
1585 notifying upper layer. RFC 1650 (dot3 MIB) is
1586 based on the 802.3, and it has no stats entry for
1587 RUNTs... */
1588 if (rstat & FE_D1_SRTPKT)
1589 sc->mibdata.dot3StatsFrameTooShorts++; /* :-) */
1590#endif
1591 sc->sc_if.if_ierrors++;
1592 }
1593
1594 /*
1595 * MB86960 has a flag indicating "receive queue empty."
1596 * We just loop, checking the flag, to pull out all received
1597 * packets.
1598 *
1599 * We limit the number of iterations to avoid infinite-loop.
1600 * The upper bound is set to unrealistic high value.
1601 */
1602 for (i = 0; i < FE_MAX_RECV_COUNT * 2; i++) {
1603
1604 /* Stop the iteration if 86960 indicates no packets. */
1605 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1606 return;
1607
1608 /*
1609 * Extract a receive status byte.
1610 * As our 86960 is in 16 bit bus access mode, we have to
1611 * use inw() to get the status byte. The significant
1612 * value is returned in lower 8 bits.
1613 */
1614#ifdef FE_8BIT_SUPPORT
1615 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1616 {
1617 status = fe_inb(sc, FE_BMPR8);
1618 (void) fe_inb(sc, FE_BMPR8);
1619 }
1620 else
1621#endif
1622 {
1623 status = (u_char) fe_inw(sc, FE_BMPR8);
1624 }
1625
1626 /*
1627 * Extract the packet length.
1628 * It is a sum of a header (14 bytes) and a payload.
1629 * CRC has been stripped off by the 86960.
1630 */
1631#ifdef FE_8BIT_SUPPORT
1632 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1633 {
1634 len = fe_inb(sc, FE_BMPR8);
1635 len |= (fe_inb(sc, FE_BMPR8) << 8);
1636 }
1637 else
1638#endif
1639 {
1640 len = fe_inw(sc, FE_BMPR8);
1641 }
1642
1643 /*
1644 * AS our 86960 is programed to ignore errored frame,
1645 * we must not see any error indication in the
1646 * receive buffer. So, any error condition is a
1647 * serious error, e.g., out-of-sync of the receive
1648 * buffer pointers.
1649 */
1650 if ((status & 0xF0) != 0x20 ||
1651 len > ETHER_MAX_LEN - ETHER_CRC_LEN ||
1652 len < ETHER_MIN_LEN - ETHER_CRC_LEN) {
1653 printf("fe%d: RX buffer out-of-sync\n", sc->sc_unit);
1654 sc->sc_if.if_ierrors++;
1655 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1656 fe_reset(sc);
1657 return;
1658 }
1659
1660 /*
1661 * Go get a packet.
1662 */
1663 if (fe_get_packet(sc, len) < 0) {
1664 /*
1665 * Negative return from fe_get_packet()
1666 * indicates no available mbuf. We stop
1667 * receiving packets, even if there are more
1668 * in the buffer. We hope we can get more
1669 * mbuf next time.
1670 */
1671 sc->sc_if.if_ierrors++;
1672 sc->mibdata.dot3StatsMissedFrames++;
1673 fe_droppacket(sc, len);
1674 return;
1675 }
1676
1677 /* Successfully received a packet. Update stat. */
1678 sc->sc_if.if_ipackets++;
1679 }
1680
1681 /* Maximum number of frames has been received. Something
1682 strange is happening here... */
1683 printf("fe%d: unusual receive flood\n", sc->sc_unit);
1684 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1685 fe_reset(sc);
1686}
1687
1688/*
1689 * Ethernet interface interrupt processor
1690 */
1691static void
1692fe_intr (void *arg)
1693{
1694 struct fe_softc *sc = arg;
1695 u_char tstat, rstat;
1696 int loop_count = FE_MAX_LOOP;
1697
1698 /* Loop until there are no more new interrupt conditions. */
1699 while (loop_count-- > 0) {
1700 /*
1701 * Get interrupt conditions, masking unneeded flags.
1702 */
1703 tstat = fe_inb(sc, FE_DLCR0) & FE_TMASK;
1704 rstat = fe_inb(sc, FE_DLCR1) & FE_RMASK;
1705 if (tstat == 0 && rstat == 0)
1706 return;
1707
1708 /*
1709 * Reset the conditions we are acknowledging.
1710 */
1711 fe_outb(sc, FE_DLCR0, tstat);
1712 fe_outb(sc, FE_DLCR1, rstat);
1713
1714 /*
1715 * Handle transmitter interrupts.
1716 */
1717 if (tstat)
1718 fe_tint(sc, tstat);
1719
1720 /*
1721 * Handle receiver interrupts
1722 */
1723 if (rstat)
1724 fe_rint(sc, rstat);
1725
1726 /*
1727 * Update the multicast address filter if it is
1728 * needed and possible. We do it now, because
1729 * we can make sure the transmission buffer is empty,
1730 * and there is a good chance that the receive queue
1731 * is empty. It will minimize the possibility of
1732 * packet loss.
1733 */
1734 if (sc->filter_change &&
1735 sc->txb_count == 0 && sc->txb_sched == 0) {
1736 fe_loadmar(sc);
1737 sc->sc_if.if_flags &= ~IFF_OACTIVE;
1738 }
1739
1740 /*
1741 * If it looks like the transmitter can take more data,
1742 * attempt to start output on the interface. This is done
1743 * after handling the receiver interrupt to give the
1744 * receive operation priority.
1745 *
1746 * BTW, I'm not sure in what case the OACTIVE is on at
1747 * this point. Is the following test redundant?
1748 *
1749 * No. This routine polls for both transmitter and
1750 * receiver interrupts. 86960 can raise a receiver
1751 * interrupt when the transmission buffer is full.
1752 */
1753 if ((sc->sc_if.if_flags & IFF_OACTIVE) == 0)
1754 fe_start(&sc->sc_if);
1755 }
1756
1757 printf("fe%d: too many loops\n", sc->sc_unit);
1758}
1759
1760/*
1761 * Process an ioctl request. This code needs some work - it looks
1762 * pretty ugly.
1763 */
1764static int
1765fe_ioctl (struct ifnet * ifp, u_long command, caddr_t data)
1766{
1767 struct fe_softc *sc = ifp->if_softc;
1768 struct ifreq *ifr = (struct ifreq *)data;
1769 int s, error = 0;
1770
1771 s = splimp();
1772
1773 switch (command) {
1774
1775 case SIOCSIFADDR:
1776 case SIOCGIFADDR:
1777 case SIOCSIFMTU:
1778 /* Just an ordinary action. */
1779 error = ether_ioctl(ifp, command, data);
1780 break;
1781
1782 case SIOCSIFFLAGS:
1783 /*
1784 * Switch interface state between "running" and
1785 * "stopped", reflecting the UP flag.
1786 */
1787 if (sc->sc_if.if_flags & IFF_UP) {
1788 if ((sc->sc_if.if_flags & IFF_RUNNING) == 0)
1789 fe_init(sc);
1790 } else {
1791 if ((sc->sc_if.if_flags & IFF_RUNNING) != 0)
1792 fe_stop(sc);
1793 }
1794
1795 /*
1796 * Promiscuous and/or multicast flags may have changed,
1797 * so reprogram the multicast filter and/or receive mode.
1798 */
1799 fe_setmode(sc);
1800
1801 /* Done. */
1802 break;
1803
1804 case SIOCADDMULTI:
1805 case SIOCDELMULTI:
1806 /*
1807 * Multicast list has changed; set the hardware filter
1808 * accordingly.
1809 */
1810 fe_setmode(sc);
1811 break;
1812
1813 case SIOCSIFMEDIA:
1814 case SIOCGIFMEDIA:
1815 /* Let if_media to handle these commands and to call
1816 us back. */
1817 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
1818 break;
1819
1820 default:
1821 error = EINVAL;
1822 break;
1823 }
1824
1825 (void) splx(s);
1826 return (error);
1827}
1828
1829/*
1830 * Retrieve packet from receive buffer and send to the next level up via
1831 * ether_input().
1832 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
1833 */
1834static int
1835fe_get_packet (struct fe_softc * sc, u_short len)
1836{
1837 struct ether_header *eh;
1838 struct mbuf *m;
1839
1840 /*
1841 * NFS wants the data be aligned to the word (4 byte)
1842 * boundary. Ethernet header has 14 bytes. There is a
1843 * 2-byte gap.
1844 */
1845#define NFS_MAGIC_OFFSET 2
1846
1847 /*
1848 * This function assumes that an Ethernet packet fits in an
1849 * mbuf (with a cluster attached when necessary.) On FreeBSD
1850 * 2.0 for x86, which is the primary target of this driver, an
1851 * mbuf cluster has 4096 bytes, and we are happy. On ancient
1852 * BSDs, such as vanilla 4.3 for 386, a cluster size was 1024,
1853 * however. If the following #error message were printed upon
1854 * compile, you need to rewrite this function.
1855 */
1856#if ( MCLBYTES < ETHER_MAX_LEN - ETHER_CRC_LEN + NFS_MAGIC_OFFSET )
1857#error "Too small MCLBYTES to use fe driver."
1858#endif
1859
1860 /*
1861 * Our strategy has one more problem. There is a policy on
1862 * mbuf cluster allocation. It says that we must have at
1863 * least MINCLSIZE (208 bytes on FreeBSD 2.0 for x86) to
1864 * allocate a cluster. For a packet of a size between
1865 * (MHLEN - 2) to (MINCLSIZE - 2), our code violates the rule...
1866 * On the other hand, the current code is short, simple,
1867 * and fast, however. It does no harmful thing, just waists
1868 * some memory. Any comments? FIXME.
1869 */
1870
1871 /* Allocate an mbuf with packet header info. */
1872 MGETHDR(m, M_DONTWAIT, MT_DATA);
1873 if (m == NULL)
1874 return -1;
1875
1876 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
1877 if (len > MHLEN - NFS_MAGIC_OFFSET) {
1878 MCLGET(m, M_DONTWAIT);
1879 if (!(m->m_flags & M_EXT)) {
1880 m_freem(m);
1881 return -1;
1882 }
1883 }
1884
1885 /* Initialize packet header info. */
1886 m->m_pkthdr.rcvif = &sc->sc_if;
1887 m->m_pkthdr.len = len;
1888
1889 /* Set the length of this packet. */
1890 m->m_len = len;
1891
1892 /* The following silliness is to make NFS happy */
1893 m->m_data += NFS_MAGIC_OFFSET;
1894
1895 /* Get (actually just point to) the header part. */
1896 eh = mtod(m, struct ether_header *);
1897
1898 /* Get a packet. */
1899#ifdef FE_8BIT_SUPPORT
1900 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1901 {
1902 fe_insb(sc, FE_BMPR8, (u_int8_t *)eh, len);
1903 }
1904 else
1905#endif
1906 {
1907 fe_insw(sc, FE_BMPR8, (u_int16_t *)eh, (len + 1) >> 1);
1908 }
1909
1910 /* Strip off the Ethernet header. */
1911 m->m_pkthdr.len -= sizeof (struct ether_header);
1912 m->m_len -= sizeof (struct ether_header);
1913 m->m_data += sizeof (struct ether_header);
1914
1915 /* Feed the packet to upper layer. */
1916 ether_input(&sc->sc_if, eh, m);
1917 return 0;
1918}
1919
1920/*
1921 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
1922 * Returns number of bytes actually written, including length word.
1923 *
1924 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
1925 * Packets shorter than Ethernet minimum are legal, and we pad them
1926 * before sending out. An exception is "partial" packets which are
1927 * shorter than mandatory Ethernet header.
1928 */
1929static void
1930fe_write_mbufs (struct fe_softc *sc, struct mbuf *m)
1931{
1932 u_short length, len;
1933 struct mbuf *mp;
1934 u_char *data;
1935 u_short savebyte; /* WARNING: Architecture dependent! */
1936#define NO_PENDING_BYTE 0xFFFF
1937
1938 static u_char padding [ETHER_MIN_LEN - ETHER_CRC_LEN - ETHER_HDR_LEN];
1939
1940#ifdef DIAGNOSTIC
1941 /* First, count up the total number of bytes to copy */
1942 length = 0;
1943 for (mp = m; mp != NULL; mp = mp->m_next)
1944 length += mp->m_len;
1945
1946 /* Check if this matches the one in the packet header. */
1947 if (length != m->m_pkthdr.len) {
1948 printf("fe%d: packet length mismatch? (%d/%d)\n", sc->sc_unit,
1949 length, m->m_pkthdr.len);
1950 }
1951#else
1952 /* Just use the length value in the packet header. */
1953 length = m->m_pkthdr.len;
1954#endif
1955
1956#ifdef DIAGNOSTIC
1957 /*
1958 * Should never send big packets. If such a packet is passed,
1959 * it should be a bug of upper layer. We just ignore it.
1960 * ... Partial (too short) packets, neither.
1961 */
1962 if (length < ETHER_HDR_LEN ||
1963 length > ETHER_MAX_LEN - ETHER_CRC_LEN) {
1964 printf("fe%d: got an out-of-spec packet (%u bytes) to send\n",
1965 sc->sc_unit, length);
1966 sc->sc_if.if_oerrors++;
1967 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
1968 return;
1969 }
1970#endif
1971
1972 /*
1973 * Put the length word for this frame.
1974 * Does 86960 accept odd length? -- Yes.
1975 * Do we need to pad the length to minimum size by ourselves?
1976 * -- Generally yes. But for (or will be) the last
1977 * packet in the transmission buffer, we can skip the
1978 * padding process. It may gain performance slightly. FIXME.
1979 */
1980#ifdef FE_8BIT_SUPPORT
1981 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1982 {
1983 len = max(length, ETHER_MIN_LEN - ETHER_CRC_LEN);
1984 fe_outb(sc, FE_BMPR8, len & 0x00ff);
1985 fe_outb(sc, FE_BMPR8, (len & 0xff00) >> 8);
1986 }
1987 else
1988#endif
1989 {
1990 fe_outw(sc, FE_BMPR8,
1991 max(length, ETHER_MIN_LEN - ETHER_CRC_LEN));
1992 }
1993
1994 /*
1995 * Update buffer status now.
1996 * Truncate the length up to an even number, since we use outw().
1997 */
1998#ifdef FE_8BIT_SUPPORT
1999 if ((sc->proto_dlcr6 & FE_D6_SBW) != FE_D6_SBW_BYTE)
2000#endif
2001 {
2002 length = (length + 1) & ~1;
2003 }
2004 sc->txb_free -= FE_DATA_LEN_LEN +
2005 max(length, ETHER_MIN_LEN - ETHER_CRC_LEN);
2006 sc->txb_count++;
2007
2008 /*
2009 * Transfer the data from mbuf chain to the transmission buffer.
2010 * MB86960 seems to require that data be transferred as words, and
2011 * only words. So that we require some extra code to patch
2012 * over odd-length mbufs.
2013 */
2014#ifdef FE_8BIT_SUPPORT
2015 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
2016 {
2017 /* 8-bit cards are easy. */
2018 for (mp = m; mp != 0; mp = mp->m_next) {
2019 if (mp->m_len)
2020 fe_outsb(sc, FE_BMPR8, mtod(mp, caddr_t),
2021 mp->m_len);
2022 }
2023 }
2024 else
2025#endif
2026 {
2027 /* 16-bit cards are a pain. */
2028 savebyte = NO_PENDING_BYTE;
2029 for (mp = m; mp != 0; mp = mp->m_next) {
2030
2031 /* Ignore empty mbuf. */
2032 len = mp->m_len;
2033 if (len == 0)
2034 continue;
2035
2036 /* Find the actual data to send. */
2037 data = mtod(mp, caddr_t);
2038
2039 /* Finish the last byte. */
2040 if (savebyte != NO_PENDING_BYTE) {
2041 fe_outw(sc, FE_BMPR8, savebyte | (*data << 8));
2042 data++;
2043 len--;
2044 savebyte = NO_PENDING_BYTE;
2045 }
2046
2047 /* output contiguous words */
2048 if (len > 1) {
2049 fe_outsw(sc, FE_BMPR8, (u_int16_t *)data,
2050 len >> 1);
2051 data += len & ~1;
2052 len &= 1;
2053 }
2054
2055 /* Save a remaining byte, if there is one. */
2056 if (len > 0)
2057 savebyte = *data;
2058 }
2059
2060 /* Spit the last byte, if the length is odd. */
2061 if (savebyte != NO_PENDING_BYTE)
2062 fe_outw(sc, FE_BMPR8, savebyte);
2063 }
2064
2065 /* Pad to the Ethernet minimum length, if the packet is too short. */
2066 if (length < ETHER_MIN_LEN - ETHER_CRC_LEN) {
2067#ifdef FE_8BIT_SUPPORT
2068 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
2069 {
2070 fe_outsb(sc, FE_BMPR8, padding,
2071 ETHER_MIN_LEN - ETHER_CRC_LEN - length);
2072 }
2073 else
2074#endif
2075 {
2076 fe_outsw(sc, FE_BMPR8, (u_int16_t *)padding,
2077 (ETHER_MIN_LEN - ETHER_CRC_LEN - length) >> 1);
2078 }
2079 }
2080}
2081
2082/*
2083 * Compute hash value for an Ethernet address
2084 */
2085static int
2086fe_hash ( u_char * ep )
2087{
2088#define FE_HASH_MAGIC_NUMBER 0xEDB88320L
2089
2090 u_long hash = 0xFFFFFFFFL;
2091 int i, j;
2092 u_char b;
2093 u_long m;
2094
2095 for ( i = ETHER_ADDR_LEN; --i >= 0; ) {
2096 b = *ep++;
2097 for ( j = 8; --j >= 0; ) {
2098 m = hash;
2099 hash >>= 1;
2100 if ( ( m ^ b ) & 1 ) hash ^= FE_HASH_MAGIC_NUMBER;
2101 b >>= 1;
2102 }
2103 }
2104 return ( ( int )( hash >> 26 ) );
2105}
2106
2107/*
2108 * Compute the multicast address filter from the
2109 * list of multicast addresses we need to listen to.
2110 */
2111static struct fe_filter
2112fe_mcaf ( struct fe_softc *sc )
2113{
2114 int index;
2115 struct fe_filter filter;
2116 struct ifmultiaddr *ifma;
2117
2118 filter = fe_filter_nothing;
2119 TAILQ_FOREACH(ifma, &sc->arpcom.ac_if.if_multiaddrs, ifma_link) {
2120 if (ifma->ifma_addr->sa_family != AF_LINK)
2121 continue;
2122 index = fe_hash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
2123#ifdef FE_DEBUG
2124 printf("fe%d: hash(%6D) == %d\n",
2125 sc->sc_unit, enm->enm_addrlo , ":", index);
2126#endif
2127
2128 filter.data[index >> 3] |= 1 << (index & 7);
2129 }
2130 return ( filter );
2131}
2132
2133/*
2134 * Calculate a new "multicast packet filter" and put the 86960
2135 * receiver in appropriate mode.
2136 */
2137static void
2138fe_setmode (struct fe_softc *sc)
2139{
2140 int flags = sc->sc_if.if_flags;
2141
2142 /*
2143 * If the interface is not running, we postpone the update
2144 * process for receive modes and multicast address filter
2145 * until the interface is restarted. It reduces some
2146 * complicated job on maintaining chip states. (Earlier versions
2147 * of this driver had a bug on that point...)
2148 *
2149 * To complete the trick, fe_init() calls fe_setmode() after
2150 * restarting the interface.
2151 */
2152 if (!(flags & IFF_RUNNING))
2153 return;
2154
2155 /*
2156 * Promiscuous mode is handled separately.
2157 */
2158 if (flags & IFF_PROMISC) {
2159 /*
2160 * Program 86960 to receive all packets on the segment
2161 * including those directed to other stations.
2162 * Multicast filter stored in MARs are ignored
2163 * under this setting, so we don't need to update it.
2164 *
2165 * Promiscuous mode in FreeBSD 2 is used solely by
2166 * BPF, and BPF only listens to valid (no error) packets.
2167 * So, we ignore erroneous ones even in this mode.
2168 * (Older versions of fe driver mistook the point.)
2169 */
2170 fe_outb(sc, FE_DLCR5,
2171 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
2172 sc->filter_change = 0;
2173 return;
2174 }
2175
2176 /*
2177 * Turn the chip to the normal (non-promiscuous) mode.
2178 */
2179 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
2180
2181 /*
2182 * Find the new multicast filter value.
2183 */
2184 if (flags & IFF_ALLMULTI)
2185 sc->filter = fe_filter_all;
2186 else
2187 sc->filter = fe_mcaf(sc);
2188 sc->filter_change = 1;
2189
2190 /*
2191 * We have to update the multicast filter in the 86960, A.S.A.P.
2192 *
2193 * Note that the DLC (Data Link Control unit, i.e. transmitter
2194 * and receiver) must be stopped when feeding the filter, and
2195 * DLC trashes all packets in both transmission and receive
2196 * buffers when stopped.
2197 *
2198 * To reduce the packet loss, we delay the filter update
2199 * process until buffers are empty.
2200 */
2201 if (sc->txb_sched == 0 && sc->txb_count == 0 &&
2202 !(fe_inb(sc, FE_DLCR1) & FE_D1_PKTRDY)) {
2203 /*
2204 * Buffers are (apparently) empty. Load
2205 * the new filter value into MARs now.
2206 */
2207 fe_loadmar(sc);
2208 } else {
2209 /*
2210 * Buffers are not empty. Mark that we have to update
2211 * the MARs. The new filter will be loaded by feintr()
2212 * later.
2213 */
2214 }
2215}
2216
2217/*
2218 * Load a new multicast address filter into MARs.
2219 *
2220 * The caller must have splimp'ed before fe_loadmar.
2221 * This function starts the DLC upon return. So it can be called only
2222 * when the chip is working, i.e., from the driver's point of view, when
2223 * a device is RUNNING. (I mistook the point in previous versions.)
2224 */
2225static void
2226fe_loadmar (struct fe_softc * sc)
2227{
2228 /* Stop the DLC (transmitter and receiver). */
2229 DELAY(200);
2230 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
2231 DELAY(200);
2232
2233 /* Select register bank 1 for MARs. */
2234 fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
2235
2236 /* Copy filter value into the registers. */
2237 fe_outblk(sc, FE_MAR8, sc->filter.data, FE_FILTER_LEN);
2238
2239 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
2240 fe_outb(sc, FE_DLCR7,
2241 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
2242
2243 /* Restart the DLC. */
2244 DELAY(200);
2245 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
2246 DELAY(200);
2247
2248 /* We have just updated the filter. */
2249 sc->filter_change = 0;
2250}
2251
2252/* Change the media selection. */
2253static int
2254fe_medchange (struct ifnet *ifp)
2255{
2256 struct fe_softc *sc = (struct fe_softc *)ifp->if_softc;
2257
2258#ifdef DIAGNOSTIC
2259 /* If_media should not pass any request for a media which this
2260 interface doesn't support. */
2261 int b;
2262
2263 for (b = 0; bit2media[b] != 0; b++) {
2264 if (bit2media[b] == sc->media.ifm_media) break;
2265 }
2266 if (((1 << b) & sc->mbitmap) == 0) {
2267 printf("fe%d: got an unsupported media request (0x%x)\n",
2268 sc->sc_unit, sc->media.ifm_media);
2269 return EINVAL;
2270 }
2271#endif
2272
2273 /* We don't actually change media when the interface is down.
2274 fe_init() will do the job, instead. Should we also wait
2275 until the transmission buffer being empty? Changing the
2276 media when we are sending a frame will cause two garbages
2277 on wires, one on old media and another on new. FIXME */
2278 if (sc->sc_if.if_flags & IFF_UP) {
2279 if (sc->msel) sc->msel(sc);
2280 }
2281
2282 return 0;
2283}
2284
2285/* I don't know how I can support media status callback... FIXME. */
2286static void
2287fe_medstat (struct ifnet *ifp, struct ifmediareq *ifmr)
2288{
2289 (void)ifp;
2290 (void)ifmr;
2291}
|