1/*
2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
3 *
4 * This software may be used, modified, copied, distributed, and sold, in
5 * both source and binary form provided that the above copyright, these
6 * terms and the following disclaimer are retained. The name of the author
7 * and/or the contributor may not be used to endorse or promote products
8 * derived from this software without specific prior written permission.
9 *
10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
20 * SUCH DAMAGE.
21 */
22
23/*
24 * $FreeBSD: head/sys/dev/fe/if_fe.c 72084 2001-02-06 10:12:15Z phk $
25 *
26 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
27 * Contributed by M. Sekiguchi. <seki@sysrap.cs.fujitsu.co.jp>
28 *
29 * This version is intended to be a generic template for various
30 * MB86960A/MB86965A based Ethernet cards. It currently supports
31 * Fujitsu FMV-180 series for ISA and Allied-Telesis AT1700/RE2000
32 * series for ISA, as well as Fujitsu MBH10302 PC card.
33 * There are some currently-
34 * unused hooks embedded, which are primarily intended to support
35 * other types of Ethernet cards, but the author is not sure whether
36 * they are useful.
37 *
38 * This version also includes some alignments to support RE1000,
39 * C-NET(98)P2 and so on. These cards are not for AT-compatibles,
40 * but for NEC PC-98 bus -- a proprietary bus architecture available
41 * only in Japan. Confusingly, it is different from the Microsoft's
42 * PC98 architecture. :-{
43 * Further work for PC-98 version will be available as a part of
44 * FreeBSD(98) project.
45 *
46 * This software is a derivative work of if_ed.c version 1.56 by David
47 * Greenman available as a part of FreeBSD 2.0 RELEASE source distribution.
48 *
49 * The following lines are retained from the original if_ed.c:
50 *
51 * Copyright (C) 1993, David Greenman. This software may be used, modified,
52 * copied, distributed, and sold, in both source and binary form provided
53 * that the above copyright and these terms are retained. Under no
54 * circumstances is the author responsible for the proper functioning
55 * of this software, nor does the author assume any responsibility
56 * for damages incurred with its use.
57 */
58
59/*
60 * TODO:
61 * o To support ISA PnP auto configuration for FMV-183/184.
62 * o To support REX-9886/87(PC-98 only).
63 * o To reconsider mbuf usage.
64 * o To reconsider transmission buffer usage, including
65 * transmission buffer size (currently 4KB x 2) and pros-and-
66 * cons of multiple frame transmission.
67 * o To test IPX codes.
68 * o To test new-bus frontend.
69 */
70
71#include "opt_fe.h"
72#include "opt_inet.h"
73#include "opt_ipx.h"
74
75#include <sys/param.h>
76#include <sys/systm.h>
77#include <sys/socket.h>
78#include <sys/sockio.h>
79#include <sys/mbuf.h>
80
81#include <sys/bus.h>
82#include <machine/bus.h>
83#include <sys/rman.h>
84#include <machine/resource.h>
85
86#include <net/ethernet.h>
87#include <net/if.h>
88#include <net/if_dl.h>
89#include <net/if_mib.h>
90#include <net/if_media.h>
91
92#include <netinet/in.h>
93#include <netinet/if_ether.h>
94
95#include <net/bpf.h>
96
97#include <i386/isa/ic/mb86960.h>
98#include <dev/fe/if_fereg.h>
99#include <dev/fe/if_fevar.h>
100
101/*
102 * Transmit just one packet per a "send" command to 86960.
103 * This option is intended for performance test. An EXPERIMENTAL option.
104 */
105#ifndef FE_SINGLE_TRANSMISSION
106#define FE_SINGLE_TRANSMISSION 0
107#endif
108
109/*
110 * Maximum loops when interrupt.
111 * This option prevents an infinite loop due to hardware failure.
112 * (Some laptops make an infinite loop after PC-Card is ejected.)
113 */
114#ifndef FE_MAX_LOOP
115#define FE_MAX_LOOP 0x800
116#endif
117
118/*
119 * If you define this option, 8-bit cards are also supported.
120 */
121/*#define FE_8BIT_SUPPORT*/
122
123/*
124 * Device configuration flags.
125 */
126
127/* DLCR6 settings. */
128#define FE_FLAGS_DLCR6_VALUE 0x007F
129
130/* Force DLCR6 override. */
131#define FE_FLAGS_OVERRIDE_DLCR6 0x0080
132
133
134devclass_t fe_devclass;
135
136/*
137 * Special filter values.
138 */
139static struct fe_filter const fe_filter_nothing = { FE_FILTER_NOTHING };
140static struct fe_filter const fe_filter_all = { FE_FILTER_ALL };
141
142/* Standard driver entry points. These can be static. */
143static void fe_init (void *);
144static driver_intr_t fe_intr;
145static int fe_ioctl (struct ifnet *, u_long, caddr_t);
146static void fe_start (struct ifnet *);
147static void fe_watchdog (struct ifnet *);
148static int fe_medchange (struct ifnet *);
149static void fe_medstat (struct ifnet *, struct ifmediareq *);
150
151/* Local functions. Order of declaration is confused. FIXME. */
152static int fe_get_packet ( struct fe_softc *, u_short );
153static void fe_tint ( struct fe_softc *, u_char );
154static void fe_rint ( struct fe_softc *, u_char );
155static void fe_xmit ( struct fe_softc * );
156static void fe_write_mbufs ( struct fe_softc *, struct mbuf * );
157static void fe_setmode ( struct fe_softc * );
158static void fe_loadmar ( struct fe_softc * );
159
160#ifdef DIAGNOSTIC
161static void fe_emptybuffer ( struct fe_softc * );
162#endif
163
164/*
165 * Fe driver specific constants which relate to 86960/86965.
166 */
167
168/* Interrupt masks */
169#define FE_TMASK ( FE_D2_COLL16 | FE_D2_TXDONE )
170#define FE_RMASK ( FE_D3_OVRFLO | FE_D3_CRCERR \
171 | FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY )
172
173/* Maximum number of iterations for a receive interrupt. */
174#define FE_MAX_RECV_COUNT ( ( 65536 - 2048 * 2 ) / 64 )
175 /*
176 * Maximum size of SRAM is 65536,
177 * minimum size of transmission buffer in fe is 2x2KB,
178 * and minimum amount of received packet including headers
179 * added by the chip is 64 bytes.
180 * Hence FE_MAX_RECV_COUNT is the upper limit for number
181 * of packets in the receive buffer.
182 */
183
184/*
185 * Miscellaneous definitions not directly related to hardware.
186 */
187
188/* The following line must be delete when "net/if_media.h" support it. */
189#ifndef IFM_10_FL
190#define IFM_10_FL /* 13 */ IFM_10_5
191#endif
192
193#if 0
194/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
195static int const bit2media [] = {
196 IFM_HDX | IFM_ETHER | IFM_AUTO,
197 IFM_HDX | IFM_ETHER | IFM_MANUAL,
198 IFM_HDX | IFM_ETHER | IFM_10_T,
199 IFM_HDX | IFM_ETHER | IFM_10_2,
200 IFM_HDX | IFM_ETHER | IFM_10_5,
201 IFM_HDX | IFM_ETHER | IFM_10_FL,
202 IFM_FDX | IFM_ETHER | IFM_10_T,
203 /* More can be come here... */
204 0
205};
206#else
207/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
208static int const bit2media [] = {
209 IFM_ETHER | IFM_AUTO,
210 IFM_ETHER | IFM_MANUAL,
211 IFM_ETHER | IFM_10_T,
212 IFM_ETHER | IFM_10_2,
213 IFM_ETHER | IFM_10_5,
214 IFM_ETHER | IFM_10_FL,
215 IFM_ETHER | IFM_10_T,
216 /* More can be come here... */
217 0
218};
219#endif
220
221/*
222 * Check for specific bits in specific registers have specific values.
223 * A common utility function called from various sub-probe routines.
224 */
225int
226fe_simple_probe (struct fe_softc const * sc,
227 struct fe_simple_probe_struct const * sp)
228{
229 struct fe_simple_probe_struct const *p;
230
231 for (p = sp; p->mask != 0; p++) {
232 if ((fe_inb(sc, p->port) & p->mask) != p->bits)
233 return 0;
234 }
235 return 1;
236}
237
238/* Test if a given 6 byte value is a valid Ethernet station (MAC)
239 address. "Vendor" is an expected vendor code (first three bytes,)
240 or a zero when nothing expected. */
241int
242valid_Ether_p (u_char const * addr, unsigned vendor)
243{
244#ifdef FE_DEBUG
245 printf("fe?: validating %6D against %06x\n", addr, ":", vendor);
246#endif
247
248 /* All zero is not allowed as a vendor code. */
249 if (addr[0] == 0 && addr[1] == 0 && addr[2] == 0) return 0;
250
251 switch (vendor) {
252 case 0x000000:
253 /* Legal Ethernet address (stored in ROM) must have
254 its Group and Local bits cleared. */
255 if ((addr[0] & 0x03) != 0) return 0;
256 break;
257 case 0x020000:
258 /* Same as above, but a local address is allowed in
259 this context. */
260 if ((addr[0] & 0x01) != 0) return 0;
261 break;
262 default:
263 /* Make sure the vendor part matches if one is given. */
264 if ( addr[0] != ((vendor >> 16) & 0xFF)
265 || addr[1] != ((vendor >> 8) & 0xFF)
266 || addr[2] != ((vendor ) & 0xFF)) return 0;
267 break;
268 }
269
270 /* Host part must not be all-zeros nor all-ones. */
271 if (addr[3] == 0xFF && addr[4] == 0xFF && addr[5] == 0xFF) return 0;
272 if (addr[3] == 0x00 && addr[4] == 0x00 && addr[5] == 0x00) return 0;
273
274 /* Given addr looks like an Ethernet address. */
275 return 1;
276}
277
278/* Fill our softc struct with default value. */
279void
280fe_softc_defaults (struct fe_softc *sc)
281{
282 /* Prepare for typical register prototypes. We assume a
283 "typical" board has <32KB> of <fast> SRAM connected with a
284 <byte-wide> data lines. */
285 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
286 sc->proto_dlcr5 = 0;
287 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
288 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
289 sc->proto_dlcr7 = FE_D7_BYTSWP_LH;
290 sc->proto_bmpr13 = 0;
291
292 /* Assume the probe process (to be done later) is stable. */
293 sc->stability = 0;
294
295 /* A typical board needs no hooks. */
296 sc->init = NULL;
297 sc->stop = NULL;
298
299 /* Assume the board has no software-controllable media selection. */
300 sc->mbitmap = MB_HM;
301 sc->defmedia = MB_HM;
302 sc->msel = NULL;
303}
304
305/* Common error reporting routine used in probe routines for
306 "soft configured IRQ"-type boards. */
307void
308fe_irq_failure (char const *name, int unit, int irq, char const *list)
309{
310 printf("fe%d: %s board is detected, but %s IRQ was given\n",
311 unit, name, (irq == NO_IRQ ? "no" : "invalid"));
312 if (list != NULL) {
313 printf("fe%d: specify an IRQ from %s in kernel config\n",
314 unit, list);
315 }
316}
317
318/*
319 * Hardware (vendor) specific hooks.
320 */
321
322/*
323 * Generic media selection scheme for MB86965 based boards.
324 */
325void
326fe_msel_965 (struct fe_softc *sc)
327{
328 u_char b13;
329
330 /* Find the appropriate bits for BMPR13 tranceiver control. */
331 switch (IFM_SUBTYPE(sc->media.ifm_media)) {
332 case IFM_AUTO: b13 = FE_B13_PORT_AUTO | FE_B13_TPTYPE_UTP; break;
333 case IFM_10_T: b13 = FE_B13_PORT_TP | FE_B13_TPTYPE_UTP; break;
334 default: b13 = FE_B13_PORT_AUI; break;
335 }
336
337 /* Write it into the register. It takes effect immediately. */
338 fe_outb(sc, FE_BMPR13, sc->proto_bmpr13 | b13);
339}
340
341
342/*
343 * Fujitsu MB86965 JLI mode support routines.
344 */
345
346/*
347 * Routines to read all bytes from the config EEPROM through MB86965A.
348 * It is a MicroWire (3-wire) serial EEPROM with 6-bit address.
349 * (93C06 or 93C46.)
350 */
351static void
352fe_strobe_eeprom_jli (struct fe_softc *sc, u_short bmpr16)
353{
354 /*
355 * We must guarantee 1us (or more) interval to access slow
356 * EEPROMs. The following redundant code provides enough
357 * delay with ISA timing. (Even if the bus clock is "tuned.")
358 * Some modification will be needed on faster busses.
359 */
360 fe_outb(sc, bmpr16, FE_B16_SELECT);
361 fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
362 fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
363 fe_outb(sc, bmpr16, FE_B16_SELECT);
364}
365
366void
367fe_read_eeprom_jli (struct fe_softc * sc, u_char * data)
368{
369 u_char n, val, bit;
370 u_char save16, save17;
371
372 /* Save the current value of the EEPROM interface registers. */
373 save16 = fe_inb(sc, FE_BMPR16);
374 save17 = fe_inb(sc, FE_BMPR17);
375
376 /* Read bytes from EEPROM; two bytes per an iteration. */
377 for (n = 0; n < JLI_EEPROM_SIZE / 2; n++) {
378
379 /* Reset the EEPROM interface. */
380 fe_outb(sc, FE_BMPR16, 0x00);
381 fe_outb(sc, FE_BMPR17, 0x00);
382
383 /* Start EEPROM access. */
384 fe_outb(sc, FE_BMPR16, FE_B16_SELECT);
385 fe_outb(sc, FE_BMPR17, FE_B17_DATA);
386 fe_strobe_eeprom_jli(sc, FE_BMPR16);
387
388 /* Pass the iteration count as well as a READ command. */
389 val = 0x80 | n;
390 for (bit = 0x80; bit != 0x00; bit >>= 1) {
391 fe_outb(sc, FE_BMPR17, (val & bit) ? FE_B17_DATA : 0);
392 fe_strobe_eeprom_jli(sc, FE_BMPR16);
393 }
394 fe_outb(sc, FE_BMPR17, 0x00);
395
396 /* Read a byte. */
397 val = 0;
398 for (bit = 0x80; bit != 0x00; bit >>= 1) {
399 fe_strobe_eeprom_jli(sc, FE_BMPR16);
400 if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA)
401 val |= bit;
402 }
403 *data++ = val;
404
405 /* Read one more byte. */
406 val = 0;
407 for (bit = 0x80; bit != 0x00; bit >>= 1) {
408 fe_strobe_eeprom_jli(sc, FE_BMPR16);
409 if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA)
410 val |= bit;
411 }
412 *data++ = val;
413 }
414
415#if 0
416 /* Reset the EEPROM interface, again. */
417 fe_outb(sc, FE_BMPR16, 0x00);
418 fe_outb(sc, FE_BMPR17, 0x00);
419#else
420 /* Make sure to restore the original value of EEPROM interface
421 registers, since we are not yet sure we have MB86965A on
422 the address. */
423 fe_outb(sc, FE_BMPR17, save17);
424 fe_outb(sc, FE_BMPR16, save16);
425#endif
426
427#if 1
428 /* Report what we got. */
429 if (bootverbose) {
430 int i;
431 data -= JLI_EEPROM_SIZE;
432 for (i = 0; i < JLI_EEPROM_SIZE; i += 16) {
433 printf("fe%d: EEPROM(JLI):%3x: %16D\n",
434 sc->sc_unit, i, data + i, " ");
435 }
436 }
437#endif
438}
439
440void
441fe_init_jli (struct fe_softc * sc)
442{
443 /* "Reset" by writing into a magic location. */
444 DELAY(200);
445 fe_outb(sc, 0x1E, fe_inb(sc, 0x1E));
446 DELAY(300);
447}
448
449
450/*
451 * SSi 78Q8377A support routines.
452 */
453
454/*
455 * Routines to read all bytes from the config EEPROM through 78Q8377A.
456 * It is a MicroWire (3-wire) serial EEPROM with 8-bit address. (I.e.,
457 * 93C56 or 93C66.)
458 *
459 * As I don't have SSi manuals, (hmm, an old song again!) I'm not exactly
460 * sure the following code is correct... It is just stolen from the
461 * C-NET(98)P2 support routine in FreeBSD(98).
462 */
463
464void
465fe_read_eeprom_ssi (struct fe_softc *sc, u_char *data)
466{
467 u_char val, bit;
468 int n;
469 u_char save6, save7, save12;
470
471 /* Save the current value for the DLCR registers we are about
472 to destroy. */
473 save6 = fe_inb(sc, FE_DLCR6);
474 save7 = fe_inb(sc, FE_DLCR7);
475
476 /* Put the 78Q8377A into a state that we can access the EEPROM. */
477 fe_outb(sc, FE_DLCR6,
478 FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_DLC_DISABLE);
479 fe_outb(sc, FE_DLCR7,
480 FE_D7_BYTSWP_LH | FE_D7_RBS_BMPR | FE_D7_RDYPNS | FE_D7_POWER_UP);
481
482 /* Save the current value for the BMPR12 register, too. */
483 save12 = fe_inb(sc, FE_DLCR12);
484
485 /* Read bytes from EEPROM; two bytes per an iteration. */
486 for (n = 0; n < SSI_EEPROM_SIZE / 2; n++) {
487
488 /* Start EEPROM access */
489 fe_outb(sc, FE_DLCR12, SSI_EEP);
490 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
491
492 /* Send the following four bits to the EEPROM in the
493 specified order: a dummy bit, a start bit, and
494 command bits (10) for READ. */
495 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL );
496 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
497 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT);
498 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
499 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT);
500 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
501 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL );
502 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
503
504 /* Pass the iteration count to the chip. */
505 for (bit = 0x80; bit != 0x00; bit >>= 1) {
506 val = ( n & bit ) ? SSI_DAT : 0;
507 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | val);
508 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | val);
509 }
510
511 /* Read a byte. */
512 val = 0;
513 for (bit = 0x80; bit != 0x00; bit >>= 1) {
514 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
515 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK);
516 if (fe_inb(sc, FE_DLCR12) & SSI_DIN)
517 val |= bit;
518 }
519 *data++ = val;
520
521 /* Read one more byte. */
522 val = 0;
523 for (bit = 0x80; bit != 0x00; bit >>= 1) {
524 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
525 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK);
526 if (fe_inb(sc, FE_DLCR12) & SSI_DIN)
527 val |= bit;
528 }
529 *data++ = val;
530
531 fe_outb(sc, FE_DLCR12, SSI_EEP);
532 }
533
534 /* Reset the EEPROM interface. (For now.) */
535 fe_outb(sc, FE_DLCR12, 0x00);
536
537 /* Restore the saved register values, for the case that we
538 didn't have 78Q8377A at the given address. */
539 fe_outb(sc, FE_DLCR12, save12);
540 fe_outb(sc, FE_DLCR7, save7);
541 fe_outb(sc, FE_DLCR6, save6);
542
543#if 1
544 /* Report what we got. */
545 if (bootverbose) {
546 int i;
547 data -= SSI_EEPROM_SIZE;
548 for (i = 0; i < SSI_EEPROM_SIZE; i += 16) {
549 printf("fe%d: EEPROM(SSI):%3x: %16D\n",
550 sc->sc_unit, i, data + i, " ");
551 }
552 }
553#endif
554}
555
556/*
557 * TDK/LANX boards support routines.
558 */
559
560/* It is assumed that the CLK line is low and SDA is high (float) upon entry. */
561#define LNX_PH(D,K,N) \
562 ((LNX_SDA_##D | LNX_CLK_##K) << N)
563#define LNX_CYCLE(D1,D2,D3,D4,K1,K2,K3,K4) \
564 (LNX_PH(D1,K1,0)|LNX_PH(D2,K2,8)|LNX_PH(D3,K3,16)|LNX_PH(D4,K4,24))
565
566#define LNX_CYCLE_START LNX_CYCLE(HI,LO,LO,HI, HI,HI,LO,LO)
567#define LNX_CYCLE_STOP LNX_CYCLE(LO,LO,HI,HI, LO,HI,HI,LO)
568#define LNX_CYCLE_HI LNX_CYCLE(HI,HI,HI,HI, LO,HI,LO,LO)
569#define LNX_CYCLE_LO LNX_CYCLE(LO,LO,LO,HI, LO,HI,LO,LO)
570#define LNX_CYCLE_INIT LNX_CYCLE(LO,HI,HI,HI, LO,LO,LO,LO)
571
572static void
573fe_eeprom_cycle_lnx (struct fe_softc *sc, u_short reg20, u_long cycle)
574{
575 fe_outb(sc, reg20, (cycle ) & 0xFF);
576 DELAY(15);
577 fe_outb(sc, reg20, (cycle >> 8) & 0xFF);
578 DELAY(15);
579 fe_outb(sc, reg20, (cycle >> 16) & 0xFF);
580 DELAY(15);
581 fe_outb(sc, reg20, (cycle >> 24) & 0xFF);
582 DELAY(15);
583}
584
585static u_char
586fe_eeprom_receive_lnx (struct fe_softc *sc, u_short reg20)
587{
588 u_char dat;
589
590 fe_outb(sc, reg20, LNX_CLK_HI | LNX_SDA_FL);
591 DELAY(15);
592 dat = fe_inb(sc, reg20);
593 fe_outb(sc, reg20, LNX_CLK_LO | LNX_SDA_FL);
594 DELAY(15);
595 return (dat & LNX_SDA_IN);
596}
597
598void
599fe_read_eeprom_lnx (struct fe_softc *sc, u_char *data)
600{
601 int i;
602 u_char n, bit, val;
603 u_char save20;
604 u_short reg20 = 0x14;
605
606 save20 = fe_inb(sc, reg20);
607
608 /* NOTE: DELAY() timing constants are approximately three
609 times longer (slower) than the required minimum. This is
610 to guarantee a reliable operation under some tough
611 conditions... Fortunately, this routine is only called
612 during the boot phase, so the speed is less important than
613 stability. */
614
615#if 1
616 /* Reset the X24C01's internal state machine and put it into
617 the IDLE state. We usually don't need this, but *if*
618 someone (e.g., probe routine of other driver) write some
619 garbage into the register at 0x14, synchronization will be
620 lost, and the normal EEPROM access protocol won't work.
621 Moreover, as there are no easy way to reset, we need a
622 _manoeuvre_ here. (It even lacks a reset pin, so pushing
623 the RESET button on the PC doesn't help!) */
624 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_INIT);
625 for (i = 0; i < 10; i++)
626 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START);
627 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP);
628 DELAY(10000);
629#endif
630
631 /* Issue a start condition. */
632 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START);
633
634 /* Send seven bits of the starting address (zero, in this
635 case) and a command bit for READ. */
636 val = 0x01;
637 for (bit = 0x80; bit != 0x00; bit >>= 1) {
638 if (val & bit) {
639 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_HI);
640 } else {
641 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO);
642 }
643 }
644
645 /* Receive an ACK bit. */
646 if (fe_eeprom_receive_lnx(sc, reg20)) {
647 /* ACK was not received. EEPROM is not present (i.e.,
648 this board was not a TDK/LANX) or not working
649 properly. */
650 if (bootverbose) {
651 printf("fe%d: no ACK received from EEPROM(LNX)\n",
652 sc->sc_unit);
653 }
654 /* Clear the given buffer to indicate we could not get
655 any info. and return. */
656 bzero(data, LNX_EEPROM_SIZE);
657 goto RET;
658 }
659
660 /* Read bytes from EEPROM. */
661 for (n = 0; n < LNX_EEPROM_SIZE; n++) {
662
663 /* Read a byte and store it into the buffer. */
664 val = 0x00;
665 for (bit = 0x80; bit != 0x00; bit >>= 1) {
666 if (fe_eeprom_receive_lnx(sc, reg20))
667 val |= bit;
668 }
669 *data++ = val;
670
671 /* Acknowledge if we have to read more. */
672 if (n < LNX_EEPROM_SIZE - 1) {
673 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO);
674 }
675 }
676
677 /* Issue a STOP condition, de-activating the clock line.
678 It will be safer to keep the clock line low than to leave
679 it high. */
680 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP);
681
682 RET:
683 fe_outb(sc, reg20, save20);
684
685#if 1
686 /* Report what we got. */
687 if (bootverbose) {
688 data -= LNX_EEPROM_SIZE;
689 for (i = 0; i < LNX_EEPROM_SIZE; i += 16) {
690 printf("fe%d: EEPROM(LNX):%3x: %16D\n",
691 sc->sc_unit, i, data + i, " ");
692 }
693 }
694#endif
695}
696
697void
698fe_init_lnx (struct fe_softc * sc)
699{
700 /* Reset the 86960. Do we need this? FIXME. */
701 fe_outb(sc, 0x12, 0x06);
702 DELAY(100);
703 fe_outb(sc, 0x12, 0x07);
704 DELAY(100);
705
706 /* Setup IRQ control register on the ASIC. */
707 fe_outb(sc, 0x14, sc->priv_info);
708}
709
710
711/*
712 * Ungermann-Bass boards support routine.
713 */
714void
715fe_init_ubn (struct fe_softc * sc)
716{
717 /* Do we need this? FIXME. */
718 fe_outb(sc, FE_DLCR7,
719 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
720 fe_outb(sc, 0x18, 0x00);
721 DELAY(200);
722
723 /* Setup IRQ control register on the ASIC. */
724 fe_outb(sc, 0x14, sc->priv_info);
725}
726
727
728/*
729 * Install interface into kernel networking data structures
730 */
731int
732fe_attach (device_t dev)
733{
734 struct fe_softc *sc = device_get_softc(dev);
735 int flags = device_get_flags(dev);
736 int b, error;
737
738 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET,
739 fe_intr, sc, &sc->irq_handle);
740 if (error) {
741 fe_release_resource(dev);
742 return ENXIO;
743 }
744
745 /*
746 * Initialize ifnet structure
747 */
748 sc->sc_if.if_softc = sc;
749 sc->sc_if.if_unit = sc->sc_unit;
750 sc->sc_if.if_name = "fe";
751 sc->sc_if.if_output = ether_output;
752 sc->sc_if.if_start = fe_start;
753 sc->sc_if.if_ioctl = fe_ioctl;
754 sc->sc_if.if_watchdog = fe_watchdog;
755 sc->sc_if.if_init = fe_init;
756 sc->sc_if.if_linkmib = &sc->mibdata;
757 sc->sc_if.if_linkmiblen = sizeof (sc->mibdata);
758
759#if 0 /* I'm not sure... */
760 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
761#endif
762
763 /*
764 * Set fixed interface flags.
765 */
766 sc->sc_if.if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
767
768#if 1
769 /*
770 * Set maximum size of output queue, if it has not been set.
771 * It is done here as this driver may be started after the
772 * system initialization (i.e., the interface is PCMCIA.)
773 *
774 * I'm not sure this is really necessary, but, even if it is,
775 * it should be done somewhere else, e.g., in if_attach(),
776 * since it must be a common workaround for all network drivers.
777 * FIXME.
778 */
779 if (sc->sc_if.if_snd.ifq_maxlen == 0)
780 sc->sc_if.if_snd.ifq_maxlen = ifqmaxlen;
781#endif
782
783#if FE_SINGLE_TRANSMISSION
784 /* Override txb config to allocate minimum. */
785 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
786 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
787#endif
788
789 /* Modify hardware config if it is requested. */
790 if (flags & FE_FLAGS_OVERRIDE_DLCR6)
791 sc->proto_dlcr6 = flags & FE_FLAGS_DLCR6_VALUE;
792
793 /* Find TX buffer size, based on the hardware dependent proto. */
794 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
795 case FE_D6_TXBSIZ_2x2KB: sc->txb_size = 2048; break;
796 case FE_D6_TXBSIZ_2x4KB: sc->txb_size = 4096; break;
797 case FE_D6_TXBSIZ_2x8KB: sc->txb_size = 8192; break;
798 default:
799 /* Oops, we can't work with single buffer configuration. */
800 if (bootverbose) {
801 printf("fe%d: strange TXBSIZ config; fixing\n",
802 sc->sc_unit);
803 }
804 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
805 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
806 sc->txb_size = 2048;
807 break;
808 }
809
810 /* Initialize the if_media interface. */
811 ifmedia_init(&sc->media, 0, fe_medchange, fe_medstat);
812 for (b = 0; bit2media[b] != 0; b++) {
813 if (sc->mbitmap & (1 << b)) {
814 ifmedia_add(&sc->media, bit2media[b], 0, NULL);
815 }
816 }
817 for (b = 0; bit2media[b] != 0; b++) {
818 if (sc->defmedia & (1 << b)) {
819 ifmedia_set(&sc->media, bit2media[b]);
820 break;
821 }
822 }
823#if 0 /* Turned off; this is called later, when the interface UPs. */
824 fe_medchange(sc);
825#endif
826
827 /* Attach and stop the interface. */
828 ether_ifattach(&sc->sc_if, ETHER_BPF_SUPPORTED);
829 fe_stop(sc);
830
831 /* Print additional info when attached. */
832 device_printf(dev, "address %6D, type %s%s\n",
833 sc->sc_enaddr, ":" , sc->typestr,
834 (sc->proto_dlcr4 & FE_D4_DSC) ? ", full duplex" : "");
835 if (bootverbose) {
836 int buf, txb, bbw, sbw, ram;
837
838 buf = txb = bbw = sbw = ram = -1;
839 switch ( sc->proto_dlcr6 & FE_D6_BUFSIZ ) {
840 case FE_D6_BUFSIZ_8KB: buf = 8; break;
841 case FE_D6_BUFSIZ_16KB: buf = 16; break;
842 case FE_D6_BUFSIZ_32KB: buf = 32; break;
843 case FE_D6_BUFSIZ_64KB: buf = 64; break;
844 }
845 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) {
846 case FE_D6_TXBSIZ_2x2KB: txb = 2; break;
847 case FE_D6_TXBSIZ_2x4KB: txb = 4; break;
848 case FE_D6_TXBSIZ_2x8KB: txb = 8; break;
849 }
850 switch ( sc->proto_dlcr6 & FE_D6_BBW ) {
851 case FE_D6_BBW_BYTE: bbw = 8; break;
852 case FE_D6_BBW_WORD: bbw = 16; break;
853 }
854 switch ( sc->proto_dlcr6 & FE_D6_SBW ) {
855 case FE_D6_SBW_BYTE: sbw = 8; break;
856 case FE_D6_SBW_WORD: sbw = 16; break;
857 }
858 switch ( sc->proto_dlcr6 & FE_D6_SRAM ) {
859 case FE_D6_SRAM_100ns: ram = 100; break;
860 case FE_D6_SRAM_150ns: ram = 150; break;
861 }
862 device_printf(dev, "SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
863 buf, bbw, ram, txb, sbw);
864 }
865 if (sc->stability & UNSTABLE_IRQ)
866 device_printf(dev, "warning: IRQ number may be incorrect\n");
867 if (sc->stability & UNSTABLE_MAC)
868 device_printf(dev, "warning: above MAC address may be incorrect\n");
869 if (sc->stability & UNSTABLE_TYPE)
870 device_printf(dev, "warning: hardware type was not validated\n");
871
872 return 0;
873}
874
875int
876fe_alloc_port(device_t dev, int size)
877{
878 struct fe_softc *sc = device_get_softc(dev);
879 struct resource *res;
880 int rid;
881
882 rid = 0;
883 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
884 0ul, ~0ul, size, RF_ACTIVE);
885 if (res) {
886 sc->port_used = size;
887 sc->port_res = res;
888 sc->iot = rman_get_bustag(res);
889 sc->ioh = rman_get_bushandle(res);
890 return (0);
891 }
892
893 return (ENOENT);
894}
895
896int
897fe_alloc_irq(device_t dev, int flags)
898{
899 struct fe_softc *sc = device_get_softc(dev);
900 struct resource *res;
901 int rid;
902
903 rid = 0;
904 res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
905 0ul, ~0ul, 1, RF_ACTIVE | flags);
906 if (res) {
907 sc->irq_res = res;
908 return (0);
909 }
910
911 return (ENOENT);
912}
913
914void
915fe_release_resource(device_t dev)
916{
917 struct fe_softc *sc = device_get_softc(dev);
918
919 if (sc->port_res) {
920 bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->port_res);
921 sc->port_res = NULL;
922 }
923 if (sc->irq_res) {
924 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
925 sc->irq_res = NULL;
926 }
927}
928
929/*
930 * Reset interface, after some (hardware) trouble is deteced.
931 */
932static void
933fe_reset (struct fe_softc *sc)
934{
935 /* Record how many packets are lost by this accident. */
936 sc->sc_if.if_oerrors += sc->txb_sched + sc->txb_count;
937 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
938
939 /* Put the interface into known initial state. */
940 fe_stop(sc);
941 if (sc->sc_if.if_flags & IFF_UP)
942 fe_init(sc);
943}
944
945/*
946 * Stop everything on the interface.
947 *
948 * All buffered packets, both transmitting and receiving,
949 * if any, will be lost by stopping the interface.
950 */
951void
952fe_stop (struct fe_softc *sc)
953{
954 int s;
955
956 s = splimp();
957
958 /* Disable interrupts. */
959 fe_outb(sc, FE_DLCR2, 0x00);
960 fe_outb(sc, FE_DLCR3, 0x00);
961
962 /* Stop interface hardware. */
963 DELAY(200);
964 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
965 DELAY(200);
966
967 /* Clear all interrupt status. */
968 fe_outb(sc, FE_DLCR0, 0xFF);
969 fe_outb(sc, FE_DLCR1, 0xFF);
970
971 /* Put the chip in stand-by mode. */
972 DELAY(200);
973 fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN);
974 DELAY(200);
975
976 /* Reset transmitter variables and interface flags. */
977 sc->sc_if.if_flags &= ~(IFF_OACTIVE | IFF_RUNNING);
978 sc->sc_if.if_timer = 0;
979 sc->txb_free = sc->txb_size;
980 sc->txb_count = 0;
981 sc->txb_sched = 0;
982
983 /* MAR loading can be delayed. */
984 sc->filter_change = 0;
985
986 /* Call a device-specific hook. */
987 if (sc->stop)
988 sc->stop(sc);
989
990 (void) splx(s);
991}
992
993/*
994 * Device timeout/watchdog routine. Entered if the device neglects to
995 * generate an interrupt after a transmit has been started on it.
996 */
997static void
998fe_watchdog ( struct ifnet *ifp )
999{
1000 struct fe_softc *sc = (struct fe_softc *)ifp;
1001
1002 /* A "debug" message. */
1003 printf("fe%d: transmission timeout (%d+%d)%s\n",
1004 ifp->if_unit, sc->txb_sched, sc->txb_count,
1005 (ifp->if_flags & IFF_UP) ? "" : " when down");
1006 if (sc->sc_if.if_opackets == 0 && sc->sc_if.if_ipackets == 0)
1007 printf("fe%d: wrong IRQ setting in config?\n", ifp->if_unit);
1008 fe_reset(sc);
1009}
1010
1011/*
1012 * Initialize device.
1013 */
1014static void
1015fe_init (void * xsc)
1016{
1017 struct fe_softc *sc = xsc;
1018 int s;
1019
1020 /* We need an address. */
1021 if (TAILQ_EMPTY(&sc->sc_if.if_addrhead)) { /* XXX unlikely */
1022#ifdef DIAGNOSTIC
1023 printf("fe%d: init() without any address\n", sc->sc_unit);
1024#endif
1025 return;
1026 }
1027
1028 /* Start initializing 86960. */
1029 s = splimp();
1030
1031 /* Call a hook before we start initializing the chip. */
1032 if (sc->init)
1033 sc->init(sc);
1034
1035 /*
1036 * Make sure to disable the chip, also.
1037 * This may also help re-programming the chip after
1038 * hot insertion of PCMCIAs.
1039 */
1040 DELAY(200);
1041 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1042 DELAY(200);
1043
1044 /* Power up the chip and select register bank for DLCRs. */
1045 DELAY(200);
1046 fe_outb(sc, FE_DLCR7,
1047 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
1048 DELAY(200);
1049
1050 /* Feed the station address. */
1051 fe_outblk(sc, FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN);
1052
1053 /* Clear multicast address filter to receive nothing. */
1054 fe_outb(sc, FE_DLCR7,
1055 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
1056 fe_outblk(sc, FE_MAR8, fe_filter_nothing.data, FE_FILTER_LEN);
1057
1058 /* Select the BMPR bank for runtime register access. */
1059 fe_outb(sc, FE_DLCR7,
1060 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1061
1062 /* Initialize registers. */
1063 fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */
1064 fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */
1065 fe_outb(sc, FE_DLCR2, 0x00);
1066 fe_outb(sc, FE_DLCR3, 0x00);
1067 fe_outb(sc, FE_DLCR4, sc->proto_dlcr4);
1068 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5);
1069 fe_outb(sc, FE_BMPR10, 0x00);
1070 fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1);
1071 fe_outb(sc, FE_BMPR12, 0x00);
1072 fe_outb(sc, FE_BMPR13, sc->proto_bmpr13);
1073 fe_outb(sc, FE_BMPR14, 0x00);
1074 fe_outb(sc, FE_BMPR15, 0x00);
1075
1076 /* Enable interrupts. */
1077 fe_outb(sc, FE_DLCR2, FE_TMASK);
1078 fe_outb(sc, FE_DLCR3, FE_RMASK);
1079
1080 /* Select requested media, just before enabling DLC. */
1081 if (sc->msel)
1082 sc->msel(sc);
1083
1084 /* Enable transmitter and receiver. */
1085 DELAY(200);
1086 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
1087 DELAY(200);
1088
1089#ifdef DIAGNOSTIC
1090 /*
1091 * Make sure to empty the receive buffer.
1092 *
1093 * This may be redundant, but *if* the receive buffer were full
1094 * at this point, then the driver would hang. I have experienced
1095 * some strange hang-up just after UP. I hope the following
1096 * code solve the problem.
1097 *
1098 * I have changed the order of hardware initialization.
1099 * I think the receive buffer cannot have any packets at this
1100 * point in this version. The following code *must* be
1101 * redundant now. FIXME.
1102 *
1103 * I've heard a rumore that on some PC card implementation of
1104 * 8696x, the receive buffer can have some data at this point.
1105 * The following message helps discovering the fact. FIXME.
1106 */
1107 if (!(fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)) {
1108 printf("fe%d: receive buffer has some data after reset\n",
1109 sc->sc_unit);
1110 fe_emptybuffer(sc);
1111 }
1112
1113 /* Do we need this here? Actually, no. I must be paranoia. */
1114 fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */
1115 fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */
1116#endif
1117
1118 /* Set 'running' flag, because we are now running. */
1119 sc->sc_if.if_flags |= IFF_RUNNING;
1120
1121 /*
1122 * At this point, the interface is running properly,
1123 * except that it receives *no* packets. we then call
1124 * fe_setmode() to tell the chip what packets to be
1125 * received, based on the if_flags and multicast group
1126 * list. It completes the initialization process.
1127 */
1128 fe_setmode(sc);
1129
1130#if 0
1131 /* ...and attempt to start output queued packets. */
1132 /* TURNED OFF, because the semi-auto media prober wants to UP
1133 the interface keeping it idle. The upper layer will soon
1134 start the interface anyway, and there are no significant
1135 delay. */
1136 fe_start(&sc->sc_if);
1137#endif
1138
1139 (void) splx(s);
1140}
1141
1142/*
1143 * This routine actually starts the transmission on the interface
1144 */
1145static void
1146fe_xmit (struct fe_softc *sc)
1147{
1148 /*
1149 * Set a timer just in case we never hear from the board again.
1150 * We use longer timeout for multiple packet transmission.
1151 * I'm not sure this timer value is appropriate. FIXME.
1152 */
1153 sc->sc_if.if_timer = 1 + sc->txb_count;
1154
1155 /* Update txb variables. */
1156 sc->txb_sched = sc->txb_count;
1157 sc->txb_count = 0;
1158 sc->txb_free = sc->txb_size;
1159 sc->tx_excolls = 0;
1160
1161 /* Start transmitter, passing packets in TX buffer. */
1162 fe_outb(sc, FE_BMPR10, sc->txb_sched | FE_B10_START);
1163}
1164
1165/*
1166 * Start output on interface.
1167 * We make two assumptions here:
1168 * 1) that the current priority is set to splimp _before_ this code
1169 * is called *and* is returned to the appropriate priority after
1170 * return
1171 * 2) that the IFF_OACTIVE flag is checked before this code is called
1172 * (i.e. that the output part of the interface is idle)
1173 */
1174void
1175fe_start (struct ifnet *ifp)
1176{
1177 struct fe_softc *sc = ifp->if_softc;
1178 struct mbuf *m;
1179
1180#ifdef DIAGNOSTIC
1181 /* Just a sanity check. */
1182 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
1183 /*
1184 * Txb_count and txb_free co-works to manage the
1185 * transmission buffer. Txb_count keeps track of the
1186 * used potion of the buffer, while txb_free does unused
1187 * potion. So, as long as the driver runs properly,
1188 * txb_count is zero if and only if txb_free is same
1189 * as txb_size (which represents whole buffer.)
1190 */
1191 printf("fe%d: inconsistent txb variables (%d, %d)\n",
1192 sc->sc_unit, sc->txb_count, sc->txb_free);
1193 /*
1194 * So, what should I do, then?
1195 *
1196 * We now know txb_count and txb_free contradicts. We
1197 * cannot, however, tell which is wrong. More
1198 * over, we cannot peek 86960 transmission buffer or
1199 * reset the transmission buffer. (In fact, we can
1200 * reset the entire interface. I don't want to do it.)
1201 *
1202 * If txb_count is incorrect, leaving it as-is will cause
1203 * sending of garbage after next interrupt. We have to
1204 * avoid it. Hence, we reset the txb_count here. If
1205 * txb_free was incorrect, resetting txb_count just loose
1206 * some packets. We can live with it.
1207 */
1208 sc->txb_count = 0;
1209 }
1210#endif
1211
1212 /*
1213 * First, see if there are buffered packets and an idle
1214 * transmitter - should never happen at this point.
1215 */
1216 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
1217 printf("fe%d: transmitter idle with %d buffered packets\n",
1218 sc->sc_unit, sc->txb_count);
1219 fe_xmit(sc);
1220 }
1221
1222 /*
1223 * Stop accepting more transmission packets temporarily, when
1224 * a filter change request is delayed. Updating the MARs on
1225 * 86960 flushes the transmission buffer, so it is delayed
1226 * until all buffered transmission packets have been sent
1227 * out.
1228 */
1229 if (sc->filter_change) {
1230 /*
1231 * Filter change request is delayed only when the DLC is
1232 * working. DLC soon raise an interrupt after finishing
1233 * the work.
1234 */
1235 goto indicate_active;
1236 }
1237
1238 for (;;) {
1239
1240 /*
1241 * See if there is room to put another packet in the buffer.
1242 * We *could* do better job by peeking the send queue to
1243 * know the length of the next packet. Current version just
1244 * tests against the worst case (i.e., longest packet). FIXME.
1245 *
1246 * When adding the packet-peek feature, don't forget adding a
1247 * test on txb_count against QUEUEING_MAX.
1248 * There is a little chance the packet count exceeds
1249 * the limit. Assume transmission buffer is 8KB (2x8KB
1250 * configuration) and an application sends a bunch of small
1251 * (i.e., minimum packet sized) packets rapidly. An 8KB
1252 * buffer can hold 130 blocks of 62 bytes long...
1253 */
1254 if (sc->txb_free
1255 < ETHER_MAX_LEN - ETHER_CRC_LEN + FE_DATA_LEN_LEN) {
1256 /* No room. */
1257 goto indicate_active;
1258 }
1259
1260#if FE_SINGLE_TRANSMISSION
1261 if (sc->txb_count > 0) {
1262 /* Just one packet per a transmission buffer. */
1263 goto indicate_active;
1264 }
1265#endif
1266
1267 /*
1268 * Get the next mbuf chain for a packet to send.
1269 */
1270 IF_DEQUEUE(&sc->sc_if.if_snd, m);
1271 if (m == NULL) {
1272 /* No more packets to send. */
1273 goto indicate_inactive;
1274 }
1275
1276 /*
1277 * Copy the mbuf chain into the transmission buffer.
1278 * txb_* variables are updated as necessary.
1279 */
1280 fe_write_mbufs(sc, m);
1281
1282 /* Start transmitter if it's idle. */
1283 if ((sc->txb_count > 0) && (sc->txb_sched == 0))
1284 fe_xmit(sc);
1285
1286 /*
1287 * Tap off here if there is a bpf listener,
1288 * and the device is *not* in promiscuous mode.
1289 * (86960 receives self-generated packets if
1290 * and only if it is in "receive everything"
1291 * mode.)
1292 */
1293 if (sc->sc_if.if_bpf &&
1294 !(sc->sc_if.if_flags & IFF_PROMISC))
1295 bpf_mtap(&sc->sc_if, m);
1296
1297 m_freem(m);
1298 }
1299
1300 indicate_inactive:
1301 /*
1302 * We are using the !OACTIVE flag to indicate to
1303 * the outside world that we can accept an
1304 * additional packet rather than that the
1305 * transmitter is _actually_ active. Indeed, the
1306 * transmitter may be active, but if we haven't
1307 * filled all the buffers with data then we still
1308 * want to accept more.
1309 */
1310 sc->sc_if.if_flags &= ~IFF_OACTIVE;
1311 return;
1312
1313 indicate_active:
1314 /*
1315 * The transmitter is active, and there are no room for
1316 * more outgoing packets in the transmission buffer.
1317 */
1318 sc->sc_if.if_flags |= IFF_OACTIVE;
1319 return;
1320}
1321
1322/*
1323 * Drop (skip) a packet from receive buffer in 86960 memory.
1324 */
1325static void
1326fe_droppacket (struct fe_softc * sc, int len)
1327{
1328 int i;
1329
1330 /*
1331 * 86960 manual says that we have to read 8 bytes from the buffer
1332 * before skip the packets and that there must be more than 8 bytes
1333 * remaining in the buffer when issue a skip command.
1334 * Remember, we have already read 4 bytes before come here.
1335 */
1336 if (len > 12) {
1337 /* Read 4 more bytes, and skip the rest of the packet. */
1338#ifdef FE_8BIT_SUPPORT
1339 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1340 {
1341 (void) fe_inb(sc, FE_BMPR8);
1342 (void) fe_inb(sc, FE_BMPR8);
1343 (void) fe_inb(sc, FE_BMPR8);
1344 (void) fe_inb(sc, FE_BMPR8);
1345 }
1346 else
1347#endif
1348 {
1349 (void) fe_inw(sc, FE_BMPR8);
1350 (void) fe_inw(sc, FE_BMPR8);
1351 }
1352 fe_outb(sc, FE_BMPR14, FE_B14_SKIP);
1353 } else {
1354 /* We should not come here unless receiving RUNTs. */
1355#ifdef FE_8BIT_SUPPORT
1356 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1357 {
1358 for (i = 0; i < len; i++)
1359 (void) fe_inb(sc, FE_BMPR8);
1360 }
1361 else
1362#endif
1363 {
1364 for (i = 0; i < len; i += 2)
1365 (void) fe_inw(sc, FE_BMPR8);
1366 }
1367 }
1368}
1369
1370#ifdef DIAGNOSTIC
1371/*
1372 * Empty receiving buffer.
1373 */
1374static void
1375fe_emptybuffer (struct fe_softc * sc)
1376{
1377 int i;
1378 u_char saved_dlcr5;
1379
1380#ifdef FE_DEBUG
1381 printf("fe%d: emptying receive buffer\n", sc->sc_unit);
1382#endif
1383
1384 /*
1385 * Stop receiving packets, temporarily.
1386 */
1387 saved_dlcr5 = fe_inb(sc, FE_DLCR5);
1388 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5);
1389 DELAY(1300);
1390
1391 /*
1392 * When we come here, the receive buffer management may
1393 * have been broken. So, we cannot use skip operation.
1394 * Just discard everything in the buffer.
1395 */
1396#ifdef FE_8BIT_SUPPORT
1397 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1398 {
1399 for (i = 0; i < 65536; i++) {
1400 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1401 break;
1402 (void) fe_inb(sc, FE_BMPR8);
1403 }
1404 }
1405 else
1406#endif
1407 {
1408 for (i = 0; i < 65536; i += 2) {
1409 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1410 break;
1411 (void) fe_inw(sc, FE_BMPR8);
1412 }
1413 }
1414
1415 /*
1416 * Double check.
1417 */
1418 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP) {
1419 printf("fe%d: could not empty receive buffer\n", sc->sc_unit);
1420 /* Hmm. What should I do if this happens? FIXME. */
1421 }
1422
1423 /*
1424 * Restart receiving packets.
1425 */
1426 fe_outb(sc, FE_DLCR5, saved_dlcr5);
1427}
1428#endif
1429
1430/*
1431 * Transmission interrupt handler
1432 * The control flow of this function looks silly. FIXME.
1433 */
1434static void
1435fe_tint (struct fe_softc * sc, u_char tstat)
1436{
1437 int left;
1438 int col;
1439
1440 /*
1441 * Handle "excessive collision" interrupt.
1442 */
1443 if (tstat & FE_D0_COLL16) {
1444
1445 /*
1446 * Find how many packets (including this collided one)
1447 * are left unsent in transmission buffer.
1448 */
1449 left = fe_inb(sc, FE_BMPR10);
1450 printf("fe%d: excessive collision (%d/%d)\n",
1451 sc->sc_unit, left, sc->txb_sched);
1452
1453 /*
1454 * Clear the collision flag (in 86960) here
1455 * to avoid confusing statistics.
1456 */
1457 fe_outb(sc, FE_DLCR0, FE_D0_COLLID);
1458
1459 /*
1460 * Restart transmitter, skipping the
1461 * collided packet.
1462 *
1463 * We *must* skip the packet to keep network running
1464 * properly. Excessive collision error is an
1465 * indication of the network overload. If we
1466 * tried sending the same packet after excessive
1467 * collision, the network would be filled with
1468 * out-of-time packets. Packets belonging
1469 * to reliable transport (such as TCP) are resent
1470 * by some upper layer.
1471 */
1472 fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1);
1473
1474 /* Update statistics. */
1475 sc->tx_excolls++;
1476 }
1477
1478 /*
1479 * Handle "transmission complete" interrupt.
1480 */
1481 if (tstat & FE_D0_TXDONE) {
1482
1483 /*
1484 * Add in total number of collisions on last
1485 * transmission. We also clear "collision occurred" flag
1486 * here.
1487 *
1488 * 86960 has a design flaw on collision count on multiple
1489 * packet transmission. When we send two or more packets
1490 * with one start command (that's what we do when the
1491 * transmission queue is crowded), 86960 informs us number
1492 * of collisions occurred on the last packet on the
1493 * transmission only. Number of collisions on previous
1494 * packets are lost. I have told that the fact is clearly
1495 * stated in the Fujitsu document.
1496 *
1497 * I considered not to mind it seriously. Collision
1498 * count is not so important, anyway. Any comments? FIXME.
1499 */
1500
1501 if (fe_inb(sc, FE_DLCR0) & FE_D0_COLLID) {
1502
1503 /* Clear collision flag. */
1504 fe_outb(sc, FE_DLCR0, FE_D0_COLLID);
1505
1506 /* Extract collision count from 86960. */
1507 col = fe_inb(sc, FE_DLCR4);
1508 col = (col & FE_D4_COL) >> FE_D4_COL_SHIFT;
1509 if (col == 0) {
1510 /*
1511 * Status register indicates collisions,
1512 * while the collision count is zero.
1513 * This can happen after multiple packet
1514 * transmission, indicating that one or more
1515 * previous packet(s) had been collided.
1516 *
1517 * Since the accurate number of collisions
1518 * has been lost, we just guess it as 1;
1519 * Am I too optimistic? FIXME.
1520 */
1521 col = 1;
1522 }
1523 sc->sc_if.if_collisions += col;
1524 if (col == 1)
1525 sc->mibdata.dot3StatsSingleCollisionFrames++;
1526 else
1527 sc->mibdata.dot3StatsMultipleCollisionFrames++;
1528 sc->mibdata.dot3StatsCollFrequencies[col-1]++;
1529 }
1530
1531 /*
1532 * Update transmission statistics.
1533 * Be sure to reflect number of excessive collisions.
1534 */
1535 col = sc->tx_excolls;
1536 sc->sc_if.if_opackets += sc->txb_sched - col;
1537 sc->sc_if.if_oerrors += col;
1538 sc->sc_if.if_collisions += col * 16;
1539 sc->mibdata.dot3StatsExcessiveCollisions += col;
1540 sc->mibdata.dot3StatsCollFrequencies[15] += col;
1541 sc->txb_sched = 0;
1542
1543 /*
1544 * The transmitter is no more active.
1545 * Reset output active flag and watchdog timer.
1546 */
1547 sc->sc_if.if_flags &= ~IFF_OACTIVE;
1548 sc->sc_if.if_timer = 0;
1549
1550 /*
1551 * If more data is ready to transmit in the buffer, start
1552 * transmitting them. Otherwise keep transmitter idle,
1553 * even if more data is queued. This gives receive
1554 * process a slight priority.
1555 */
1556 if (sc->txb_count > 0)
1557 fe_xmit(sc);
1558 }
1559}
1560
1561/*
1562 * Ethernet interface receiver interrupt.
1563 */
1564static void
1565fe_rint (struct fe_softc * sc, u_char rstat)
1566{
1567 u_short len;
1568 u_char status;
1569 int i;
1570
1571 /*
1572 * Update statistics if this interrupt is caused by an error.
1573 * Note that, when the system was not sufficiently fast, the
1574 * receive interrupt might not be acknowledged immediately. If
1575 * one or more errornous frames were received before this routine
1576 * was scheduled, they are ignored, and the following error stats
1577 * give less than real values.
1578 */
1579 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | FE_D1_ALGERR | FE_D1_SRTPKT)) {
1580 if (rstat & FE_D1_OVRFLO)
1581 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1582 if (rstat & FE_D1_CRCERR)
1583 sc->mibdata.dot3StatsFCSErrors++;
1584 if (rstat & FE_D1_ALGERR)
1585 sc->mibdata.dot3StatsAlignmentErrors++;
1586#if 0
1587 /* The reference MAC receiver defined in 802.3
1588 silently ignores short frames (RUNTs) without
1589 notifying upper layer. RFC 1650 (dot3 MIB) is
1590 based on the 802.3, and it has no stats entry for
1591 RUNTs... */
1592 if (rstat & FE_D1_SRTPKT)
1593 sc->mibdata.dot3StatsFrameTooShorts++; /* :-) */
1594#endif
1595 sc->sc_if.if_ierrors++;
1596 }
1597
1598 /*
1599 * MB86960 has a flag indicating "receive queue empty."
1600 * We just loop, checking the flag, to pull out all received
1601 * packets.
1602 *
1603 * We limit the number of iterations to avoid infinite-loop.
1604 * The upper bound is set to unrealistic high value.
1605 */
1606 for (i = 0; i < FE_MAX_RECV_COUNT * 2; i++) {
1607
1608 /* Stop the iteration if 86960 indicates no packets. */
1609 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1610 return;
1611
1612 /*
1613 * Extract a receive status byte.
1614 * As our 86960 is in 16 bit bus access mode, we have to
1615 * use inw() to get the status byte. The significant
1616 * value is returned in lower 8 bits.
1617 */
1618#ifdef FE_8BIT_SUPPORT
1619 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1620 {
1621 status = fe_inb(sc, FE_BMPR8);
1622 (void) fe_inb(sc, FE_BMPR8);
1623 }
1624 else
1625#endif
1626 {
1627 status = (u_char) fe_inw(sc, FE_BMPR8);
1628 }
1629
1630 /*
1631 * Extract the packet length.
1632 * It is a sum of a header (14 bytes) and a payload.
1633 * CRC has been stripped off by the 86960.
1634 */
1635#ifdef FE_8BIT_SUPPORT
1636 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1637 {
1638 len = fe_inb(sc, FE_BMPR8);
1639 len |= (fe_inb(sc, FE_BMPR8) << 8);
1640 }
1641 else
1642#endif
1643 {
1644 len = fe_inw(sc, FE_BMPR8);
1645 }
1646
1647 /*
1648 * AS our 86960 is programed to ignore errored frame,
1649 * we must not see any error indication in the
1650 * receive buffer. So, any error condition is a
1651 * serious error, e.g., out-of-sync of the receive
1652 * buffer pointers.
1653 */
1654 if ((status & 0xF0) != 0x20 ||
1655 len > ETHER_MAX_LEN - ETHER_CRC_LEN ||
1656 len < ETHER_MIN_LEN - ETHER_CRC_LEN) {
1657 printf("fe%d: RX buffer out-of-sync\n", sc->sc_unit);
1658 sc->sc_if.if_ierrors++;
1659 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1660 fe_reset(sc);
1661 return;
1662 }
1663
1664 /*
1665 * Go get a packet.
1666 */
1667 if (fe_get_packet(sc, len) < 0) {
1668 /*
1669 * Negative return from fe_get_packet()
1670 * indicates no available mbuf. We stop
1671 * receiving packets, even if there are more
1672 * in the buffer. We hope we can get more
1673 * mbuf next time.
1674 */
1675 sc->sc_if.if_ierrors++;
1676 sc->mibdata.dot3StatsMissedFrames++;
1677 fe_droppacket(sc, len);
1678 return;
1679 }
1680
1681 /* Successfully received a packet. Update stat. */
1682 sc->sc_if.if_ipackets++;
1683 }
1684
1685 /* Maximum number of frames has been received. Something
1686 strange is happening here... */
1687 printf("fe%d: unusual receive flood\n", sc->sc_unit);
1688 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1689 fe_reset(sc);
1690}
1691
1692/*
1693 * Ethernet interface interrupt processor
1694 */
1695static void
1696fe_intr (void *arg)
1697{
1698 struct fe_softc *sc = arg;
1699 u_char tstat, rstat;
1700 int loop_count = FE_MAX_LOOP;
1701
1702 /* Loop until there are no more new interrupt conditions. */
1703 while (loop_count-- > 0) {
1704 /*
1705 * Get interrupt conditions, masking unneeded flags.
1706 */
1707 tstat = fe_inb(sc, FE_DLCR0) & FE_TMASK;
1708 rstat = fe_inb(sc, FE_DLCR1) & FE_RMASK;
1709 if (tstat == 0 && rstat == 0)
1710 return;
1711
1712 /*
1713 * Reset the conditions we are acknowledging.
1714 */
1715 fe_outb(sc, FE_DLCR0, tstat);
1716 fe_outb(sc, FE_DLCR1, rstat);
1717
1718 /*
1719 * Handle transmitter interrupts.
1720 */
1721 if (tstat)
1722 fe_tint(sc, tstat);
1723
1724 /*
1725 * Handle receiver interrupts
1726 */
1727 if (rstat)
1728 fe_rint(sc, rstat);
1729
1730 /*
1731 * Update the multicast address filter if it is
1732 * needed and possible. We do it now, because
1733 * we can make sure the transmission buffer is empty,
1734 * and there is a good chance that the receive queue
1735 * is empty. It will minimize the possibility of
1736 * packet loss.
1737 */
1738 if (sc->filter_change &&
1739 sc->txb_count == 0 && sc->txb_sched == 0) {
1740 fe_loadmar(sc);
1741 sc->sc_if.if_flags &= ~IFF_OACTIVE;
1742 }
1743
1744 /*
1745 * If it looks like the transmitter can take more data,
1746 * attempt to start output on the interface. This is done
1747 * after handling the receiver interrupt to give the
1748 * receive operation priority.
1749 *
1750 * BTW, I'm not sure in what case the OACTIVE is on at
1751 * this point. Is the following test redundant?
1752 *
1753 * No. This routine polls for both transmitter and
1754 * receiver interrupts. 86960 can raise a receiver
1755 * interrupt when the transmission buffer is full.
1756 */
1757 if ((sc->sc_if.if_flags & IFF_OACTIVE) == 0)
1758 fe_start(&sc->sc_if);
1759 }
1760
1761 printf("fe%d: too many loops\n", sc->sc_unit);
1762}
1763
1764/*
1765 * Process an ioctl request. This code needs some work - it looks
1766 * pretty ugly.
1767 */
1768static int
1769fe_ioctl (struct ifnet * ifp, u_long command, caddr_t data)
1770{
1771 struct fe_softc *sc = ifp->if_softc;
1772 struct ifreq *ifr = (struct ifreq *)data;
1773 int s, error = 0;
1774
1775 s = splimp();
1776
1777 switch (command) {
1778
1779 case SIOCSIFADDR:
1780 case SIOCGIFADDR:
1781 case SIOCSIFMTU:
1782 /* Just an ordinary action. */
1783 error = ether_ioctl(ifp, command, data);
1784 break;
1785
1786 case SIOCSIFFLAGS:
1787 /*
1788 * Switch interface state between "running" and
1789 * "stopped", reflecting the UP flag.
1790 */
1791 if (sc->sc_if.if_flags & IFF_UP) {
1792 if ((sc->sc_if.if_flags & IFF_RUNNING) == 0)
1793 fe_init(sc);
1794 } else {
1795 if ((sc->sc_if.if_flags & IFF_RUNNING) != 0)
1796 fe_stop(sc);
1797 }
1798
1799 /*
1800 * Promiscuous and/or multicast flags may have changed,
1801 * so reprogram the multicast filter and/or receive mode.
1802 */
1803 fe_setmode(sc);
1804
1805 /* Done. */
1806 break;
1807
1808 case SIOCADDMULTI:
1809 case SIOCDELMULTI:
1810 /*
1811 * Multicast list has changed; set the hardware filter
1812 * accordingly.
1813 */
1814 fe_setmode(sc);
1815 break;
1816
1817 case SIOCSIFMEDIA:
1818 case SIOCGIFMEDIA:
1819 /* Let if_media to handle these commands and to call
1820 us back. */
1821 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
1822 break;
1823
1824 default:
1825 error = EINVAL;
1826 break;
1827 }
1828
1829 (void) splx(s);
1830 return (error);
1831}
1832
1833/*
1834 * Retrieve packet from receive buffer and send to the next level up via
1835 * ether_input().
1836 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
1837 */
1838static int
1839fe_get_packet (struct fe_softc * sc, u_short len)
1840{
1841 struct ether_header *eh;
1842 struct mbuf *m;
1843
1844 /*
1845 * NFS wants the data be aligned to the word (4 byte)
1846 * boundary. Ethernet header has 14 bytes. There is a
1847 * 2-byte gap.
1848 */
1849#define NFS_MAGIC_OFFSET 2
1850
1851 /*
1852 * This function assumes that an Ethernet packet fits in an
1853 * mbuf (with a cluster attached when necessary.) On FreeBSD
1854 * 2.0 for x86, which is the primary target of this driver, an
1855 * mbuf cluster has 4096 bytes, and we are happy. On ancient
1856 * BSDs, such as vanilla 4.3 for 386, a cluster size was 1024,
1857 * however. If the following #error message were printed upon
1858 * compile, you need to rewrite this function.
1859 */
1860#if ( MCLBYTES < ETHER_MAX_LEN - ETHER_CRC_LEN + NFS_MAGIC_OFFSET )
1861#error "Too small MCLBYTES to use fe driver."
1862#endif
1863
1864 /*
1865 * Our strategy has one more problem. There is a policy on
1866 * mbuf cluster allocation. It says that we must have at
1867 * least MINCLSIZE (208 bytes on FreeBSD 2.0 for x86) to
1868 * allocate a cluster. For a packet of a size between
1869 * (MHLEN - 2) to (MINCLSIZE - 2), our code violates the rule...
1870 * On the other hand, the current code is short, simple,
1871 * and fast, however. It does no harmful thing, just waists
1872 * some memory. Any comments? FIXME.
1873 */
1874
1875 /* Allocate an mbuf with packet header info. */
1876 MGETHDR(m, M_DONTWAIT, MT_DATA);
1877 if (m == NULL)
1878 return -1;
1879
1880 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
1881 if (len > MHLEN - NFS_MAGIC_OFFSET) {
1882 MCLGET(m, M_DONTWAIT);
1883 if (!(m->m_flags & M_EXT)) {
1884 m_freem(m);
1885 return -1;
1886 }
1887 }
1888
1889 /* Initialize packet header info. */
1890 m->m_pkthdr.rcvif = &sc->sc_if;
1891 m->m_pkthdr.len = len;
1892
1893 /* Set the length of this packet. */
1894 m->m_len = len;
1895
1896 /* The following silliness is to make NFS happy */
1897 m->m_data += NFS_MAGIC_OFFSET;
1898
1899 /* Get (actually just point to) the header part. */
1900 eh = mtod(m, struct ether_header *);
1901
1902 /* Get a packet. */
1903#ifdef FE_8BIT_SUPPORT
1904 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1905 {
1906 fe_insb(sc, FE_BMPR8, (u_int8_t *)eh, len);
1907 }
1908 else
1909#endif
1910 {
1911 fe_insw(sc, FE_BMPR8, (u_int16_t *)eh, (len + 1) >> 1);
1912 }
1913
1914 /* Strip off the Ethernet header. */
1915 m->m_pkthdr.len -= sizeof (struct ether_header);
1916 m->m_len -= sizeof (struct ether_header);
1917 m->m_data += sizeof (struct ether_header);
1918
1919 /* Feed the packet to upper layer. */
1920 ether_input(&sc->sc_if, eh, m);
1921 return 0;
1922}
1923
1924/*
1925 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
1926 * Returns number of bytes actually written, including length word.
1927 *
1928 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
1929 * Packets shorter than Ethernet minimum are legal, and we pad them
1930 * before sending out. An exception is "partial" packets which are
1931 * shorter than mandatory Ethernet header.
1932 */
1933static void
1934fe_write_mbufs (struct fe_softc *sc, struct mbuf *m)
1935{
1936 u_short length, len;
1937 struct mbuf *mp;
1938 u_char *data;
1939 u_short savebyte; /* WARNING: Architecture dependent! */
1940#define NO_PENDING_BYTE 0xFFFF
1941
1942 static u_char padding [ETHER_MIN_LEN - ETHER_CRC_LEN - ETHER_HDR_LEN];
1943
1944#ifdef DIAGNOSTIC
1945 /* First, count up the total number of bytes to copy */
1946 length = 0;
1947 for (mp = m; mp != NULL; mp = mp->m_next)
1948 length += mp->m_len;
1949
1950 /* Check if this matches the one in the packet header. */
1951 if (length != m->m_pkthdr.len) {
1952 printf("fe%d: packet length mismatch? (%d/%d)\n", sc->sc_unit,
1953 length, m->m_pkthdr.len);
1954 }
1955#else
1956 /* Just use the length value in the packet header. */
1957 length = m->m_pkthdr.len;
1958#endif
1959
1960#ifdef DIAGNOSTIC
1961 /*
1962 * Should never send big packets. If such a packet is passed,
1963 * it should be a bug of upper layer. We just ignore it.
1964 * ... Partial (too short) packets, neither.
1965 */
1966 if (length < ETHER_HDR_LEN ||
1967 length > ETHER_MAX_LEN - ETHER_CRC_LEN) {
1968 printf("fe%d: got an out-of-spec packet (%u bytes) to send\n",
1969 sc->sc_unit, length);
1970 sc->sc_if.if_oerrors++;
1971 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
1972 return;
1973 }
1974#endif
1975
1976 /*
1977 * Put the length word for this frame.
1978 * Does 86960 accept odd length? -- Yes.
1979 * Do we need to pad the length to minimum size by ourselves?
1980 * -- Generally yes. But for (or will be) the last
1981 * packet in the transmission buffer, we can skip the
1982 * padding process. It may gain performance slightly. FIXME.
1983 */
1984#ifdef FE_8BIT_SUPPORT
1985 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1986 {
1987 len = max(length, ETHER_MIN_LEN - ETHER_CRC_LEN);
1988 fe_outb(sc, FE_BMPR8, len & 0x00ff);
1989 fe_outb(sc, FE_BMPR8, (len & 0xff00) >> 8);
1990 }
1991 else
1992#endif
1993 {
1994 fe_outw(sc, FE_BMPR8,
1995 max(length, ETHER_MIN_LEN - ETHER_CRC_LEN));
1996 }
1997
1998 /*
1999 * Update buffer status now.
2000 * Truncate the length up to an even number, since we use outw().
2001 */
2002#ifdef FE_8BIT_SUPPORT
2003 if ((sc->proto_dlcr6 & FE_D6_SBW) != FE_D6_SBW_BYTE)
2004#endif
2005 {
2006 length = (length + 1) & ~1;
2007 }
2008 sc->txb_free -= FE_DATA_LEN_LEN +
2009 max(length, ETHER_MIN_LEN - ETHER_CRC_LEN);
2010 sc->txb_count++;
2011
2012 /*
2013 * Transfer the data from mbuf chain to the transmission buffer.
2014 * MB86960 seems to require that data be transferred as words, and
2015 * only words. So that we require some extra code to patch
2016 * over odd-length mbufs.
2017 */
2018#ifdef FE_8BIT_SUPPORT
2019 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
2020 {
2021 /* 8-bit cards are easy. */
2022 for (mp = m; mp != 0; mp = mp->m_next) {
2023 if (mp->m_len)
2024 fe_outsb(sc, FE_BMPR8, mtod(mp, caddr_t),
2025 mp->m_len);
2026 }
2027 }
2028 else
2029#endif
2030 {
2031 /* 16-bit cards are a pain. */
2032 savebyte = NO_PENDING_BYTE;
2033 for (mp = m; mp != 0; mp = mp->m_next) {
2034
2035 /* Ignore empty mbuf. */
2036 len = mp->m_len;
2037 if (len == 0)
2038 continue;
2039
2040 /* Find the actual data to send. */
2041 data = mtod(mp, caddr_t);
2042
2043 /* Finish the last byte. */
2044 if (savebyte != NO_PENDING_BYTE) {
2045 fe_outw(sc, FE_BMPR8, savebyte | (*data << 8));
2046 data++;
2047 len--;
2048 savebyte = NO_PENDING_BYTE;
2049 }
2050
2051 /* output contiguous words */
2052 if (len > 1) {
2053 fe_outsw(sc, FE_BMPR8, (u_int16_t *)data,
2054 len >> 1);
2055 data += len & ~1;
2056 len &= 1;
2057 }
2058
2059 /* Save a remaining byte, if there is one. */
2060 if (len > 0)
2061 savebyte = *data;
2062 }
2063
2064 /* Spit the last byte, if the length is odd. */
2065 if (savebyte != NO_PENDING_BYTE)
2066 fe_outw(sc, FE_BMPR8, savebyte);
2067 }
2068
2069 /* Pad to the Ethernet minimum length, if the packet is too short. */
2070 if (length < ETHER_MIN_LEN - ETHER_CRC_LEN) {
2071#ifdef FE_8BIT_SUPPORT
2072 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
2073 {
2074 fe_outsb(sc, FE_BMPR8, padding,
2075 ETHER_MIN_LEN - ETHER_CRC_LEN - length);
2076 }
2077 else
2078#endif
2079 {
2080 fe_outsw(sc, FE_BMPR8, (u_int16_t *)padding,
2081 (ETHER_MIN_LEN - ETHER_CRC_LEN - length) >> 1);
2082 }
2083 }
2084}
2085
2086/*
2087 * Compute hash value for an Ethernet address
2088 */
2089static int
2090fe_hash ( u_char * ep )
2091{
2092#define FE_HASH_MAGIC_NUMBER 0xEDB88320L
2093
2094 u_long hash = 0xFFFFFFFFL;
2095 int i, j;
2096 u_char b;
2097 u_long m;
2098
2099 for ( i = ETHER_ADDR_LEN; --i >= 0; ) {
2100 b = *ep++;
2101 for ( j = 8; --j >= 0; ) {
2102 m = hash;
2103 hash >>= 1;
2104 if ( ( m ^ b ) & 1 ) hash ^= FE_HASH_MAGIC_NUMBER;
2105 b >>= 1;
2106 }
2107 }
2108 return ( ( int )( hash >> 26 ) );
2109}
2110
2111/*
2112 * Compute the multicast address filter from the
2113 * list of multicast addresses we need to listen to.
2114 */
2115static struct fe_filter
2116fe_mcaf ( struct fe_softc *sc )
2117{
2118 int index;
2119 struct fe_filter filter;
2120 struct ifmultiaddr *ifma;
2121
2122 filter = fe_filter_nothing;
2123 TAILQ_FOREACH(ifma, &sc->arpcom.ac_if.if_multiaddrs, ifma_link) {
2124 if (ifma->ifma_addr->sa_family != AF_LINK)
2125 continue;
2126 index = fe_hash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
2127#ifdef FE_DEBUG
2128 printf("fe%d: hash(%6D) == %d\n",
2129 sc->sc_unit, enm->enm_addrlo , ":", index);
2130#endif
2131
2132 filter.data[index >> 3] |= 1 << (index & 7);
2133 }
2134 return ( filter );
2135}
2136
2137/*
2138 * Calculate a new "multicast packet filter" and put the 86960
2139 * receiver in appropriate mode.
2140 */
2141static void
2142fe_setmode (struct fe_softc *sc)
2143{
2144 int flags = sc->sc_if.if_flags;
2145
2146 /*
2147 * If the interface is not running, we postpone the update
2148 * process for receive modes and multicast address filter
2149 * until the interface is restarted. It reduces some
2150 * complicated job on maintaining chip states. (Earlier versions
2151 * of this driver had a bug on that point...)
2152 *
2153 * To complete the trick, fe_init() calls fe_setmode() after
2154 * restarting the interface.
2155 */
2156 if (!(flags & IFF_RUNNING))
2157 return;
2158
2159 /*
2160 * Promiscuous mode is handled separately.
2161 */
2162 if (flags & IFF_PROMISC) {
2163 /*
2164 * Program 86960 to receive all packets on the segment
2165 * including those directed to other stations.
2166 * Multicast filter stored in MARs are ignored
2167 * under this setting, so we don't need to update it.
2168 *
2169 * Promiscuous mode in FreeBSD 2 is used solely by
2170 * BPF, and BPF only listens to valid (no error) packets.
2171 * So, we ignore erroneous ones even in this mode.
2172 * (Older versions of fe driver mistook the point.)
2173 */
2174 fe_outb(sc, FE_DLCR5,
2175 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
2176 sc->filter_change = 0;
2177 return;
2178 }
2179
2180 /*
2181 * Turn the chip to the normal (non-promiscuous) mode.
2182 */
2183 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
2184
2185 /*
2186 * Find the new multicast filter value.
2187 */
2188 if (flags & IFF_ALLMULTI)
2189 sc->filter = fe_filter_all;
2190 else
2191 sc->filter = fe_mcaf(sc);
2192 sc->filter_change = 1;
2193
2194 /*
2195 * We have to update the multicast filter in the 86960, A.S.A.P.
2196 *
2197 * Note that the DLC (Data Link Control unit, i.e. transmitter
2198 * and receiver) must be stopped when feeding the filter, and
2199 * DLC trashes all packets in both transmission and receive
2200 * buffers when stopped.
2201 *
2202 * To reduce the packet loss, we delay the filter update
2203 * process until buffers are empty.
2204 */
2205 if (sc->txb_sched == 0 && sc->txb_count == 0 &&
2206 !(fe_inb(sc, FE_DLCR1) & FE_D1_PKTRDY)) {
2207 /*
2208 * Buffers are (apparently) empty. Load
2209 * the new filter value into MARs now.
2210 */
2211 fe_loadmar(sc);
2212 } else {
2213 /*
2214 * Buffers are not empty. Mark that we have to update
2215 * the MARs. The new filter will be loaded by feintr()
2216 * later.
2217 */
2218 }
2219}
2220
2221/*
2222 * Load a new multicast address filter into MARs.
2223 *
2224 * The caller must have splimp'ed before fe_loadmar.
2225 * This function starts the DLC upon return. So it can be called only
2226 * when the chip is working, i.e., from the driver's point of view, when
2227 * a device is RUNNING. (I mistook the point in previous versions.)
2228 */
2229static void
2230fe_loadmar (struct fe_softc * sc)
2231{
2232 /* Stop the DLC (transmitter and receiver). */
2233 DELAY(200);
2234 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
2235 DELAY(200);
2236
2237 /* Select register bank 1 for MARs. */
2238 fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
2239
2240 /* Copy filter value into the registers. */
2241 fe_outblk(sc, FE_MAR8, sc->filter.data, FE_FILTER_LEN);
2242
2243 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
2244 fe_outb(sc, FE_DLCR7,
2245 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
2246
2247 /* Restart the DLC. */
2248 DELAY(200);
2249 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
2250 DELAY(200);
2251
2252 /* We have just updated the filter. */
2253 sc->filter_change = 0;
2254}
2255
2256/* Change the media selection. */
2257static int
2258fe_medchange (struct ifnet *ifp)
2259{
2260 struct fe_softc *sc = (struct fe_softc *)ifp->if_softc;
2261
2262#ifdef DIAGNOSTIC
2263 /* If_media should not pass any request for a media which this
2264 interface doesn't support. */
2265 int b;
2266
2267 for (b = 0; bit2media[b] != 0; b++) {
2268 if (bit2media[b] == sc->media.ifm_media) break;
2269 }
2270 if (((1 << b) & sc->mbitmap) == 0) {
2271 printf("fe%d: got an unsupported media request (0x%x)\n",
2272 sc->sc_unit, sc->media.ifm_media);
2273 return EINVAL;
2274 }
2275#endif
2276
2277 /* We don't actually change media when the interface is down.
2278 fe_init() will do the job, instead. Should we also wait
2279 until the transmission buffer being empty? Changing the
2280 media when we are sending a frame will cause two garbages
2281 on wires, one on old media and another on new. FIXME */
2282 if (sc->sc_if.if_flags & IFF_UP) {
2283 if (sc->msel) sc->msel(sc);
2284 }
2285
2286 return 0;
2287}
2288
2289/* I don't know how I can support media status callback... FIXME. */
2290static void
2291fe_medstat (struct ifnet *ifp, struct ifmediareq *ifmr)
2292{
2293 (void)ifp;
2294 (void)ifmr;
2295}
2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
3 *
4 * This software may be used, modified, copied, distributed, and sold, in
5 * both source and binary form provided that the above copyright, these
6 * terms and the following disclaimer are retained. The name of the author
7 * and/or the contributor may not be used to endorse or promote products
8 * derived from this software without specific prior written permission.
9 *
10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
20 * SUCH DAMAGE.
21 */
22
23/*
24 * $FreeBSD: head/sys/dev/fe/if_fe.c 72084 2001-02-06 10:12:15Z phk $
25 *
26 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
27 * Contributed by M. Sekiguchi. <seki@sysrap.cs.fujitsu.co.jp>
28 *
29 * This version is intended to be a generic template for various
30 * MB86960A/MB86965A based Ethernet cards. It currently supports
31 * Fujitsu FMV-180 series for ISA and Allied-Telesis AT1700/RE2000
32 * series for ISA, as well as Fujitsu MBH10302 PC card.
33 * There are some currently-
34 * unused hooks embedded, which are primarily intended to support
35 * other types of Ethernet cards, but the author is not sure whether
36 * they are useful.
37 *
38 * This version also includes some alignments to support RE1000,
39 * C-NET(98)P2 and so on. These cards are not for AT-compatibles,
40 * but for NEC PC-98 bus -- a proprietary bus architecture available
41 * only in Japan. Confusingly, it is different from the Microsoft's
42 * PC98 architecture. :-{
43 * Further work for PC-98 version will be available as a part of
44 * FreeBSD(98) project.
45 *
46 * This software is a derivative work of if_ed.c version 1.56 by David
47 * Greenman available as a part of FreeBSD 2.0 RELEASE source distribution.
48 *
49 * The following lines are retained from the original if_ed.c:
50 *
51 * Copyright (C) 1993, David Greenman. This software may be used, modified,
52 * copied, distributed, and sold, in both source and binary form provided
53 * that the above copyright and these terms are retained. Under no
54 * circumstances is the author responsible for the proper functioning
55 * of this software, nor does the author assume any responsibility
56 * for damages incurred with its use.
57 */
58
59/*
60 * TODO:
61 * o To support ISA PnP auto configuration for FMV-183/184.
62 * o To support REX-9886/87(PC-98 only).
63 * o To reconsider mbuf usage.
64 * o To reconsider transmission buffer usage, including
65 * transmission buffer size (currently 4KB x 2) and pros-and-
66 * cons of multiple frame transmission.
67 * o To test IPX codes.
68 * o To test new-bus frontend.
69 */
70
71#include "opt_fe.h"
72#include "opt_inet.h"
73#include "opt_ipx.h"
74
75#include <sys/param.h>
76#include <sys/systm.h>
77#include <sys/socket.h>
78#include <sys/sockio.h>
79#include <sys/mbuf.h>
80
81#include <sys/bus.h>
82#include <machine/bus.h>
83#include <sys/rman.h>
84#include <machine/resource.h>
85
86#include <net/ethernet.h>
87#include <net/if.h>
88#include <net/if_dl.h>
89#include <net/if_mib.h>
90#include <net/if_media.h>
91
92#include <netinet/in.h>
93#include <netinet/if_ether.h>
94
95#include <net/bpf.h>
96
97#include <i386/isa/ic/mb86960.h>
98#include <dev/fe/if_fereg.h>
99#include <dev/fe/if_fevar.h>
100
101/*
102 * Transmit just one packet per a "send" command to 86960.
103 * This option is intended for performance test. An EXPERIMENTAL option.
104 */
105#ifndef FE_SINGLE_TRANSMISSION
106#define FE_SINGLE_TRANSMISSION 0
107#endif
108
109/*
110 * Maximum loops when interrupt.
111 * This option prevents an infinite loop due to hardware failure.
112 * (Some laptops make an infinite loop after PC-Card is ejected.)
113 */
114#ifndef FE_MAX_LOOP
115#define FE_MAX_LOOP 0x800
116#endif
117
118/*
119 * If you define this option, 8-bit cards are also supported.
120 */
121/*#define FE_8BIT_SUPPORT*/
122
123/*
124 * Device configuration flags.
125 */
126
127/* DLCR6 settings. */
128#define FE_FLAGS_DLCR6_VALUE 0x007F
129
130/* Force DLCR6 override. */
131#define FE_FLAGS_OVERRIDE_DLCR6 0x0080
132
133
134devclass_t fe_devclass;
135
136/*
137 * Special filter values.
138 */
139static struct fe_filter const fe_filter_nothing = { FE_FILTER_NOTHING };
140static struct fe_filter const fe_filter_all = { FE_FILTER_ALL };
141
142/* Standard driver entry points. These can be static. */
143static void fe_init (void *);
144static driver_intr_t fe_intr;
145static int fe_ioctl (struct ifnet *, u_long, caddr_t);
146static void fe_start (struct ifnet *);
147static void fe_watchdog (struct ifnet *);
148static int fe_medchange (struct ifnet *);
149static void fe_medstat (struct ifnet *, struct ifmediareq *);
150
151/* Local functions. Order of declaration is confused. FIXME. */
152static int fe_get_packet ( struct fe_softc *, u_short );
153static void fe_tint ( struct fe_softc *, u_char );
154static void fe_rint ( struct fe_softc *, u_char );
155static void fe_xmit ( struct fe_softc * );
156static void fe_write_mbufs ( struct fe_softc *, struct mbuf * );
157static void fe_setmode ( struct fe_softc * );
158static void fe_loadmar ( struct fe_softc * );
159
160#ifdef DIAGNOSTIC
161static void fe_emptybuffer ( struct fe_softc * );
162#endif
163
164/*
165 * Fe driver specific constants which relate to 86960/86965.
166 */
167
168/* Interrupt masks */
169#define FE_TMASK ( FE_D2_COLL16 | FE_D2_TXDONE )
170#define FE_RMASK ( FE_D3_OVRFLO | FE_D3_CRCERR \
171 | FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY )
172
173/* Maximum number of iterations for a receive interrupt. */
174#define FE_MAX_RECV_COUNT ( ( 65536 - 2048 * 2 ) / 64 )
175 /*
176 * Maximum size of SRAM is 65536,
177 * minimum size of transmission buffer in fe is 2x2KB,
178 * and minimum amount of received packet including headers
179 * added by the chip is 64 bytes.
180 * Hence FE_MAX_RECV_COUNT is the upper limit for number
181 * of packets in the receive buffer.
182 */
183
184/*
185 * Miscellaneous definitions not directly related to hardware.
186 */
187
188/* The following line must be delete when "net/if_media.h" support it. */
189#ifndef IFM_10_FL
190#define IFM_10_FL /* 13 */ IFM_10_5
191#endif
192
193#if 0
194/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
195static int const bit2media [] = {
196 IFM_HDX | IFM_ETHER | IFM_AUTO,
197 IFM_HDX | IFM_ETHER | IFM_MANUAL,
198 IFM_HDX | IFM_ETHER | IFM_10_T,
199 IFM_HDX | IFM_ETHER | IFM_10_2,
200 IFM_HDX | IFM_ETHER | IFM_10_5,
201 IFM_HDX | IFM_ETHER | IFM_10_FL,
202 IFM_FDX | IFM_ETHER | IFM_10_T,
203 /* More can be come here... */
204 0
205};
206#else
207/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
208static int const bit2media [] = {
209 IFM_ETHER | IFM_AUTO,
210 IFM_ETHER | IFM_MANUAL,
211 IFM_ETHER | IFM_10_T,
212 IFM_ETHER | IFM_10_2,
213 IFM_ETHER | IFM_10_5,
214 IFM_ETHER | IFM_10_FL,
215 IFM_ETHER | IFM_10_T,
216 /* More can be come here... */
217 0
218};
219#endif
220
221/*
222 * Check for specific bits in specific registers have specific values.
223 * A common utility function called from various sub-probe routines.
224 */
225int
226fe_simple_probe (struct fe_softc const * sc,
227 struct fe_simple_probe_struct const * sp)
228{
229 struct fe_simple_probe_struct const *p;
230
231 for (p = sp; p->mask != 0; p++) {
232 if ((fe_inb(sc, p->port) & p->mask) != p->bits)
233 return 0;
234 }
235 return 1;
236}
237
238/* Test if a given 6 byte value is a valid Ethernet station (MAC)
239 address. "Vendor" is an expected vendor code (first three bytes,)
240 or a zero when nothing expected. */
241int
242valid_Ether_p (u_char const * addr, unsigned vendor)
243{
244#ifdef FE_DEBUG
245 printf("fe?: validating %6D against %06x\n", addr, ":", vendor);
246#endif
247
248 /* All zero is not allowed as a vendor code. */
249 if (addr[0] == 0 && addr[1] == 0 && addr[2] == 0) return 0;
250
251 switch (vendor) {
252 case 0x000000:
253 /* Legal Ethernet address (stored in ROM) must have
254 its Group and Local bits cleared. */
255 if ((addr[0] & 0x03) != 0) return 0;
256 break;
257 case 0x020000:
258 /* Same as above, but a local address is allowed in
259 this context. */
260 if ((addr[0] & 0x01) != 0) return 0;
261 break;
262 default:
263 /* Make sure the vendor part matches if one is given. */
264 if ( addr[0] != ((vendor >> 16) & 0xFF)
265 || addr[1] != ((vendor >> 8) & 0xFF)
266 || addr[2] != ((vendor ) & 0xFF)) return 0;
267 break;
268 }
269
270 /* Host part must not be all-zeros nor all-ones. */
271 if (addr[3] == 0xFF && addr[4] == 0xFF && addr[5] == 0xFF) return 0;
272 if (addr[3] == 0x00 && addr[4] == 0x00 && addr[5] == 0x00) return 0;
273
274 /* Given addr looks like an Ethernet address. */
275 return 1;
276}
277
278/* Fill our softc struct with default value. */
279void
280fe_softc_defaults (struct fe_softc *sc)
281{
282 /* Prepare for typical register prototypes. We assume a
283 "typical" board has <32KB> of <fast> SRAM connected with a
284 <byte-wide> data lines. */
285 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
286 sc->proto_dlcr5 = 0;
287 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
288 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
289 sc->proto_dlcr7 = FE_D7_BYTSWP_LH;
290 sc->proto_bmpr13 = 0;
291
292 /* Assume the probe process (to be done later) is stable. */
293 sc->stability = 0;
294
295 /* A typical board needs no hooks. */
296 sc->init = NULL;
297 sc->stop = NULL;
298
299 /* Assume the board has no software-controllable media selection. */
300 sc->mbitmap = MB_HM;
301 sc->defmedia = MB_HM;
302 sc->msel = NULL;
303}
304
305/* Common error reporting routine used in probe routines for
306 "soft configured IRQ"-type boards. */
307void
308fe_irq_failure (char const *name, int unit, int irq, char const *list)
309{
310 printf("fe%d: %s board is detected, but %s IRQ was given\n",
311 unit, name, (irq == NO_IRQ ? "no" : "invalid"));
312 if (list != NULL) {
313 printf("fe%d: specify an IRQ from %s in kernel config\n",
314 unit, list);
315 }
316}
317
318/*
319 * Hardware (vendor) specific hooks.
320 */
321
322/*
323 * Generic media selection scheme for MB86965 based boards.
324 */
325void
326fe_msel_965 (struct fe_softc *sc)
327{
328 u_char b13;
329
330 /* Find the appropriate bits for BMPR13 tranceiver control. */
331 switch (IFM_SUBTYPE(sc->media.ifm_media)) {
332 case IFM_AUTO: b13 = FE_B13_PORT_AUTO | FE_B13_TPTYPE_UTP; break;
333 case IFM_10_T: b13 = FE_B13_PORT_TP | FE_B13_TPTYPE_UTP; break;
334 default: b13 = FE_B13_PORT_AUI; break;
335 }
336
337 /* Write it into the register. It takes effect immediately. */
338 fe_outb(sc, FE_BMPR13, sc->proto_bmpr13 | b13);
339}
340
341
342/*
343 * Fujitsu MB86965 JLI mode support routines.
344 */
345
346/*
347 * Routines to read all bytes from the config EEPROM through MB86965A.
348 * It is a MicroWire (3-wire) serial EEPROM with 6-bit address.
349 * (93C06 or 93C46.)
350 */
351static void
352fe_strobe_eeprom_jli (struct fe_softc *sc, u_short bmpr16)
353{
354 /*
355 * We must guarantee 1us (or more) interval to access slow
356 * EEPROMs. The following redundant code provides enough
357 * delay with ISA timing. (Even if the bus clock is "tuned.")
358 * Some modification will be needed on faster busses.
359 */
360 fe_outb(sc, bmpr16, FE_B16_SELECT);
361 fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
362 fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
363 fe_outb(sc, bmpr16, FE_B16_SELECT);
364}
365
366void
367fe_read_eeprom_jli (struct fe_softc * sc, u_char * data)
368{
369 u_char n, val, bit;
370 u_char save16, save17;
371
372 /* Save the current value of the EEPROM interface registers. */
373 save16 = fe_inb(sc, FE_BMPR16);
374 save17 = fe_inb(sc, FE_BMPR17);
375
376 /* Read bytes from EEPROM; two bytes per an iteration. */
377 for (n = 0; n < JLI_EEPROM_SIZE / 2; n++) {
378
379 /* Reset the EEPROM interface. */
380 fe_outb(sc, FE_BMPR16, 0x00);
381 fe_outb(sc, FE_BMPR17, 0x00);
382
383 /* Start EEPROM access. */
384 fe_outb(sc, FE_BMPR16, FE_B16_SELECT);
385 fe_outb(sc, FE_BMPR17, FE_B17_DATA);
386 fe_strobe_eeprom_jli(sc, FE_BMPR16);
387
388 /* Pass the iteration count as well as a READ command. */
389 val = 0x80 | n;
390 for (bit = 0x80; bit != 0x00; bit >>= 1) {
391 fe_outb(sc, FE_BMPR17, (val & bit) ? FE_B17_DATA : 0);
392 fe_strobe_eeprom_jli(sc, FE_BMPR16);
393 }
394 fe_outb(sc, FE_BMPR17, 0x00);
395
396 /* Read a byte. */
397 val = 0;
398 for (bit = 0x80; bit != 0x00; bit >>= 1) {
399 fe_strobe_eeprom_jli(sc, FE_BMPR16);
400 if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA)
401 val |= bit;
402 }
403 *data++ = val;
404
405 /* Read one more byte. */
406 val = 0;
407 for (bit = 0x80; bit != 0x00; bit >>= 1) {
408 fe_strobe_eeprom_jli(sc, FE_BMPR16);
409 if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA)
410 val |= bit;
411 }
412 *data++ = val;
413 }
414
415#if 0
416 /* Reset the EEPROM interface, again. */
417 fe_outb(sc, FE_BMPR16, 0x00);
418 fe_outb(sc, FE_BMPR17, 0x00);
419#else
420 /* Make sure to restore the original value of EEPROM interface
421 registers, since we are not yet sure we have MB86965A on
422 the address. */
423 fe_outb(sc, FE_BMPR17, save17);
424 fe_outb(sc, FE_BMPR16, save16);
425#endif
426
427#if 1
428 /* Report what we got. */
429 if (bootverbose) {
430 int i;
431 data -= JLI_EEPROM_SIZE;
432 for (i = 0; i < JLI_EEPROM_SIZE; i += 16) {
433 printf("fe%d: EEPROM(JLI):%3x: %16D\n",
434 sc->sc_unit, i, data + i, " ");
435 }
436 }
437#endif
438}
439
440void
441fe_init_jli (struct fe_softc * sc)
442{
443 /* "Reset" by writing into a magic location. */
444 DELAY(200);
445 fe_outb(sc, 0x1E, fe_inb(sc, 0x1E));
446 DELAY(300);
447}
448
449
450/*
451 * SSi 78Q8377A support routines.
452 */
453
454/*
455 * Routines to read all bytes from the config EEPROM through 78Q8377A.
456 * It is a MicroWire (3-wire) serial EEPROM with 8-bit address. (I.e.,
457 * 93C56 or 93C66.)
458 *
459 * As I don't have SSi manuals, (hmm, an old song again!) I'm not exactly
460 * sure the following code is correct... It is just stolen from the
461 * C-NET(98)P2 support routine in FreeBSD(98).
462 */
463
464void
465fe_read_eeprom_ssi (struct fe_softc *sc, u_char *data)
466{
467 u_char val, bit;
468 int n;
469 u_char save6, save7, save12;
470
471 /* Save the current value for the DLCR registers we are about
472 to destroy. */
473 save6 = fe_inb(sc, FE_DLCR6);
474 save7 = fe_inb(sc, FE_DLCR7);
475
476 /* Put the 78Q8377A into a state that we can access the EEPROM. */
477 fe_outb(sc, FE_DLCR6,
478 FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_DLC_DISABLE);
479 fe_outb(sc, FE_DLCR7,
480 FE_D7_BYTSWP_LH | FE_D7_RBS_BMPR | FE_D7_RDYPNS | FE_D7_POWER_UP);
481
482 /* Save the current value for the BMPR12 register, too. */
483 save12 = fe_inb(sc, FE_DLCR12);
484
485 /* Read bytes from EEPROM; two bytes per an iteration. */
486 for (n = 0; n < SSI_EEPROM_SIZE / 2; n++) {
487
488 /* Start EEPROM access */
489 fe_outb(sc, FE_DLCR12, SSI_EEP);
490 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
491
492 /* Send the following four bits to the EEPROM in the
493 specified order: a dummy bit, a start bit, and
494 command bits (10) for READ. */
495 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL );
496 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
497 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT);
498 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
499 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT);
500 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
501 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL );
502 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
503
504 /* Pass the iteration count to the chip. */
505 for (bit = 0x80; bit != 0x00; bit >>= 1) {
506 val = ( n & bit ) ? SSI_DAT : 0;
507 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | val);
508 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | val);
509 }
510
511 /* Read a byte. */
512 val = 0;
513 for (bit = 0x80; bit != 0x00; bit >>= 1) {
514 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
515 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK);
516 if (fe_inb(sc, FE_DLCR12) & SSI_DIN)
517 val |= bit;
518 }
519 *data++ = val;
520
521 /* Read one more byte. */
522 val = 0;
523 for (bit = 0x80; bit != 0x00; bit >>= 1) {
524 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
525 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK);
526 if (fe_inb(sc, FE_DLCR12) & SSI_DIN)
527 val |= bit;
528 }
529 *data++ = val;
530
531 fe_outb(sc, FE_DLCR12, SSI_EEP);
532 }
533
534 /* Reset the EEPROM interface. (For now.) */
535 fe_outb(sc, FE_DLCR12, 0x00);
536
537 /* Restore the saved register values, for the case that we
538 didn't have 78Q8377A at the given address. */
539 fe_outb(sc, FE_DLCR12, save12);
540 fe_outb(sc, FE_DLCR7, save7);
541 fe_outb(sc, FE_DLCR6, save6);
542
543#if 1
544 /* Report what we got. */
545 if (bootverbose) {
546 int i;
547 data -= SSI_EEPROM_SIZE;
548 for (i = 0; i < SSI_EEPROM_SIZE; i += 16) {
549 printf("fe%d: EEPROM(SSI):%3x: %16D\n",
550 sc->sc_unit, i, data + i, " ");
551 }
552 }
553#endif
554}
555
556/*
557 * TDK/LANX boards support routines.
558 */
559
560/* It is assumed that the CLK line is low and SDA is high (float) upon entry. */
561#define LNX_PH(D,K,N) \
562 ((LNX_SDA_##D | LNX_CLK_##K) << N)
563#define LNX_CYCLE(D1,D2,D3,D4,K1,K2,K3,K4) \
564 (LNX_PH(D1,K1,0)|LNX_PH(D2,K2,8)|LNX_PH(D3,K3,16)|LNX_PH(D4,K4,24))
565
566#define LNX_CYCLE_START LNX_CYCLE(HI,LO,LO,HI, HI,HI,LO,LO)
567#define LNX_CYCLE_STOP LNX_CYCLE(LO,LO,HI,HI, LO,HI,HI,LO)
568#define LNX_CYCLE_HI LNX_CYCLE(HI,HI,HI,HI, LO,HI,LO,LO)
569#define LNX_CYCLE_LO LNX_CYCLE(LO,LO,LO,HI, LO,HI,LO,LO)
570#define LNX_CYCLE_INIT LNX_CYCLE(LO,HI,HI,HI, LO,LO,LO,LO)
571
572static void
573fe_eeprom_cycle_lnx (struct fe_softc *sc, u_short reg20, u_long cycle)
574{
575 fe_outb(sc, reg20, (cycle ) & 0xFF);
576 DELAY(15);
577 fe_outb(sc, reg20, (cycle >> 8) & 0xFF);
578 DELAY(15);
579 fe_outb(sc, reg20, (cycle >> 16) & 0xFF);
580 DELAY(15);
581 fe_outb(sc, reg20, (cycle >> 24) & 0xFF);
582 DELAY(15);
583}
584
585static u_char
586fe_eeprom_receive_lnx (struct fe_softc *sc, u_short reg20)
587{
588 u_char dat;
589
590 fe_outb(sc, reg20, LNX_CLK_HI | LNX_SDA_FL);
591 DELAY(15);
592 dat = fe_inb(sc, reg20);
593 fe_outb(sc, reg20, LNX_CLK_LO | LNX_SDA_FL);
594 DELAY(15);
595 return (dat & LNX_SDA_IN);
596}
597
598void
599fe_read_eeprom_lnx (struct fe_softc *sc, u_char *data)
600{
601 int i;
602 u_char n, bit, val;
603 u_char save20;
604 u_short reg20 = 0x14;
605
606 save20 = fe_inb(sc, reg20);
607
608 /* NOTE: DELAY() timing constants are approximately three
609 times longer (slower) than the required minimum. This is
610 to guarantee a reliable operation under some tough
611 conditions... Fortunately, this routine is only called
612 during the boot phase, so the speed is less important than
613 stability. */
614
615#if 1
616 /* Reset the X24C01's internal state machine and put it into
617 the IDLE state. We usually don't need this, but *if*
618 someone (e.g., probe routine of other driver) write some
619 garbage into the register at 0x14, synchronization will be
620 lost, and the normal EEPROM access protocol won't work.
621 Moreover, as there are no easy way to reset, we need a
622 _manoeuvre_ here. (It even lacks a reset pin, so pushing
623 the RESET button on the PC doesn't help!) */
624 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_INIT);
625 for (i = 0; i < 10; i++)
626 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START);
627 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP);
628 DELAY(10000);
629#endif
630
631 /* Issue a start condition. */
632 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START);
633
634 /* Send seven bits of the starting address (zero, in this
635 case) and a command bit for READ. */
636 val = 0x01;
637 for (bit = 0x80; bit != 0x00; bit >>= 1) {
638 if (val & bit) {
639 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_HI);
640 } else {
641 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO);
642 }
643 }
644
645 /* Receive an ACK bit. */
646 if (fe_eeprom_receive_lnx(sc, reg20)) {
647 /* ACK was not received. EEPROM is not present (i.e.,
648 this board was not a TDK/LANX) or not working
649 properly. */
650 if (bootverbose) {
651 printf("fe%d: no ACK received from EEPROM(LNX)\n",
652 sc->sc_unit);
653 }
654 /* Clear the given buffer to indicate we could not get
655 any info. and return. */
656 bzero(data, LNX_EEPROM_SIZE);
657 goto RET;
658 }
659
660 /* Read bytes from EEPROM. */
661 for (n = 0; n < LNX_EEPROM_SIZE; n++) {
662
663 /* Read a byte and store it into the buffer. */
664 val = 0x00;
665 for (bit = 0x80; bit != 0x00; bit >>= 1) {
666 if (fe_eeprom_receive_lnx(sc, reg20))
667 val |= bit;
668 }
669 *data++ = val;
670
671 /* Acknowledge if we have to read more. */
672 if (n < LNX_EEPROM_SIZE - 1) {
673 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO);
674 }
675 }
676
677 /* Issue a STOP condition, de-activating the clock line.
678 It will be safer to keep the clock line low than to leave
679 it high. */
680 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP);
681
682 RET:
683 fe_outb(sc, reg20, save20);
684
685#if 1
686 /* Report what we got. */
687 if (bootverbose) {
688 data -= LNX_EEPROM_SIZE;
689 for (i = 0; i < LNX_EEPROM_SIZE; i += 16) {
690 printf("fe%d: EEPROM(LNX):%3x: %16D\n",
691 sc->sc_unit, i, data + i, " ");
692 }
693 }
694#endif
695}
696
697void
698fe_init_lnx (struct fe_softc * sc)
699{
700 /* Reset the 86960. Do we need this? FIXME. */
701 fe_outb(sc, 0x12, 0x06);
702 DELAY(100);
703 fe_outb(sc, 0x12, 0x07);
704 DELAY(100);
705
706 /* Setup IRQ control register on the ASIC. */
707 fe_outb(sc, 0x14, sc->priv_info);
708}
709
710
711/*
712 * Ungermann-Bass boards support routine.
713 */
714void
715fe_init_ubn (struct fe_softc * sc)
716{
717 /* Do we need this? FIXME. */
718 fe_outb(sc, FE_DLCR7,
719 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
720 fe_outb(sc, 0x18, 0x00);
721 DELAY(200);
722
723 /* Setup IRQ control register on the ASIC. */
724 fe_outb(sc, 0x14, sc->priv_info);
725}
726
727
728/*
729 * Install interface into kernel networking data structures
730 */
731int
732fe_attach (device_t dev)
733{
734 struct fe_softc *sc = device_get_softc(dev);
735 int flags = device_get_flags(dev);
736 int b, error;
737
738 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET,
739 fe_intr, sc, &sc->irq_handle);
740 if (error) {
741 fe_release_resource(dev);
742 return ENXIO;
743 }
744
745 /*
746 * Initialize ifnet structure
747 */
748 sc->sc_if.if_softc = sc;
749 sc->sc_if.if_unit = sc->sc_unit;
750 sc->sc_if.if_name = "fe";
751 sc->sc_if.if_output = ether_output;
752 sc->sc_if.if_start = fe_start;
753 sc->sc_if.if_ioctl = fe_ioctl;
754 sc->sc_if.if_watchdog = fe_watchdog;
755 sc->sc_if.if_init = fe_init;
756 sc->sc_if.if_linkmib = &sc->mibdata;
757 sc->sc_if.if_linkmiblen = sizeof (sc->mibdata);
758
759#if 0 /* I'm not sure... */
760 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
761#endif
762
763 /*
764 * Set fixed interface flags.
765 */
766 sc->sc_if.if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
767
768#if 1
769 /*
770 * Set maximum size of output queue, if it has not been set.
771 * It is done here as this driver may be started after the
772 * system initialization (i.e., the interface is PCMCIA.)
773 *
774 * I'm not sure this is really necessary, but, even if it is,
775 * it should be done somewhere else, e.g., in if_attach(),
776 * since it must be a common workaround for all network drivers.
777 * FIXME.
778 */
779 if (sc->sc_if.if_snd.ifq_maxlen == 0)
780 sc->sc_if.if_snd.ifq_maxlen = ifqmaxlen;
781#endif
782
783#if FE_SINGLE_TRANSMISSION
784 /* Override txb config to allocate minimum. */
785 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
786 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
787#endif
788
789 /* Modify hardware config if it is requested. */
790 if (flags & FE_FLAGS_OVERRIDE_DLCR6)
791 sc->proto_dlcr6 = flags & FE_FLAGS_DLCR6_VALUE;
792
793 /* Find TX buffer size, based on the hardware dependent proto. */
794 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
795 case FE_D6_TXBSIZ_2x2KB: sc->txb_size = 2048; break;
796 case FE_D6_TXBSIZ_2x4KB: sc->txb_size = 4096; break;
797 case FE_D6_TXBSIZ_2x8KB: sc->txb_size = 8192; break;
798 default:
799 /* Oops, we can't work with single buffer configuration. */
800 if (bootverbose) {
801 printf("fe%d: strange TXBSIZ config; fixing\n",
802 sc->sc_unit);
803 }
804 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
805 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
806 sc->txb_size = 2048;
807 break;
808 }
809
810 /* Initialize the if_media interface. */
811 ifmedia_init(&sc->media, 0, fe_medchange, fe_medstat);
812 for (b = 0; bit2media[b] != 0; b++) {
813 if (sc->mbitmap & (1 << b)) {
814 ifmedia_add(&sc->media, bit2media[b], 0, NULL);
815 }
816 }
817 for (b = 0; bit2media[b] != 0; b++) {
818 if (sc->defmedia & (1 << b)) {
819 ifmedia_set(&sc->media, bit2media[b]);
820 break;
821 }
822 }
823#if 0 /* Turned off; this is called later, when the interface UPs. */
824 fe_medchange(sc);
825#endif
826
827 /* Attach and stop the interface. */
828 ether_ifattach(&sc->sc_if, ETHER_BPF_SUPPORTED);
829 fe_stop(sc);
830
831 /* Print additional info when attached. */
832 device_printf(dev, "address %6D, type %s%s\n",
833 sc->sc_enaddr, ":" , sc->typestr,
834 (sc->proto_dlcr4 & FE_D4_DSC) ? ", full duplex" : "");
835 if (bootverbose) {
836 int buf, txb, bbw, sbw, ram;
837
838 buf = txb = bbw = sbw = ram = -1;
839 switch ( sc->proto_dlcr6 & FE_D6_BUFSIZ ) {
840 case FE_D6_BUFSIZ_8KB: buf = 8; break;
841 case FE_D6_BUFSIZ_16KB: buf = 16; break;
842 case FE_D6_BUFSIZ_32KB: buf = 32; break;
843 case FE_D6_BUFSIZ_64KB: buf = 64; break;
844 }
845 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) {
846 case FE_D6_TXBSIZ_2x2KB: txb = 2; break;
847 case FE_D6_TXBSIZ_2x4KB: txb = 4; break;
848 case FE_D6_TXBSIZ_2x8KB: txb = 8; break;
849 }
850 switch ( sc->proto_dlcr6 & FE_D6_BBW ) {
851 case FE_D6_BBW_BYTE: bbw = 8; break;
852 case FE_D6_BBW_WORD: bbw = 16; break;
853 }
854 switch ( sc->proto_dlcr6 & FE_D6_SBW ) {
855 case FE_D6_SBW_BYTE: sbw = 8; break;
856 case FE_D6_SBW_WORD: sbw = 16; break;
857 }
858 switch ( sc->proto_dlcr6 & FE_D6_SRAM ) {
859 case FE_D6_SRAM_100ns: ram = 100; break;
860 case FE_D6_SRAM_150ns: ram = 150; break;
861 }
862 device_printf(dev, "SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
863 buf, bbw, ram, txb, sbw);
864 }
865 if (sc->stability & UNSTABLE_IRQ)
866 device_printf(dev, "warning: IRQ number may be incorrect\n");
867 if (sc->stability & UNSTABLE_MAC)
868 device_printf(dev, "warning: above MAC address may be incorrect\n");
869 if (sc->stability & UNSTABLE_TYPE)
870 device_printf(dev, "warning: hardware type was not validated\n");
871
872 return 0;
873}
874
875int
876fe_alloc_port(device_t dev, int size)
877{
878 struct fe_softc *sc = device_get_softc(dev);
879 struct resource *res;
880 int rid;
881
882 rid = 0;
883 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
884 0ul, ~0ul, size, RF_ACTIVE);
885 if (res) {
886 sc->port_used = size;
887 sc->port_res = res;
888 sc->iot = rman_get_bustag(res);
889 sc->ioh = rman_get_bushandle(res);
890 return (0);
891 }
892
893 return (ENOENT);
894}
895
896int
897fe_alloc_irq(device_t dev, int flags)
898{
899 struct fe_softc *sc = device_get_softc(dev);
900 struct resource *res;
901 int rid;
902
903 rid = 0;
904 res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
905 0ul, ~0ul, 1, RF_ACTIVE | flags);
906 if (res) {
907 sc->irq_res = res;
908 return (0);
909 }
910
911 return (ENOENT);
912}
913
914void
915fe_release_resource(device_t dev)
916{
917 struct fe_softc *sc = device_get_softc(dev);
918
919 if (sc->port_res) {
920 bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->port_res);
921 sc->port_res = NULL;
922 }
923 if (sc->irq_res) {
924 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
925 sc->irq_res = NULL;
926 }
927}
928
929/*
930 * Reset interface, after some (hardware) trouble is deteced.
931 */
932static void
933fe_reset (struct fe_softc *sc)
934{
935 /* Record how many packets are lost by this accident. */
936 sc->sc_if.if_oerrors += sc->txb_sched + sc->txb_count;
937 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
938
939 /* Put the interface into known initial state. */
940 fe_stop(sc);
941 if (sc->sc_if.if_flags & IFF_UP)
942 fe_init(sc);
943}
944
945/*
946 * Stop everything on the interface.
947 *
948 * All buffered packets, both transmitting and receiving,
949 * if any, will be lost by stopping the interface.
950 */
951void
952fe_stop (struct fe_softc *sc)
953{
954 int s;
955
956 s = splimp();
957
958 /* Disable interrupts. */
959 fe_outb(sc, FE_DLCR2, 0x00);
960 fe_outb(sc, FE_DLCR3, 0x00);
961
962 /* Stop interface hardware. */
963 DELAY(200);
964 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
965 DELAY(200);
966
967 /* Clear all interrupt status. */
968 fe_outb(sc, FE_DLCR0, 0xFF);
969 fe_outb(sc, FE_DLCR1, 0xFF);
970
971 /* Put the chip in stand-by mode. */
972 DELAY(200);
973 fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN);
974 DELAY(200);
975
976 /* Reset transmitter variables and interface flags. */
977 sc->sc_if.if_flags &= ~(IFF_OACTIVE | IFF_RUNNING);
978 sc->sc_if.if_timer = 0;
979 sc->txb_free = sc->txb_size;
980 sc->txb_count = 0;
981 sc->txb_sched = 0;
982
983 /* MAR loading can be delayed. */
984 sc->filter_change = 0;
985
986 /* Call a device-specific hook. */
987 if (sc->stop)
988 sc->stop(sc);
989
990 (void) splx(s);
991}
992
993/*
994 * Device timeout/watchdog routine. Entered if the device neglects to
995 * generate an interrupt after a transmit has been started on it.
996 */
997static void
998fe_watchdog ( struct ifnet *ifp )
999{
1000 struct fe_softc *sc = (struct fe_softc *)ifp;
1001
1002 /* A "debug" message. */
1003 printf("fe%d: transmission timeout (%d+%d)%s\n",
1004 ifp->if_unit, sc->txb_sched, sc->txb_count,
1005 (ifp->if_flags & IFF_UP) ? "" : " when down");
1006 if (sc->sc_if.if_opackets == 0 && sc->sc_if.if_ipackets == 0)
1007 printf("fe%d: wrong IRQ setting in config?\n", ifp->if_unit);
1008 fe_reset(sc);
1009}
1010
1011/*
1012 * Initialize device.
1013 */
1014static void
1015fe_init (void * xsc)
1016{
1017 struct fe_softc *sc = xsc;
1018 int s;
1019
1020 /* We need an address. */
1021 if (TAILQ_EMPTY(&sc->sc_if.if_addrhead)) { /* XXX unlikely */
1022#ifdef DIAGNOSTIC
1023 printf("fe%d: init() without any address\n", sc->sc_unit);
1024#endif
1025 return;
1026 }
1027
1028 /* Start initializing 86960. */
1029 s = splimp();
1030
1031 /* Call a hook before we start initializing the chip. */
1032 if (sc->init)
1033 sc->init(sc);
1034
1035 /*
1036 * Make sure to disable the chip, also.
1037 * This may also help re-programming the chip after
1038 * hot insertion of PCMCIAs.
1039 */
1040 DELAY(200);
1041 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1042 DELAY(200);
1043
1044 /* Power up the chip and select register bank for DLCRs. */
1045 DELAY(200);
1046 fe_outb(sc, FE_DLCR7,
1047 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
1048 DELAY(200);
1049
1050 /* Feed the station address. */
1051 fe_outblk(sc, FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN);
1052
1053 /* Clear multicast address filter to receive nothing. */
1054 fe_outb(sc, FE_DLCR7,
1055 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
1056 fe_outblk(sc, FE_MAR8, fe_filter_nothing.data, FE_FILTER_LEN);
1057
1058 /* Select the BMPR bank for runtime register access. */
1059 fe_outb(sc, FE_DLCR7,
1060 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1061
1062 /* Initialize registers. */
1063 fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */
1064 fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */
1065 fe_outb(sc, FE_DLCR2, 0x00);
1066 fe_outb(sc, FE_DLCR3, 0x00);
1067 fe_outb(sc, FE_DLCR4, sc->proto_dlcr4);
1068 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5);
1069 fe_outb(sc, FE_BMPR10, 0x00);
1070 fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1);
1071 fe_outb(sc, FE_BMPR12, 0x00);
1072 fe_outb(sc, FE_BMPR13, sc->proto_bmpr13);
1073 fe_outb(sc, FE_BMPR14, 0x00);
1074 fe_outb(sc, FE_BMPR15, 0x00);
1075
1076 /* Enable interrupts. */
1077 fe_outb(sc, FE_DLCR2, FE_TMASK);
1078 fe_outb(sc, FE_DLCR3, FE_RMASK);
1079
1080 /* Select requested media, just before enabling DLC. */
1081 if (sc->msel)
1082 sc->msel(sc);
1083
1084 /* Enable transmitter and receiver. */
1085 DELAY(200);
1086 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
1087 DELAY(200);
1088
1089#ifdef DIAGNOSTIC
1090 /*
1091 * Make sure to empty the receive buffer.
1092 *
1093 * This may be redundant, but *if* the receive buffer were full
1094 * at this point, then the driver would hang. I have experienced
1095 * some strange hang-up just after UP. I hope the following
1096 * code solve the problem.
1097 *
1098 * I have changed the order of hardware initialization.
1099 * I think the receive buffer cannot have any packets at this
1100 * point in this version. The following code *must* be
1101 * redundant now. FIXME.
1102 *
1103 * I've heard a rumore that on some PC card implementation of
1104 * 8696x, the receive buffer can have some data at this point.
1105 * The following message helps discovering the fact. FIXME.
1106 */
1107 if (!(fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)) {
1108 printf("fe%d: receive buffer has some data after reset\n",
1109 sc->sc_unit);
1110 fe_emptybuffer(sc);
1111 }
1112
1113 /* Do we need this here? Actually, no. I must be paranoia. */
1114 fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */
1115 fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */
1116#endif
1117
1118 /* Set 'running' flag, because we are now running. */
1119 sc->sc_if.if_flags |= IFF_RUNNING;
1120
1121 /*
1122 * At this point, the interface is running properly,
1123 * except that it receives *no* packets. we then call
1124 * fe_setmode() to tell the chip what packets to be
1125 * received, based on the if_flags and multicast group
1126 * list. It completes the initialization process.
1127 */
1128 fe_setmode(sc);
1129
1130#if 0
1131 /* ...and attempt to start output queued packets. */
1132 /* TURNED OFF, because the semi-auto media prober wants to UP
1133 the interface keeping it idle. The upper layer will soon
1134 start the interface anyway, and there are no significant
1135 delay. */
1136 fe_start(&sc->sc_if);
1137#endif
1138
1139 (void) splx(s);
1140}
1141
1142/*
1143 * This routine actually starts the transmission on the interface
1144 */
1145static void
1146fe_xmit (struct fe_softc *sc)
1147{
1148 /*
1149 * Set a timer just in case we never hear from the board again.
1150 * We use longer timeout for multiple packet transmission.
1151 * I'm not sure this timer value is appropriate. FIXME.
1152 */
1153 sc->sc_if.if_timer = 1 + sc->txb_count;
1154
1155 /* Update txb variables. */
1156 sc->txb_sched = sc->txb_count;
1157 sc->txb_count = 0;
1158 sc->txb_free = sc->txb_size;
1159 sc->tx_excolls = 0;
1160
1161 /* Start transmitter, passing packets in TX buffer. */
1162 fe_outb(sc, FE_BMPR10, sc->txb_sched | FE_B10_START);
1163}
1164
1165/*
1166 * Start output on interface.
1167 * We make two assumptions here:
1168 * 1) that the current priority is set to splimp _before_ this code
1169 * is called *and* is returned to the appropriate priority after
1170 * return
1171 * 2) that the IFF_OACTIVE flag is checked before this code is called
1172 * (i.e. that the output part of the interface is idle)
1173 */
1174void
1175fe_start (struct ifnet *ifp)
1176{
1177 struct fe_softc *sc = ifp->if_softc;
1178 struct mbuf *m;
1179
1180#ifdef DIAGNOSTIC
1181 /* Just a sanity check. */
1182 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
1183 /*
1184 * Txb_count and txb_free co-works to manage the
1185 * transmission buffer. Txb_count keeps track of the
1186 * used potion of the buffer, while txb_free does unused
1187 * potion. So, as long as the driver runs properly,
1188 * txb_count is zero if and only if txb_free is same
1189 * as txb_size (which represents whole buffer.)
1190 */
1191 printf("fe%d: inconsistent txb variables (%d, %d)\n",
1192 sc->sc_unit, sc->txb_count, sc->txb_free);
1193 /*
1194 * So, what should I do, then?
1195 *
1196 * We now know txb_count and txb_free contradicts. We
1197 * cannot, however, tell which is wrong. More
1198 * over, we cannot peek 86960 transmission buffer or
1199 * reset the transmission buffer. (In fact, we can
1200 * reset the entire interface. I don't want to do it.)
1201 *
1202 * If txb_count is incorrect, leaving it as-is will cause
1203 * sending of garbage after next interrupt. We have to
1204 * avoid it. Hence, we reset the txb_count here. If
1205 * txb_free was incorrect, resetting txb_count just loose
1206 * some packets. We can live with it.
1207 */
1208 sc->txb_count = 0;
1209 }
1210#endif
1211
1212 /*
1213 * First, see if there are buffered packets and an idle
1214 * transmitter - should never happen at this point.
1215 */
1216 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
1217 printf("fe%d: transmitter idle with %d buffered packets\n",
1218 sc->sc_unit, sc->txb_count);
1219 fe_xmit(sc);
1220 }
1221
1222 /*
1223 * Stop accepting more transmission packets temporarily, when
1224 * a filter change request is delayed. Updating the MARs on
1225 * 86960 flushes the transmission buffer, so it is delayed
1226 * until all buffered transmission packets have been sent
1227 * out.
1228 */
1229 if (sc->filter_change) {
1230 /*
1231 * Filter change request is delayed only when the DLC is
1232 * working. DLC soon raise an interrupt after finishing
1233 * the work.
1234 */
1235 goto indicate_active;
1236 }
1237
1238 for (;;) {
1239
1240 /*
1241 * See if there is room to put another packet in the buffer.
1242 * We *could* do better job by peeking the send queue to
1243 * know the length of the next packet. Current version just
1244 * tests against the worst case (i.e., longest packet). FIXME.
1245 *
1246 * When adding the packet-peek feature, don't forget adding a
1247 * test on txb_count against QUEUEING_MAX.
1248 * There is a little chance the packet count exceeds
1249 * the limit. Assume transmission buffer is 8KB (2x8KB
1250 * configuration) and an application sends a bunch of small
1251 * (i.e., minimum packet sized) packets rapidly. An 8KB
1252 * buffer can hold 130 blocks of 62 bytes long...
1253 */
1254 if (sc->txb_free
1255 < ETHER_MAX_LEN - ETHER_CRC_LEN + FE_DATA_LEN_LEN) {
1256 /* No room. */
1257 goto indicate_active;
1258 }
1259
1260#if FE_SINGLE_TRANSMISSION
1261 if (sc->txb_count > 0) {
1262 /* Just one packet per a transmission buffer. */
1263 goto indicate_active;
1264 }
1265#endif
1266
1267 /*
1268 * Get the next mbuf chain for a packet to send.
1269 */
1270 IF_DEQUEUE(&sc->sc_if.if_snd, m);
1271 if (m == NULL) {
1272 /* No more packets to send. */
1273 goto indicate_inactive;
1274 }
1275
1276 /*
1277 * Copy the mbuf chain into the transmission buffer.
1278 * txb_* variables are updated as necessary.
1279 */
1280 fe_write_mbufs(sc, m);
1281
1282 /* Start transmitter if it's idle. */
1283 if ((sc->txb_count > 0) && (sc->txb_sched == 0))
1284 fe_xmit(sc);
1285
1286 /*
1287 * Tap off here if there is a bpf listener,
1288 * and the device is *not* in promiscuous mode.
1289 * (86960 receives self-generated packets if
1290 * and only if it is in "receive everything"
1291 * mode.)
1292 */
1293 if (sc->sc_if.if_bpf &&
1294 !(sc->sc_if.if_flags & IFF_PROMISC))
1295 bpf_mtap(&sc->sc_if, m);
1296
1297 m_freem(m);
1298 }
1299
1300 indicate_inactive:
1301 /*
1302 * We are using the !OACTIVE flag to indicate to
1303 * the outside world that we can accept an
1304 * additional packet rather than that the
1305 * transmitter is _actually_ active. Indeed, the
1306 * transmitter may be active, but if we haven't
1307 * filled all the buffers with data then we still
1308 * want to accept more.
1309 */
1310 sc->sc_if.if_flags &= ~IFF_OACTIVE;
1311 return;
1312
1313 indicate_active:
1314 /*
1315 * The transmitter is active, and there are no room for
1316 * more outgoing packets in the transmission buffer.
1317 */
1318 sc->sc_if.if_flags |= IFF_OACTIVE;
1319 return;
1320}
1321
1322/*
1323 * Drop (skip) a packet from receive buffer in 86960 memory.
1324 */
1325static void
1326fe_droppacket (struct fe_softc * sc, int len)
1327{
1328 int i;
1329
1330 /*
1331 * 86960 manual says that we have to read 8 bytes from the buffer
1332 * before skip the packets and that there must be more than 8 bytes
1333 * remaining in the buffer when issue a skip command.
1334 * Remember, we have already read 4 bytes before come here.
1335 */
1336 if (len > 12) {
1337 /* Read 4 more bytes, and skip the rest of the packet. */
1338#ifdef FE_8BIT_SUPPORT
1339 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1340 {
1341 (void) fe_inb(sc, FE_BMPR8);
1342 (void) fe_inb(sc, FE_BMPR8);
1343 (void) fe_inb(sc, FE_BMPR8);
1344 (void) fe_inb(sc, FE_BMPR8);
1345 }
1346 else
1347#endif
1348 {
1349 (void) fe_inw(sc, FE_BMPR8);
1350 (void) fe_inw(sc, FE_BMPR8);
1351 }
1352 fe_outb(sc, FE_BMPR14, FE_B14_SKIP);
1353 } else {
1354 /* We should not come here unless receiving RUNTs. */
1355#ifdef FE_8BIT_SUPPORT
1356 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1357 {
1358 for (i = 0; i < len; i++)
1359 (void) fe_inb(sc, FE_BMPR8);
1360 }
1361 else
1362#endif
1363 {
1364 for (i = 0; i < len; i += 2)
1365 (void) fe_inw(sc, FE_BMPR8);
1366 }
1367 }
1368}
1369
1370#ifdef DIAGNOSTIC
1371/*
1372 * Empty receiving buffer.
1373 */
1374static void
1375fe_emptybuffer (struct fe_softc * sc)
1376{
1377 int i;
1378 u_char saved_dlcr5;
1379
1380#ifdef FE_DEBUG
1381 printf("fe%d: emptying receive buffer\n", sc->sc_unit);
1382#endif
1383
1384 /*
1385 * Stop receiving packets, temporarily.
1386 */
1387 saved_dlcr5 = fe_inb(sc, FE_DLCR5);
1388 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5);
1389 DELAY(1300);
1390
1391 /*
1392 * When we come here, the receive buffer management may
1393 * have been broken. So, we cannot use skip operation.
1394 * Just discard everything in the buffer.
1395 */
1396#ifdef FE_8BIT_SUPPORT
1397 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1398 {
1399 for (i = 0; i < 65536; i++) {
1400 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1401 break;
1402 (void) fe_inb(sc, FE_BMPR8);
1403 }
1404 }
1405 else
1406#endif
1407 {
1408 for (i = 0; i < 65536; i += 2) {
1409 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1410 break;
1411 (void) fe_inw(sc, FE_BMPR8);
1412 }
1413 }
1414
1415 /*
1416 * Double check.
1417 */
1418 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP) {
1419 printf("fe%d: could not empty receive buffer\n", sc->sc_unit);
1420 /* Hmm. What should I do if this happens? FIXME. */
1421 }
1422
1423 /*
1424 * Restart receiving packets.
1425 */
1426 fe_outb(sc, FE_DLCR5, saved_dlcr5);
1427}
1428#endif
1429
1430/*
1431 * Transmission interrupt handler
1432 * The control flow of this function looks silly. FIXME.
1433 */
1434static void
1435fe_tint (struct fe_softc * sc, u_char tstat)
1436{
1437 int left;
1438 int col;
1439
1440 /*
1441 * Handle "excessive collision" interrupt.
1442 */
1443 if (tstat & FE_D0_COLL16) {
1444
1445 /*
1446 * Find how many packets (including this collided one)
1447 * are left unsent in transmission buffer.
1448 */
1449 left = fe_inb(sc, FE_BMPR10);
1450 printf("fe%d: excessive collision (%d/%d)\n",
1451 sc->sc_unit, left, sc->txb_sched);
1452
1453 /*
1454 * Clear the collision flag (in 86960) here
1455 * to avoid confusing statistics.
1456 */
1457 fe_outb(sc, FE_DLCR0, FE_D0_COLLID);
1458
1459 /*
1460 * Restart transmitter, skipping the
1461 * collided packet.
1462 *
1463 * We *must* skip the packet to keep network running
1464 * properly. Excessive collision error is an
1465 * indication of the network overload. If we
1466 * tried sending the same packet after excessive
1467 * collision, the network would be filled with
1468 * out-of-time packets. Packets belonging
1469 * to reliable transport (such as TCP) are resent
1470 * by some upper layer.
1471 */
1472 fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1);
1473
1474 /* Update statistics. */
1475 sc->tx_excolls++;
1476 }
1477
1478 /*
1479 * Handle "transmission complete" interrupt.
1480 */
1481 if (tstat & FE_D0_TXDONE) {
1482
1483 /*
1484 * Add in total number of collisions on last
1485 * transmission. We also clear "collision occurred" flag
1486 * here.
1487 *
1488 * 86960 has a design flaw on collision count on multiple
1489 * packet transmission. When we send two or more packets
1490 * with one start command (that's what we do when the
1491 * transmission queue is crowded), 86960 informs us number
1492 * of collisions occurred on the last packet on the
1493 * transmission only. Number of collisions on previous
1494 * packets are lost. I have told that the fact is clearly
1495 * stated in the Fujitsu document.
1496 *
1497 * I considered not to mind it seriously. Collision
1498 * count is not so important, anyway. Any comments? FIXME.
1499 */
1500
1501 if (fe_inb(sc, FE_DLCR0) & FE_D0_COLLID) {
1502
1503 /* Clear collision flag. */
1504 fe_outb(sc, FE_DLCR0, FE_D0_COLLID);
1505
1506 /* Extract collision count from 86960. */
1507 col = fe_inb(sc, FE_DLCR4);
1508 col = (col & FE_D4_COL) >> FE_D4_COL_SHIFT;
1509 if (col == 0) {
1510 /*
1511 * Status register indicates collisions,
1512 * while the collision count is zero.
1513 * This can happen after multiple packet
1514 * transmission, indicating that one or more
1515 * previous packet(s) had been collided.
1516 *
1517 * Since the accurate number of collisions
1518 * has been lost, we just guess it as 1;
1519 * Am I too optimistic? FIXME.
1520 */
1521 col = 1;
1522 }
1523 sc->sc_if.if_collisions += col;
1524 if (col == 1)
1525 sc->mibdata.dot3StatsSingleCollisionFrames++;
1526 else
1527 sc->mibdata.dot3StatsMultipleCollisionFrames++;
1528 sc->mibdata.dot3StatsCollFrequencies[col-1]++;
1529 }
1530
1531 /*
1532 * Update transmission statistics.
1533 * Be sure to reflect number of excessive collisions.
1534 */
1535 col = sc->tx_excolls;
1536 sc->sc_if.if_opackets += sc->txb_sched - col;
1537 sc->sc_if.if_oerrors += col;
1538 sc->sc_if.if_collisions += col * 16;
1539 sc->mibdata.dot3StatsExcessiveCollisions += col;
1540 sc->mibdata.dot3StatsCollFrequencies[15] += col;
1541 sc->txb_sched = 0;
1542
1543 /*
1544 * The transmitter is no more active.
1545 * Reset output active flag and watchdog timer.
1546 */
1547 sc->sc_if.if_flags &= ~IFF_OACTIVE;
1548 sc->sc_if.if_timer = 0;
1549
1550 /*
1551 * If more data is ready to transmit in the buffer, start
1552 * transmitting them. Otherwise keep transmitter idle,
1553 * even if more data is queued. This gives receive
1554 * process a slight priority.
1555 */
1556 if (sc->txb_count > 0)
1557 fe_xmit(sc);
1558 }
1559}
1560
1561/*
1562 * Ethernet interface receiver interrupt.
1563 */
1564static void
1565fe_rint (struct fe_softc * sc, u_char rstat)
1566{
1567 u_short len;
1568 u_char status;
1569 int i;
1570
1571 /*
1572 * Update statistics if this interrupt is caused by an error.
1573 * Note that, when the system was not sufficiently fast, the
1574 * receive interrupt might not be acknowledged immediately. If
1575 * one or more errornous frames were received before this routine
1576 * was scheduled, they are ignored, and the following error stats
1577 * give less than real values.
1578 */
1579 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | FE_D1_ALGERR | FE_D1_SRTPKT)) {
1580 if (rstat & FE_D1_OVRFLO)
1581 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1582 if (rstat & FE_D1_CRCERR)
1583 sc->mibdata.dot3StatsFCSErrors++;
1584 if (rstat & FE_D1_ALGERR)
1585 sc->mibdata.dot3StatsAlignmentErrors++;
1586#if 0
1587 /* The reference MAC receiver defined in 802.3
1588 silently ignores short frames (RUNTs) without
1589 notifying upper layer. RFC 1650 (dot3 MIB) is
1590 based on the 802.3, and it has no stats entry for
1591 RUNTs... */
1592 if (rstat & FE_D1_SRTPKT)
1593 sc->mibdata.dot3StatsFrameTooShorts++; /* :-) */
1594#endif
1595 sc->sc_if.if_ierrors++;
1596 }
1597
1598 /*
1599 * MB86960 has a flag indicating "receive queue empty."
1600 * We just loop, checking the flag, to pull out all received
1601 * packets.
1602 *
1603 * We limit the number of iterations to avoid infinite-loop.
1604 * The upper bound is set to unrealistic high value.
1605 */
1606 for (i = 0; i < FE_MAX_RECV_COUNT * 2; i++) {
1607
1608 /* Stop the iteration if 86960 indicates no packets. */
1609 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1610 return;
1611
1612 /*
1613 * Extract a receive status byte.
1614 * As our 86960 is in 16 bit bus access mode, we have to
1615 * use inw() to get the status byte. The significant
1616 * value is returned in lower 8 bits.
1617 */
1618#ifdef FE_8BIT_SUPPORT
1619 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1620 {
1621 status = fe_inb(sc, FE_BMPR8);
1622 (void) fe_inb(sc, FE_BMPR8);
1623 }
1624 else
1625#endif
1626 {
1627 status = (u_char) fe_inw(sc, FE_BMPR8);
1628 }
1629
1630 /*
1631 * Extract the packet length.
1632 * It is a sum of a header (14 bytes) and a payload.
1633 * CRC has been stripped off by the 86960.
1634 */
1635#ifdef FE_8BIT_SUPPORT
1636 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1637 {
1638 len = fe_inb(sc, FE_BMPR8);
1639 len |= (fe_inb(sc, FE_BMPR8) << 8);
1640 }
1641 else
1642#endif
1643 {
1644 len = fe_inw(sc, FE_BMPR8);
1645 }
1646
1647 /*
1648 * AS our 86960 is programed to ignore errored frame,
1649 * we must not see any error indication in the
1650 * receive buffer. So, any error condition is a
1651 * serious error, e.g., out-of-sync of the receive
1652 * buffer pointers.
1653 */
1654 if ((status & 0xF0) != 0x20 ||
1655 len > ETHER_MAX_LEN - ETHER_CRC_LEN ||
1656 len < ETHER_MIN_LEN - ETHER_CRC_LEN) {
1657 printf("fe%d: RX buffer out-of-sync\n", sc->sc_unit);
1658 sc->sc_if.if_ierrors++;
1659 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1660 fe_reset(sc);
1661 return;
1662 }
1663
1664 /*
1665 * Go get a packet.
1666 */
1667 if (fe_get_packet(sc, len) < 0) {
1668 /*
1669 * Negative return from fe_get_packet()
1670 * indicates no available mbuf. We stop
1671 * receiving packets, even if there are more
1672 * in the buffer. We hope we can get more
1673 * mbuf next time.
1674 */
1675 sc->sc_if.if_ierrors++;
1676 sc->mibdata.dot3StatsMissedFrames++;
1677 fe_droppacket(sc, len);
1678 return;
1679 }
1680
1681 /* Successfully received a packet. Update stat. */
1682 sc->sc_if.if_ipackets++;
1683 }
1684
1685 /* Maximum number of frames has been received. Something
1686 strange is happening here... */
1687 printf("fe%d: unusual receive flood\n", sc->sc_unit);
1688 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1689 fe_reset(sc);
1690}
1691
1692/*
1693 * Ethernet interface interrupt processor
1694 */
1695static void
1696fe_intr (void *arg)
1697{
1698 struct fe_softc *sc = arg;
1699 u_char tstat, rstat;
1700 int loop_count = FE_MAX_LOOP;
1701
1702 /* Loop until there are no more new interrupt conditions. */
1703 while (loop_count-- > 0) {
1704 /*
1705 * Get interrupt conditions, masking unneeded flags.
1706 */
1707 tstat = fe_inb(sc, FE_DLCR0) & FE_TMASK;
1708 rstat = fe_inb(sc, FE_DLCR1) & FE_RMASK;
1709 if (tstat == 0 && rstat == 0)
1710 return;
1711
1712 /*
1713 * Reset the conditions we are acknowledging.
1714 */
1715 fe_outb(sc, FE_DLCR0, tstat);
1716 fe_outb(sc, FE_DLCR1, rstat);
1717
1718 /*
1719 * Handle transmitter interrupts.
1720 */
1721 if (tstat)
1722 fe_tint(sc, tstat);
1723
1724 /*
1725 * Handle receiver interrupts
1726 */
1727 if (rstat)
1728 fe_rint(sc, rstat);
1729
1730 /*
1731 * Update the multicast address filter if it is
1732 * needed and possible. We do it now, because
1733 * we can make sure the transmission buffer is empty,
1734 * and there is a good chance that the receive queue
1735 * is empty. It will minimize the possibility of
1736 * packet loss.
1737 */
1738 if (sc->filter_change &&
1739 sc->txb_count == 0 && sc->txb_sched == 0) {
1740 fe_loadmar(sc);
1741 sc->sc_if.if_flags &= ~IFF_OACTIVE;
1742 }
1743
1744 /*
1745 * If it looks like the transmitter can take more data,
1746 * attempt to start output on the interface. This is done
1747 * after handling the receiver interrupt to give the
1748 * receive operation priority.
1749 *
1750 * BTW, I'm not sure in what case the OACTIVE is on at
1751 * this point. Is the following test redundant?
1752 *
1753 * No. This routine polls for both transmitter and
1754 * receiver interrupts. 86960 can raise a receiver
1755 * interrupt when the transmission buffer is full.
1756 */
1757 if ((sc->sc_if.if_flags & IFF_OACTIVE) == 0)
1758 fe_start(&sc->sc_if);
1759 }
1760
1761 printf("fe%d: too many loops\n", sc->sc_unit);
1762}
1763
1764/*
1765 * Process an ioctl request. This code needs some work - it looks
1766 * pretty ugly.
1767 */
1768static int
1769fe_ioctl (struct ifnet * ifp, u_long command, caddr_t data)
1770{
1771 struct fe_softc *sc = ifp->if_softc;
1772 struct ifreq *ifr = (struct ifreq *)data;
1773 int s, error = 0;
1774
1775 s = splimp();
1776
1777 switch (command) {
1778
1779 case SIOCSIFADDR:
1780 case SIOCGIFADDR:
1781 case SIOCSIFMTU:
1782 /* Just an ordinary action. */
1783 error = ether_ioctl(ifp, command, data);
1784 break;
1785
1786 case SIOCSIFFLAGS:
1787 /*
1788 * Switch interface state between "running" and
1789 * "stopped", reflecting the UP flag.
1790 */
1791 if (sc->sc_if.if_flags & IFF_UP) {
1792 if ((sc->sc_if.if_flags & IFF_RUNNING) == 0)
1793 fe_init(sc);
1794 } else {
1795 if ((sc->sc_if.if_flags & IFF_RUNNING) != 0)
1796 fe_stop(sc);
1797 }
1798
1799 /*
1800 * Promiscuous and/or multicast flags may have changed,
1801 * so reprogram the multicast filter and/or receive mode.
1802 */
1803 fe_setmode(sc);
1804
1805 /* Done. */
1806 break;
1807
1808 case SIOCADDMULTI:
1809 case SIOCDELMULTI:
1810 /*
1811 * Multicast list has changed; set the hardware filter
1812 * accordingly.
1813 */
1814 fe_setmode(sc);
1815 break;
1816
1817 case SIOCSIFMEDIA:
1818 case SIOCGIFMEDIA:
1819 /* Let if_media to handle these commands and to call
1820 us back. */
1821 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
1822 break;
1823
1824 default:
1825 error = EINVAL;
1826 break;
1827 }
1828
1829 (void) splx(s);
1830 return (error);
1831}
1832
1833/*
1834 * Retrieve packet from receive buffer and send to the next level up via
1835 * ether_input().
1836 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
1837 */
1838static int
1839fe_get_packet (struct fe_softc * sc, u_short len)
1840{
1841 struct ether_header *eh;
1842 struct mbuf *m;
1843
1844 /*
1845 * NFS wants the data be aligned to the word (4 byte)
1846 * boundary. Ethernet header has 14 bytes. There is a
1847 * 2-byte gap.
1848 */
1849#define NFS_MAGIC_OFFSET 2
1850
1851 /*
1852 * This function assumes that an Ethernet packet fits in an
1853 * mbuf (with a cluster attached when necessary.) On FreeBSD
1854 * 2.0 for x86, which is the primary target of this driver, an
1855 * mbuf cluster has 4096 bytes, and we are happy. On ancient
1856 * BSDs, such as vanilla 4.3 for 386, a cluster size was 1024,
1857 * however. If the following #error message were printed upon
1858 * compile, you need to rewrite this function.
1859 */
1860#if ( MCLBYTES < ETHER_MAX_LEN - ETHER_CRC_LEN + NFS_MAGIC_OFFSET )
1861#error "Too small MCLBYTES to use fe driver."
1862#endif
1863
1864 /*
1865 * Our strategy has one more problem. There is a policy on
1866 * mbuf cluster allocation. It says that we must have at
1867 * least MINCLSIZE (208 bytes on FreeBSD 2.0 for x86) to
1868 * allocate a cluster. For a packet of a size between
1869 * (MHLEN - 2) to (MINCLSIZE - 2), our code violates the rule...
1870 * On the other hand, the current code is short, simple,
1871 * and fast, however. It does no harmful thing, just waists
1872 * some memory. Any comments? FIXME.
1873 */
1874
1875 /* Allocate an mbuf with packet header info. */
1876 MGETHDR(m, M_DONTWAIT, MT_DATA);
1877 if (m == NULL)
1878 return -1;
1879
1880 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
1881 if (len > MHLEN - NFS_MAGIC_OFFSET) {
1882 MCLGET(m, M_DONTWAIT);
1883 if (!(m->m_flags & M_EXT)) {
1884 m_freem(m);
1885 return -1;
1886 }
1887 }
1888
1889 /* Initialize packet header info. */
1890 m->m_pkthdr.rcvif = &sc->sc_if;
1891 m->m_pkthdr.len = len;
1892
1893 /* Set the length of this packet. */
1894 m->m_len = len;
1895
1896 /* The following silliness is to make NFS happy */
1897 m->m_data += NFS_MAGIC_OFFSET;
1898
1899 /* Get (actually just point to) the header part. */
1900 eh = mtod(m, struct ether_header *);
1901
1902 /* Get a packet. */
1903#ifdef FE_8BIT_SUPPORT
1904 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1905 {
1906 fe_insb(sc, FE_BMPR8, (u_int8_t *)eh, len);
1907 }
1908 else
1909#endif
1910 {
1911 fe_insw(sc, FE_BMPR8, (u_int16_t *)eh, (len + 1) >> 1);
1912 }
1913
1914 /* Strip off the Ethernet header. */
1915 m->m_pkthdr.len -= sizeof (struct ether_header);
1916 m->m_len -= sizeof (struct ether_header);
1917 m->m_data += sizeof (struct ether_header);
1918
1919 /* Feed the packet to upper layer. */
1920 ether_input(&sc->sc_if, eh, m);
1921 return 0;
1922}
1923
1924/*
1925 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
1926 * Returns number of bytes actually written, including length word.
1927 *
1928 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
1929 * Packets shorter than Ethernet minimum are legal, and we pad them
1930 * before sending out. An exception is "partial" packets which are
1931 * shorter than mandatory Ethernet header.
1932 */
1933static void
1934fe_write_mbufs (struct fe_softc *sc, struct mbuf *m)
1935{
1936 u_short length, len;
1937 struct mbuf *mp;
1938 u_char *data;
1939 u_short savebyte; /* WARNING: Architecture dependent! */
1940#define NO_PENDING_BYTE 0xFFFF
1941
1942 static u_char padding [ETHER_MIN_LEN - ETHER_CRC_LEN - ETHER_HDR_LEN];
1943
1944#ifdef DIAGNOSTIC
1945 /* First, count up the total number of bytes to copy */
1946 length = 0;
1947 for (mp = m; mp != NULL; mp = mp->m_next)
1948 length += mp->m_len;
1949
1950 /* Check if this matches the one in the packet header. */
1951 if (length != m->m_pkthdr.len) {
1952 printf("fe%d: packet length mismatch? (%d/%d)\n", sc->sc_unit,
1953 length, m->m_pkthdr.len);
1954 }
1955#else
1956 /* Just use the length value in the packet header. */
1957 length = m->m_pkthdr.len;
1958#endif
1959
1960#ifdef DIAGNOSTIC
1961 /*
1962 * Should never send big packets. If such a packet is passed,
1963 * it should be a bug of upper layer. We just ignore it.
1964 * ... Partial (too short) packets, neither.
1965 */
1966 if (length < ETHER_HDR_LEN ||
1967 length > ETHER_MAX_LEN - ETHER_CRC_LEN) {
1968 printf("fe%d: got an out-of-spec packet (%u bytes) to send\n",
1969 sc->sc_unit, length);
1970 sc->sc_if.if_oerrors++;
1971 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
1972 return;
1973 }
1974#endif
1975
1976 /*
1977 * Put the length word for this frame.
1978 * Does 86960 accept odd length? -- Yes.
1979 * Do we need to pad the length to minimum size by ourselves?
1980 * -- Generally yes. But for (or will be) the last
1981 * packet in the transmission buffer, we can skip the
1982 * padding process. It may gain performance slightly. FIXME.
1983 */
1984#ifdef FE_8BIT_SUPPORT
1985 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1986 {
1987 len = max(length, ETHER_MIN_LEN - ETHER_CRC_LEN);
1988 fe_outb(sc, FE_BMPR8, len & 0x00ff);
1989 fe_outb(sc, FE_BMPR8, (len & 0xff00) >> 8);
1990 }
1991 else
1992#endif
1993 {
1994 fe_outw(sc, FE_BMPR8,
1995 max(length, ETHER_MIN_LEN - ETHER_CRC_LEN));
1996 }
1997
1998 /*
1999 * Update buffer status now.
2000 * Truncate the length up to an even number, since we use outw().
2001 */
2002#ifdef FE_8BIT_SUPPORT
2003 if ((sc->proto_dlcr6 & FE_D6_SBW) != FE_D6_SBW_BYTE)
2004#endif
2005 {
2006 length = (length + 1) & ~1;
2007 }
2008 sc->txb_free -= FE_DATA_LEN_LEN +
2009 max(length, ETHER_MIN_LEN - ETHER_CRC_LEN);
2010 sc->txb_count++;
2011
2012 /*
2013 * Transfer the data from mbuf chain to the transmission buffer.
2014 * MB86960 seems to require that data be transferred as words, and
2015 * only words. So that we require some extra code to patch
2016 * over odd-length mbufs.
2017 */
2018#ifdef FE_8BIT_SUPPORT
2019 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
2020 {
2021 /* 8-bit cards are easy. */
2022 for (mp = m; mp != 0; mp = mp->m_next) {
2023 if (mp->m_len)
2024 fe_outsb(sc, FE_BMPR8, mtod(mp, caddr_t),
2025 mp->m_len);
2026 }
2027 }
2028 else
2029#endif
2030 {
2031 /* 16-bit cards are a pain. */
2032 savebyte = NO_PENDING_BYTE;
2033 for (mp = m; mp != 0; mp = mp->m_next) {
2034
2035 /* Ignore empty mbuf. */
2036 len = mp->m_len;
2037 if (len == 0)
2038 continue;
2039
2040 /* Find the actual data to send. */
2041 data = mtod(mp, caddr_t);
2042
2043 /* Finish the last byte. */
2044 if (savebyte != NO_PENDING_BYTE) {
2045 fe_outw(sc, FE_BMPR8, savebyte | (*data << 8));
2046 data++;
2047 len--;
2048 savebyte = NO_PENDING_BYTE;
2049 }
2050
2051 /* output contiguous words */
2052 if (len > 1) {
2053 fe_outsw(sc, FE_BMPR8, (u_int16_t *)data,
2054 len >> 1);
2055 data += len & ~1;
2056 len &= 1;
2057 }
2058
2059 /* Save a remaining byte, if there is one. */
2060 if (len > 0)
2061 savebyte = *data;
2062 }
2063
2064 /* Spit the last byte, if the length is odd. */
2065 if (savebyte != NO_PENDING_BYTE)
2066 fe_outw(sc, FE_BMPR8, savebyte);
2067 }
2068
2069 /* Pad to the Ethernet minimum length, if the packet is too short. */
2070 if (length < ETHER_MIN_LEN - ETHER_CRC_LEN) {
2071#ifdef FE_8BIT_SUPPORT
2072 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
2073 {
2074 fe_outsb(sc, FE_BMPR8, padding,
2075 ETHER_MIN_LEN - ETHER_CRC_LEN - length);
2076 }
2077 else
2078#endif
2079 {
2080 fe_outsw(sc, FE_BMPR8, (u_int16_t *)padding,
2081 (ETHER_MIN_LEN - ETHER_CRC_LEN - length) >> 1);
2082 }
2083 }
2084}
2085
2086/*
2087 * Compute hash value for an Ethernet address
2088 */
2089static int
2090fe_hash ( u_char * ep )
2091{
2092#define FE_HASH_MAGIC_NUMBER 0xEDB88320L
2093
2094 u_long hash = 0xFFFFFFFFL;
2095 int i, j;
2096 u_char b;
2097 u_long m;
2098
2099 for ( i = ETHER_ADDR_LEN; --i >= 0; ) {
2100 b = *ep++;
2101 for ( j = 8; --j >= 0; ) {
2102 m = hash;
2103 hash >>= 1;
2104 if ( ( m ^ b ) & 1 ) hash ^= FE_HASH_MAGIC_NUMBER;
2105 b >>= 1;
2106 }
2107 }
2108 return ( ( int )( hash >> 26 ) );
2109}
2110
2111/*
2112 * Compute the multicast address filter from the
2113 * list of multicast addresses we need to listen to.
2114 */
2115static struct fe_filter
2116fe_mcaf ( struct fe_softc *sc )
2117{
2118 int index;
2119 struct fe_filter filter;
2120 struct ifmultiaddr *ifma;
2121
2122 filter = fe_filter_nothing;
2123 TAILQ_FOREACH(ifma, &sc->arpcom.ac_if.if_multiaddrs, ifma_link) {
2124 if (ifma->ifma_addr->sa_family != AF_LINK)
2125 continue;
2126 index = fe_hash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
2127#ifdef FE_DEBUG
2128 printf("fe%d: hash(%6D) == %d\n",
2129 sc->sc_unit, enm->enm_addrlo , ":", index);
2130#endif
2131
2132 filter.data[index >> 3] |= 1 << (index & 7);
2133 }
2134 return ( filter );
2135}
2136
2137/*
2138 * Calculate a new "multicast packet filter" and put the 86960
2139 * receiver in appropriate mode.
2140 */
2141static void
2142fe_setmode (struct fe_softc *sc)
2143{
2144 int flags = sc->sc_if.if_flags;
2145
2146 /*
2147 * If the interface is not running, we postpone the update
2148 * process for receive modes and multicast address filter
2149 * until the interface is restarted. It reduces some
2150 * complicated job on maintaining chip states. (Earlier versions
2151 * of this driver had a bug on that point...)
2152 *
2153 * To complete the trick, fe_init() calls fe_setmode() after
2154 * restarting the interface.
2155 */
2156 if (!(flags & IFF_RUNNING))
2157 return;
2158
2159 /*
2160 * Promiscuous mode is handled separately.
2161 */
2162 if (flags & IFF_PROMISC) {
2163 /*
2164 * Program 86960 to receive all packets on the segment
2165 * including those directed to other stations.
2166 * Multicast filter stored in MARs are ignored
2167 * under this setting, so we don't need to update it.
2168 *
2169 * Promiscuous mode in FreeBSD 2 is used solely by
2170 * BPF, and BPF only listens to valid (no error) packets.
2171 * So, we ignore erroneous ones even in this mode.
2172 * (Older versions of fe driver mistook the point.)
2173 */
2174 fe_outb(sc, FE_DLCR5,
2175 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
2176 sc->filter_change = 0;
2177 return;
2178 }
2179
2180 /*
2181 * Turn the chip to the normal (non-promiscuous) mode.
2182 */
2183 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
2184
2185 /*
2186 * Find the new multicast filter value.
2187 */
2188 if (flags & IFF_ALLMULTI)
2189 sc->filter = fe_filter_all;
2190 else
2191 sc->filter = fe_mcaf(sc);
2192 sc->filter_change = 1;
2193
2194 /*
2195 * We have to update the multicast filter in the 86960, A.S.A.P.
2196 *
2197 * Note that the DLC (Data Link Control unit, i.e. transmitter
2198 * and receiver) must be stopped when feeding the filter, and
2199 * DLC trashes all packets in both transmission and receive
2200 * buffers when stopped.
2201 *
2202 * To reduce the packet loss, we delay the filter update
2203 * process until buffers are empty.
2204 */
2205 if (sc->txb_sched == 0 && sc->txb_count == 0 &&
2206 !(fe_inb(sc, FE_DLCR1) & FE_D1_PKTRDY)) {
2207 /*
2208 * Buffers are (apparently) empty. Load
2209 * the new filter value into MARs now.
2210 */
2211 fe_loadmar(sc);
2212 } else {
2213 /*
2214 * Buffers are not empty. Mark that we have to update
2215 * the MARs. The new filter will be loaded by feintr()
2216 * later.
2217 */
2218 }
2219}
2220
2221/*
2222 * Load a new multicast address filter into MARs.
2223 *
2224 * The caller must have splimp'ed before fe_loadmar.
2225 * This function starts the DLC upon return. So it can be called only
2226 * when the chip is working, i.e., from the driver's point of view, when
2227 * a device is RUNNING. (I mistook the point in previous versions.)
2228 */
2229static void
2230fe_loadmar (struct fe_softc * sc)
2231{
2232 /* Stop the DLC (transmitter and receiver). */
2233 DELAY(200);
2234 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
2235 DELAY(200);
2236
2237 /* Select register bank 1 for MARs. */
2238 fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
2239
2240 /* Copy filter value into the registers. */
2241 fe_outblk(sc, FE_MAR8, sc->filter.data, FE_FILTER_LEN);
2242
2243 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
2244 fe_outb(sc, FE_DLCR7,
2245 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
2246
2247 /* Restart the DLC. */
2248 DELAY(200);
2249 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
2250 DELAY(200);
2251
2252 /* We have just updated the filter. */
2253 sc->filter_change = 0;
2254}
2255
2256/* Change the media selection. */
2257static int
2258fe_medchange (struct ifnet *ifp)
2259{
2260 struct fe_softc *sc = (struct fe_softc *)ifp->if_softc;
2261
2262#ifdef DIAGNOSTIC
2263 /* If_media should not pass any request for a media which this
2264 interface doesn't support. */
2265 int b;
2266
2267 for (b = 0; bit2media[b] != 0; b++) {
2268 if (bit2media[b] == sc->media.ifm_media) break;
2269 }
2270 if (((1 << b) & sc->mbitmap) == 0) {
2271 printf("fe%d: got an unsupported media request (0x%x)\n",
2272 sc->sc_unit, sc->media.ifm_media);
2273 return EINVAL;
2274 }
2275#endif
2276
2277 /* We don't actually change media when the interface is down.
2278 fe_init() will do the job, instead. Should we also wait
2279 until the transmission buffer being empty? Changing the
2280 media when we are sending a frame will cause two garbages
2281 on wires, one on old media and another on new. FIXME */
2282 if (sc->sc_if.if_flags & IFF_UP) {
2283 if (sc->msel) sc->msel(sc);
2284 }
2285
2286 return 0;
2287}
2288
2289/* I don't know how I can support media status callback... FIXME. */
2290static void
2291fe_medstat (struct ifnet *ifp, struct ifmediareq *ifmr)
2292{
2293 (void)ifp;
2294 (void)ifmr;
2295}