1/*- 2 * Copyright (c) 1995, David Greenman 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 *
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27 * $FreeBSD: head/sys/dev/ed/if_ed_cbus.c 150136 2005-09-14 19:03:14Z ru $
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27 * $FreeBSD: head/sys/dev/ed/if_ed_cbus.c 154924 2006-01-27 19:10:13Z imp $ |
28 */ 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/socket.h> 33#include <sys/kernel.h> 34 35#include <sys/module.h> 36#include <sys/bus.h> 37#include <machine/bus.h> 38#include <sys/rman.h> 39#include <machine/resource.h> 40#include <machine/clock.h> 41 42#include <net/ethernet.h> 43#include <net/if.h> 44#include <net/if_arp.h> 45#include <net/if_media.h> 46#include <net/if_mib.h> 47 48#include <isa/isavar.h> 49 50#include <dev/ed/if_edvar.h> 51#include <dev/ed/if_edreg.h> 52#include <dev/ed/if_ed98.h> 53 54static int ed98_alloc_port(device_t, int); 55static int ed98_alloc_memory(device_t, int); 56static int ed_pio_testmem(struct ed_softc *, int, int, int);
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57static int ed_probe_SIC98(device_t, int, int);
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57static int ed_probe_CNET98(device_t, int, int); 58static int ed_probe_CNET98EL(device_t, int, int);
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59static int ed_probe_EZ98(device_t, int, int); |
60static int ed_probe_NEC77(device_t, int, int); 61static int ed_probe_NW98X(device_t, int, int); 62static int ed_probe_SB98(device_t, int, int);
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63static int ed_probe_EZ98(device_t, int, int);
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63static int ed_probe_SIC98(device_t, int, int); |
64static int ed98_probe_Novell(device_t, int, int); 65static int ed98_probe_generic8390(struct ed_softc *); 66static void ed_reset_CNET98(struct ed_softc *, int); 67static void ed_winsel_CNET98(struct ed_softc *, u_short); 68static void ed_get_SB98(struct ed_softc *); 69 70static int ed_cbus_probe(device_t); 71static int ed_cbus_attach(device_t); 72 73static struct isa_pnp_id ed_ids[] = { 74/* TODO - list up PnP boards for PC-98 */ 75 { 0, NULL } 76}; 77 78static int 79ed_cbus_probe(device_t dev) 80{ 81 struct ed_softc *sc = device_get_softc(dev); 82 int flags = device_get_flags(dev); 83 int error = 0; 84 85 sc->type = ED_TYPE98(flags); 86#ifdef ED_DEBUG 87 device_printf(dev, "ed_cbus_probe: sc->type=%x\n", sc->type); 88#endif 89 90 /* Check isapnp ids */ 91 error = ISA_PNP_PROBE(device_get_parent(dev), dev, ed_ids); 92#ifdef ED_DEBUG 93 device_printf(dev, "ed_cbus_probe: ISA_PNP_PROBE returns %d\n", error); 94#endif 95 96 /* If the card had a PnP ID that didn't match any we know about */ 97 if (error == ENXIO) 98 goto end; 99 100 /* If we had some other problem. */ 101 if (!(error == 0 || error == ENOENT)) 102 goto end; 103 104 /* Heuristic probes */ 105#ifdef ED_DEBUG 106 device_printf(dev, "ed_cbus_probe: Heuristic probes start\n"); 107#endif 108 switch (sc->type) { 109 case ED_TYPE98_GENERIC: 110 /* 111 * CAUTION! 112 * sc->type of these boards are overwritten by PC/AT's value. 113 */ 114 115 /* 116 * SMC EtherEZ98 117 */ 118 error = ed_probe_EZ98(dev, 0, flags); 119 if (error == 0) 120 goto end; 121 122 ed_release_resources(dev); 123 124 /* 125 * Allied Telesis CenterCom LA-98-T 126 */ 127 error = ed_probe_Novell(dev, 0, flags); 128 if (error == 0) { 129 ed_Novell_read_mac(sc); 130 goto end; 131 } 132 break; 133 134 /* 135 * NE2000-like boards probe routine 136 */ 137 case ED_TYPE98_BDN: 138 /* 139 * ELECOM LANEED LD-BDN 140 * PLANET SMART COM 98 EN-2298 141 */ 142 case ED_TYPE98_LGY: 143 /* 144 * MELCO LGY-98, IND-SP, IND-SS 145 * MACNICA NE2098 146 */ 147 case ED_TYPE98_ICM: 148 /* 149 * ICM DT-ET-25, DT-ET-T5, IF-2766ET, IF-2771ET 150 * D-Link DE-298P, DE-298 151 */ 152 case ED_TYPE98_EGY: 153 /* 154 * MELCO EGY-98 155 * Contec C-NET(98)E-A, C-NET(98)L-A 156 */ 157 case ED_TYPE98_108: 158 /* 159 * NEC PC-9801-107,108 160 */ 161 case ED_TYPE98_NC5098: 162 /* 163 * NextCom NC5098 164 */ 165 error = ed98_probe_Novell(dev, 0, flags); 166 break; 167 168 /* 169 * other boards with special probe routine 170 */ 171 case ED_TYPE98_SIC: 172 /* 173 * Allied Telesis SIC-98 174 */ 175 error = ed_probe_SIC98(dev, 0, flags); 176 break; 177 178 case ED_TYPE98_CNET98EL: 179 /* 180 * Contec C-NET(98)E/L 181 */ 182 error = ed_probe_CNET98EL(dev, 0, flags); 183 break; 184 185 case ED_TYPE98_CNET98: 186 /* 187 * Contec C-NET(98) 188 */ 189 error = ed_probe_CNET98(dev, 0, flags); 190 break; 191 192 case ED_TYPE98_LA98: 193 /* 194 * IO-DATA LA/T-98 195 * NEC PC-9801-77,78 196 */ 197 error = ed_probe_NEC77(dev, 0, flags); 198 break; 199 200 case ED_TYPE98_NW98X: 201 /* 202 * Networld EC/EP-98X 203 */ 204 error = ed_probe_NW98X(dev, 0, flags); 205 break; 206 207 case ED_TYPE98_SB98: 208 /* 209 * Soliton SB-9801 210 * Fujikura FN-9801 211 */ 212 error = ed_probe_SB98(dev, 0, flags); 213 break; 214 } 215 216end: 217#ifdef ED_DEBUG 218 device_printf(dev, "ed_cbus_probe: end, error=%d\n", error); 219#endif 220 if (error == 0) 221 error = ed_alloc_irq(dev, 0, 0); 222 223 ed_release_resources(dev); 224 return (error); 225} 226 227static int 228ed_cbus_attach(dev) 229 device_t dev; 230{ 231 struct ed_softc *sc = device_get_softc(dev); 232 int flags = device_get_flags(dev); 233 int error; 234 235 if (sc->port_used > 0) { 236 if (ED_TYPE98(flags) == ED_TYPE98_GENERIC) 237 ed_alloc_port(dev, sc->port_rid, sc->port_used); 238 else 239 ed98_alloc_port(dev, sc->port_rid); 240 } 241 if (sc->mem_used) 242 ed_alloc_memory(dev, sc->mem_rid, sc->mem_used); 243 244 ed_alloc_irq(dev, sc->irq_rid, 0); 245 246 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE, 247 edintr, sc, &sc->irq_handle); 248 if (error) { 249 ed_release_resources(dev); 250 return (error); 251 } 252 253 return ed_attach(dev); 254} 255 256/* 257 * Interrupt conversion table for EtherEZ98 258 */ 259static uint16_t ed_EZ98_intr_val[] = { 260 0, 261 3, 262 5, 263 6, 264 0, 265 9, 266 12, 267 13 268}; 269 270static int 271ed_probe_EZ98(device_t dev, int port_rid, int flags) 272{ 273 struct ed_softc *sc = device_get_softc(dev); 274 int error; 275 static unsigned short *intr_vals[] = {NULL, ed_EZ98_intr_val}; 276 277 error = ed_alloc_port(dev, port_rid, ED_EZ98_IO_PORTS); 278 if (error) { 279 return (error); 280 } 281 282 sc->asic_offset = ED_EZ98_ASIC_OFFSET; 283 sc->nic_offset = ED_EZ98_NIC_OFFSET; 284 285 return ed_probe_WD80x3_generic(dev, flags, intr_vals); 286} 287 288/* 289 * I/O conversion tables 290 */ 291 292/* LGY-98, ICM, C-NET(98)E/L */ 293static bus_addr_t ed98_ioaddr_generic[] = { 294 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 295}; 296 297/* 298 * Definitions for Contec C-NET(98)E/L 299 */ 300#define ED_CNET98EL_ICR 2 /* Interrupt Configuration Register */ 301 302#define ED_CNET98EL_ICR_IRQ3 0x01 303#define ED_CNET98EL_ICR_IRQ5 0x02 304#define ED_CNET98EL_ICR_IRQ6 0x04 305#define ED_CNET98EL_ICR_IRQ12 0x20 306 307#define ED_CNET98EL_IMR 4 /* Interrupt Mask Register */ 308#define ED_CNET98EL_ISR 5 /* Interrupt Status Register */ 309 310/* EGY-98 */ 311static bus_addr_t ed98_ioaddr_egy98[] = { 312 0, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e, 313 0x100, 0x102, 0x104, 0x106, 0x108, 0x10a, 0x10c, 0x10e 314}; 315 316/* SIC-98 */ 317static bus_addr_t ed98_ioaddr_sic98[] = { 318 0x0000, 0x0200, 0x0400, 0x0600, 0x0800, 0x0a00, 0x0c00, 0x0e00, 319 0x1000, 0x1200, 0x1400, 0x1600, 0x1800, 0x1a00, 0x1c00, 0x1e00 320}; 321 322/* LA/T-98, LD-BDN, PC-9801-77, SB-9801 */ 323static bus_addr_t ed98_ioaddr_la98[] = { 324 0x0000, 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000, 325 0x8000, 0x9000, 0xa000, 0xb000, 0xc000, 0xd000, 0xe000, 0xf000, 326 0x0100 /* for NEC 77(see below) */ 327}; 328 329/* 330 * Definitions for NEC PC-9801-77 331 */ 332#define ED_NEC77_IRQ 16 /* Interrupt Configuration Register */ 333 334#define ED_NEC77_IRQ3 0x04 335#define ED_NEC77_IRQ5 0x06 336#define ED_NEC77_IRQ6 0x08 337#define ED_NEC77_IRQ12 0x0a 338#define ED_NEC77_IRQ13 0x02 339 340/* 341 * Definitions for Soliton SB-9801 342 */ 343#define ED_SB98_CFG 1 /* Board configuration */ 344 345#define ED_SB98_CFG_IRQ3 0x00 346#define ED_SB98_CFG_IRQ5 0x04 347#define ED_SB98_CFG_IRQ6 0x08 348#define ED_SB98_CFG_IRQ12 0x0c 349#define ED_SB98_CFG_ALTPORT 0x40 /* use EXTERNAL media */ 350#define ED_SB98_CFG_ENABLE 0xa0 /* enable configuration */ 351 352#define ED_SB98_EEPENA 2 /* EEPROM access enable */ 353 354#define ED_SB98_EEPENA_DISABLE 0x00 355#define ED_SB98_EEPENA_ENABLE 0x01 356 357#define ED_SB98_EEP 3 /* EEPROM access */ 358 359#define ED_SB98_EEP_SDA 0x01 /* Serial Data */ 360#define ED_SB98_EEP_SCL 0x02 /* Serial Clock */ 361#define ED_SB98_EEP_READ 0x01 /* Read Command */ 362 363#define ED_SB98_EEP_DELAY 300 364 365#define ED_SB98_ADDRESS 0x01 /* Station Address(1-6) */ 366 367#define ED_SB98_POLARITY 4 /* Polarity */ 368 369/* PC-9801-108 */ 370static bus_addr_t ed98_ioaddr_nec108[] = { 371 0x0000, 0x0002, 0x0004, 0x0006, 0x0008, 0x000a, 0x000c, 0x000e, 372 0x1000, 0x1002, 0x1004, 0x1006, 0x1008, 0x100a, 0x100c, 0x100e 373}; 374 375/* C-NET(98) */ 376static bus_addr_t ed98_ioaddr_cnet98[] = { 377 0x0000, 0x0002, 0x0004, 0x0006, 0x0008, 0x000a, 0x000c, 0x000e, 378 0x0400, 0x0402, 0x0404, 0x0406, 0x0408, 0x040a, 0x040c, 0x040e 379}; 380 381/* 382 * Definitions for Contec C-NET(98) 383 */ 384#define ED_CNET98_MAP_REG0L 0 /* MAPPING register0 Low */ 385#define ED_CNET98_MAP_REG1L 1 /* MAPPING register1 Low */ 386#define ED_CNET98_MAP_REG2L 2 /* MAPPING register2 Low */ 387#define ED_CNET98_MAP_REG3L 3 /* MAPPING register3 Low */ 388#define ED_CNET98_MAP_REG0H 4 /* MAPPING register0 Hi */ 389#define ED_CNET98_MAP_REG1H 5 /* MAPPING register1 Hi */ 390#define ED_CNET98_MAP_REG2H 6 /* MAPPING register2 Hi */ 391#define ED_CNET98_MAP_REG3H 7 /* MAPPING register3 Hi */ 392#define ED_CNET98_WIN_REG 8 /* Window register */ 393#define ED_CNET98_INT_LEV 9 /* Init level register */ 394 395#define ED_CNET98_INT_IRQ3 0x01 /* INT 0 */ 396#define ED_CNET98_INT_IRQ5 0x02 /* INT 1 */ 397#define ED_CNET98_INT_IRQ6 0x04 /* INT 2 */ 398#define ED_CNET98_INT_IRQ9 0x08 /* INT 3 */ 399#define ED_CNET98_INT_IRQ12 0x20 /* INT 5 */ 400#define ED_CNET98_INT_IRQ13 0x40 /* INT 6 */ 401 402#define ED_CNET98_INT_REQ 10 /* Init request register */ 403#define ED_CNET98_INT_MASK 11 /* Init mask register */ 404#define ED_CNET98_INT_STAT 12 /* Init status register */ 405#define ED_CNET98_INT_CLR 12 /* Init clear register */ 406#define ED_CNET98_RESERVE1 13 407#define ED_CNET98_RESERVE2 14 408#define ED_CNET98_RESERVE3 15 409 410/* EC/EP-98X, NC5098 */ 411static bus_addr_t ed98_ioaddr_nw98x[] = { 412 0x0000, 0x0100, 0x0200, 0x0300, 0x0400, 0x0500, 0x0600, 0x0700, 413 0x0800, 0x0900, 0x0a00, 0x0b00, 0x0c00, 0x0d00, 0x0e00, 0x0f00, 414 0x1000 /* for EC/EP-98X(see below) */ 415}; 416 417/* 418 * Definitions for Networld EC/EP-98X 419 */ 420#define ED_NW98X_IRQ 16 /* Interrupt Configuration Register */ 421 422#define ED_NW98X_IRQ3 0x04 423#define ED_NW98X_IRQ5 0x06 424#define ED_NW98X_IRQ6 0x08 425#define ED_NW98X_IRQ12 0x0a 426#define ED_NW98X_IRQ13 0x02 427 428/* NC5098 ASIC */ 429static bus_addr_t ed98_asic_nc5098[] = { 430/* DATA ENADDR RESET */ 431 0x0000, 0x2000, 0x2100, 0x2200, 0x2300, 0x2400, 0x2500, 0x4000, 432 0, 0, 0, 0, 0, 0, 0, 0 433}; 434 435/* 436 * Definitions for NextCom NC5098 437 */ 438#define ED_NC5098_ENADDR 1 /* Station Address(1-6) */ 439 440/* 441 * Allocate a port resource with the given resource id. 442 */ 443static int 444ed98_alloc_port(device_t dev, int rid) 445{ 446 struct ed_softc *sc = device_get_softc(dev); 447 struct resource *res; 448 int error; 449 bus_addr_t *io_nic, *io_asic, adj; 450 static bus_addr_t io_res[ED_NOVELL_IO_PORTS + 1]; 451 int i, n; 452 int offset, reset, data; 453 454 /* Set i/o table for resource manager */ 455 io_nic = io_asic = ed98_ioaddr_generic; 456 offset = ED_NOVELL_ASIC_OFFSET; 457 reset = ED_NOVELL_RESET; 458 data = ED_NOVELL_DATA; 459 n = ED_NOVELL_IO_PORTS; 460 461 switch (sc->type) { 462 case ED_TYPE98_LGY: 463 io_asic = ed98_ioaddr_egy98; /* XXX - Yes, we use egy98 */ 464 offset = 0x0200; 465 reset = 8; 466 break; 467 468 case ED_TYPE98_EGY: 469 io_nic = io_asic = ed98_ioaddr_egy98; 470 offset = 0x0200; 471 reset = 8; 472 break; 473 474 case ED_TYPE98_ICM: 475 offset = 0x0100; 476 break; 477 478 case ED_TYPE98_BDN: 479 io_nic = io_asic = ed98_ioaddr_la98; 480 offset = 0x0100; 481 reset = 0x0c; 482 break; 483 484 case ED_TYPE98_SIC: 485 io_nic = io_asic = ed98_ioaddr_sic98; 486 offset = 0x2000; 487 n = 16+1; 488 break; 489 490 case ED_TYPE98_108: 491 io_nic = io_asic = ed98_ioaddr_nec108; 492 offset = 0x0888; /* XXX - overwritten after */ 493 reset = 1; 494 n = 16; /* XXX - does not set ASIC i/o here */ 495 break; 496 497 case ED_TYPE98_LA98: 498 io_nic = io_asic = ed98_ioaddr_la98; 499 offset = 0x0100; 500 break; 501 502 case ED_TYPE98_CNET98EL: 503 offset = 0x0400; 504 data = 0x0e; 505 break; 506 507 case ED_TYPE98_CNET98: 508 /* XXX - Yes, we use generic i/o here */ 509 offset = 0x0400; 510 break; 511 512 case ED_TYPE98_NW98X: 513 io_nic = io_asic = ed98_ioaddr_nw98x; 514 offset = 0x1000; 515 break; 516 517 case ED_TYPE98_SB98: 518 io_nic = io_asic = ed98_ioaddr_la98; 519 offset = 0x0400; 520 reset = 7; 521 break; 522 523 case ED_TYPE98_NC5098: 524 io_nic = ed98_ioaddr_nw98x; 525 io_asic = ed98_asic_nc5098; 526 offset = 0x2000; 527 reset = 7; 528 n = 16+8; /* XXX */ 529 break; 530 } 531 532 bcopy(io_nic, io_res, sizeof(io_nic[0]) * ED_NOVELL_ASIC_OFFSET); 533 for (i = ED_NOVELL_ASIC_OFFSET; i < ED_NOVELL_IO_PORTS; i++) 534 io_res[i] = io_asic[i - ED_NOVELL_ASIC_OFFSET] + offset; 535 536 res = isa_alloc_resourcev(dev, SYS_RES_IOPORT, &rid, io_res, n, 537 RF_ACTIVE); 538 if (!res) 539 return (ENOENT); 540 541 sc->port_rid = rid; 542 sc->port_res = res; 543 sc->port_used = n; 544 545 /* Re-map i/o table if needed */ 546 switch (sc->type) { 547 case ED_TYPE98_LA98: 548 case ED_TYPE98_NW98X: 549 io_res[n] = io_asic[n - ED_NOVELL_ASIC_OFFSET] + offset; 550 n++; 551 break; 552 553 case ED_TYPE98_108: 554 adj = (rman_get_start(res) & 0xf000) / 2; 555 offset = (offset | adj) - rman_get_start(res); 556 557 for (n = ED_NOVELL_ASIC_OFFSET; n < ED_NOVELL_IO_PORTS; n++) 558 io_res[n] = io_asic[n - ED_NOVELL_ASIC_OFFSET] + offset; 559 break; 560 561 case ED_TYPE98_CNET98: 562 io_nic = io_asic = ed98_ioaddr_cnet98; 563 offset = 1; 564 565 bcopy(io_nic, io_res, sizeof(io_nic[0]) * ED_NOVELL_ASIC_OFFSET); 566 for (n = ED_NOVELL_ASIC_OFFSET; n < ED_NOVELL_IO_PORTS; n++) 567 io_res[n] = io_asic[n - ED_NOVELL_ASIC_OFFSET] + offset; 568 break; 569 570 case ED_TYPE98_NC5098: 571 n = ED_NOVELL_IO_PORTS; 572 break; 573 } 574 575 if (reset != ED_NOVELL_RESET) 576 io_res[ED_NOVELL_ASIC_OFFSET + ED_NOVELL_RESET] = 577 io_res[ED_NOVELL_ASIC_OFFSET + reset]; 578 if (data != ED_NOVELL_DATA) { 579 io_res[ED_NOVELL_ASIC_OFFSET + ED_NOVELL_DATA] = 580 io_res[ED_NOVELL_ASIC_OFFSET + data]; 581#if 0 582 io_res[ED_NOVELL_ASIC_OFFSET + ED_NOVELL_DATA + 1] = 583 io_res[ED_NOVELL_ASIC_OFFSET + data + 1]; 584#endif 585 } 586 587 error = isa_load_resourcev(res, io_res, n); 588 if (error != 0) 589 return (ENOENT); 590#ifdef ED_DEBUG 591 device_printf(dev, "ed98_alloc_port: i/o ports = %d\n", n); 592 for (i = 0; i < n; i++) 593 printf("%x,", io_res[i]); 594 printf("\n"); 595#endif 596 return (0); 597} 598 599static int 600ed98_alloc_memory(dev, rid) 601 device_t dev; 602 int rid; 603{ 604 struct ed_softc *sc = device_get_softc(dev); 605 int error; 606 u_long conf_maddr, conf_msize; 607 608 error = bus_get_resource(dev, SYS_RES_MEMORY, 0, &conf_maddr, 609 &conf_msize); 610 if (error) 611 return (error); 612 613 if ((conf_maddr == 0) || (conf_msize == 0)) 614 return (ENXIO); 615 616 error = ed_alloc_memory(dev, rid, (int) conf_msize); 617 if (error) 618 return (error); 619 620 sc->mem_start = 0; 621 sc->mem_size = conf_msize; 622 623 return (0); 624} 625 626/* 627 * Generic probe routine for testing for the existance of a DS8390. 628 * Must be called after the NIC has just been reset. This routine 629 * works by looking at certain register values that are guaranteed 630 * to be initialized a certain way after power-up or reset. Seems 631 * not to currently work on the 83C690. 632 * 633 * Specifically: 634 * 635 * Register reset bits set bits 636 * Command Register (CR) TXP, STA RD2, STP 637 * Interrupt Status (ISR) RST 638 * Interrupt Mask (IMR) All bits 639 * Data Control (DCR) LAS 640 * Transmit Config. (TCR) LB1, LB0 641 * 642 * XXX - We only check the CR register. 643 * 644 * Return 1 if 8390 was found, 0 if not. 645 */ 646 647static int 648ed98_probe_generic8390(struct ed_softc *sc) 649{ 650 u_char tmp = ed_nic_inb(sc, ED_P0_CR); 651#ifdef DIAGNOSTIC 652 printf("ed?: inb(ED_P0_CR)=%x\n", tmp); 653#endif 654 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != 655 (ED_CR_RD2 | ED_CR_STP)) 656 return (0); 657 658 (void) ed_nic_inb(sc, ED_P0_ISR); 659 660 return (1); 661} 662 663static int 664ed98_probe_Novell(device_t dev, int port_rid, int flags) 665{ 666 struct ed_softc *sc = device_get_softc(dev); 667 int error; 668 int n; 669 u_char romdata[ETHER_ADDR_LEN * 2], tmp; 670 671#ifdef ED_DEBUG 672 device_printf(dev, "ed98_probe_Novell: start\n"); 673#endif 674 error = ed98_alloc_port(dev, port_rid); 675 if (error) 676 return (error); 677 678 sc->asic_offset = ED_NOVELL_ASIC_OFFSET; 679 sc->nic_offset = ED_NOVELL_NIC_OFFSET; 680 681 /* Reset the board */ 682#ifdef ED_DEBUG 683 device_printf(dev, "ed98_probe_Novell: reset\n"); 684#endif 685 switch (sc->type) { 686#if 1 /* XXX - I'm not sure this is really necessary... */ 687 case ED_TYPE98_BDN: 688 tmp = ed_asic_inb(sc, ED_NOVELL_RESET); 689 ed_asic_outb(sc, ED_NOVELL_RESET, (tmp & 0xf0) | 0x08); 690 ed_nic_outb(sc, 0x04, tmp); 691 (void) ed_asic_inb(sc, 0x08); 692 ed_asic_outb(sc, 0x08, tmp); 693 ed_asic_outb(sc, 0x08, tmp & 0x7f); 694 break; 695#endif 696 case ED_TYPE98_NC5098: 697 ed_asic_outb(sc, ED_NOVELL_RESET, 0x00); 698 DELAY(5000); 699 ed_asic_outb(sc, ED_NOVELL_RESET, 0x01); 700 break; 701 702 default: 703 tmp = ed_asic_inb(sc, ED_NOVELL_RESET); 704 705 /* 706 * I don't know if this is necessary; probably cruft leftover from 707 * Clarkson packet driver code. Doesn't do a thing on the boards I've 708 * tested. -DG [note that an outb(0x84, 0) seems to work here, and is 709 * non-invasive...but some boards don't seem to reset and I don't have 710 * complete documentation on what the 'right' thing to do is...so we 711 * do the invasive thing for now. Yuck.] 712 */ 713 ed_asic_outb(sc, ED_NOVELL_RESET, tmp); 714 break; 715 } 716 DELAY(5000); 717 718 /* 719 * This is needed because some NE clones apparently don't reset the 720 * NIC properly (or the NIC chip doesn't reset fully on power-up) XXX 721 * - this makes the probe invasive! ...Done against my better 722 * judgement. -DLG 723 */ 724 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP); 725 DELAY(5000); 726 727 /* Make sure that we really have an 8390 based board */ 728 if (!ed98_probe_generic8390(sc)) 729 return (ENXIO); 730 731 /* Test memory via PIO */ 732#ifdef ED_DEBUG 733 device_printf(dev, "ed98_probe_Novell: test memory\n"); 734#endif 735 sc->cr_proto = ED_CR_RD2; 736 if (!ed_pio_testmem(sc, 8192, 0, flags) && 737 !ed_pio_testmem(sc, 16384, 1, flags)) 738 return (ENXIO); 739 740 /* Setup the board type */ 741#ifdef ED_DEBUG 742 device_printf(dev, "ed98_probe_Novell: board type\n"); 743#endif 744 switch (sc->type) { 745 case ED_TYPE98_BDN: 746 sc->type_str = "LD-BDN"; 747 break; 748 case ED_TYPE98_EGY: 749 sc->type_str = "EGY-98"; 750 break; 751 case ED_TYPE98_LGY: 752 sc->type_str = "LGY-98"; 753 break; 754 case ED_TYPE98_ICM: 755 sc->type_str = "ICM"; 756 break; 757 case ED_TYPE98_108: 758 sc->type_str = "PC-9801-108"; 759 break; 760 case ED_TYPE98_LA98: 761 sc->type_str = "LA-98"; 762 break; 763 case ED_TYPE98_NW98X: 764 sc->type_str = "NW98X"; 765 break; 766 case ED_TYPE98_NC5098: 767 sc->type_str = "NC5098"; 768 break; 769 default: 770 sc->type_str = NULL; 771 break; 772 } 773 774 /* Get station address */ 775 switch (sc->type) { 776 case ED_TYPE98_NC5098: 777 for (n = 0; n < ETHER_ADDR_LEN; n++) 778 sc->enaddr[n] = ed_asic_inb(sc, ED_NC5098_ENADDR + n); 779 break; 780 781 default: 782 ed_pio_readmem(sc, 0, romdata, sizeof(romdata)); 783 for (n = 0; n < ETHER_ADDR_LEN; n++) 784 sc->enaddr[n] = romdata[n * (sc->isa16bit + 1)]; 785 break; 786 } 787 788 /* clear any pending interrupts that might have occurred above */ 789 ed_nic_outb(sc, ED_P0_ISR, 0xff); 790
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791 sc->sc_write_mbufs = ed_pio_write_mbufs; |
792 return (0); 793} 794 795/* 796 * Probe and vendor-specific initialization routine for SIC-98 boards 797 */ 798static int 799ed_probe_SIC98(device_t dev, int port_rid, int flags) 800{ 801 struct ed_softc *sc = device_get_softc(dev); 802 int error; 803 int i; 804 u_char sum; 805 806 /* 807 * Setup card RAM and I/O address 808 * Kernel Virtual to segment C0000-DFFFF???? 809 */ 810 error = ed98_alloc_port(dev, port_rid); 811 if (error) 812 return (error); 813 814 sc->asic_offset = ED_SIC_ASIC_OFFSET; 815 sc->nic_offset = ED_SIC_NIC_OFFSET; 816 817 error = ed98_alloc_memory(dev, 0); 818 if (error) 819 return (error); 820 821 /* Reset card to force it into a known state. */ 822 ed_asic_outb(sc, 0, 0x00); 823 DELAY(100); 824 if (ED_TYPE98SUB(flags) == 0) { 825 /* SIC-98/SIU-98 */ 826 ed_asic_outb(sc, 0, 0x94); 827 DELAY(100); 828 ed_asic_outb(sc, 0, 0x94); 829 } else { 830 /* SIU-98-D */ 831 ed_asic_outb(sc, 0, 0x80); 832 DELAY(100); 833 ed_asic_outb(sc, 0, 0x94); 834 DELAY(100); 835 ed_asic_outb(sc, 0, 0x9e); 836 } 837 DELAY(100); 838 839 /* 840 * Here we check the card ROM, if the checksum passes, and the 841 * type code and ethernet address check out, then we know we have 842 * an SIC card. 843 */ 844 sum = bus_space_read_1(sc->mem_bst, sc->mem_bsh, 6 * 2); 845 for (i = 0; i < ETHER_ADDR_LEN; i++) 846 sum ^= (sc->enaddr[i] = 847 bus_space_read_1(sc->mem_bst, sc->mem_bsh, i * 2)); 848#ifdef ED_DEBUG 849 device_printf(dev, "ed_probe_sic98: got address %6D\n", 850 sc->enaddr, ":"); 851#endif 852 if (sum != 0) 853 return (ENXIO); 854 if ((sc->enaddr[0] | sc->enaddr[1] | sc->enaddr[2]) == 0) 855 return (ENXIO); 856 857 sc->vendor = ED_VENDOR_SIC; 858 sc->type_str = "SIC98"; 859 sc->isa16bit = 1; 860 sc->cr_proto = 0; 861 862 /* 863 * SIC RAM page 0x0000-0x3fff(or 0x7fff) 864 */ 865 if (ED_TYPE98SUB(flags) == 0) 866 ed_asic_outb(sc, 0, 0x90); 867 else 868 ed_asic_outb(sc, 0, 0x8e); 869 DELAY(100); 870 871 error = ed_clear_memory(dev); 872 if (error) 873 return (error); 874 875 sc->mem_shared = 1; 876 sc->mem_end = sc->mem_start + sc->mem_size; 877 878 /* 879 * allocate one xmit buffer if < 16k, two buffers otherwise 880 */ 881 if ((sc->mem_size < 16384) || (flags & ED_FLAGS_NO_MULTI_BUFFERING)) 882 sc->txb_cnt = 1; 883 else 884 sc->txb_cnt = 2; 885 sc->tx_page_start = 0; 886 887 sc->rec_page_start = sc->tx_page_start + ED_TXBUF_SIZE * sc->txb_cnt; 888 sc->rec_page_stop = sc->tx_page_start + sc->mem_size / ED_PAGE_SIZE; 889 890 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 891
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892 sc->sc_write_mbufs = ed_shmem_write_mbufs; |
893 return (0); 894} 895 896/* 897 * Contec C-NET(98) series support routines 898 */ 899static void 900ed_reset_CNET98(struct ed_softc *sc, int flags) 901{ 902 u_int init_addr = ED_CNET98_INIT; 903 u_char tmp; 904 905 /* Choose initial register address */ 906 if (ED_TYPE98SUB(flags) != 0) { 907 init_addr = ED_CNET98_INIT2; 908 } 909#ifdef ED_DEBUG 910 printf("ed?: initial register=%x\n", init_addr); 911#endif 912 /* 913 * Reset the board to force it into a known state. 914 */ 915 outb(init_addr, 0x00); /* request */ 916 DELAY(5000); 917 outb(init_addr, 0x01); /* cancel */ 918 DELAY(5000); 919 920 /* 921 * Set I/O address(A15-12) and cpu type 922 * 923 * AAAAIXXC(8bit) 924 * AAAA: A15-A12, I: I/O enable, XX: reserved, C: CPU type 925 * 926 * CPU type is 1:80286 or higher, 0:not. 927 * But FreeBSD runs under i386 or higher, thus it must be 1. 928 */ 929 tmp = (rman_get_start(sc->port_res) & 0xf000) >> 8; 930 tmp |= (0x08 | 0x01); 931#ifdef ED_DEBUG 932 printf("ed?: outb(%x, %x)\n", init_addr + 2, tmp); 933#endif 934 outb(init_addr + 2, tmp); 935 DELAY(5000); 936 937 /* 938 * This is needed because some NE clones apparently don't reset the 939 * NIC properly (or the NIC chip doesn't reset fully on power-up) XXX 940 * - this makes the probe invasive! ...Done against my better 941 * judgement. -DLG 942 */ 943 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP); 944 DELAY(5000); 945} 946 947static void 948ed_winsel_CNET98(struct ed_softc *sc, u_short bank) 949{ 950 u_char mem = (rman_get_start(sc->mem_res) >> 12) & 0xff; 951 952 /* 953 * Disable window memory 954 * bit7 is 0:disable 955 */ 956 ed_asic_outb(sc, ED_CNET98_WIN_REG, mem & 0x7f); 957 DELAY(10); 958 959 /* 960 * Select window address 961 * FreeBSD address 0xf00xxxxx 962 */ 963 ed_asic_outb(sc, ED_CNET98_MAP_REG0L, bank & 0xff); 964 DELAY(10); 965 ed_asic_outb(sc, ED_CNET98_MAP_REG0H, (bank >> 8) & 0xff); 966 DELAY(10); 967 ed_asic_outb(sc, ED_CNET98_MAP_REG1L, 0x00); 968 DELAY(10); 969 ed_asic_outb(sc, ED_CNET98_MAP_REG1H, 0x41); 970 DELAY(10); 971 ed_asic_outb(sc, ED_CNET98_MAP_REG2L, 0x00); 972 DELAY(10); 973 ed_asic_outb(sc, ED_CNET98_MAP_REG2H, 0x42); 974 DELAY(10); 975 ed_asic_outb(sc, ED_CNET98_MAP_REG3L, 0x00); 976 DELAY(10); 977 ed_asic_outb(sc, ED_CNET98_MAP_REG3H, 0x43); 978 DELAY(10); 979 980 /* 981 * Enable window memory(16Kbyte) 982 * bit7 is 1:enable 983 */ 984#ifdef ED_DEBUG 985 printf("ed?: window start address=%x\n", mem); 986#endif 987 ed_asic_outb(sc, ED_CNET98_WIN_REG, mem); 988 DELAY(10); 989} 990 991/* 992 * Probe and vendor-specific initialization routine for C-NET(98) boards 993 */ 994static int 995ed_probe_CNET98(device_t dev, int port_rid, int flags) 996{ 997 struct ed_softc *sc = device_get_softc(dev); 998 int error; 999 u_char tmp; 1000 u_long conf_irq, junk; 1001#ifdef DIAGNOSTIC 1002 u_char tmp_s; 1003#endif 1004 1005 error = ed98_alloc_port(dev, port_rid); 1006 if (error) 1007 return (error); 1008 1009 sc->asic_offset = ED_NOVELL_ASIC_OFFSET; 1010 sc->nic_offset = ED_NOVELL_NIC_OFFSET; 1011 1012 error = ed98_alloc_memory(dev, 0); 1013 if (error) 1014 return (error); 1015 1016 /* Check I/O address. 0x[a-f]3d0 are allowed. */ 1017 if (((rman_get_start(sc->port_res) & 0x0fff) != 0x03d0) 1018 || ((rman_get_start(sc->port_res) & 0xf000) < (u_short) 0xa000)) { 1019#ifdef DIAGNOSTIC 1020 device_printf(dev, "Invalid i/o port configuration (0x%lx) " 1021 "must be %s for %s\n", rman_get_start(sc->port_res), 1022 "0x[a-f]3d0", "CNET98"); 1023#endif 1024 return (ENXIO); 1025 } 1026 1027#ifdef DIAGNOSTIC 1028 /* Check window area address */ 1029 tmp_s = rman_get_start(sc->mem_res) >> 12; 1030 if (tmp_s < 0x80) { 1031 device_printf(dev, "Please change window address(0x%lx)\n", 1032 rman_get_start(sc->mem_res)); 1033 return (ENXIO); 1034 } 1035 1036 tmp_s &= 0x0f; 1037 tmp = rman_get_start(sc->port_res) >> 12; 1038 if ((tmp_s <= tmp) && (tmp < (tmp_s + 4))) { 1039 device_printf(dev, "Please change iobase address(0x%lx) " 1040 "or window address(0x%lx)\n", 1041 rman_get_start(sc->port_res), 1042 rman_get_start(sc->mem_res)); 1043 return (ENXIO); 1044 } 1045#endif 1046 /* Reset the board */ 1047 ed_reset_CNET98(sc, flags); 1048 1049 /* 1050 * This is needed because some NE clones apparently don't reset the 1051 * NIC properly (or the NIC chip doesn't reset fully on power-up) XXX 1052 * - this makes the probe invasive! ...Done against my better 1053 * judgement. -DLG 1054 */ 1055 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP); 1056 DELAY(5000); 1057 1058 /* Make sure that we really have an 8390 based board */ 1059 if (!ed98_probe_generic8390(sc)) 1060 return (ENXIO); 1061 1062 /* 1063 * Set window ethernet address area 1064 * board memory base 0x480000 data 256byte 1065 */ 1066 ed_winsel_CNET98(sc, 0x4800); 1067 1068 /* 1069 * Get station address from on-board ROM 1070 */ 1071 bus_space_read_region_1(sc->mem_bst, sc->mem_bsh, sc->mem_start, 1072 sc->enaddr, ETHER_ADDR_LEN); 1073 1074 sc->vendor = ED_VENDOR_MISC; 1075 sc->type_str = "CNET98"; 1076 sc->isa16bit = 0; 1077 sc->cr_proto = ED_CR_RD2; 1078 1079 /* 1080 * Set window buffer memory area 1081 * board memory base 0x400000 data 16kbyte 1082 */ 1083 ed_winsel_CNET98(sc, 0x4000); 1084 1085 error = ed_clear_memory(dev); 1086 if (error) 1087 return (error); 1088 1089 sc->mem_shared = 1; 1090 sc->mem_end = sc->mem_start + sc->mem_size; 1091 1092 sc->txb_cnt = 1; /* XXX */ 1093 sc->tx_page_start = 0; 1094 1095 sc->rec_page_start = sc->tx_page_start + ED_TXBUF_SIZE; 1096 sc->rec_page_stop = sc->tx_page_start + sc->mem_size / ED_PAGE_SIZE; 1097 1098 sc->mem_ring = sc->mem_start + ED_PAGE_SIZE * ED_TXBUF_SIZE; 1099 1100 /* 1101 * Set interrupt level 1102 */ 1103 error = bus_get_resource(dev, SYS_RES_IRQ, 0, &conf_irq, &junk); 1104 if (error) 1105 return (error); 1106 1107 switch (conf_irq) { 1108 case 3: 1109 tmp = ED_CNET98_INT_IRQ3; 1110 break; 1111 case 5: 1112 tmp = ED_CNET98_INT_IRQ5; 1113 break; 1114 case 6: 1115 tmp = ED_CNET98_INT_IRQ6; 1116 break; 1117 case 9: 1118 tmp = ED_CNET98_INT_IRQ9; 1119 break; 1120 case 12: 1121 tmp = ED_CNET98_INT_IRQ12; 1122 break; 1123 case 13: 1124 tmp = ED_CNET98_INT_IRQ13; 1125 break; 1126 default: 1127 device_printf(dev, "Invalid irq configuration (%ld) must be " 1128 "%s for %s\n", conf_irq, "3,5,6,9,12,13", "CNET98"); 1129 return (ENXIO); 1130 } 1131 ed_asic_outb(sc, ED_CNET98_INT_LEV, tmp); 1132 DELAY(1000); 1133 /* 1134 * Set interrupt mask. 1135 * bit7:1 all interrupt mask 1136 * bit1:1 timer interrupt mask 1137 * bit0:0 NS controler interrupt enable 1138 */ 1139 ed_asic_outb(sc, ED_CNET98_INT_MASK, 0x7e); 1140 DELAY(1000); 1141
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1142 sc->sc_write_mbufs = ed_shmem_write_mbufs; |
1143 return (0); 1144} 1145 1146/* 1147 * Probe and vendor-specific initialization routine for C-NET(98)E/L boards 1148 */ 1149static int 1150ed_probe_CNET98EL(device_t dev, int port_rid, int flags) 1151{ 1152 struct ed_softc *sc = device_get_softc(dev); 1153 int error; 1154 int i; 1155 u_char romdata[ETHER_ADDR_LEN * 2], tmp; 1156 u_long conf_irq, junk; 1157 1158 error = ed98_alloc_port(dev, port_rid); 1159 if (error) 1160 return (error); 1161 1162 sc->asic_offset = ED_NOVELL_ASIC_OFFSET; 1163 sc->nic_offset = ED_NOVELL_NIC_OFFSET; 1164 1165 /* Check I/O address. 0x[0-f]3d0 are allowed. */ 1166 if ((rman_get_start(sc->port_res) & 0x0fff) != 0x03d0) { 1167#ifdef DIAGNOSTIC 1168 device_printf(dev, "Invalid i/o port configuration (0x%lx) " 1169 "must be %s for %s\n", rman_get_start(sc->port_res), 1170 "0x?3d0", "CNET98E/L"); 1171#endif 1172 return (ENXIO); 1173 } 1174 1175 /* Reset the board */ 1176 ed_reset_CNET98(sc, flags); 1177 1178 /* 1179 * This is needed because some NE clones apparently don't reset the 1180 * NIC properly (or the NIC chip doesn't reset fully on power-up) XXX 1181 * - this makes the probe invasive! ...Done against my better 1182 * judgement. -DLG 1183 */ 1184 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP); 1185 DELAY(5000); 1186 1187 /* Make sure that we really have an 8390 based board */ 1188 if (!ed98_probe_generic8390(sc)) 1189 return (ENXIO); 1190 1191 /* Test memory via PIO */ 1192 sc->cr_proto = ED_CR_RD2; 1193 if (!ed_pio_testmem(sc, ED_CNET98EL_PAGE_OFFSET, 1, flags)) 1194 return (ENXIO); 1195 1196 /* This looks like a C-NET(98)E/L board. */ 1197 sc->type_str = "CNET98E/L"; 1198 1199 /* 1200 * Set IRQ. C-NET(98)E/L only allows a choice of irq 3,5,6. 1201 */ 1202 error = bus_get_resource(dev, SYS_RES_IRQ, 0, &conf_irq, &junk); 1203 if (error) 1204 return (error); 1205 1206 switch (conf_irq) { 1207 case 3: 1208 tmp = ED_CNET98EL_ICR_IRQ3; 1209 break; 1210 case 5: 1211 tmp = ED_CNET98EL_ICR_IRQ5; 1212 break; 1213 case 6: 1214 tmp = ED_CNET98EL_ICR_IRQ6; 1215 break; 1216#if 0 1217 case 12: 1218 tmp = ED_CNET98EL_ICR_IRQ12; 1219 break; 1220#endif 1221 default: 1222 device_printf(dev, "Invalid irq configuration (%ld) must be " 1223 "%s for %s\n", conf_irq, "3,5,6", "CNET98E/L"); 1224 return (ENXIO); 1225 } 1226 ed_asic_outb(sc, ED_CNET98EL_ICR, tmp); 1227 ed_asic_outb(sc, ED_CNET98EL_IMR, 0x7e); 1228 1229 /* Get station address from on-board ROM */ 1230 ed_pio_readmem(sc, 16384, romdata, sizeof(romdata)); 1231 for (i = 0; i < ETHER_ADDR_LEN; i++) 1232 sc->enaddr[i] = romdata[i * 2]; 1233 1234 /* clear any pending interrupts that might have occurred above */ 1235 ed_nic_outb(sc, ED_P0_ISR, 0xff); 1236
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1237 sc->sc_write_mbufs = ed_pio_write_mbufs; |
1238 return (0); 1239} 1240 1241/* 1242 * Probe and vendor-specific initialization routine for PC-9801-77 boards 1243 */ 1244static int 1245ed_probe_NEC77(device_t dev, int port_rid, int flags) 1246{ 1247 struct ed_softc *sc = device_get_softc(dev); 1248 int error; 1249 u_char tmp; 1250 u_long conf_irq, junk; 1251 1252 error = ed98_probe_Novell(dev, port_rid, flags); 1253 if (error) 1254 return (error); 1255 1256 /* LA/T-98 does not need IRQ setting. */ 1257 if (ED_TYPE98SUB(flags) == 0) 1258 return (0); 1259 1260 /* 1261 * Set IRQ. PC-9801-77 only allows a choice of irq 3,5,6,12,13. 1262 */ 1263 error = bus_get_resource(dev, SYS_RES_IRQ, 0, &conf_irq, &junk); 1264 if (error) 1265 return (error); 1266 1267 switch (conf_irq) { 1268 case 3: 1269 tmp = ED_NEC77_IRQ3; 1270 break; 1271 case 5: 1272 tmp = ED_NEC77_IRQ5; 1273 break; 1274 case 6: 1275 tmp = ED_NEC77_IRQ6; 1276 break; 1277 case 12: 1278 tmp = ED_NEC77_IRQ12; 1279 break; 1280 case 13: 1281 tmp = ED_NEC77_IRQ13; 1282 break; 1283 default: 1284 device_printf(dev, "Invalid irq configuration (%ld) must be " 1285 "%s for %s\n", conf_irq, "3,5,6,12,13", "PC-9801-77"); 1286 return (ENXIO); 1287 } 1288 ed_asic_outb(sc, ED_NEC77_IRQ, tmp); 1289 1290 return (0); 1291} 1292 1293/* 1294 * Probe and vendor-specific initialization routine for EC/EP-98X boards 1295 */ 1296static int 1297ed_probe_NW98X(device_t dev, int port_rid, int flags) 1298{ 1299 struct ed_softc *sc = device_get_softc(dev); 1300 int error; 1301 u_char tmp; 1302 u_long conf_irq, junk; 1303 1304 error = ed98_probe_Novell(dev, port_rid, flags); 1305 if (error) 1306 return (error); 1307 1308 /* Networld 98X3 does not need IRQ setting. */ 1309 if (ED_TYPE98SUB(flags) == 0) 1310 return (0); 1311 1312 /* 1313 * Set IRQ. EC/EP-98X only allows a choice of irq 3,5,6,12,13. 1314 */ 1315 error = bus_get_resource(dev, SYS_RES_IRQ, 0, &conf_irq, &junk); 1316 if (error) 1317 return (error); 1318 1319 switch (conf_irq) { 1320 case 3: 1321 tmp = ED_NW98X_IRQ3; 1322 break; 1323 case 5: 1324 tmp = ED_NW98X_IRQ5; 1325 break; 1326 case 6: 1327 tmp = ED_NW98X_IRQ6; 1328 break; 1329 case 12: 1330 tmp = ED_NW98X_IRQ12; 1331 break; 1332 case 13: 1333 tmp = ED_NW98X_IRQ13; 1334 break; 1335 default: 1336 device_printf(dev, "Invalid irq configuration (%ld) must be " 1337 "%s for %s\n", conf_irq, "3,5,6,12,13", "EC/EP-98X"); 1338 return (ENXIO); 1339 } 1340 ed_asic_outb(sc, ED_NW98X_IRQ, tmp); 1341 1342 return (0); 1343} 1344 1345/* 1346 * Read SB-9801 station address from Serial Two-Wire EEPROM 1347 */ 1348static void 1349ed_get_SB98(struct ed_softc *sc) 1350{ 1351 int i, j; 1352 u_char mask, val; 1353 1354 /* enable EEPROM acceess */ 1355 ed_asic_outb(sc, ED_SB98_EEPENA, ED_SB98_EEPENA_ENABLE); 1356 1357 /* output start command */ 1358 ed_asic_outb(sc, ED_SB98_EEP, ED_SB98_EEP_SDA | ED_SB98_EEP_SCL); 1359 DELAY(ED_SB98_EEP_DELAY); 1360 ed_asic_outb(sc, ED_SB98_EEP, ED_SB98_EEP_SCL); 1361 DELAY(ED_SB98_EEP_DELAY); 1362 1363 /* output address (7bit) */ 1364 for (mask = 0x40; mask != 0; mask >>= 1) { 1365 val = 0; 1366 if (ED_SB98_ADDRESS & mask) 1367 val = ED_SB98_EEP_SDA; 1368 ed_asic_outb(sc, ED_SB98_EEP, val); 1369 DELAY(ED_SB98_EEP_DELAY); 1370 ed_asic_outb(sc, ED_SB98_EEP, val | ED_SB98_EEP_SCL); 1371 DELAY(ED_SB98_EEP_DELAY); 1372 } 1373 1374 /* output READ command */ 1375 ed_asic_outb(sc, ED_SB98_EEP, ED_SB98_EEP_READ); 1376 DELAY(ED_SB98_EEP_DELAY); 1377 ed_asic_outb(sc, ED_SB98_EEP, ED_SB98_EEP_READ | ED_SB98_EEP_SCL); 1378 DELAY(ED_SB98_EEP_DELAY); 1379 1380 /* read station address */ 1381 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1382 /* output ACK */ 1383 ed_asic_outb(sc, ED_SB98_EEP, 0); 1384 DELAY(ED_SB98_EEP_DELAY); 1385 ed_asic_outb(sc, ED_SB98_EEP, ED_SB98_EEP_SCL); 1386 DELAY(ED_SB98_EEP_DELAY); 1387 1388 val = 0; 1389 for (j = 0; j < 8; j++) { 1390 ed_asic_outb(sc, ED_SB98_EEP, ED_SB98_EEP_SDA); 1391 DELAY(ED_SB98_EEP_DELAY); 1392 ed_asic_outb(sc, ED_SB98_EEP, ED_SB98_EEP_SDA | ED_SB98_EEP_SCL); 1393 DELAY(ED_SB98_EEP_DELAY); 1394 val <<= 1; 1395 val |= (ed_asic_inb(sc, ED_SB98_EEP) & ED_SB98_EEP_SDA); 1396 DELAY(ED_SB98_EEP_DELAY); 1397 } 1398 sc->enaddr[i] = val; 1399 } 1400 1401 /* output Last ACK */ 1402 ed_asic_outb(sc, ED_SB98_EEP, ED_SB98_EEP_SDA); 1403 DELAY(ED_SB98_EEP_DELAY); 1404 ed_asic_outb(sc, ED_SB98_EEP, ED_SB98_EEP_SDA | ED_SB98_EEP_SCL); 1405 DELAY(ED_SB98_EEP_DELAY); 1406 1407 /* output stop command */ 1408 ed_asic_outb(sc, ED_SB98_EEP, ED_SB98_EEP_SCL); 1409 DELAY(ED_SB98_EEP_DELAY); 1410 ed_asic_outb(sc, ED_SB98_EEP, ED_SB98_EEP_SDA | ED_SB98_EEP_SCL); 1411 DELAY(ED_SB98_EEP_DELAY); 1412 1413 /* disable EEPROM access */ 1414 ed_asic_outb(sc, ED_SB98_EEPENA, ED_SB98_EEPENA_DISABLE); 1415} 1416 1417/* 1418 * Probe and vendor-specific initialization routine for SB-9801 boards 1419 */ 1420static int 1421ed_probe_SB98(device_t dev, int port_rid, int flags) 1422{ 1423 struct ed_softc *sc = device_get_softc(dev); 1424 int error; 1425 u_char tmp; 1426 u_long conf_irq, junk; 1427 1428 error = ed98_alloc_port(dev, port_rid); 1429 if (error) 1430 return (error); 1431 1432 sc->asic_offset = ED_NOVELL_ASIC_OFFSET; 1433 sc->nic_offset = ED_NOVELL_NIC_OFFSET; 1434 1435 /* Check I/O address. 00d[02468ace] are allowed. */ 1436 if ((rman_get_start(sc->port_res) & ~0x000e) != 0x00d0) { 1437#ifdef DIAGNOSTIC 1438 device_printf(dev, "Invalid i/o port configuration (0x%lx) " 1439 "must be %s for %s\n", rman_get_start(sc->port_res), 1440 "0xd?", "SB9801"); 1441#endif 1442 return (ENXIO); 1443 } 1444 1445 /* Write I/O port address and read 4 times */ 1446 outb(ED_SB98_IO_INHIBIT, rman_get_start(sc->port_res) & 0xff); 1447 (void) inb(ED_SB98_IO_INHIBIT); DELAY(300); 1448 (void) inb(ED_SB98_IO_INHIBIT); DELAY(300); 1449 (void) inb(ED_SB98_IO_INHIBIT); DELAY(300); 1450 (void) inb(ED_SB98_IO_INHIBIT); DELAY(300); 1451 1452 /* 1453 * Check IRQ. Soliton SB-9801 only allows a choice of 1454 * irq 3,5,6,12 1455 */ 1456 error = bus_get_resource(dev, SYS_RES_IRQ, 0, &conf_irq, &junk); 1457 if (error) 1458 return (error); 1459 1460 switch (conf_irq) { 1461 case 3: 1462 tmp = ED_SB98_CFG_IRQ3; 1463 break; 1464 case 5: 1465 tmp = ED_SB98_CFG_IRQ5; 1466 break; 1467 case 6: 1468 tmp = ED_SB98_CFG_IRQ6; 1469 break; 1470 case 12: 1471 tmp = ED_SB98_CFG_IRQ12; 1472 break; 1473 default: 1474 device_printf(dev, "Invalid irq configuration (%ld) must be " 1475 "%s for %s\n", conf_irq, "3,5,6,12", "SB9801"); 1476 return (ENXIO); 1477 } 1478 1479 if (flags & ED_FLAGS_DISABLE_TRANCEIVER) 1480 tmp |= ED_SB98_CFG_ALTPORT; 1481 ed_asic_outb(sc, ED_SB98_CFG, ED_SB98_CFG_ENABLE | tmp); 1482 ed_asic_outb(sc, ED_SB98_POLARITY, 0x01); 1483 1484 /* Reset the board. */ 1485 ed_asic_outb(sc, ED_NOVELL_RESET, 0x7a); 1486 DELAY(300); 1487 ed_asic_outb(sc, ED_NOVELL_RESET, 0x79); 1488 DELAY(300); 1489 1490 /* 1491 * This is needed because some NE clones apparently don't reset the 1492 * NIC properly (or the NIC chip doesn't reset fully on power-up) XXX 1493 * - this makes the probe invasive! ...Done against my better 1494 * judgement. -DLG 1495 */ 1496 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP); 1497 DELAY(5000); 1498 1499 /* Make sure that we really have an 8390 based board */ 1500 if (!ed98_probe_generic8390(sc)) 1501 return (ENXIO); 1502 1503 /* Test memory via PIO */ 1504 sc->cr_proto = ED_CR_RD2;
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1501 if (!ed_pio_testmem(sc, 16384, 1, flags)) {
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1505 if (!ed_pio_testmem(sc, 16384, 1, flags)) |
1506 return (ENXIO);
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1503 }
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1507 1508 /* This looks like an SB9801 board. */ 1509 sc->type_str = "SB9801"; 1510 1511 /* Get station address */ 1512 ed_get_SB98(sc); 1513 1514 /* clear any pending interrupts that might have occurred above */ 1515 ed_nic_outb(sc, ED_P0_ISR, 0xff); 1516
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1517 sc->sc_write_mbufs = ed_pio_write_mbufs; |
1518 return (0); 1519} 1520 1521/* 1522 * Test the ability to read and write to the NIC memory. 1523 */ 1524static int 1525ed_pio_testmem(struct ed_softc *sc, int page_offset, int isa16bit, int flags) 1526{ 1527 u_long memsize; 1528 static char test_pattern[32] = "THIS is A memory TEST pattern"; 1529 char test_buffer[32]; 1530#ifdef DIAGNOSTIC 1531 int page_end; 1532#endif 1533 1534 sc->vendor = ED_VENDOR_NOVELL; 1535 sc->mem_shared = 0; 1536 sc->isa16bit = isa16bit; 1537 1538 /* 8k of memory plus an additional 8k if 16bit */ 1539 memsize = (isa16bit ? 16384 : 8192); 1540 1541 /* 1542 * This prevents packets from being stored in the NIC memory when the 1543 * readmem routine turns on the start bit in the CR. 1544 */ 1545 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON); 1546 1547 /* Initialize DCR for byte/word operations */ 1548 if (isa16bit) 1549 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 1550 else 1551 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 1552 ed_nic_outb(sc, ED_P0_PSTART, page_offset / ED_PAGE_SIZE); 1553 ed_nic_outb(sc, ED_P0_PSTOP, (page_offset + memsize) / ED_PAGE_SIZE); 1554#ifdef ED_DEBUG 1555 printf("ed?: ed_pio_testmem: page start=%x, end=%lx", 1556 page_offset, page_offset + memsize); 1557#endif 1558 1559 /* 1560 * Write a test pattern. If this fails, then we don't know 1561 * what this board is. 1562 */ 1563 ed_pio_writemem(sc, test_pattern, page_offset, sizeof(test_pattern)); 1564 ed_pio_readmem(sc, page_offset, test_buffer, sizeof(test_pattern)); 1565 1566 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) { 1567#ifdef ED_DEBUG 1568 printf("ed?: ed_pio_testmem: bcmp(page %x) NG", page_offset); 1569#endif 1570 return (0); 1571 } 1572 1573#ifdef DIAGNOSTIC 1574 /* Check the bottom. */ 1575 page_end = page_offset + memsize - ED_PAGE_SIZE; 1576 ed_pio_writemem(sc, test_pattern, page_end, sizeof(test_pattern)); 1577 ed_pio_readmem(sc, page_end, test_buffer, sizeof(test_pattern)); 1578 1579 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) { 1580#ifdef ED_DEBUG 1581 printf("ed?: ed_pio_testmem: bcmp(page %x) NG", page_end); 1582#endif 1583 return (0); 1584 } 1585#endif 1586 sc->mem_size = memsize; 1587 sc->mem_start = page_offset; 1588 sc->mem_end = sc->mem_start + memsize; 1589 sc->tx_page_start = page_offset / ED_PAGE_SIZE; 1590 1591 /* 1592 * Use one xmit buffer if < 16k, two buffers otherwise (if not told 1593 * otherwise). 1594 */ 1595 if ((memsize < 16384) || (flags & ED_FLAGS_NO_MULTI_BUFFERING)) 1596 sc->txb_cnt = 1; 1597 else 1598 sc->txb_cnt = 2; 1599 1600 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; 1601 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 1602 1603 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 1604 1605 return (1); 1606} 1607 1608static device_method_t ed_cbus_methods[] = { 1609 /* Device interface */ 1610 DEVMETHOD(device_probe, ed_cbus_probe), 1611 DEVMETHOD(device_attach, ed_cbus_attach), 1612 DEVMETHOD(device_detach, ed_detach), 1613 1614 { 0, 0 } 1615}; 1616 1617static driver_t ed_cbus_driver = { 1618 "ed", 1619 ed_cbus_methods, 1620 sizeof(struct ed_softc) 1621}; 1622 1623DRIVER_MODULE(ed, isa, ed_cbus_driver, ed_devclass, 0, 0); 1624MODULE_DEPEND(ed, isa, 1, 1, 1); 1625MODULE_DEPEND(ed, ether, 1, 1, 1);
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